CN117199065A - Power semiconductor device module - Google Patents
Power semiconductor device module Download PDFInfo
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- CN117199065A CN117199065A CN202311454562.9A CN202311454562A CN117199065A CN 117199065 A CN117199065 A CN 117199065A CN 202311454562 A CN202311454562 A CN 202311454562A CN 117199065 A CN117199065 A CN 117199065A
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- silicon carbide
- wiring board
- plate
- plate body
- semiconductor device
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 62
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 59
- 239000000758 substrate Substances 0.000 claims abstract description 33
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 33
- 229910052709 silver Inorganic materials 0.000 claims description 33
- 239000004332 silver Substances 0.000 claims description 33
- 229910052782 aluminium Inorganic materials 0.000 claims description 12
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 10
- 229910052710 silicon Inorganic materials 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 9
- 229910052802 copper Inorganic materials 0.000 claims description 9
- 239000010949 copper Substances 0.000 claims description 9
- 239000000919 ceramic Substances 0.000 claims description 7
- 238000001816 cooling Methods 0.000 claims description 5
- 229910000679 solder Inorganic materials 0.000 claims description 5
- -1 silicon carbide metal oxide Chemical class 0.000 claims description 4
- 230000005669 field effect Effects 0.000 claims description 3
- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 3
- 230000003014 reinforcing effect Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000011217 control strategy Methods 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
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- Power Conversion In General (AREA)
Abstract
The invention relates to the field of semiconductors, in particular to a power semiconductor device module, which comprises: the shell comprises a bottom shell and an upper cover, and a space for accommodating components is formed between the bottom shell and the upper cover; the base plate is arranged on the bottom shell and comprises a first plate body, a second plate body and a third plate body which are spliced into a square shape and are provided with gaps; the first switch unit and the second switch unit are provided with the same device and are symmetrically arranged on the left part and the right part of the substrate in a center mode, and each of the first switch unit and the second switch unit consists of an alternating current input terminal, a wiring board, a silicon carbide MOSFET, two IGBT chips, a plurality of direct current terminals, a plurality of first Schottky diodes and a plurality of alternating current output terminals. The invention arranges the first switch unit and the second switch unit on the substrate in a central symmetry way, so that only one wiring board is needed to be arranged at the corresponding alternating current input terminal and alternating current output terminal, thereby generating the minimum distance between the terminals, and optimizing the power supply loop to realize low inductance.
Description
Technical Field
The present disclosure relates to semiconductor devices, and particularly to a power semiconductor device module.
Background
A power module is an electronic device that converts electrical energy from a power source into a desired form of electrical power for supply to an electronic device or circuit. These modules typically contain various electronic components such as power semiconductors, inductors, capacitors, heat sinks, and packages, etc. to effect the conversion, control, and distribution of electrical energy. The power module is widely applied to various application fields including industry, electronics, communication, automobiles, solar energy and wind energy systems, etc. to meet different power requirements.
The commonly used semiconductor devices include a bipolar silicon IGBT (Si-IGBT) and a silicon carbide MOSFET (SiC-MOSFET), wherein the silicon carbide MOSFET has the advantages of high-speed switching, low power consumption, high switching frequency and small volume, but the cost is higher, and the bipolar silicon IGBT has lower cost, but the volume is large and the switching speed is low. The advantages of the two can be utilized when the two are combined into the hybrid switch, and the switch performance can be improved. In the hybrid switch in the prior art, due to the lack of a control strategy for an IGBT and transistor packaging scheme and stray inductance, the design of the hybrid switch can separate and package the bipolar silicon IGBT and the silicon carbide MOSFET, and the bipolar silicon IGBT and the silicon carbide MOSFET are externally interconnected by adopting a circuit board or a bus, but the interconnection inductance is generated between the bipolar silicon IGBT and the silicon carbide MOSFET, so that a circuit branch is unbalanced, and the switching loss is increased.
Disclosure of Invention
The invention aims to provide a power semiconductor device module which is used for solving the problem that a hybrid switch packages an IGBT and a transistor together in the prior art.
In order to achieve the above purpose, the following technical scheme is adopted:
a power semiconductor device module, the module comprising:
the shell comprises a bottom shell and an upper cover, and a space for accommodating components is formed between the bottom shell and the upper cover;
the base plate is arranged on the bottom shell and comprises a first plate body, a second plate body and a third plate body which are spliced into a square shape and are provided with gaps;
the first switch unit and the second switch unit are provided with the same devices and are arranged on the left part and the right part of the substrate in a central symmetry mode, wherein in the left part of the substrate, a plurality of first alternating current input terminals, a first wiring board, a first silicon carbide MOSFET and two first IGBT chips are arranged on one side of the first wiring board, the first wiring board is positioned between the first alternating current input terminals and the first IGBT chips and the first silicon carbide MOSFET, a plurality of first direct current terminals and a plurality of first Schottky diodes are arranged on the second board, a plurality of first alternating current output terminals are arranged on the third board, the two first IGBT chips and the first silicon carbide MOSFET are respectively bonded to the second board through silver clamps, the plurality of first Schottky diodes are respectively bonded to the third board through silver clamps of the same shape, and the first control terminals are arranged on the first wiring board;
in the right part of the substrate, a plurality of second alternating current input terminals and second Schottky diodes are arranged on the first plate body, a second direct current terminal, a second wiring board, a second silicon carbide MOSFET and two second IGBT chips which are bonded on the second wiring board and are arranged on one side of the second wiring board are arranged on the second plate body, a plurality of second alternating current output terminals are arranged on the third plate body, the second Schottky diodes are bonded on the second plate body through silver clips, the second silicon carbide MOSFET and two second IGBT chips are bonded on the third plate body through silver clips, and one end of the second wiring board is provided with a second control terminal.
Further, the gates and the emitters of the two first IGBT chips and the first silicon carbide MOSFET are bonded to the first wiring board through aluminum wires and are flush on the side thereof close to the first wiring board.
Further, the gates and emitters of the two second IGBT chips and the second silicon carbide MOSFET are bonded to the second wiring board through aluminum wires and are flush with one side thereof close to the second wiring board.
Further, the edge distances between the first plate body and the second plate body and the edge distances between the second plate body and the third plate body are equal.
Further, the first ac input terminal, the second ac input terminal, the first dc terminal, the second dc terminal, the first ac output terminal, the bottom of second ac output terminal is all integrally formed with the base, the base welds in corresponding first plate body, the second plate body with on the third plate body, be provided with a plurality of through-holes in the base, be equipped with the silver thick liquid solder that is used for strengthening the connection in the through-hole.
Further, the substrate is a metallized ceramic substrate, the first IGBT chip and the second IGBT chip are high voltage silicon insulated gate bipolar transistor chips, the first silicon carbide MOSFET and the second silicon carbide MOSFET are high voltage silicon carbide metal oxide semiconductor field effect transistor chips, and the first schottky diode and the second schottky diode are high speed silicon carbide schottky diodes.
Further, the substrate comprises a first copper layer, a ceramic layer, a second copper layer, a silver plating layer and a third copper layer from top to bottom.
Further, the gate and emitter pads of the first and second IGBT chips, the first and second silicon carbide MOSFETs have an aluminum oxide layer to achieve bonding with aluminum wires, and the source pads thereof are silver-metallized to enable bonding with silver clips.
Further, a groove is formed in the bottom shell, a cooling plate is arranged in the groove, a bottom plate is packaged on the groove, and the substrate is located on the bottom plate.
By adopting the scheme, the invention has the beneficial effects that:
based on the fact that the first IGBT chip, the second IGBT chip, the first silicon carbide MOSFET and the second silicon carbide MOSFET in the first switch unit and the second switch unit are connected with the first wiring board and the second wiring board through Kelvin, feedback effect of the common-source inductor can be effectively eliminated, and loss is reduced; the first switch unit and the second switch unit are arranged on the substrate in a central symmetry mode, so that only one wiring board is needed to be arranged on the corresponding alternating current input terminal and alternating current output terminal, the minimum distance is generated between the terminals, and the loop of the switch power supply is optimized to realize low inductance.
Drawings
Fig. 1 is a schematic structural diagram of a power semiconductor device module according to an embodiment of the present invention;
FIG. 2 is a schematic view of the structure of FIG. 1 with the upper cover omitted;
fig. 3 is a schematic view of the structure of fig. 2 without the bottom shell in a top view;
FIG. 4 is a schematic view of a substrate according to an embodiment of the present invention;
fig. 5 is a circuit prototype diagram of a power semiconductor device module according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a first ac output terminal according to an embodiment of the present invention;
fig. 7 is a schematic view of a part of a bottom case according to an embodiment of the invention.
Wherein, the attached drawings mark and illustrate:
1. a bottom case; 11. a groove; 12. a cooling plate; 13. a bottom plate; 2. an upper cover; 3. a substrate; 31. a first plate body; 32. a second plate body; 33. a third plate body; 4. a first switching unit; 41. a first ac input terminal; 42. a first wiring board; 43. a first IGBT chip; 44. a first silicon carbide MOSFET; 45. a first direct current terminal; 46. a first schottky diode; 47. a first control terminal; 48. a first ac output terminal; 5. a second switching unit; 51. a second ac input terminal; 52. a second schottky diode; 53. a second DC terminal; 54. a second wiring board; 55. a second IGBT chip; 56. a second silicon carbide MOSFET; 57. a second ac output terminal; 58. a second control terminal; 6. a silver clip; 7. an aluminum wire.
Detailed Description
Exemplary embodiments that embody features and advantages of the present invention will be described in detail in the following description. It will be understood that the invention is capable of various modifications in various embodiments, all without departing from the scope of the invention, and that the description and illustrations herein are intended to be by way of illustration only and not to be construed as limiting the invention.
As shown in fig. 1-4, a power semiconductor device module, the module comprising:
the shell comprises a bottom shell 1 and an upper cover 2, and a space for accommodating components is formed between the bottom shell 1 and the upper cover 2;
a base plate 3, wherein the base plate 3 is arranged on the bottom shell 1 and comprises a first plate body 31, a second plate body 32 and a third plate body 33 which are spliced into a square shape and have gaps;
the first switch unit 4 and the second switch unit 5 have the same device and are arranged on the left and right parts of the substrate 3 in a central symmetry manner, wherein in the left part of the substrate 3, a plurality of first alternating current input terminals 41, a first wiring board 42, a first silicon carbide MOSFET44 and two first IGBT chips 43 which are bonded and kelvin connected to the first wiring board 42 and are arranged on one side, the first wiring board 42 is positioned between the first alternating current input terminals 41 and the first IGBT chips 43 and the first silicon carbide MOSFET44, a plurality of first direct current terminals 45 and a plurality of first schottky diodes 46 which are closely arranged are arranged on the second board 32, a plurality of first alternating current output terminals 48 are arranged on the third board 33, the two first IGBT chips 43 and the first silicon carbide MOSFET44 are respectively bonded to the second board 32 through silver clips 6, the plurality of first schottky diodes 46 are respectively bonded to the first terminals 47 of the first board 33 through silver clips 6 of the same shape, and the first control terminals 47 are arranged on the third board 33;
in the right portion of the substrate 3, a plurality of second ac input terminals 51, second schottky diodes 52, a second dc terminal 53, a second wiring board 54, a second silicon carbide MOSFET56 and two second IGBT chips 55 bonded to the second wiring board 54 and provided on one side are provided on the first board body 31, a plurality of second ac output terminals 57 are provided on the third board body 33, the second schottky diodes 52 are bonded to the second board body 32 through silver clips 6, the second silicon carbide MOSFET56 and two second IGBT chips 55 are bonded to the third board body 33 through silver clips 6, and a second control terminal 58 is provided at one end of the second wiring board 54.
As shown in fig. 5, fig. 5 is a schematic circuit diagram of a power semiconductor device module according to the present invention, specifically, a half-bridge topology power module based on bipolar silicon IGBTs and silicon carbide MOSFETs, where two bipolar silicon IGBTs are connected in parallel to each switch position, so that the current ratio of the module can be improved as much as possible, and the above embodiment further provides a plurality of schottky diodes, preferably six schottky diodes, based on the defect of the silicon carbide MOSFETs on high current treatment.
In the above embodiment, based on the first IGBT chip 43, the second IGBT chip 55, the first silicon carbide MOSFET44, and the second silicon carbide MOSFET56 in the first switch unit 4 and the second switch unit 5 being connected with the first wiring board 42 and the second wiring board 54 by kelvin, the feedback effect of the common-source inductance can be effectively eliminated, and the loss can be reduced; the first switching unit 4 and the second switching unit 5 are arranged on the substrate 3 in a central symmetry manner, so that only one wiring board is required to be arranged at the corresponding alternating current input terminal and alternating current output terminal, the minimum distance is generated between the terminals, the loop of the switching power supply is optimized to realize low inductance, and excellent dynamic current sharing is realized between chips/transistors. In addition, because of the gap between the first plate 31 and the second plate 32, the first IGBT chip 43 and the first silicon carbide MOSFET44, and the second IGBT chip 55 and the second silicon carbide MOSFET56 are respectively located on the first plate 31 and the second plate 32 that are isolated from each other, so that the first switch unit and the second switch unit 5 form thermal isolation while being packaged together, and the reduction of the current ratio of the hybrid switch circuit caused by the mutual thermal influence between the two is avoided.
In one embodiment, the gates and emitters of the two first IGBT chips 43 and the first silicon carbide MOSFET44 are bonded to the first wiring board 42 through the aluminum wire 7 and are flush with the side thereof close to the first wiring board 42. And, the gates and emitters of the two second IGBT chips 55 and the second silicon carbide MOSFET56 are bonded to the second wiring board 54 through the aluminum wire 7 and are flush with the side thereof close to the second wiring board 54. Among these, the distance between the two IGBT chips and the silicon carbide MOSFET is set to be as minimum as possible. In addition, because of the size difference between the GBT chip and the silicon carbide MOSFET, the positions where the first silicon carbide MOSFET44 and the second silicon carbide MOSFET56 are mounted on the first plate 31 and the second plate 32 are set to be concave, the positions where the second plate 32 and the third plate 33 are bonded with the silver clip 6 of the first silicon carbide MOSFET44 and the second silicon carbide MOSFET56 are set to be convex, and the length of the silver clip 6 can be reduced as much as possible to save costs.
In an embodiment, the margins between the first plate 31 and the second plate 32 and between the second plate 32 and the third plate 33 are equal. The reason for the equal edge distance is to facilitate the dimension of each aluminum wire 7 and silver clip 6 to be kept as consistent as possible, so as to reduce the development cost of the fittings.
In an embodiment, as shown in fig. 6, the bottoms of the first ac input terminal 41, the second ac input terminal 51, the first dc terminal 45, the second dc terminal 53, the first ac output terminal 48, and the second ac output terminal 57 are integrally formed with bases, the bases are welded to the corresponding first plate 31, second plate 32, and third plate 33, a plurality of through holes are formed in the bases, and silver paste solder for reinforcing connection is poured into the through holes. Besides the connection of the base in the reserved area on the substrate 3, the rivet structure is formed after the silver paste solder is solidified by filling the silver paste solder in the through hole, so that the connection strength between the terminal and the substrate 3 is enhanced.
The substrate 3 is a metallized ceramic substrate 3, the first IGBT chip 43 and the second IGBT chip 55 are high voltage silicon insulated gate bipolar transistor chips, i.e. SI-IGBTs, the first silicon carbide MOSFET44 and the second silicon carbide MOSFET56 are high voltage silicon carbide metal oxide semiconductor field effect transistor chips, i.e. SiC-MOSFETs, and the first schottky diode 46 and the second schottky diode 52 are high speed silicon carbide schottky diodes, i.e. SiC-SBDs. Specifically, the substrate 3 includes, from top to bottom, a first copper layer, a ceramic layer, a second copper layer, a silver plating layer, and a third copper layer. Based on the metallized ceramic substrate 3, the heat dissipation performance of the first switch unit 4 and the second switch unit 5 is greatly improved, and the silver plating layer is arranged to enable the substrate 3 to have high-strength structural performance, so that plate detachment is avoided.
In an embodiment, the gate and emitter pads of the first and second IGBT chips 43 and 55, the first and second silicon carbide MOSFETs 44 and 56 have an aluminum oxide layer to achieve bonding with the aluminum wire 7, and the source pads thereof are silver-metallized to enable bonding with the silver clip 6. In general, since the current in the gate loop is low, the formation of the kelvin connection by the bond between the gate loop and the first wiring board 42/the second wiring board 54 can be facilitated by using the aluminum wire 7. In the source/emitter bonding, a large current is generated, so bonding with the silver clip 6 is performed, and in order to enable the silver clip 6 to be fixedly soldered to the pad of the chip, silver metallization is performed on the pad so that bonding with the silver clip 6 is possible.
In one embodiment, as shown in fig. 7, a groove 11 is formed in the bottom case 1, a cooling plate 12 is disposed in the groove 11, a bottom plate 13 is encapsulated on the groove 11, and the substrate 3 is located on the bottom plate 13.
Although the first plate body 31, the second plate body 32, and the third plate body 33, which are isolated from each other, are used to form thermal isolation from each other between devices, in order to further increase the current ratio between the IGBT chip and the silicon carbide MOSFET, the embedded cooling plate 12 is hollowed out in the bottom case 1 to cool the substrate 3. In addition, the cold plate may be pyrolytic graphite.
The silicon carbide MOSFET with smaller area is adopted to form the hybrid switch with the IGBT chip, so that the advantages of the silicon carbide MOSFET and the IGBT chip are combined, and the defects of the silicon carbide MOSFET and the IGBT chip are weakened; the substrate 3 is divided into the first plate body 31, the second plate body 32 and the third plate body 33 which are thermally isolated, and the silver clips 6 are adopted for bonding and interconnection between the chip and the adjacent plate bodies, so that high reliability and low power loop inductance are realized, and the heat dissipation and heat insulation performance of the module are improved.
While the present disclosure has been described with reference to several exemplary embodiments, it is understood that the terminology used is intended to be in the nature of words of description and illustration rather than of limitation. As the present disclosure may be embodied in several forms without departing from the spirit or essential characteristics thereof, it should also be understood that the above-described embodiments are not limited by any of the details of the foregoing description, but rather should be construed broadly within its spirit and scope as defined in the appended claims, and therefore all changes and modifications that fall within the meets and bounds of the claims, or equivalences of such meets and bounds are therefore intended to be embraced by the appended claims.
Claims (9)
1. A power semiconductor device module, the module comprising:
the shell comprises a bottom shell and an upper cover, and a space for accommodating components is formed between the bottom shell and the upper cover;
the base plate is arranged on the bottom shell and comprises a first plate body, a second plate body and a third plate body which are spliced into a square shape and are provided with gaps;
the first switch unit and the second switch unit are provided with the same devices and are arranged on the left part and the right part of the substrate in a central symmetry mode, wherein in the left part of the substrate, a plurality of first alternating current input terminals, a first wiring board, a first silicon carbide MOSFET and two first IGBT chips are arranged on one side of the first wiring board, the first wiring board is positioned between the first alternating current input terminals and the first IGBT chips and the first silicon carbide MOSFET, a plurality of first direct current terminals and a plurality of first Schottky diodes are arranged on the second board, a plurality of first alternating current output terminals are arranged on the third board, the two first IGBT chips and the first silicon carbide MOSFET are respectively bonded to the second board through silver clamps, the plurality of first Schottky diodes are respectively bonded to the third board through silver clamps of the same shape, and the first control terminals are arranged on the first wiring board;
in the right part of the substrate, a plurality of second alternating current input terminals and second Schottky diodes are arranged on the first plate body, a second direct current terminal, a second wiring board, a second silicon carbide MOSFET and two second IGBT chips which are bonded on the second wiring board and are arranged on one side of the second wiring board are arranged on the second plate body, a plurality of second alternating current output terminals are arranged on the third plate body, the second Schottky diodes are bonded on the second plate body through silver clips, the second silicon carbide MOSFET and two second IGBT chips are bonded on the third plate body through silver clips, and one end of the second wiring board is provided with a second control terminal.
2. The power semiconductor device module according to claim 1, wherein the gates and emitters of the two first IGBT chips and the first silicon carbide MOSFET are each bonded to the first wiring board by an aluminum wire and are flush with a side thereof close to the first wiring board.
3. The power semiconductor device module according to claim 1, wherein the gates and emitters of the two second IGBT chips and the second silicon carbide MOSFET are each bonded to the second wiring board by an aluminum wire and are flush with a side thereof close to the second wiring board.
4. The power semiconductor device module of claim 1, wherein the margins between the first plate and the second plate, and between the second plate and the third plate are equal.
5. The power semiconductor device module according to claim 1, wherein the bottoms of the first ac input terminal, the second ac input terminal, the first dc terminal, the second dc terminal, the first ac output terminal, and the second ac output terminal are integrally formed with bases, the bases are welded to the corresponding first board body, second board body, and third board body, a plurality of through holes are provided in the bases, and silver paste solder for reinforcing connection is poured into the through holes.
6. The power semiconductor device module of claim 1, wherein the substrate is a metallized ceramic substrate, the first IGBT chip and the second IGBT chip are high voltage silicon insulated gate bipolar transistor chips, the first silicon carbide MOSFET and the second silicon carbide MOSFET are high voltage silicon carbide metal oxide semiconductor field effect transistor chips, and the first schottky diode and the second schottky diode are high speed silicon carbide schottky diodes.
7. The power semiconductor device module of claim 1, wherein the substrate comprises, from top to bottom, a first copper layer, a ceramic layer, a second copper layer, a silver plated layer, and a third copper layer.
8. The power semiconductor device module of claim 1, wherein the gate and emitter pads of the first and second IGBT chips, the first and second silicon carbide MOSFETs have an aluminum oxide layer to enable bonding with aluminum wires, and the source pads thereof are silver-metallized to enable bonding with silver clips.
9. The power semiconductor device module of claim 1, wherein a recess is formed in the bottom case, a cooling plate is disposed in the recess, a bottom plate is encapsulated on the recess, and the substrate is located on the bottom plate.
Priority Applications (1)
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CN202311454562.9A CN117199065B (en) | 2023-11-03 | 2023-11-03 | Power semiconductor device module |
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CN202311454562.9A CN117199065B (en) | 2023-11-03 | 2023-11-03 | Power semiconductor device module |
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CN117199065B CN117199065B (en) | 2024-02-06 |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009277975A (en) * | 2008-05-16 | 2009-11-26 | Toyota Industries Corp | Semiconductor device |
US20210280556A1 (en) * | 2020-03-06 | 2021-09-09 | Fuji Electric Co., Ltd. | Semiconductor module |
CN113497014A (en) * | 2020-03-21 | 2021-10-12 | 华中科技大学 | Packaging structure and packaging method of multi-chip parallel power module |
CN216213449U (en) * | 2021-10-29 | 2022-04-05 | 智新半导体有限公司 | Silicon carbide power module easy to radiate heat |
-
2023
- 2023-11-03 CN CN202311454562.9A patent/CN117199065B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009277975A (en) * | 2008-05-16 | 2009-11-26 | Toyota Industries Corp | Semiconductor device |
US20210280556A1 (en) * | 2020-03-06 | 2021-09-09 | Fuji Electric Co., Ltd. | Semiconductor module |
CN113497014A (en) * | 2020-03-21 | 2021-10-12 | 华中科技大学 | Packaging structure and packaging method of multi-chip parallel power module |
CN216213449U (en) * | 2021-10-29 | 2022-04-05 | 智新半导体有限公司 | Silicon carbide power module easy to radiate heat |
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