CN117193424A - 3D (three-dimensional) on-chip hybrid cooling control method and system - Google Patents
3D (three-dimensional) on-chip hybrid cooling control method and system Download PDFInfo
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention discloses a 3D (three-dimensional) in-chip hybrid cooling control method and a system, which belong to the technical field of integrated circuit design, wherein the method comprises the following steps: in the first stage, solid cooling is used for conducting heat, and when the temperature of the electronic device layer exceeds a first threshold value or the heat load of any area exceeds the heat dissipation capacity of a hot copper column in the area, the next stage is carried out; the second stage is a mixed cooling stage using solid cooling and a cooling medium 1, and the flow rate of the cooling medium 1 is determined by using a heat conduction model; and monitoring the temperature of the cooling channel outlet of the cooling medium 1, and triggering the high-temperature working warning of the 3D chip when the temperature of the cooling channel outlet of the cooling medium 1 exceeds a set second threshold value. The invention provides an automatic and staged hybrid cooling method, which effectively solves the cooling problem of a 3D chip and protects the stability and safety of a system.
Description
Technical Field
The invention belongs to the technical field of integrated circuit design, and particularly relates to a 3D (three-dimensional) in-chip hybrid cooling control method and system.
Background
With the continuous development of electronic technology, 3D chips are widely used due to their high integration, high performance and low power consumption. However, the 3D chip generates a large amount of heat during operation, and if heat cannot be timely and effectively dissipated, the stability and the lifetime of the chip may be seriously affected, and even thermal runaway and damage of the chip may be caused.
Conventional cooling methods are typically single and cannot dynamically adjust the cooling strategy based on the real-time temperature and thermal load of the chip. In the case of a small chip workload, excessive cooling may result in energy waste and excessive loss of the cooling system, while in the case of a large chip workload, insufficient cooling may result in overheating of the chip.
Therefore, a 3D in-chip hybrid cooling control method capable of effectively cooling a chip and saving energy and reducing emission is needed to be dynamically adjusted according to the real-time thermal state of the chip.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, the present invention provides a method for controlling hybrid cooling in a 3D chip, the hybrid cooling control being divided into multiple stages of hybrid cooling, the method comprising:
in the first stage, solid cooling is used for conducting heat, and when the temperature of the electronic device layer exceeds a first threshold value or the heat load of any area exceeds the heat dissipation capacity of a hot copper column in the area, the next stage is carried out;
the second stage is a mixed cooling stage using solid cooling and a cooling medium 1, and a heat conduction model is used for determining the flow rate of the cooling medium 1;
monitoring the temperature of a cooling channel outlet of the cooling medium 1, and triggering a high-temperature working warning of the 3D chip when the temperature of the cooling channel outlet of the cooling medium 1 exceeds a set second threshold value; or, when the temperature of the cooling passage outlet of the cooling medium 1 exceeds a third threshold value or the flow rate of the cooling medium 1 exceeds a maximum flow rate v0, entering the next stage;
Wherein the second threshold is higher than the third threshold.
If two cooling mediums, namely, cooling medium 1 and cooling medium 2, are simultaneously arranged in the heat conduction layer of the 3D chip, a third stage is triggered, wherein the third stage is a mixed cooling stage using solid cooling and cooling medium 1 and cooling medium 2, a heat conduction model is used for determining the flow rate of the cooling medium 2, and when the temperature of the outlet of a cooling channel of the cooling medium 2 exceeds a third threshold value or the flow rate of the cooling medium 2 exceeds a maximum flow rate vk, a high-temperature working warning is triggered.
The 3D chip is provided with a multi-layer stacked structure, a heat conduction layer with a plurality of heat transfer modes is designed between the multi-layer electronic device layers, a plurality of columnar heat conduction elements with hot copper columns are used in the heat conduction layer for solid cooling, and micro cooling channels are used among the hot copper columns for liquid cooling;
the thermally conductive layers alternate with the layers of electronic devices in the 3D chip, each layer of electronic devices being immediately adjacent to at least one thermally conductive layer.
Wherein the cooling channel surrounds each hot copper pillar;
the cooling medium 1 flowing in the cooling channel 1 receives heat from the hot copper column and reduces the area temperature of the hot copper column through the circulation of the cooling medium;
The hot copper column is positioned in the cooling channel 1;
for the cooling channel 1 directly surrounding the hot copper pillar, the inlet of the cooling channel portion surrounding the hot copper pillar etched to the cold zone channel 1 is smaller than the outlet so that the pressure of the cooling medium 1 at the time of entering the channel is greater than the pressure at the outlet, thereby causing the cooling medium to flow along a predetermined path.
When the mixed cooling system of the 3D chip uses two different cooling mediums to cool down liquid, the cooling channel 2 of the cooling medium 2 surrounds the outer layer of the cooling channel 1;
when the cooling medium 2 is a stable medium, the cooling medium 2 is in direct contact with the outer layer of the cooling channel 1, and at the moment, the cooling channel 2 is of a half-package structure, and the outer wall of the cooling channel 1 forms a left half-package structure;
when the cooling medium 2 is an unstable medium, the cooling channel 2 has a full-package structure with respect to the cooling medium 2.
A temperature sensor is arranged in a heat dissipation responsible area corresponding to each hot copper column on a device layer of the 3D chip, the temperature sensor and the flow sensor are arranged in channel outlets of the cooling channel 1 and the cooling channel 2, real-time temperature and flow data in the 3D chip are provided, and the real-time temperature and flow data are used for a cooling control algorithm module to determine a mixed cooling strategy;
Dynamically adjusting the speed of the pump and the on-off state of the valve based on the sensor data based on a cooling control algorithm;
the maximum flow rate of the cooling medium in the plurality of cooling channels is controlled based on the micropump, while a microvalve is used in each cooling channel to regulate the flow rate in the cooling channel.
Wherein, based on the manufacturing technology of microelectronics and MEMS manufacturing, the manufacturing deployment of micropump, miniature valve and shunt is realized, includes:
the micro pump is manufactured by MEMS manufacturing technology, comprising etching a micro structure on a silicon wafer to form working parts of the pump, wherein the working parts comprise a cavity and a blade of the pump, and the micro pump is driven by piezoelectricity;
the micro valve and the shunt are manufactured by MEMS manufacturing technology, and the driving mode of the micro valve is electric driving and is realized by electromagnetic driving;
disposing micropump, micro valve and shunt, including reserving micropump in chip, reserving cooling pipeline, micro valve and shunt mounting position in each layer of heat conducting layer, and then mounting these devices to reserved position in manufacturing process;
forming a cooling pipeline and mounting positions of the micropump, the micro valve and the shunt on the silicon wafer through film deposition and photoetching technology in the manufacturing process of the chip;
The hard pipe connection of the micropump, the micro valve and the shunt is realized through the channel on the silicon chip.
Wherein the cooling medium 1 is determined to be fluorocarbon, and the ionic liquid or the nanofluid can be selected as the cooling medium 2.
The flow rate of the cooling medium is too small, the residence time of the cooling medium on the copper column is too long, the temperature of the cooling medium is close to the temperature of the copper column, and the cooling effect is reduced. If the flow rate of the cooling medium is too high, the cooling medium may stay on the copper column for too short to absorb heat effectively, and the highest flow rate of the cooling medium is obtained through experimental tests, which require measuring the temperature of the cooling medium after flowing through the copper column at different flow rates, and finding out the optimal flow rate, including:
a flow rate range is set in which the temperature change of each cooling medium after flowing through the copper column is measured every other fixed step.
Recording the temperature change delta T of the cooling medium at each flow velocity v, fitting a polynomial function delta T=a x v x 2+b x v+c by using the data, fitting the parameters a, b and c of the polynomial function by using a plurality of groups of recorded data, and finding out the minimum delta T point of the polynomial function;
Wherein, the flow velocity v0 corresponding to the minimum value delta T point of the cooling medium 1 is the highest cooling medium flow velocity of the cooling medium 1;
the flow velocity vk corresponding to the minimum Δt point of the cooling medium 2 is the highest cooling medium flow velocity of the cooling medium 2.
And for the second stage, determining the minimum flow rate requirement of the cooling medium in the area of each heat copper column in a certain heat conduction layer based on the heat conduction model, and determining the flow rate of the cooling medium 1 in the cooling channel 1 of the heat conduction layer to be the highest value of the minimum flow rate requirement in all heat copper column areas in the layer.
Wherein, in the second stage, a heat conduction model is established to determine the minimum flow rate requirement of the cooling medium in the area where each copper pillar of heat in a certain heat conduction layer is located, the target result of the heat conduction model is to calculate the heat that the copper pillar can absorb in a given period of time, and the rest of the heat needs to be solved by adjusting the liquid flow rate of the cooling medium 1, the model comprises the following steps:
step 1, calculating the heat quantity Q_reflector which can be absorbed by the copper column in a given time period t according to the physical properties of the copper column and the change of the ambient temperature, and calculating by using the following formula:
Q_copper＝ρc*cp_c*Vc*ΔTe，
Wherein Δte is the change of the ambient temperature in a given period of time, and is time-series data of the temperature obtained by a temperature sensor in the region where the hot copper pillar is located; physical properties of the copper pillar, including density ρc, specific heat capacity cp_c and volume Vc; the heat Q_reflector which can be absorbed by the copper column in a unit time period;
the length t of the given time period is the same as the period of the cooling control algorithm module for adjusting the flow rate of the cooling medium of each heat conduction layer;
step 2, calculating the remaining heat quantity Q_res, wherein the heat quantity is needed to be solved by adjusting the liquid flow rate, and the heat quantity is calculated by using the following formula:
Q_res＝Q_total-Q_copper，
wherein q_total is the total heat;
step 3, determining the minimum flow velocity requirement v of the cooling medium 1 in the area where each hot copper column is located in a certain heat conducting layer, comprising the following steps:
step 3.1, corresponding to a given time length t, determining a model of the thermal capacity c_f of the cooling medium 1 as:
C_f＝ρf*cp_f*v*t；
wherein, the specific heat capacity of the cooling medium 1 per unit mass is cp_f, the density of the liquid is ρf, the flow rate of the cooling medium is v, and the flowing time, namely the given time is t;
the heat capacity c_f represents the amount of heat that the cooling medium can absorb when flowing through the copper column for a given length of time;
Step 3.2 in order to ensure that the cooling medium 1 can absorb the remaining heat Q_res, it is necessary to make Cf greater than or equal to Q_res, i.e
ρf_f_v_t > =q_res, and solving the inequality yields the flow velocity v of the liquid: v > =q_res/(ρf_cp_f t);
this inequality indicates that, in order to ensure that the cooling medium 1 can absorb the remaining heat, the flow rate of the liquid needs to reach at least q_res/(ρf_cp_f_t), i.e. the minimum flow rate of the cooling medium 1 at the location of the hot copper pillar is required to be q_res/(ρf_cp_f_t).
The invention also discloses a 3D on-chip hybrid cooling control system, which comprises a memory and a controller, wherein the controller is used for performing hybrid cooling control in the 3D on-chip, and the controller executes program codes in the memory to realize the hybrid cooling control method.
According to the invention, the cooling strategy can be automatically adjusted by monitoring the real-time temperature of the chip and the flow velocity of the cooling medium, so that the cooling efficiency is improved. By setting the threshold value, a staged cooling method is adopted according to the actual cooling requirement of the chip, and the staged cooling method comprises solid state cooling and mixed cooling of different cooling media. This approach can meet both the cooling requirements at low loads and the cooling challenges at high loads. When the temperature of the chip or the flow rate of the cooling medium exceeds a threshold value, a high-temperature working warning can be triggered, a user or a system is timely reminded to process, the chip is prevented from overheating, and the safety of the chip and the system is protected.
Drawings
The above, as well as additional purposes, features, and advantages of exemplary embodiments of the present disclosure will become readily apparent from the following detailed description when read in conjunction with the accompanying drawings. Several embodiments of the present disclosure are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar or corresponding parts and in which:
fig. 1 is a flowchart illustrating a 3D on-chip hybrid cooling control method according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail below with reference to the accompanying drawings, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, the "plurality" generally includes at least two.
It should be understood that although the terms first, second, third, etc. may be used to describe … … in embodiments of the present invention, these … … should not be limited to these terms. These terms are only used to distinguish … …. For example, the first … … may also be referred to as the second … …, and similarly the second … … may also be referred to as the first … …, without departing from the scope of embodiments of the present invention.
It should be understood that the term "and/or" as used herein is merely one relationship describing the association of the associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
The words "if", as used herein, may be interpreted as "at … …" or "at … …" or "in response to a determination" or "in response to a detection", depending on the context. Similarly, the phrase "if determined" or "if detected (stated condition or event)" may be interpreted as "when determined" or "in response to determination" or "when detected (stated condition or event)" or "in response to detection (stated condition or event), depending on the context.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a product or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such product or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a commodity or device comprising such element.
High density integration and high performance computing of 3D chips, which generate a lot of heat, effective cooling strategies can reduce the operating temperature of the chip, thereby improving the operating efficiency and lifetime of the chip and reducing chip damage or performance degradation due to overheating.
The invention discloses a 3D (three-dimensional) chip internal mixed cooling control method which solves the problem of how to effectively cool a 3D chip under high-load and high-temperature environments. The multi-stage hybrid cooling method of the present invention uses solid state cooling and hybrid cooling of different cooling mediums at different stages to optimize the cooling effect and prevent chip overheating. The method automatically adjusts the cooling strategy according to the real-time temperature of the chip and the flow rate of the cooling medium.
As shown in fig. 1, the invention discloses a 3D on-chip hybrid cooling control method, which comprises the following steps:
a multi-stage hybrid cooling method for a 3D chip, comprising:
in the first stage, solid cooling is used for conducting heat, and when the temperature of the electronic device layer exceeds a first threshold value or the heat load of any area exceeds the heat dissipation capacity of a hot copper column in the area, the next stage is carried out;
the second stage is a mixed cooling stage using solid cooling and a cooling medium 1, and a heat conduction model is used for determining the flow rate of the cooling medium 1;
monitoring the temperature of a cooling channel outlet of the cooling medium 1, and triggering a high-temperature working warning of the 3D chip when the temperature of the cooling channel outlet of the cooling medium 1 exceeds a set second threshold value; alternatively, the next stage is entered when the temperature of the cooling channel outlet of the cooling medium 1 exceeds a third threshold value or the flow rate of the cooling medium 1 exceeds a maximum flow rate v 0.
Wherein the second threshold is higher than the third threshold.
If two cooling media of the cooling medium 1 and the cooling medium 2 are simultaneously arranged in the heat conduction layer of the 3D chip, triggering the condition of a third stage, wherein the third stage is a mixed cooling stage using solid cooling and the cooling medium 1 and the cooling medium 2, determining the flow rate of the cooling medium 2 by using a heat conduction model, and triggering a high-temperature working warning when the temperature of the outlet of a cooling channel of the cooling medium 2 exceeds a third threshold value or the flow rate of the cooling medium 2 exceeds a maximum flow rate vk.
According to the invention, the cooling strategy can be automatically adjusted by monitoring the real-time temperature of the chip and the flow velocity of the cooling medium, so that the cooling efficiency is improved. By setting the threshold value, a staged cooling method is adopted according to the actual cooling requirement of the chip, and the staged cooling method comprises solid state cooling and mixed cooling of different cooling media. This approach can meet both the cooling requirements at low loads and the cooling challenges at high loads. When the temperature of the chip or the flow rate of the cooling medium exceeds a threshold value, a high-temperature working warning can be triggered, a user or a system is timely reminded to process, the chip is prevented from overheating, and the safety of the chip and the system is protected.
The 3D chip has a multi-layered stacked structure, a heat conduction layer with various heat transfer modes is designed between the multi-layered electronic device layers, a plurality of columnar hot copper columnar heat conduction elements are used in the heat conduction layer for solid state cooling, and micro cooling channels are used between the hot copper columns for liquid cooling.
Wherein, solid materials such as hot copper columns will change phase after receiving heat, thereby absorbing a lot of heat, and solid cooling medium designed as micro is embedded between each layer of the 3D chip. When the temperature of the chip rises, the solid material starts to change phase and absorbs heat; when the chip temperature is reduced, the solid material is restored to the original state, and heat is released.
Wherein, by referring to the circulation temperature adjustment mode in the organism, such as blood circulation, a micro-scale liquid flow network is designed between layers in the 3D chip, and the blood circulation is simulated to cool the inside. Not only cooling between chip layers, accelerating the cooling of hot copper sheet, better cooling effect.
In one embodiment, the thermally conductive layers alternate with the electronic device layers in the 3D chip. A three-layer stacked 3D chip comprising, from bottom to top: an electronic device layer 1, a heat conduction layer 1, an electronic device layer 2, a heat conduction layer 2, and an electronic device layer 3. Each layer of electronic device is in close proximity to at least one thermally conductive layer, thereby providing an effective thermally conductive path.
In a certain embodiment, the thermal copper pillars are uniformly distributed in the thermal conductive layer, and the thermal copper pillars are made of metal copper with high thermal conductivity, or can be replaced by other materials with good thermal conductivity to make other columnar heat dissipation structures. At the same time, the high thermal conductivity of the hot copper pillars may also help to uniformly penetrate the heat through the thermally conductive layer. When current is passed through an electronic device on a silicon substrate, heat is generated. Heat is transferred directly to the thermally conductive layer through the hot copper pillars in the thermally conductive layer and then carried away by the cooling medium.
The electronics layer (active layer) primarily contains the electronics and interconnect structures on silicon-based (or other semiconductor material). The electronics include logic gates (e.g., AND, OR, NOT, etc.), memory cells (e.g., RAM, ROM, etc.), sensors, amplifiers, etc. The interconnect structure is responsible for connecting these electronic devices, and is mainly composed of metal wires (such as copper or aluminum) formed in an insulating layer (typically silicon oxide or low-k material) on a silicon substrate, where the metal wires may connect electronic devices in the same layer, or may connect electronic devices in different layers through "via" or "contact hole".
In one embodiment, the cooling channels are designed to surround each hot copper pillar, forming a grid dot-like layout. The layout can furthest increase the heat exchange surface of the cooling channel wall surface and the hot copper column, and improves the heat exchange efficiency. The cooling medium 1 flowing in the cooling channel 1 can receive heat from the hot copper column and reduce the zone temperature of the hot copper column by circulation of the cooling medium.
In an embodiment, when the cooling medium (fluorocarbon (PFPE or PFC)) is a cooling medium that can directly contact the electronic device, the cooling channel may directly surround the hot copper pillar, that is, the hot copper pillar is located inside the cooling channel, so as to improve the heat dissipation efficiency of the hot copper pillar.
In one embodiment, when the hybrid cooling system of the 3D chip uses two different cooling mediums to perform liquid cooling, the cooling channels can be circumferentially arranged outside the hot copper pillar. For example, the cooling medium 1 may be in direct contact with the electronic device, and the cooling channel 1 of the cooling medium 1 may directly surround the hot copper pillar, i.e. the hot copper pillar is located inside the cooling channel. The cooling channels 2 of the cooling medium 2 may then surround the outer layers of the cooling channels 1. Alternatively, the cooling medium 2 may be in direct contact with the outer layer of the cooling channel 1 when it is a stabilizing medium such as an ionic liquid, where the cooling channel 2 is in a half-package structure, and the outer wall of the cooling channel 1 forms a remaining half-package structure. Alternatively, when the cooling medium 2 is an unstable medium such as a nanofluid, the cooling channel 2 is of a fully packed structure with respect to the cooling medium 2. And so on so that the exterior of each hot copper pillar surrounds at least one layer of cooling channels. Since the hot copper pillars are uniformly distributed throughout the heat conductive layer, the cooling channels surrounding the hot copper pillars are also distributed throughout the heat conductive layer and form a uniform distribution.
In one embodiment, in each layer of thermally conductive layer, the cooling channels have one cooling channel inlet and one cooling channel outlet for one cooling medium in each layer, and the wrap around direction for each hot copper pillar may be clockwise or counter-clockwise wrap around to form a complete passageway in a single layer. For cooling channels 1 directly surrounding the hot copper pillar, the cooling medium 1 may be caused to flow along a predetermined path by liquid conduction means within the cooling channel 1, e.g. by etching the cold zone channel 1 at the inlet of the cooling channel portion surrounding the hot copper pillar being smaller than at the outlet, such that the pressure of the cooling medium 1 upon entering the channel is greater than at the outlet.
In one embodiment, the grid-shaped cooling channels are fabricated using micromachining techniques such as Deep Reactive Ion Etching (DRIE) or lithography. A hot copper pillar was then fabricated in the center of each grid.
The electronic device layer is fabricated on a separate silicon wafer, including photolithography, etching, ion implantation, and the like. The heat conducting layer is also a structure for customizing the cooling system in the silicon wafer and is manufactured.
And (3) bonding the electronic device layer and the heat conducting layer by using a special adhesive to form a complete 3D chip structure. This process requires precise alignment to ensure proper alignment of the layers.
Finally, the cooling medium is injected into the cooling channels through the micro-injector, so that the manufacturing of the cooling system is completed, and the cooling medium can be uniformly filled into each cooling channel through the precise injection system.
In one embodiment, to monitor and adjust the cooling flow rate, a temperature sensor is disposed in the heat dissipation responsible region corresponding to each hot copper pillar on the device layer of the 3D chip, and a temperature sensor and a flow sensor are disposed in the channel outlets of the cooling channels 1, 2. Real-time temperature and flow data inside the 3D chip is provided for the cooling control algorithm module to determine the hybrid cooling strategy.
The pump speed and the valve opening and closing state are dynamically adjusted based on the sensor data based on a cooling control algorithm.
The maximum flow rate of the cooling medium in the plurality of cooling channels is controlled based on the micropump, while a microvalve is used in each cooling channel to regulate the flow rate in the cooling channel.
In one embodiment, in each 3D chip, independent cooling medium body control is provided for each layer based on one micro pump, and cooling control of the cooling channels of the multi-heat conduction layer by the one micro pump is realized by matching micro valves and a flow divider. Specifically, a micro valve is disposed at the inlet of the cooling pipeline of each heat conducting layer, the valve can be independently controlled to adjust the flow of the cooling medium body of each layer, and a flow divider is used for dividing the cooling medium body from the micro pump to each layer. The flow divider can orderly divide the cooling medium body into various layers according to the opening and closing states of the valve.
A micro valve may be used to control the flow rate of the cooling medium body. The micro valve works on the principle that the flow rate is changed by controlling the flow rate of the liquid flowing through the valve by changing the opening degree of the valve. The opening degree of the valve can be precisely controlled through an electric signal, so that the dynamic adjustment of the flow velocity of the cooling medium body can be realized. According to the real-time cooling requirement of each layer, the opening degree of each micro valve is dynamically regulated by a cooling control system, so that the independent control of the flow rate of the cooling medium body of each heat conducting layer is realized.
In one embodiment, a manufacturing deployment for implementing micropumps, microvalves, and shunts based on microelectronics fabrication technology and microelectromechanical system (MEMS) fabrication, includes:
micropumps may be fabricated by MEMS fabrication techniques by etching microstructures into a silicon wafer to form the working components of the pump, such as the pump cavities and vanes, and are driven in a piezoelectric manner.
The micro valve and the diverter may also be fabricated by MEMS fabrication techniques, the micro valve controlling the flow of liquid through the valve by varying the degree of opening of the valve to vary the flow rate. The driving mode of the micro valve is electric driving and is realized through electromagnetic driving.
The deployment of micropumps, microvalves, and shunts includes reserving micropumps in the chip, and reserving cooling plumbing, microvalve, and shunt mounting sites in each thermally conductive layer, and then mounting these devices in reserved locations during fabrication. During the chip manufacturing process, the cooling pipeline and the mounting positions of the micropump, the micro valve and the shunt are formed on the silicon wafer through thin film deposition and photoetching technology.
The hard pipe connection of the micropump, the micro valve and the shunt is realized through the channel on the silicon chip.
In one embodiment, when the hybrid cooling system of the 3D chip uses two different cooling mediums for liquid cooling, two separate pump systems are required, one for each cooling medium. Because different cooling mediums may have different flow characteristics and heat transfer properties, different pumps are required to ensure optimal flow and heat exchange effects.
In the 3D chip, two independent cooling pipeline networks are utilized, each network corresponds to one cooling medium, the two cooling mediums are prevented from being mixed in the pipeline, and each cooling pipeline is respectively provided with a micro valve and a flow divider.
In one embodiment, when the cooling medium is a cooling medium that can directly contact the electronic device, the cooling channel may directly surround the hot copper pillar, and the cooling medium may be a fluorocarbon, which is PFPE or PFC.
Fluorocarbon PFPE or PFC is a liquid with excellent chemical stability, good electrical insulation performance and high thermal conductivity. The Novec series 3M is a typical fluorocarbon cooling medium, and can be used in the scenes of cooling systems of power electronics, high-performance computers and the like
In one embodiment, when the hybrid cooling system of the 3D chip uses two different cooling mediums to perform liquid cooling, when the cooling medium 1 can be directly contacted with the electronic device, the cooling channel 1 of the cooling medium 1 can directly surround the hot copper pillar, and the cooling channel 2 of the cooling medium 2 surrounds the outer layer of the cooling channel 1.
Alternatively to the choice of cooling medium 1 and cooling medium 2, the cooling medium 1 may be a fluorocarbon compound, which is PFPE or PFC. Alternatively, the cooling medium 2 may be an ionic liquid or a nanofluid.
Among them, ionic liquids are a class of liquids composed of ions, which have good thermal and chemical stability, and the cooling medium has extremely low volatility, which makes them capable of maintaining good cooling performance under high temperature environments.
The nano fluid is a cooling medium composed of nano particles and a base fluid (such as water or organic liquid), and has high heat conduction coefficient and good cooling effect.
For the heat conduction coefficient, the relationship among the nanofluid, the fluorocarbon and the ionic liquid is as follows: nanofluid > fluorocarbon > ionic liquid. That is, the relationship among nanofluids, fluorocarbons, and ionic liquids for the cooling effect of three cooling mediums is: nanofluid > fluorocarbon > ionic liquid.
In a certain embodiment, in case it is determined that the cooling medium 1 is a fluorocarbon (PFPE or PFC), the cooling medium 2 may select an ionic liquid or a nanofluid, including:
ionic liquids are selected as cooling medium 2 if the 3D chip is operated in a high temperature environment or is required to cope with extreme temperature fluctuations.
Whereas if the 3D chip requires efficient cooling or the design of the cooling channel 2 requires consideration for maximizing the heat conduction, a nanofluid is selected as the cooling medium 2.
In one embodiment, the flow rate of the cooling medium is too low and the residence time of the cooling medium on the copper column is too long, so that the temperature of the cooling medium approaches the temperature of the copper column, reducing the cooling effect. If the flow rate of the cooling medium is too high, the cooling medium may stay on the copper column for too short a time to efficiently absorb heat.
The highest flow rate of the cooling medium is obtained through experimental tests, and the experimental method needs to measure the temperature of the cooling medium after flowing through the copper column under different flow rates and find out the optimal flow rate. The following is one possible experimental procedure:
a flow rate range is set in which the temperature change after each cooling medium has passed through the copper column is measured in every other fixed step, for example 0.5 m/s.
Recording the temperature change deltat of the cooling medium at each flow velocity v, fitting a polynomial function deltat=a x v 2+ b x v + c by using the data, fitting the parameters a, b, c of the polynomial function by using the recorded sets of data, and finding the minimum deltat point of the polynomial function.
The parameters of the polynomial function determined by the different cooling mediums are different:
wherein, the flow velocity v0 corresponding to the minimum value delta T point of the cooling medium 1 is the highest cooling medium flow velocity of the cooling medium 1;
the flow velocity vk corresponding to the minimum Δt point of the cooling medium 2 is the highest cooling medium flow velocity of the cooling medium 2.
In one embodiment, the present invention may employ a multi-stage hybrid cooling strategy to better address thermal management needs. When the 3D chip only includes the cooling medium 1, a multi-stage hybrid cooling strategy combining stage one and stage two is adopted. When the cooling medium 1 and the cooling medium 2 are included in the 3D chip, a multi-stage hybrid cooling strategy combining stage one, stage two and stage three is adopted.
The following describes the stage one to stage three hybrid cooling strategy.
Stage one: solid-state cooling;
stage one exploits the thermal conductivity properties of the hot copper pillars and the natural cooling capacity of the equipment to reduce the temperature of the electronic device. The condition for triggering the second stage is that any cooling medium is not used in the first stage, and either of the following conditions are met: (1) The temperature detected by a temperature sensor on any electronic device layer in the 3D chip exceeds a set first threshold; (2) The estimated heat generated by a region due to ambient temperature changes over a given period of time exceeds the ability of the region to dissipate heat from the hot copper pillars.
Stage two: a mixed cooling mode of solid cooling and a cooling medium 1;
stage two starts to use a mixed cooling mode of solid state cooling and cooling medium 1 to reduce the temperature of the 3D chip. The flow rate of the cooling medium 1 is determined according to the heat conduction model. For each heat dissipation area for which the hot copper pillars are responsible, the minimum flow rate requirement of the cooling medium 1 required at the current electronics layer temperature and the heat transfer capacity of the hot copper pillars is calculated. The highest value of the minimum flow rate requirements corresponding to all copper pillars in each heat conducting layer is selected as the flow rate of the cooling medium 1 in the heat conducting layer.
If only one cooling medium, namely cooling medium 1, exists in the heat conduction layer of the 3D chip, a temperature sensor is arranged at the outlet of the cooling channel corresponding to each cooling medium 1 of each layer, the temperature of the cooling channel outlet of the cooling medium 1 is monitored in real time, and when the temperature of the cooling channel outlet of the cooling medium 1 exceeds a set second threshold value, the high-temperature working warning of the 3D chip is triggered.
If two cooling mediums, namely cooling medium 1 and cooling medium 2, are simultaneously arranged in the heat conduction layer of the 3D chip, any one of the following conditions for triggering the third stage is met: (1) The temperature detected by a temperature sensor of a cooling channel outlet corresponding to any cooling medium 1 in the 3D chip exceeds a set third threshold value; (2) The minimum flow rate requirement of the cooling medium 1 at any position determined according to the heat conduction model exceeds the maximum cooling medium flow rate v0.
Wherein the second threshold is higher than the third threshold.
When the second stage is triggered according to the condition (1) of the first stage, the heat conducting layer triggered in the second stage is the heat conducting layer adjacent to the region of the overtemperature electronic device layer, and the flow rate of the cooling medium 1 in the heat conducting layer is the default starting flow rate corresponding to the set second stage.
Stage three: solid cooling, a mixed cooling mode of the cooling medium 1 and the cooling medium 2;
stage three uses solid state cooling, a mixed cooling mode of cooling medium 1 and cooling medium 2 to reduce the temperature of the 3D chip. The flow rate of the cooling medium 2 is determined according to the heat conduction model.
And arranging a temperature sensor at the outlet of the cooling channel corresponding to each cooling medium 2 of each layer, monitoring the temperature of the outlet of the cooling channel of the cooling medium 2 in real time, and triggering the high-temperature working warning of the 3D chip when the temperature of the outlet of the cooling channel of the cooling medium 2 exceeds a set fourth threshold value or when the flow rate of the cooling medium 2 exceeds the highest cooling medium flow rate vk of the cooling medium 2.
When the third stage is triggered according to the condition (1) of the second stage, the heat conduction layer triggered in the third stage is set as the heat conduction layer corresponding to the outlet of the super-temperature cooling channel, and the flow rate of the cooling medium 2 in the heat conduction layer is set as the default starting flow rate corresponding to the third stage.
In an embodiment, for the second stage, the minimum flow rate requirement of the cooling medium for the region where each hot copper pillar is located in a certain heat conducting layer is determined based on the heat conducting model, and the flow rate of the cooling medium 1 in the cooling channel 1 of the heat conducting layer is determined to be the highest value of the minimum flow rate requirement in all the hot copper pillar regions in the layer.
In a certain embodiment, in a second phase, a heat conduction model is established to determine the minimum flow rate requirement of the cooling medium in the area of each hot copper column in a certain heat conduction layer, the objective of the heat conduction model is to calculate the amount of heat that the copper column can absorb in a given period of time, and the remaining amount of heat needs to be solved by adjusting the liquid flow rate of the cooling medium 1, the model comprising the steps of:
step 1, calculating the heat quantity Q_reflector which can be absorbed by the copper column in a given time period according to the physical properties of the copper column and the change of the ambient temperature, wherein the heat quantity Q_reflector is calculated by using the following formula:
Q_copper＝ρc*cp_c*Vc*ΔTe，
wherein Δte is the change of the ambient temperature in a given period of time, and is time-series data of the temperature acquired by the temperature sensor according to the region where the hot copper pillar is located. Physical properties of the copper pillars include density ρc, specific heat capacity cp—c, and volume Vc. The copper pillar absorbs heat Q_reflector in a unit time. The length t of the given time period may be the same as the period during which the cooling control algorithm module makes the cooling medium flow rate adjustment for each thermally conductive layer.
Step 2, calculating the remaining heat quantity Q_res, wherein the heat quantity is needed to be solved by adjusting the liquid flow rate, and the heat quantity is calculated by using the following formula:
Q_res＝Q_total-Q_copper，
where Q_total is the total heat.
Step 3, determining the minimum flow velocity requirement v of the cooling medium 1 in the area where each hot copper column is located in a certain heat conducting layer, comprising the following steps:
step 3.1, determining a thermal capacity c_f model of the cooling medium 1, corresponding to a given time length t:
C_f＝ρf*cp_f*v*t；
the specific heat capacity per unit mass of the cooling medium 1 is cp—f, the density of the liquid is ρf, the flow rate of the cooling medium is v, and the time of the flow, that is, the predetermined time is t.
The heat capacity c_f represents the amount of heat that the cooling medium can absorb when flowing through the copper column for a given length of time.
Step 3.2 in order to ensure that the cooling medium 1 can absorb the remaining heat Q_res, it is necessary to make Cf greater than or equal to Q_res, i.e
ρf_f_v_t > =q_res, and solving the inequality yields the flow velocity v of the liquid: v > =q_res/(ρf_cp_f t).
This inequality indicates that, in order to ensure that the cooling medium 1 can absorb the remaining heat, the flow rate of the liquid needs to reach at least q_res/(ρf_cp_f_t), i.e. the minimum flow rate of the cooling medium 1 at the location of the hot copper pillar is required to be q_res/(ρf_cp_f_t).
In one embodiment, the total heat (Q_total) generated from the area of thermal copper pillars responsible for heat dissipation from the electronics layer (A_area) and the temperature of the average electronics layer (T_device_avg) over a given period of time is estimated,
taking the heat generated at a reference area of a_ref and a reference electronics layer temperature of t_ref for standard reference conditions, q_ref, the heat generated under the new conditions is estimated using the following equation:
Q_total＝Q_ref*(A_area/A_ref)*(T_device_avg/T_ref)*t，
T_device_avg＝(T_device1+T_device2)/2，
the temperature of the two electronic device layers of the heat conducting layer where the heat copper pillar is located in the area where the heat copper pillar is responsible is T_Dev1 and T_Dev2, the T_Dev1 and T_Dev2 are time sequence data respectively, the sampling period is T, the sampling period is provided by the temperature sensor of each electronic device layer in the area, the sampling period T can be equal to the length T of a given time period, and the period of cooling medium flow rate adjustment of each heat conducting layer can be equal to the period of the cooling control algorithm module.
Assuming that the area of the electronic device layer is a, the number of the thermal copper pillars in the corresponding thermal conductive layer is M, and since the thermal copper pillars are uniformly distributed, the heat dissipation of the electronic device layer is responsible for the area a_area=a/M.
In one embodiment, when the third stage is triggered according to the condition (2) of the second stage, the condition (2) is that the minimum flow rate requirement of the cooling medium 1 of any area determined according to the heat conduction model exceeds the maximum cooling medium flow rate v0, that is, the minimum flow rate requirement q_res/(ρf_f×t) > v0 of the cooling medium 1 of any position occurs, the third stage is triggered. The heat conducting layer triggering the third stage is the heat conducting layer in which the cooling medium 1 is located. The flow velocity v2 of the cooling medium 2 of the heat conduction layer is calculated by the following steps:
Step s1, determining the heat quantity Q2 needing to be taken away by the cooling medium 2:
Q2＝ρf*(Q_res/(ρf*cp_f*t)-v0)*A1*cp_f*T1*t，
the specific heat capacity cp_f of the cooling medium 1 per unit mass and the density ρf of the liquid are obtained by searching from the literature according to the type of the cooling medium. T1 is the temperature of the cooling medium 1 triggering the channel outlet of the cooling medium 1 of the third stage. The time of flow is given as t. The highest cooling medium flow velocity v0 of the cooling medium 1. The flow area of the cooling medium 1 is A1, and the flow area parameter is obtained according to the design of the cooling channel 1.
Step s2 of determining the flow rate of the cooling medium 2 required, comprising:
step s2.1, determining that the minimum flow velocity requirement v2 of the cooling medium 2 on the heat conducting layer satisfies v2> =q2/(ρ2×c_f2×t), wherein ρ2 and c_f2 are the density and specific heat capacity per unit mass of the cooling medium 2, respectively. The flow rate of the cooling medium 2 of the heat conducting layer is v2.
In one embodiment, the operation of the micropump and the microvalve may be precisely controlled by electronic data.
Due to the different micropumps to which the cooling medium 1 and the cooling medium 2 belong. Thus, for any cooling medium, the cooling control algorithm module determines the flow rate of the cooling medium within a cooling channel of the thermally conductive layer i to be the highest value vmax_i required for the lowest flow rate in all hot copper pillar regions within the layer.
Taking the maximum value vmax_g of vmax_i of all the heat conducting layers, the flow rate of the micro pump is set to vmax_g, and the micro pump adjusts the working state according to the vmax_g setting so as to generate the corresponding cooling medium flow rate.
The flow rate of the cooling medium at each layer is controlled by adjusting the opening degree of the micro valve of each layer based on the cooling medium flow rate vmax_i of each heat conduction layer.
The flow divider divides the cooling medium into the respective layers in order according to the opening and closing states of the valves.
The flow splitter distributes a single input flow (flow of cooling medium from the micropump) into multiple output flows. The splitter is designed to dynamically adjust the split ratio based on the demand of each output channel. A micro valve is disposed at the inlet of the cooling duct of each heat conducting layer, which can independently regulate the flow of cooling medium to each layer. The opening degree of the micro valve can be precisely controlled through an electric signal, so that the dynamic adjustment of the flow velocity of the cooling medium is realized. The flow divider changes the distribution of the cooling medium rather than its overall flow rate. The sum of the flow rates is substantially uniform before and after the flow divider, and the cooling medium is distributed to the different heat conducting layers after passing through the flow divider, and the flow rate of the cooling medium (i.e. the volume of cooling medium flowing per unit time) of each layer depends on the arrangement of the flow divider and the degree of opening of the micro valve. The micro valve can independently adjust the flow rate of the cooling medium of each layer, thereby meeting the cooling requirements of different heat conducting layers. I.e. the micropump first delivers the cooling medium to the flow divider. The splitter distributes this single input stream into a plurality of output streams, one for each thermally conductive layer. Each output stream then enters the corresponding thermally conductive layer through a micro valve. The micro valve can adjust the opening degree according to the cooling requirement of each heat conducting layer, so as to control the flow rate of the cooling medium in the layer. Thus, even if the output flow rate of the micropump is fixed, independent control of the cooling stage and the cooling flow rate of each thermally conductive layer can be achieved by adjusting the opening degree of each micropump.
The invention can realize a staged mixed cooling strategy for different heat conducting layers through the flow divider and the valve, namely, the situation that the heat conducting layer 1 is in the stage 1, but the heat conducting layer 2 is in the stage 2 exists. Furthermore, if the 3D chip comprises a cooling medium 2, it is not even excluded that other heat conducting layers are in phase 3.
The above flow is a dynamic process, and the period of dynamic adjustment is the period t of cooling medium flow rate adjustment by the cooling control algorithm module.
According to the invention, the cooling strategy can be automatically adjusted by monitoring the real-time temperature of the chip and the flow velocity of the cooling medium, so that the cooling efficiency is improved. By setting the threshold value, a staged cooling method is adopted according to the actual cooling requirement of the chip, and the staged cooling method comprises solid state cooling and mixed cooling of different cooling media. This approach can meet both the cooling requirements at low loads and the cooling challenges at high loads. When the temperature of the chip or the flow rate of the cooling medium exceeds a threshold value, a high-temperature working warning can be triggered, a user or a system is timely reminded to process, the chip is prevented from overheating, and the safety of the chip and the system is protected.
It should be noted that the computer readable medium described in the present disclosure may be a computer readable signal medium or a computer readable storage medium, or any combination of the two. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this disclosure, a computer-readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In the present disclosure, however, the computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, with the computer-readable program code embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: electrical wires, fiber optic cables, RF (radio frequency), and the like, or any suitable combination of the foregoing.
The computer readable medium may be contained in the electronic device; or may exist alone without being incorporated into the electronic device.
Computer program code for carrying out operations of the present disclosure may be written in one or more programming languages, including an object oriented programming language such as Java, smalltalk, C ++ and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider).
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units involved in the embodiments of the present disclosure may be implemented by means of software, or may be implemented by means of hardware. Wherein the names of the units do not constitute a limitation of the units themselves in some cases.
The foregoing description of the preferred embodiments of the present invention has been presented for purposes of clarity and understanding, and is not intended to limit the invention to the particular embodiments disclosed, but is intended to cover all modifications, alternatives, and improvements within the spirit and scope of the invention as outlined by the appended claims.
Claims (12)
1. A method of controlling hybrid cooling in a 3D chip, the hybrid cooling control being divided into a plurality of stages of hybrid cooling, the method comprising:
in the first stage, solid cooling is used for conducting heat, and when the temperature of the electronic device layer exceeds a first threshold value or the heat load of any area exceeds the heat dissipation capacity of a hot copper column in the area, the second stage is entered;
the second stage is a mixed cooling stage using solid cooling and a cooling medium 1, and a heat conduction model is used for determining the flow rate of the cooling medium 1;
monitoring the temperature of a cooling channel outlet of the cooling medium 1, and triggering a high-temperature working warning of the 3D chip when the temperature of the cooling channel outlet of the cooling medium 1 exceeds a set second threshold value; or, when the temperature of the cooling passage outlet of the cooling medium 1 exceeds a third threshold value or the flow rate of the cooling medium 1 exceeds a maximum flow rate v0, entering a third stage;
Wherein the second threshold is higher than the third threshold.
2. The method for controlling hybrid cooling in a 3D chip according to claim 1,
if two cooling media of the cooling medium 1 and the cooling medium 2 are simultaneously arranged in the heat conduction layer of the 3D chip, triggering the condition of a third stage, wherein the third stage is a mixed cooling stage using solid cooling and the cooling medium 1 and the cooling medium 2, determining the flow rate of the cooling medium 2 by using a heat conduction model, and triggering a high-temperature working warning when the temperature of the outlet of a cooling channel of the cooling medium 2 exceeds a third threshold value or the flow rate of the cooling medium 2 exceeds a maximum flow rate vk.
3. The method for controlling hybrid cooling in a 3D chip according to claim 1,
the 3D chip has a multi-layer stacked structure, a heat conduction layer with multiple heat transfer modes is designed among the electronic device layers, a plurality of columnar heat conduction elements of hot copper columns are used in the heat conduction layer for solid cooling, and micro cooling channels are used among the hot copper columns for liquid cooling;
the thermally conductive layers alternate with the layers of electronic devices in the 3D chip, each layer of electronic devices being immediately adjacent to at least one thermally conductive layer.
4. A3D on-chip hybrid cooling control method as defined in claim 3, wherein,
a cooling channel surrounds each hot copper pillar;
the cooling medium 1 flowing in the cooling channel 1 receives heat from the hot copper column and reduces the area temperature of the hot copper column through the circulation of the cooling medium;
the hot copper column is positioned in the cooling channel 1;
for the cooling channel 1 directly surrounding the hot copper pillar, the inlet of the cooling channel portion surrounding the hot copper pillar etched to the cold zone channel 1 is smaller than the outlet so that the pressure of the cooling medium 1 at the time of entering the channel is greater than the pressure at the outlet, thereby causing the cooling medium to flow along a predetermined path.
5. The method for controlling hybrid cooling in a 3D chip as claimed in claim 4,
when the mixed cooling system of the 3D chip uses two different cooling mediums to cool down liquid, the cooling channel 2 of the cooling medium 2 surrounds the outer layer of the cooling channel 1;
when the cooling medium 2 is a stable medium, the cooling medium 2 is in direct contact with the outer layer of the cooling channel 1, and at the moment, the cooling channel 2 is of a half-package structure, and the outer wall of the cooling channel 1 forms a left half-package structure;
when the cooling medium 2 is an unstable medium, the cooling channel 2 has a full-package structure with respect to the cooling medium 2.
6. The method for controlling hybrid cooling in a 3D chip according to claim 1,
a temperature sensor is arranged in a heat dissipation responsible area corresponding to each hot copper column on a device layer of the 3D chip, the temperature sensor and the flow sensor are arranged in channel outlets of the cooling channel 1 and the cooling channel 2, real-time temperature and flow data in the 3D chip are provided, and the real-time temperature and flow data are used for a cooling control algorithm module to determine a mixed cooling strategy;
dynamically adjusting the speed of the pump and the on-off state of the valve based on the sensor data based on a cooling control algorithm;
the maximum flow rate of the cooling medium in the plurality of cooling channels is controlled based on the micropump, while a microvalve is used in each cooling channel to regulate the flow rate in the cooling channel.
7. The method of 3D on-chip hybrid cooling control of claim 6, wherein the fabrication deployment of micropumps, microvalves, and shunts is based on microelectronics fabrication technology and microelectromechanical system MEMS fabrication, comprising:
the micro pump is manufactured by MEMS manufacturing technology, comprising etching a micro structure on a silicon wafer to form working parts of the pump, wherein the working parts comprise a cavity and a blade of the pump, and the micro pump is driven by piezoelectricity;
The micro valve and the shunt are manufactured by MEMS manufacturing technology, and the driving mode of the micro valve is electric driving and is realized by electromagnetic driving;
disposing micropump, micro valve and shunt, including reserving micropump in chip, reserving cooling pipeline, micro valve and shunt mounting position in each layer of heat conducting layer, and then mounting these devices to reserved position in manufacturing process;
forming a cooling pipeline and mounting positions of the micropump, the micro valve and the shunt on the silicon wafer through film deposition and photoetching technology in the manufacturing process of the chip;
the hard pipe connection of the micropump, the micro valve and the shunt is realized through the channel on the silicon chip.
8. The method for controlling hybrid cooling in a 3D chip according to claim 1,
the cooling medium 1 is determined to be a fluorocarbon and the cooling medium 2 is an ionic liquid or a nanofluid.
9. A3D on-chip hybrid cooling control method as claimed in claim 1 or 2, wherein,
the flow rate of the cooling medium is too small, and the residence time of the cooling medium on the copper column is too long, so that the temperature of the cooling medium is close to the temperature of the copper column, and the cooling effect is reduced. If the flow rate of the cooling medium is too high, the cooling medium may stay on the copper column for too short to absorb heat effectively, and the highest flow rate of the cooling medium is obtained through experimental tests, which require measuring the temperature of the cooling medium after flowing through the copper column at different flow rates, and finding out the optimal flow rate, including:
A flow rate range is set in which the temperature change of each cooling medium after flowing through the copper column is measured every other fixed step.
Recording the temperature change delta T of the cooling medium at each flow velocity v, fitting a polynomial function delta T=a x v x 2+b x v+c by using the data, fitting the parameters a, b and c of the polynomial function by using a plurality of groups of recorded data, and finding out the minimum delta T point of the polynomial function;
wherein, the flow velocity v0 corresponding to the minimum value delta T point of the cooling medium 1 is the highest cooling medium flow velocity of the cooling medium 1;
the flow velocity vk corresponding to the minimum Δt point of the cooling medium 2 is the highest cooling medium flow velocity of the cooling medium 2.
10. The method for controlling hybrid cooling in a 3D chip according to claim 1,
for the second stage, the minimum flow rate requirement of the cooling medium in the area of each heat copper column in a certain heat conduction layer is determined based on the heat conduction model, and the flow rate of the cooling medium 1 in the cooling channel 1 of the heat conduction layer is determined to be the highest value of the minimum flow rate requirement in all heat copper column areas in the layer.
11. The method for controlling hybrid cooling in a 3D chip as claimed in claim 10,
In a second phase, a thermal conduction model is established to determine the minimum flow rate requirement of the cooling medium in the region of each hot copper pillar in a certain thermal conduction layer, the objective result of said thermal conduction model is to calculate the amount of heat that the copper pillar can absorb in a given period of time, and the remaining amount of heat needs to be solved by adjusting the liquid flow rate of the cooling medium 1, said model comprising the steps of:
step 1, calculating the heat quantity Q_reflector which can be absorbed by the copper column in a given time period t according to the physical properties of the copper column and the change of the ambient temperature, and calculating by using the following formula:
Q_copper＝ρc*cp_c*Vc*ΔTe，
wherein Δte is the change of the ambient temperature in a given period of time, and is time-series data of the temperature obtained by a temperature sensor in the region where the hot copper pillar is located; physical properties of the copper pillar, including density ρc, specific heat capacity cp_c and volume Vc; the heat Q_reflector which can be absorbed by the copper column in a unit time period;
the length t of the given time period is the same as the period of the cooling control algorithm module for adjusting the flow rate of the cooling medium of each heat conduction layer;
step 2, calculating the remaining heat quantity Q_res, wherein the heat quantity is needed to be solved by adjusting the liquid flow rate, and the heat quantity is calculated by using the following formula:
Q_res＝Q_total-Q_copper，
Wherein q_total is the total heat;
step 3, determining the minimum flow velocity requirement v of the cooling medium 1 in the area where each hot copper column is located in a certain heat conducting layer, comprising the following steps:
step 3.1, corresponding to a given time length t, determining a model of the thermal capacity c_f of the cooling medium 1 as:
C_f＝ρf*cp_f*v*t；
wherein, the specific heat capacity of the cooling medium 1 per unit mass is cp_f, the density of the liquid is ρf, the flow rate of the cooling medium is v, and the flowing time, namely the given time is t;
the heat capacity c_f represents the amount of heat that the cooling medium can absorb when flowing through the copper column for a given length of time;
step 3.2 in order to ensure that the cooling medium 1 can absorb the remaining heat Q_res, it is necessary to make Cf greater than or equal to Q_res, i.e
ρf_f_v_t > =q_res, and solving the inequality yields the flow velocity v of the liquid: v > =q_res/(ρf_cp_f t);
this inequality indicates that, in order to ensure that the cooling medium 1 can absorb the remaining heat, the flow rate of the liquid needs to reach at least q_res/(ρf_cp_f_t), i.e. the minimum flow rate of the cooling medium 1 at the location of the hot copper pillar is required to be q_res/(ρf_cp_f_t).
12. A 3D on-chip hybrid cooling control system comprising a memory and a controller for hybrid cooling control within a 3D chip, the controller executing program code in the memory to implement a 3D on-chip hybrid cooling control method of any of claims 1-11.
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