CN117192503B - Missile-borne SAR echo simulation method - Google Patents

Missile-borne SAR echo simulation method Download PDF

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CN117192503B
CN117192503B CN202311465943.7A CN202311465943A CN117192503B CN 117192503 B CN117192503 B CN 117192503B CN 202311465943 A CN202311465943 A CN 202311465943A CN 117192503 B CN117192503 B CN 117192503B
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missile
delay
modulation
signal
borne sar
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CN117192503A (en
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徐志朝
牛亚雷
盛蒙蒙
付正川
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Bit Raco Electronic Information Technology Co ltd
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Abstract

The invention provides a missile-borne SAR echo simulation method which can improve the imaging quality of echo signals while meeting the real-time requirement of the missile-borne SAR. By optimally designing the algorithm implementation related to the architecture, the imaging quality of echo signals can be improved while the real-time requirement of the missile-borne SAR is met.

Description

Missile-borne SAR echo simulation method
Technical Field
The invention relates to the technical field of radar remote sensing, in particular to a missile-borne SAR echo simulation method.
Background
In order to improve the all-weather tracking and target hitting precision of the seeker radar, the synthetic aperture radar imaging technology has been applied to the active radar seeker, and has stronger autonomy in the face of complex battlefield environment. Due to the limitation of manpower, material resources, sites and other conditions, the measured data of the SAR body guidance leader are relatively difficult to obtain, and the SAR body guidance leader is impractical to obtain through missile targeting experiments. Therefore, in the fields of design of a seeker system, algorithm research, experimental test and identification of an SAR system and the like, a system simulation technology plays an increasingly important role.
At present, a real-time SAR echo simulation system is widely applied to a satellite-borne SAR load system, but compared with the satellite-borne SAR load system, the satellite-borne SAR load system has the following two obvious characteristics:
the pulse repetition frequency is high: the observation distance is far smaller than that of the satellite-borne SAR, so that the repetition period is smaller, and the real-time performance of the corresponding required scene is higher; the track is not fixed: the track cannot be planned in advance, and the attack track can be changed in real time according to the target position.
However, most of the existing technologies generally face a trade-off challenge while pursuing to meet the real-time requirement of the missile-borne SAR, that is, the imaging quality of the echo signal is inevitably sacrificed while ensuring the data processing speed and the real-time performance. This is because the characteristics of high pulse repetition frequency and non-fixed trajectory require the system to process large amounts of data in extremely short time and adapt to changing environments in real time, in which case existing algorithms and system architectures may have difficulty meeting real time requirements while maintaining imaging quality.
Disclosure of Invention
In view of the above, the invention provides a missile-borne SAR echo simulation method, which can improve the imaging quality of echo signals while meeting the real-time requirement of the missile-borne SAR.
In order to achieve the above purpose, the technical scheme of the invention is as follows:
the missile-borne SAR echo simulation method is realized based on a missile-borne SAR echo simulation system, wherein the missile-borne SAR echo simulation system comprises a radio frequency receiving and transmitting subsystem, an SAR intermediate frequency modulation subsystem and an SAR echo sequence rapid calculation subsystem;
the SAR echo sequence rapid computing subsystem comprises a rapid computing module and an interface interaction module; the rapid operation module is used for carrying out scene analysis according to the missile-borne SAR track and modulating scene information onto an excitation signal; the interface interaction module is used for interaction of the digital signal interface, the parameters and the response sequence;
the system relates to a fine time delay modulation method, which comprises the following steps:
s1, rearranging data to realize signal reconstruction;
s2, constructing recording equipment to collect and record the output signals of the simulator, and carrying out imaging analysis on the recorded echo signals;
s3, optimizing the model by using a multi-path reconstruction delay modulation method.
The rapid operation module adopts a GPU processing chip, and the interface interaction module adopts an FPGA chip for processing.
The FPGA chip can also carry out envelope delay, amplitude compensation and convolution modulation in the interface interaction module.
The fine delay modulation method is realized based on FPGA multi-path reconstruction modulation.
The method for fine delay modulation based on FPGA multipath reconstruction of the pipeline technology is characterized in that when a delay module is designed, the same clock number is not delayed for all parallel branches, then the original transmission sequence of data is rearranged and then recombined, so that the original signal can be restored, and the delay precision of a sampling rate stage can be obtained.
And in the step S2, imaging the signal subjected to the fine time delay modulation through a distance-Doppler algorithm. Advantageous effects
1. According to the missile-borne SAR echo simulation method, the missile-borne SAR echo simulation system is based, the optimization design is carried out on the implementation of the fine time delay modulation method related to the system architecture, and the imaging quality of echo signals is improved while the real-time requirement of the missile-borne SAR is met.
2. According to the invention, the GPU is utilized to perform scene resolving of the double-precision floating point number, so that phase jump caused by parameter quantization errors is avoided, imaging quality is prevented from being influenced, the FPGA is used as a signal processing module, the real-time performance of the system can be improved to the greatest extent, and the signal processing logic of the FPGA is optimized, so that the signal processing precision of the FPGA is improved, and the imaging requirement is met.
3. When the delay module is designed, the method does not delay all parallel branches by the same clock number, then rearranges the original transmission sequence of the data, and then restores the original signal in a recombination mode, and can obtain the delay precision of the sampling rate level.
Drawings
FIG. 1 is a schematic diagram of a system used in the method of the present invention.
FIG. 2 is a functional block diagram of a system used in the method of the present invention.
Fig. 3 is a schematic diagram of the principle of time delay modulation according to the present invention.
Fig. 4 is a simulation diagram of the delay algorithm of the present invention.
FIG. 5 is a schematic diagram of the imaging results of the point target of the present invention.
FIG. 6 is a schematic diagram of imaging results of a ship target of the present invention.
Detailed Description
The invention will now be described in detail by way of example with reference to the accompanying drawings.
The invention provides a missile-borne SAR echo simulation method, which is based on a missile-borne SAR echo simulation system and performs optimization design on the realization of a fine time delay modulation method related to the system architecture, so that the real-time requirement of the missile-borne SAR is met and the imaging quality of echo signals is improved.
FIG. 1 is a schematic diagram of a system used in the method of the present invention. The missile-borne SAR echo simulation system comprises a radio frequency receiving and transmitting subsystem, an SAR intermediate frequency modulation subsystem and an SAR echo sequence rapid calculation subsystem;
the SAR echo sequence rapid computing subsystem comprises a rapid computing module and an interface interaction module;
the rapid operation module is used for carrying out scene analysis according to the missile-borne SAR track and modulating scene information onto an excitation signal; the interface interaction module (digital signal interface, parameter and response sequence interaction interface) is used for interaction of the digital signal interface, parameter and response sequence.
In order to take the characteristics of huge SAR echo calculation data volume, high real-time requirement and the like into consideration, a SAR echo sequence rapid calculation subsystem needs to consider a processing chip with rapid parallel calculation and a high-speed parallel data exchange interface. The main processing chip of each module is as follows: optionally, the fast operation module adopts a GPU processing chip, the GPU has a large number of programmable cores, can support a large number of multithreading, adopts a multi-core parallel processing architecture, and is suitable for processing data with large data volume, high parallelism and simple logic control. When two-precision floating point number operations such as scene calculation are needed, the GPU has the advantages which are incomparable with chips such as FPGA, DSP, CPU. In the system of the invention, the GPU is mainly responsible for scene analysis and modulating scene information onto an excitation signal.
Optionally, the interface interaction module adopts an FPGA chip for processing, the FPGA has strong real-time data processing capability, and real-time interaction of data can be realized by matching with a high-speed optical fiber interface and a PCIE interaction protocol.
Furthermore, the FPGA chip can also perform high-speed digital signal processing such as envelope delay, amplitude compensation, convolution modulation and the like in the interface interaction module.
On the basis, for the fast operation module and the interface interaction module, the GPU can be utilized to carry out scene resolving of double-precision floating point numbers, phase jump caused by parameter quantization errors is avoided, imaging quality is influenced, the FPGA is used as a signal processing module, system instantaneity can be improved to the greatest extent, and FPGA signal processing logic is optimized, so that signal processing precision of the FPGA is improved, and imaging requirements are met.
Because the FPGA can only complete discrete distance modulation when processing signals, a discrete signal modulation mathematical model is analyzed based on the discrete distance modulation:
two points in the SAR original echo signal are very important, namely, the azimuth echo signal needs to maintain a certain phase relation to generate a Doppler phase function; secondly, due to the existence of range migration, the azimuth echo signal shifts along the range direction.
During the motion of the platform, the SAR transmits and receives pulses in a certain pulse repetition period, and the antenna beam irradiates the ground. Each scattering element (point target) in the illuminated area back scatters the incident wave, so that the transmitted pulse carries the target and environmental information to form a SAR echo via modulation of the target and antenna pattern.
The radar transmit burst is typically a chirp signal, which can be expressed as:
in the method, in the process of the invention,is a linear frequency modulation signal>For carrier frequency->For the frequency modulation slope +.>Is a momentForm window function->For pulse width +.>For pulse repetition period>
Set the slant distance from a target point to the phase center of the seeker antenna asThe echo signal of the target point is:
. In (1) the->Is the echo signal, c is the speed of light, A is the echo amplitude,>is a slant distance.
The target scene of SAR simulation can be regarded as being composed of a large number of point targets distributed on the intersection points of rectangular grids, and echo signals of the whole scene are coherent superposition of echo signals of the point targets.
Echo simulation is carried out by adopting a one-dimensional frequency domain method, and the relation between a target to the phase center of the seeker antenna and the target scene inclined plane at a certain pulse moment is firstly shown as shown in figure 2. In the view of figure 2,,/>respectively represent the slant distance from two adjacent equal arcs to the phase center of the seeker antenna, and +.>Skew from the center of the arc bands to the phase center of the seeker antenna. N targets are shared in the arc strip-shaped areas, and the skew distances from a certain pulse time to the phase center of the seeker antenna are respectively +.>,/>,…/>. Then, complex scattering coefficients of all targets can be superimposed in the center of the arc bands, and in the arc band regions, the echo signal of one pulse can be expressed as:
wherein,pis the firstpThe number of objects to be achieved in the process,is the firstpEcho amplitude of the individual target. Center skew of the isocenter band using the respective target distances +.>Instead of each target pitch, the approximation of the doppler phase term is compensated, so that in the arc-banded regions, the echo signal of one pulse can be expressed as:
assuming that the whole scene can be divided into D equal-arc bands, at a certain pulse time, the echo signal of the whole target scene can be expressed as:
in the method, in the process of the invention,for echo signals +.>Indicate->Slant distance of the centers of the equal arc belts +.>Indicate->All scattering points within the equal arc band. />Is->Target echo delays at the center of the respective isochron zones. In the formula, only the first two items and the fast time variable +.>In relation, therefore, the above formula can be written in convolution form:
,/>the following steps are:
wherein,representing the transmitted signal>Representing a sequence of scene impulse responses->Is the frequency modulation slope.
It can be seen that the distance separation and phase resolution accuracy of the convolution sequence determines the quality of the final image. In order to improve the distance simulation accuracy, the FPGA implementation is discussed in detail below:
according to the SAR imaging principle, SAR echo simulation has extremely high precision requirements on delay and phase simulation, delay modulation precision has great influence on imaging effect, and aiming at the delay modulation related to the system architecture of the invention, a refined delay modulation method is provided, so that the delay modulation precision meets theoretical requirements, and the method comprises the following steps:
s1, rearranging data to realize signal reconstruction;
s2, constructing recording equipment to collect and record the output signals of the simulator, and carrying out imaging analysis on the recorded echo signals;
s3, optimizing the model by using a multi-path reconstruction delay modulation method.
The field programmable gate array has strong parallel processing capability, contains a large amount of RAM resources and high-speed IO resources, and is widely applied in the aspect of time delay modulation. The working clock frequency of FPGA is often lower than 300MHz due to process and the like, and a multi-channel parallel high-speed ADC sampling technique is generally used to achieve a higher signal sampling rate.
When delay modulation is carried out, the traditional delay modulation mode can only reach the control precision of clock cycle level, and can not meet the requirements of SAR echo simulation. The process is as follows:
let the input signal of the delay module benFor sampling point number, the output signal of the delay module is +.>WhereinnCan represent weightThe new sequence number is adopted, and the FPGA baseband processing adopts 4-path parallel processing, so that +.>Equivalent toWhich may represent 4-way signals of the FPGA baseband, then there is
If the data transmission sequence is not changed, in order to ensure the signal correctness, the same delay period modulation can be carried out on each branch signal, and the minimum delay is 1 clock period, so that the following exists:
in the above formula, when multi-path parallel processing is performed, if conventional parallel delay processing is adopted, the delay precision which can be provided by the multi-path parallel processing is only:
wherein the method comprises the steps ofLFor the number of parallel ways,for delay accuracy +.>For signal sampling rate, +.>Clock for the system.
If the delay precision is required to be further improved, data reconstruction is needed on the basis of the model, namely, the fine delay modulation method for FPGA multi-path reconstruction based on the pipeline technology. When the delay module is designed, the same clock number is not delayed to all parallel branches, then the original transmission sequence of the data is rearranged, and then the data is recombined, so that the data can be restored to the original signal, and the delay precision of the sampling rate level can be obtained, namely:
as can be seen from the above equation, the signal is only delayed by one sampling period, namely:
the schematic diagrams of the two delay modulation modes are shown in fig. 3, wherein the left diagram is a delay modulation principle based on a traditional FPGA clock counting method, and the right diagram is a refined delay modulation principle based on FPGA multi-path reconstruction of a pipeline technology.
Let the working clock be 200MHz, the number of parallel paths be 4, the simulation result is shown in figure 4, wherein the left graph is the time domain contrast after time delay, and the right graph is the result contrast (time delay 0.187m and time delay 0.75 m) after pulse pressure. The above results show that the accuracy of the multipath reconstructed fine delay modulation analog distance can reach 0.187m.
Therefore, in the preferred embodiment of the invention, the refinement time delay modulation method is realized based on FPGA multi-path reconstruction modulation;
further, the data in the step S1 is rearranged, and the method is a refined time delay modulation method for FPGA multi-path reconstruction based on a pipeline technology.
Further, the data is rearranged, so that the data can be restored to the original signal, and the delay precision of the sampling rate level can be obtained, namely:
wherein: let the input signal of the delay module beThe output signal of the delay module is +.>The FPGA baseband processing adopts 4-path parallel processing, and then +.>Equivalent is->
Further, in S2, the signal after the fine delay modulation is imaged by a range-doppler algorithm.
And (3) test verification:
in order to verify that the system meets the real-time and imaging capability test requirements, a recording device is built to collect and record the output signals of the simulator, and the recorded echo signals are subjected to imaging analysis. In the test process, in order to simulate the trajectory uncertainty, the simulator does not have the prior track lead-in, and all track information is sourced from real-time simulator equipment. Some of the test parameters are shown in table 1.
Table 1 test parameters
The traditional delay modulation mode is adopted, the distance modulation resolution is only 0.8m, and the analog distance modulation resolution is larger than the imaging distance resolution, so that the imaging of the analog SAR echo signal by using the distance-Doppler algorithm is mirrored.
After the multipath reconstruction delay modulation method is adopted to optimize the model, the distance modulation resolution reaches 0.2m, and after the SAR echo simulation signal modulated by the refined delay is imaged by using a distance-Doppler algorithm, the mirror image phenomenon disappears. Fig. 5 is an imaging result of a point target, and fig. 6 is an imaging result of a ship target.
For the SAR echo simulation of the missile-borne platform with non-uniform linear motion, a one-dimensional frequency domain method is suitable for considering both calculated amount and engineering realization, the invention provides a design framework and an implementation optimization scheme of the SAR echo simulation system, and provides a high-capacity data processing solution method for scene calculation based on a GPU. Therefore, the invention can improve the imaging quality of the echo signals while meeting the real-time requirement of the missile-borne SAR by optimally designing the algorithm implementation related to the architecture.
In summary, the above embodiments are only preferred embodiments of the present invention, and are not intended to limit the scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (4)

1. The missile-borne SAR echo simulation method is realized based on a missile-borne SAR echo simulation system and is characterized in that the missile-borne SAR echo simulation system comprises a radio frequency receiving and transmitting subsystem, an SAR intermediate frequency modulation subsystem and an SAR echo sequence rapid calculation subsystem;
the SAR echo sequence rapid computing subsystem comprises a rapid computing module and an interface interaction module; the rapid operation module is used for carrying out scene analysis according to the missile-borne SAR track and modulating scene information onto an excitation signal; the interface interaction module is used for interaction of the digital signal interface, the parameters and the response sequence;
the method for realizing the fine time delay modulation related to the system is realized based on FPGA multi-path reconstruction modulation and comprises the following steps:
s1, rearranging excitation signals modulated with scene information to realize signal reconstruction and obtain refined time-delay modulated signals;
the method comprises the steps of adopting the fine time delay modulation of FPGA multipath reconstruction based on the pipeline technology, not delaying all parallel branches by the same clock number when designing a time delay module, rearranging the original transmission sequence of data, and then recombining the data so that the data can be restored to the original signal and the time delay precision of a sampling rate stage can be obtained;
s2, constructing recording equipment, collecting and recording output signals of the missile-borne SAR echo simulation system, and carrying out imaging analysis on the recorded echo signals.
2. The method of claim 1, wherein the fast operation module employs a GPU processing chip and the interface interaction module employs an FPGA chip for processing.
3. The method of claim 2, wherein the FPGA chip is further capable of envelope delay, amplitude compensation, and convolution modulation in an interface interaction module.
4. A method according to any of claims 1-3, characterized in that the refined time-delay modulated signal is imaged in S2 by means of a range-doppler algorithm.
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EP2743727A2 (en) * 2014-01-16 2014-06-18 Institute of Electronics, Chinese Academy of Sciences Method for implementing high-resolution wide-swath spaceborne SAR system
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