CN117182227A - Integrated circuit detection method - Google Patents
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- CN117182227A CN117182227A CN202311474867.6A CN202311474867A CN117182227A CN 117182227 A CN117182227 A CN 117182227A CN 202311474867 A CN202311474867 A CN 202311474867A CN 117182227 A CN117182227 A CN 117182227A
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- 238000001514 detection method Methods 0.000 title claims abstract description 18
- 238000000034 method Methods 0.000 claims abstract description 87
- 238000012360 testing method Methods 0.000 claims abstract description 49
- 238000007689 inspection Methods 0.000 claims abstract description 19
- 238000005476 soldering Methods 0.000 claims abstract description 18
- 238000002791 soaking Methods 0.000 claims abstract description 13
- 230000001351 cycling effect Effects 0.000 claims abstract description 8
- 239000007791 liquid phase Substances 0.000 claims description 26
- 229910045601 alloy Inorganic materials 0.000 claims description 6
- 239000000956 alloy Substances 0.000 claims description 6
- 239000012071 phase Substances 0.000 claims 3
- 239000000945 filler Substances 0.000 description 19
- 239000000463 material Substances 0.000 description 16
- 238000010438 heat treatment Methods 0.000 description 12
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 9
- 229910000679 solder Inorganic materials 0.000 description 8
- 230000007613 environmental effect Effects 0.000 description 7
- 230000002950 deficient Effects 0.000 description 6
- 238000004806 packaging method and process Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 238000001816 cooling Methods 0.000 description 3
- 230000032798 delamination Effects 0.000 description 3
- 238000012216 screening Methods 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Abstract
An integrated circuit inspection method comprising: setting the integrated circuit product in a test environment with an ambient temperature cycling back and forth within a test temperature range; performing a first reflow process on the integrated circuit product; after the first reflow soldering process is finished, carrying out electrical detection on the integrated circuit product; after the electrical property detection is finished, a baking process and a moisture soaking process are carried out on the integrated circuit product; and performing a second reflow process on the integrated circuit product after the baking process and the moisture soaking process are performed.
Description
Technical Field
The present application relates to the field of semiconductors, and more particularly, to a method for detecting an integrated circuit.
Background
When the integrated circuit is packaged, it may be subjected to shipping, sea, land, and other transportation environments in which the environmental factors are quite different. When the client receives the integrated circuit product, the filler material of the integrated circuit product may delaminate due to moisture absorption during transport. If the layered position appears between the solder points, when the client side welds the integrated circuit product, the tin melts at the high temperature of the reflow process and conducts along the layers, thus forming a tin bridging phenomenon. Tin bridging can lead to product failure or even damage burnout. Therefore, a general and simple screening method is needed to ensure that products with poor firmness of filler materials can be screened effectively, and further circuit failure caused by tin bridging is avoided.
Disclosure of Invention
In view of the above, the present application provides an integrated circuit testing method to solve the above-mentioned problems.
According to an embodiment of the present application, an integrated circuit testing method is provided. The integrated circuit detection method comprises the following steps: setting the integrated circuit product in a test environment with an ambient temperature cycling back and forth within a test temperature range; performing a first reflow process on the integrated circuit product; after the first reflow soldering process is finished, carrying out electrical detection on the integrated circuit product; after the electrical property detection is finished, a baking process and a moisture soaking process are carried out on the integrated circuit product; and performing a second reflow process on the integrated circuit product after the baking process and the moisture soaking process are performed.
According to an embodiment of the application, disposing the integrated circuit product in the test environment with the ambient temperature cycling back and forth within the test temperature range includes: the ambient temperature was cycled back and forth ten times within the test temperature range.
According to an embodiment of the application, the test temperature ranges from-75 ℃ to 160 ℃ and the single cycle time is 30 minutes.
According to an embodiment of the application, the test temperature range comprises a first temperature range between-75 ℃ and-60 ℃ for a time of 5 to 10 minutes per cycle in the first temperature range.
According to an embodiment of the application, the test temperature range comprises a second temperature range between 145 ℃ and 160 ℃ for a time of 5 to 10 minutes per cycle in the second temperature range.
According to an embodiment of the present application, the integrated circuit product is an alloy package product, the minimum temperature of the pre-heat soaking stage of the first reflow soldering process is 100 ℃, the maximum temperature is 150 ℃, the heating time is between 60 and 120 seconds, the heating time of the first reflow soldering process from room temperature to peak temperature is at most 6 minutes, the heating efficiency from the liquid phase temperature to the peak temperature is at most 3 ℃ per second, the cooling efficiency from the peak temperature to the liquid phase temperature is at most 6 ℃ per second, the liquid phase temperature is 183 ℃, and the time that the first reflow soldering process is maintained above the liquid phase temperature is between 60 and 150 seconds.
According to an embodiment of the present application, the integrated circuit product is a lead-free package product, the minimum temperature of the pre-heat soaking stage of the first reflow soldering process is 150 ℃, the maximum temperature is 200 ℃, the heating time is between 60 and 120 seconds, the heating time of the first reflow soldering process from room temperature to peak temperature is at most 8 minutes, the heating efficiency from the liquid phase temperature to the peak temperature is at most 3 ℃ per second, the cooling efficiency from the peak temperature to the liquid phase temperature is at most 6 ℃ per second, the liquid phase temperature is 217 ℃, and the time that the first reflow soldering process is maintained above the liquid phase temperature is between 60 and 150 seconds.
According to an embodiment of the present application, the integrated circuit product is an LTS package product, the minimum temperature of the pre-heat soaking stage of the first reflow process is 100 ℃, the maximum temperature is 120 ℃, the heating time is between 30 and 90 seconds, the heating time of the first reflow process from room temperature to peak temperature is at most 4 minutes, the heating efficiency from the liquid phase temperature to the peak temperature is at most 3 ℃ per second, the cooling efficiency from the peak temperature to the liquid phase temperature is at most 6 ℃ per second, the liquid phase temperature is 139 ℃, and the time that the first reflow process is maintained above the liquid phase temperature is between 60 and 150 seconds.
According to an embodiment of the present application, an integrated circuit testing method is provided. The integrated circuit detection method comprises the following steps: setting the integrated circuit product in a test environment in which the ambient temperature circulates back and forth ten times within a test temperature range, wherein the test temperature range is between-75 ℃ and 160 ℃, and the single cycle time is 30 minutes; performing a reflow soldering process on the integrated circuit product; and performing electrical inspection on the integrated circuit product.
The integrated circuit detection method provided by the application can be used for detecting the firmness of the filler material of the integrated circuit product and further detecting whether the filler material is easy to delaminate under severe environmental changes, and can greatly improve the yield of the integrated circuit product received by a client after the defective product of the filler material is removed in advance. In addition, the integrated circuit detection method provided by the application has the advantages of rapidness, directional screening, simplicity and low cost, and can screen integrated circuit products in batch and large scale.
Drawings
The accompanying drawings are included to provide a further understanding of the application, and are incorporated in and constitute a part of this specification, illustrate the application and together with the description serve to explain, without limitation, the application. In the drawings:
FIG. 1 is a flow chart illustrating an integrated circuit testing method according to an embodiment of the application.
Fig. 2 illustrates a temperature profile of a first reflow process in accordance with one embodiment of the present application.
FIG. 3 is a flow chart illustrating an integrated circuit testing method according to an embodiment of the application.
Fig. 4a demonstrates the numerical records of a first reflow process performed when alloy packaging products, lead-free packaging products, and LTS packaging products.
Fig. 4b and 4c illustrate the peak temperature and thickness versus volume, respectively, of the first reflow soldering process when the integrated circuit product is an alloy package product and a lead-free package product, respectively.
Detailed Description
The following disclosure provides various embodiments or examples that can be used to implement the various features of the present disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. It is to be understood that these descriptions are merely exemplary and are not intended to limit the present disclosure. For example, in the following description, forming a first feature on or over a second feature may include certain embodiments in which the first and second features are in direct contact with each other; and may include embodiments in which additional components are formed between the first and second features such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. Such reuse is for brevity and clarity purposes and does not itself represent a relationship between the different embodiments and/or configurations discussed.
Moreover, spatially relative terms, such as "under," "below," "lower," "upper," and the like, may be used herein to facilitate a description of the relationship between one element or feature to another element or feature as illustrated in the figures. These spatially relative terms are intended to encompass a variety of different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be placed in other orientations (e.g., rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein interpreted accordingly.
Notwithstanding that the numerical ranges and parameters setting forth the broad scope of the application are approximations, the numerical values set forth in the specific examples are reported as precisely as possible. However, any numerical value inherently contains certain standard deviations found in their respective testing measurements. As used herein, "about" generally means that the actual value is within plus or minus 10%, 5%, 1% or 0.5% of a particular value or range. Alternatively, the term "about" means that the actual value falls within an acceptable standard error of the average value, depending on the consideration of the person having ordinary skill in the art to which the present application pertains. It is to be understood that all ranges, amounts, values, and percentages used herein (e.g., to describe amounts of materials, lengths of time, temperatures, operating conditions, ratios of amounts, and the like) are modified by the term "about" unless otherwise specifically indicated. Accordingly, unless indicated to the contrary, the numerical parameters set forth in the present specification and attached claims are approximations that may vary depending upon the desired properties. At least these numerical parameters should be construed as the number of significant digits and by applying ordinary rounding techniques. Herein, a numerical range is expressed as from one end point to another end point or between two end points; unless otherwise indicated, all numerical ranges recited herein include endpoints.
Fig. 1 illustrates a flow chart of an integrated circuit testing method 1 according to an embodiment of the application. In some embodiments, the integrated circuit inspection method 1 is configured to inspect and eliminate the occurrence of tin bridging, thereby improving the yield of the integrated circuit product. The present application is not limited to practice with the process steps shown in fig. 1, provided that substantially the same results are achieved. In some embodiments, the integrated circuit inspection method 1 can be generally summarized as follows:
step 11: setting the integrated circuit product in a test environment with an ambient temperature cycling back and forth within a test temperature range;
step 12: performing a first reflow process on the integrated circuit product;
step 13: after the first reflow soldering process is finished, the electrical property of the integrated circuit product is detected;
step 14: after electrical property detection, baking and moisture soaking processes are carried out on the integrated circuit product; and
step 15: after the baking process and the moisture soaking process are performed, a second reflow soldering process is performed on the integrated circuit product.
With respect to step 11, in certain embodiments, the integrated circuit product to be tested is placed in a temperature cycling test chamber configured to provide an ambient temperature that cycles back and forth over a test temperature range. In certain embodiments, the temperature cycling test chamber is configured to cycle the ambient temperature back and forth ten times over a test temperature range, wherein the test temperature range is between-75 ℃ and 160 ℃, and the single cycle time is 30 minutes. In certain embodiments, the test temperature range includes a first temperature range, wherein the first temperature range is between-75 ℃ and-60 ℃ and the time that the ambient temperature is within the first temperature range for each cycle is between 5 and 10 minutes. In certain embodiments, the test temperature range includes a second temperature range between 145 ℃ and 160 ℃ and the time that the ambient temperature is within the second temperature range for each cycle is between 5 and 10 minutes.
When the integrated circuit product is heated, the die in the integrated circuit product has a low coefficient of thermal expansion, its shape remains relatively unchanged, while the substrate in the integrated circuit product has a high coefficient of thermal expansion, expanding and pulling the solder balls and the filler therebetween. The opposite effect occurs when the integrated circuit product is in a low temperature environment, where the die in the integrated circuit product has a low coefficient of thermal expansion, its shape remains relatively unchanged, and the substrate has a high coefficient of thermal expansion, shrinking and pulling the solder balls and filler therebetween. As the number of cycles increases, delamination may occur between the filler and the substrate if the filler material is defective. If the layers are located between the solder balls, the solder balls of the integrated circuit product are conducted in the subsequent reflow step, and the phenomenon of solder bridging occurs. Accordingly, the durability of the integrated circuit product subjected to mechanical stress due to expansion and shrinkage under the alternating cycle of high temperature and low temperature can be detected through the step 11, whether the integrated circuit product has tin bridging phenomenon or not is detected, and the yield can be increased after the integrated circuit product with the tin bridging phenomenon is removed.
With respect to step 12, in some embodiments, the integrated circuit product after step 11 is placed in a reflow oven to perform a first reflow process. Referring to fig. 2, fig. 2 illustrates a temperature profile of a first reflow process in accordance with one embodiment of the present application. As can be seen from fig. 2, the first reflow process begins to heat from room temperature and begins to cool after reaching the peak temperature. In certain embodiments, room temperature is about 25 ℃. In some embodiments, the firstThe reflow soldering process is performed by a preheating soaking stage in the heating process, then heating to the liquid phase temperature, reaching the peak temperature, and then starting to cool. The highest temperature T of the preheating soaking stage is different according to the types of integrated circuit products s,max Minimum temperature T s,min Time t of heating up s Temperature T of liquid phase L And peak temperature T P Room temperature to peak temperature T P Is a temperature rise time t of (2) P From the liquidus temperature T L To peak temperature T P From the peak temperature T P To the liquidus temperature T L Is maintained at the liquid phase temperature T L Time t above L Etc. may be different. In addition, the applicant shows the values of the first reflow process performed when the integrated circuit product is an alloy package product, a lead-free package product, and an LTS package product, respectively, in fig. 4 a.
In addition, the peak temperature T of the individual integrated circuit products P In addition to varying with the type of integrated circuit product, the thickness and volume of the integrated circuit product may vary. The peak temperature and thickness and volume relationship of the first reflow process when the integrated circuit product is an alloy package product and a lead-free package product, respectively, are shown in fig. 4b and 4 c. In addition, when the integrated circuit product is an LTS packaging product, the peak temperature T is higher than the peak temperature T regardless of the thickness or volume P All 190 degrees celsius.
As described above, when the step 11 is performed, if the filler material has defects, delamination may occur between the filler and the substrate. When the layers are located between the solder balls, the integrated circuit product will have a solder bridging phenomenon after the first reflow process of step 12 is completed, and electrical failure is caused. In some embodiments, the step 12 is followed by the step 13 to electrically test the integrated circuit product, and if the electrical test is not passed, it indicates that the integrated circuit product has a tin bridging phenomenon, in other words, the filler material of the integrated circuit product has defects, thereby eliminating the defective product. The integrated circuit product passing the electrical detection represents the filler material with good firmness and is not easy to be layered due to severe environmental changes.
After the integrated circuit products that have been shipped after steps 11 and 12 and pass the electrical inspection of step 13, the integrated circuit products can also be kept in good and electrical operation by passing through various environmental factors (such as, but not limited to, air pressure, temperature, humidity) to the customer. Accordingly, the defective product of the filler material is removed in advance, and the yield of the integrated circuit product obtained by the client is greatly improved.
Steps 14 and 15 may be used as a step flow for a pretreatment test. In certain embodiments, steps 14 and 15 are used to simulate the shipping environment experienced after shipment of the product. In some embodiments, the bake process and the moisture soak process of step 14 are used to simulate the process of temperature change and moisture absorption of the integrated circuit product after removal of the vacuum package between the circuit boards on the client, and the second reflow process of step 15 is used to simulate the process of soldering the integrated circuit product by the client. In some embodiments, the process of reaching the client from the test, approach transportation environment of the packaged product is fully simulated through steps 11 through 15. In some embodiments, after step 15 is completed, the ic product may be tested again to ensure that the ic product still works properly when it is transported to the customer.
The integrated circuit detection method 1 provided by the application can be used for detecting the firmness of the filler material of the integrated circuit product and further detecting whether the filler material is easy to delaminate under severe environmental changes, and can greatly improve the yield of the integrated circuit product received by a client after the defective product of the filler material is removed in advance. In addition, the integrated circuit detection method 1 provided by the application has the advantages of rapidness, directional screening, simplicity and low cost, and can screen integrated circuit products in batch and large scale.
Fig. 3 illustrates a flow chart of an integrated circuit testing method 2 according to an embodiment of the application. In some embodiments, the integrated circuit inspection method 2 is configured to inspect and exclude integrated circuit products in which tin bridging occurs, thereby improving yield of the integrated circuit products. The present application is not limited to practice with the process steps shown in fig. 3, provided that substantially the same results are achieved. In some embodiments, the integrated circuit inspection method 2 can be generalized as follows:
step 21: setting the integrated circuit product in a test environment in which the ambient temperature circulates back and forth ten times within a test temperature range, wherein the test temperature range is between-75 ℃ and 160 ℃, and the single cycle time is 30 minutes;
step 22: carrying out reflow soldering process on the integrated circuit product; and
step 23: and carrying out electrical detection on the integrated circuit product.
The integrated circuit inspection method 2 of the embodiment of fig. 3 is substantially the same as the integrated circuit inspection method 1 of the embodiment of fig. 1, wherein step 21 and step 22 correspond to step 11 and step 12. The only difference is that the ic inspection method 2 performs the electrical inspection directly after the step 22 is completed. As shown in the embodiment of fig. 1, the integrated circuit product through electrical inspection represents a filler material that is robust and not prone to delamination due to severe environmental changes. After the integrated circuit product that has been shipped after step 22 and passed the electrical inspection, the integrated circuit product is transported to the customer via various environmental factors (such as, but not limited to, air pressure, temperature, humidity) to maintain the integrity and electrical performance of the integrated circuit product. Accordingly, the defective product of the filler material is removed in advance, and the yield of the integrated circuit product obtained by the client is greatly improved.
Those skilled in the art will readily understand the implementation details of the embodiment of fig. 3 after reading the embodiment of fig. 1. The detailed description is omitted here for brevity.
As used herein, the terms "approximately," "substantially," and "about" are used to describe and account for minor variations. When used in connection with an event or circumstance, the terms can refer to instances where the event or circumstance occurs precisely and instances where it occurs to the close approximation. As used herein with respect to a given value or range, the term "about" generally means within ±10%, ±5%, ±1% or ±0.5% of the given value or range. Ranges can be expressed herein as from one endpoint to the other endpoint, or between two endpoints. Unless otherwise specified, all ranges disclosed herein include endpoints. The term "substantially coplanar" may refer to two surfaces within a few micrometers (μm) positioned along a same plane, for example, within 10 μm, within 5 μm, within 1 μm, or within 0.5 μm positioned along the same plane. When referring to "substantially" the same value or property, the term may refer to a value that is within ±10%, 5%, 1% or 0.5% of the average value of the values.
As used herein, the terms "approximately," "substantially," and "about" are used to describe and explain minor variations. When used in connection with an event or circumstance, the terms can refer to instances where the event or circumstance occurs precisely and instances where it occurs to the close approximation. For example, when used in conjunction with a numerical value, the term can refer to a range of variation of less than or equal to ±10% of the numerical value, e.g., less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, two values may be considered to be "substantially" or "about" the same if the difference between the two values is less than or equal to ±10% (e.g., less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%) of the average value of the values. For example, "substantially" parallel may refer to a range of angular variation of less than or equal to ±10° relative to 0 °, for example, less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°. For example, "substantially" perpendicular may refer to a range of angular variation of less than or equal to ±10° relative to 90 °, for example, less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°.
For example, two surfaces may be considered to be coplanar or substantially coplanar if the displacement between the two surfaces is equal to or less than 5 μm, equal to or less than 2 μm, equal to or less than 1 μm or equal to or less than 0.5 μm. A surface may be considered planar or substantially planar if the displacement of the surface relative to the plane between any two points on the surface is equal to or less than 5 μm, equal to or less than 2 μm, equal to or less than 1 μm or equal to or less than 0.5 μm.
As used herein, the singular terms "a" and "an" may include plural referents unless the context clearly dictates otherwise. In the description of some embodiments, a component provided "on" or "over" another component may encompass the case where the former component is directly on (e.g., in physical contact with) the latter component, as well as the case where one or more intermediate components are located between the former component and the latter component.
As used herein, spatially relative terms such as "below," "lower," "above," "upper," "lower," "left," "right," and the like may be used herein for ease of description to describe one component or feature's relationship to another component or feature as illustrated in the figures. In addition to the orientations depicted in the figures, the spatially relative terms are intended to encompass different orientations of the device in use or operation. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present.
The foregoing has outlined features of several embodiments and detailed aspects of the present disclosure. The embodiments described in this disclosure may be readily used as a basis for designing or modifying other processes and structures for carrying out the same or similar purposes and/or obtaining the same or similar advantages of the embodiments introduced herein. Such equivalent constructions do not depart from the spirit and scope of the present disclosure and are susceptible to various changes, substitutions and alterations without departing from the spirit and scope of the present disclosure.
Claims (9)
1. An integrated circuit inspection method, comprising:
setting the integrated circuit product in a test environment with an ambient temperature cycling back and forth within a test temperature range;
performing a first reflow process on the integrated circuit product;
after the first reflow soldering process is finished, carrying out electrical detection on the integrated circuit product;
after the electrical property detection is finished, a baking process and a moisture soaking process are carried out on the integrated circuit product; and
and after the baking process and the moisture soaking process are finished, performing a second reflow soldering process on the integrated circuit product.
2. The integrated circuit inspection method of claim 1, wherein disposing the integrated circuit product in the test environment with the ambient temperature cycling back and forth within the test temperature range comprises:
the ambient temperature was cycled back and forth ten times within the test temperature range.
3. The integrated circuit testing method of claim 1, wherein the test temperature ranges from-75 ℃ to 160 ℃ and the single cycle time is 30 minutes.
4. The method of claim 3, wherein the test temperature range includes a first temperature range, the first temperature range being between-75 ℃ and-60 ℃, and wherein the time in the first temperature range per cycle is between 5 and 10 minutes.
5. The method of claim 4, wherein the test temperature range includes a second temperature range, the second temperature range being between 145 ℃ and 160 ℃, and wherein the time in the second temperature range per cycle is between 5 and 10 minutes.
6. The integrated circuit inspection method of claim 1, wherein the integrated circuit product is an alloy package product, the minimum temperature of the pre-heat soak phase of the first reflow process is 100 ℃, the maximum temperature is 150 ℃, the warm-up time is between 60 and 120 seconds, the warm-up time of the first reflow process from room temperature to peak temperature is at most 6 minutes, the warm-up efficiency from the peak temperature to the peak temperature is at most 3 ℃ per second, the cool-down efficiency from the peak temperature to the liquid phase temperature is at most 6 ℃ per second, the liquid phase temperature is 183 ℃, and the time the first reflow process is maintained above the liquid phase temperature is between 60 and 150 seconds.
7. The integrated circuit inspection method of claim 1, wherein the integrated circuit product is a lead-free packaged product, the minimum temperature of the pre-heat soak phase of the first reflow process is 150 ℃, the maximum temperature is 200 ℃, the warm-up time is between 60 and 120 seconds, the warm-up time of the first reflow process from room temperature to peak temperature is at most 8 minutes, the warm-up efficiency from liquid phase temperature to peak temperature is at most 3 ℃ per second, the cool-down efficiency from peak temperature to liquid phase temperature is at most 6 ℃ per second, the liquid phase temperature is 217 ℃, and the time the first reflow process is maintained above the liquid phase temperature is between 60 and 150 seconds.
8. The integrated circuit inspection method of claim 1, wherein the integrated circuit product is an LTS packaged product, the minimum temperature of the pre-heat soak phase of the first reflow process is 100 ℃, the maximum temperature is 120 ℃, the warm-up time is between 30 and 90 seconds, the warm-up time of the first reflow process from room temperature to peak temperature is at most 4 minutes, the warm-up efficiency from liquid phase temperature to peak temperature is at most 3 ℃ per second, the cool-down efficiency from peak temperature to liquid phase temperature is at most 6 ℃ per second, the liquid phase temperature is 139 ℃, and the time the first reflow process is maintained above the liquid phase temperature is between 60 and 150 seconds.
9. An integrated circuit inspection method, comprising:
setting the integrated circuit product in a test environment in which the ambient temperature circulates back and forth ten times within a test temperature range, wherein the test temperature range is between-75 ℃ and 160 ℃, and the single cycle time is 30 minutes;
performing a reflow soldering process on the integrated circuit product; and
and performing electrical detection on the integrated circuit product.
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