CN117149070A - Data transmission method and solid state disk system - Google Patents

Abstract

The invention relates to the technical field of computer storage, and discloses a data transmission method and a solid state disk system.A interface module obtains all read messages in an io message queue if the messages in the io message queue are read messages, performs format conversion on the read messages, stores the read messages after format conversion in a buffer zone, and sends a first message to an io acceleration module; in response to the first message, the io acceleration module reads the read message in the buffer area, acquires data to be read corresponding to each read message from the storage module according to the read message, stores each data to be read into the buffer area, configures descriptors corresponding to each read message respectively at the storage position of the buffer area according to each data to be read, and sends the descriptors to the direct memory access module; and the direct memory access module acquires the data to be read from the buffer area according to each descriptor and transmits the data to be read to the host. The invention simplifies the communication flow among the modules in the solid state disk system and improves the operation efficiency of the solid state disk system.

Description

Data transmission method and solid state disk system

Technical Field

The invention relates to the technical field of computer storage, in particular to a data transmission method and a solid state disk system.

Background

Solid State Disk (SSD) is used as a novel storage technology, and by using a flash memory chip as a storage medium, the solid state disk has the advantages of faster data transmission speed, low delay and high reliability, and becomes an important innovation in the storage field. To fully exploit the performance potential of SSDs, NVMe protocols have evolved to take advantage of the high bandwidth and low latency characteristics of PCI Express (PCIe) interfaces, providing higher data transfer speeds and faster access times. The NVMe protocol also supports parallel operation and multi-queue characteristics, and improves throughput and concurrency performance of SSDs.

However, in the use process of the NVMeSSD, the communication data volume between the host and the NVMe SSD is large, and the communication between the host and the NVMeSSD is frequent, and a plurality of functional modules exist in the NVMe SSD, so that each time the host and the NVMeSSD communicate, the information needs to be repeatedly transferred between the modules in the NVMe SSD, and the task issued by the host can be executed. It can be seen that, although the NVMe SSD supports multi-queue message communication, it takes a long time to complete each time the message is completed, and the processing speed of the NVMe SSD for the task is still limited by the NVMe SSD master control performance.

Disclosure of Invention

In view of this, the invention provides a data transmission method and a solid state disk system, so as to solve the problem that the existing solid state disk system spends a long time when processing read-write messages.

In a first aspect, the invention provides a data transmission method, applied to a solid state disk system, the solid state disk system adopts a non-volatile memory host controller interface specification, the solid state disk system comprises an interface module, an io acceleration module, a buffer zone, a direct memory access module, a storage module and an io message queue storage module, the io message queue storage module stores an io message queue, the messages in the io message queue are written by a host, if the messages in the io message queue are read messages, the interface module acquires all read messages in the io message queue, performs format conversion on the read messages, stores the read messages after format conversion in the buffer zone, and sends first messages to the io acceleration module; in response to the first message, the io acceleration module reads the read message in the buffer area, acquires data to be read corresponding to each read message from the storage module according to the read message, stores each data to be read into the buffer area, configures descriptors corresponding to each read message respectively at the storage position of the buffer area according to each data to be read, and sends the descriptors to the direct memory access module; and the direct memory access module acquires the data to be read from the buffer area according to each descriptor and transmits the data to be read to the host.

In the embodiment of the invention, the solid state disk system comprises the io acceleration module, the io acceleration module acquires the data to be read corresponding to each read message from the storage module according to the read message, and then sends the message to the direct memory access module, and the direct memory access module transmits the data to the host.

In an alternative embodiment, after the direct memory access module transmits the data to be read to the host, a second message is sent to the io acceleration module, where the second message is used to characterize that the read message corresponding to the descriptor is successfully executed; if the io acceleration module receives second messages corresponding to all the read messages in the buffer zone respectively, sending a third message to the interface module, wherein the third message is used for representing that the read message processing in the buffer zone is completed; in response to the third message, the interface module sends an io completion command to the host.

In the embodiment of the invention, an io acceleration module and a buffer area are added, after the interface module determines that the read information needed to be executed is stored in the io information queue, all the read information in the io information queue is taken out, all the read information is subjected to format conversion and then written into the buffer area, the io acceleration module sends descriptors to the direct memory access module according to the information in the buffer area, each time the direct memory access module completes the read information corresponding to one descriptor, a second information is sent to the io acceleration module, and after the io acceleration module determines that all the read information in the buffer area is executed according to the second information, a third information is sent to the interface module, so that the interface module sends an io completion command to a host. In the embodiment of the invention, only the direct memory access module and the io acceleration module are used for communication when one message reading is completed, and an interface module and a host are not needed to participate in communication, so that the communication flow is saved, and the performance of the solid state disk system is improved.

In an alternative implementation manner, the io acceleration module obtains a physical block address corresponding to the logical block address according to a pre-stored mapping relation table; and acquiring the data to be read corresponding to the read message from the storage module according to the physical block address.

In an optional implementation manner, the solid state disk system further includes a flash memory conversion layer module, and the method provided by the embodiment of the invention further includes: if the messages in the io message queue are write messages, the interface module acquires all the write messages in the io message queue, performs preprocessing on each write message to obtain write messages to be executed, and sends the write messages to be executed to the io acceleration module; the io acceleration module acquires data to be written corresponding to each message to be written, integrates or splits the data to be written according to the storage format of the buffer area, and writes the data to be written into the buffer area; sending a fourth message to the flash memory conversion layer module, wherein the fourth message comprises the position of data to be written in a buffer area; the flash memory conversion layer module determines the physical block address corresponding to the data to be written in each message to be written, and sends a data transmission message corresponding to each message to be written to the memory access module, wherein the data transmission message comprises the position of each data to be written in a buffer area and the physical block address corresponding to each data to be written; the direct memory access module receives the data transmission message, acquires the data to be written according to the buffer area position in the data transmission message, and writes the data to be written into the storage module according to the physical block address; sending a fourth message to the io acceleration module, wherein the fourth message is used for representing that the writing message to be executed corresponding to the data transmission message is successfully executed; if the io acceleration module receives fourth messages corresponding to all the writing messages to be executed respectively, a fifth message is sent to the interface module; in response to the fifth message, the interface module sends an io completion command to the host.

In the embodiment of the invention, after the io acceleration module obtains the data to be written corresponding to each message to be written, the data to be written is integrated or split, so that the integrated or split data meets the storage format of the buffer area, therefore, only one buffer area is arranged in the solid state disk, a plurality of buffer areas are avoided, resource waste is avoided, and the buffer area management of firmware and the storage of flash memory are simplified. In the embodiment of the invention, after determining that the writing information to be executed exists in the io information queue, the interface module takes out all the writing information in the io information queue, pre-processes all the writing information and sends the writing information to the io acceleration module, and when the direct memory access module finishes one writing information to be executed, a fourth message is sent to the io acceleration module, and when the io acceleration module judges that all the writing information to be executed is finished according to the fourth message, a fifth message is sent to the interface module, so that the interface module sends an io finishing command to the host. In the embodiment of the invention, only the direct memory access module and the io acceleration module are communicated when one message to be executed is completed, and the interface module and the host are not needed to participate in communication, so that the communication flow is saved, and the performance of the solid state disk system is improved.

In an alternative embodiment, the step of preprocessing the write message by the interface module to obtain the write message to be executed includes: if the data source address of the data to be written contained in one writing message is a continuous address, the writing message is subjected to format conversion to form the writing message to be executed.

In an alternative embodiment, if the data source address of the data to be written contained in one writing message is a discontinuous address, splitting the writing message into a plurality of messages, wherein each message contains a section of continuous address, and the number of the messages is the same as the number of sections of the data source address; and converting the formats of the messages to form a plurality of messages to be written.

In the embodiment of the invention, if the data source address of the data to be written in the write message is a discontinuous address, the write message is split first, so that the data source address in each message obtained by splitting is guaranteed to be a continuous address, and the data to be written is acquired through the continuous data source address when each message is executed, thereby avoiding system error reporting and improving the stability of system operation.

In an alternative embodiment, each writing message corresponds to a first identifier, each writing message to be executed corresponds to a second identifier, after preprocessing each writing message to obtain the writing message to be executed, the interface module records the corresponding relationship between each first identifier and each second identifier according to the corresponding relationship between each writing message and the writing message to be executed; after the direct memory access module writes the data to be written into the storage module, writing a second identification of the writing message to be executed corresponding to the data transmission message into the buffer; in response to the fifth message, the interface module performs polling query on the buffer area before sending the io completion command to the host, and determines whether the writing message is completely completed according to the second identifier recorded in the buffer area and the corresponding relation between the first identifier and the second identifier recorded in advance; if it is determined that the write message is complete, an io completion command is sent to the host.

According to the data transmission method provided by the embodiment of the invention, after each write message to be executed is completed by the direct memory access module, the feedback host is not needed, and the host is fed back only after all write messages in the io message queue are executed, so that the interactive flow among all modules in the solid state disk system is saved, the performance of the solid state disk system is improved, on the basis, in order to ensure that each write message is executed, the interface module establishes the association relation between the first identifier of the write message and the second identifier of the write message to be executed, and each time the direct memory access module completes one write message to be executed, the second identifier of the write message to be executed is written into the buffer area, and after the interface module receives the fifth message of the io acceleration module, whether all write messages are verified through the second identifier in the buffer area is completed, and the reliability of the solid state disk system in processing the write message is improved through the verification process.

In an optional implementation manner, the write message to be executed includes a logical storage address, the fourth message sent by the io acceleration module to the flash translation layer module further includes a logical storage address, and after the flash translation layer module determines the physical block address corresponding to the data to be written in each write message to be executed, the mapping relationship between the logical storage address and the physical block address of each write message to be executed is stored in the mapping relationship table.

In an alternative embodiment, the to-be-executed write message includes a format of to-be-written data, and the io acceleration module integrates or splits each to-be-written data according to the format of each to-be-written data to obtain a plurality of data, writes each data into the buffer, and matches the format of each data with the storage format of the buffer.

In an optional implementation manner, the solid state disk system further includes a doorbell register, and the method provided by the embodiment of the invention further includes: after the host writes the message into the io message queue, an access request is sent to the doorbell register to enable the interface module to fetch the message in the io message queue.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.

FIG. 1 is a block diagram of a solid state disk system according to an embodiment of the present invention;

FIG. 2 is a flowchart illustrating steps performed by modules in a solid state disk system according to an embodiment of the present invention;

FIG. 3 is a flowchart illustrating steps performed by modules in a solid state disk system according to an embodiment of the present invention.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

In this embodiment, a data transmission method is provided and applied to a solid state disk system, where the system adopts a non-volatile memory host controller interface specification, as shown in fig. 1, and the system includes an interface module, an io acceleration module, a buffer, a direct memory access module, a storage module, and an io message queue storage module, where the io message queue storage module stores an io message queue, and a message in the io message queue is written by a host.

If the message in the io message queue is a read message, as shown in fig. 2, each functional module in the solid state disk system executes the following steps:

step S201: the interface module obtains all read messages in the io message queue, performs format conversion on the read messages, stores the read messages after format conversion in the buffer area, and sends a first message to the io acceleration module.

In an alternative embodiment, when the host writes a message into the io message queue, the message includes an io type, and the interface module may determine that the message is a read message or a write message through the io type of the message.

In an alternative embodiment, the io message queue includes information such as source address, destination address, data length, data type, read data format, etc. in each message.

In an alternative embodiment, when the host writes data into the io message queue, the host is usually in PRP format or SGL format, and the host writes the messages in the io message queue, where the length of each message is not unique, which is not beneficial to the processing of the messages by the solid state disk system.

In a specific embodiment, taking a multi-core system formed by 4 Cortex R8 as an example, the Cortex r8_0 runs an interface module process to obtain all read messages in the io message queue.

Step S202: in response to the first message, the io acceleration module reads the read message in the buffer area, acquires data to be read corresponding to each read message from the storage module according to the read message, stores each data to be read into the buffer area, configures descriptors corresponding to each read message respectively according to the storage position of each data to be read in the buffer area, and sends the descriptors to the direct memory access module.

In an alternative embodiment, the storage module is a persistent storage medium.

In an alternative embodiment, the read message includes a logical block address of the data to be read, and the io acceleration module obtains a physical block address corresponding to the logical block address from the mapping relation table, and obtains the data to be read corresponding to the read message from the storage module according to the physical block address.

Step S203: and the direct memory access module acquires the data to be read from the buffer area according to each descriptor and transmits the data to be read to the host.

In an alternative embodiment, the descriptor further includes a destination address, and the direct memory access module obtains the data to be read according to the storage location of the data to be read in the buffer area, and writes the data to be read into the destination, thereby completing the transmission of the data to be read to the host.

In the related art, when a host needs to perform a read operation on a storage module in a solid state disk system, a read message is sent to the solid state disk system, the read message includes a logical block address (Logical Block Address, LBA), after receiving the read message, an interface module sends the read message to a Flash translation layer module (Flash TranslationLayer, FTL), after inquiring mapping information from the logical block address to a physical block address (Physics BlockAddress, PBA), the Flash translation layer module sends a message to a controller of the storage module, the controller of the storage module reads data according to the physical block address and sends the data to a direct memory access module (Direct Memory Access, DMA), and the direct memory access module transmits the data to the host.

However, in the embodiment of the invention, the io acceleration module is added in the solid state disk system, the io acceleration module can acquire the data to be read corresponding to each read message respectively from the storage module, then the data is transmitted to the host by the direct memory access module, and therefore, in the embodiment of the invention, the participation of the flash memory conversion layer module is not needed when the read message is executed, the processing flow of the interface module for transmitting the message to the flash memory conversion layer module is saved, the read message can be completed only by the io acceleration module and the direct memory access module, and the flash memory conversion layer module can execute other tasks, thereby improving the operation efficiency of the solid state disk system.

In an alternative embodiment, the host writes the source address in the read message in the io message queue, where the source address is a logical block address of the data to be read, and when the io acceleration module obtains the data to be read corresponding to each read message from the storage module according to the read message, the io acceleration module obtains the physical block address corresponding to the logical block address according to the mapping relation table stored in advance, and then obtains the data to be read corresponding to the read message from the storage module according to the physical block address.

In an alternative embodiment, the mapping relationship between each logical block address and each physical block address is stored in a pre-stored mapping relationship table, and the physical block address refers to an address in the storage module.

In the related art, the mapping relationship between the logical block address and the physical block address is determined by the flash memory conversion layer module, so in the related art, the interface module needs to send the write message to the flash memory conversion layer module, the flash memory conversion layer module determines the physical block address corresponding to the logical block address in the read message, then sends the physical block address to the controller of the storage module, and after the controller of the storage module reads the data, sends the data to the direct memory access module. However, considering that the core function of the flash memory conversion layer module is to establish a mapping relationship between a logical block address and a physical block address according to a certain algorithm, when data is read, the logical block address and the physical block address of the data are already established, no corresponding physical block address is required to be determined for the logical block address through the algorithm, and only the physical block address corresponding to the logical block address in the message can be queried according to a pre-established mapping relationship table, so that the read message is not required to be sent to the flash memory conversion layer module naturally.

In an optional embodiment, in the data transmission method provided by the embodiment of the present invention, after the direct memory access module transmits the data to be read to the host, a second message is sent to the io acceleration module, where the second message is used to characterize that the read message corresponding to the descriptor is successfully executed.

If the io acceleration module receives the second messages respectively corresponding to all the read messages in the buffer zone, a third message is sent to the interface module, and the third message is used for representing that the read message processing in the buffer zone is completed.

In response to the third message, the interface module sends an io completion command to the host.

In the embodiment of the invention, the buffer area contains a plurality of read messages, after the io acceleration module sends descriptors corresponding to the read messages in the buffer area to the direct memory access module, each time the direct memory access module completes a message corresponding to one descriptor, a second message is sent to the io acceleration module to indicate that the read message corresponding to the descriptor is completed, when the io acceleration module receives the second messages corresponding to all the read messages in the buffer area respectively, it is determined that all the read messages in the buffer area are completed, at this time, the io acceleration module sends a third message to the interface module, and after the interface module receives the third message, the io acceleration module sends an io completion command to the host.

In an optional embodiment, each read message corresponds to a unique identifier, the descriptor generated by the io acceleration module includes the identifier of the read message corresponding to the descriptor, and after the direct memory access module completes transmission of the data to be read according to the descriptor, the second message sent to the io acceleration module includes the identifier of the descriptor, so that the io acceleration module can determine that the read message is successfully executed and the read message is failed to be executed according to the identifier of each read message and the identifier in the second message, and if the second message corresponding to the read message is not received within a preset duration, the read message is determined to be failed to be executed.

In the related art, after the host writes a message into the io message queue, the solid state disk system feeds back an execution success message or an execution failure message to the host every time the host completes one message, but in the embodiment of the invention, an io acceleration module and a buffer zone are added, after determining that the io message queue has a read message to be executed, the interface module takes out all read messages in the io message queue, and writes all read messages into the buffer zone after performing format conversion, the io acceleration module sends a descriptor to the direct memory access module according to the message in the buffer zone, and the direct memory access module sends a second message to the io acceleration module every time the direct memory access module completes a read message corresponding to the descriptor, and after determining that all read messages in the buffer zone are executed according to the second message, the interface module sends a third message to the interface module so that the interface module sends an io completion command to the host. In the embodiment of the invention, only the direct memory access module and the io acceleration module are used for communication when one message reading is completed, and an interface module and a host are not needed to participate in communication, so that the communication flow is saved, and the performance of the solid state disk system is improved.

In an optional embodiment, the solid state disk system further includes a flash memory conversion layer module, and the data line transmission method provided by the embodiment of the invention further includes the following steps:

if the message in the io message queue is a write message, as shown in fig. 3, each functional module in the solid state disk system executes the following steps:

step S301: the interface module obtains all the writing messages in the io message queue, preprocesses each writing message to obtain writing messages to be executed, and sends the writing messages to be executed to the io acceleration module.

In an alternative embodiment, the writing message in the io message queue is written by the host, and the format adopted when the host writes the writing message into the io message queue is not necessarily capable of being executed by the io acceleration module, so in the embodiment of the present invention, the message in the io message queue needs to be preprocessed to obtain the writing message to be executed, which can be executed by the io acceleration module.

Step S302: the io acceleration module acquires data to be written corresponding to each message to be written, integrates or splits the data to be written according to the storage format of the buffer area, and writes the data to be written into the buffer area; and sending a fourth message to the flash memory conversion layer module, wherein the fourth message comprises the position of the data to be written in the buffer area.

In an alternative embodiment, the write message to be executed includes a data source address of the data to be written, and the io acceleration module obtains the data to be written according to the data source address.

In an alternative embodiment, the logical space in the host side for storing the data to be written has a plurality of different formats, including 512, 512+8, 4k, 4k+8, etc., so that the formats of the data to be written are also different, and since the operation of the controller of the storage module on the storage module is minimum as one block size, storing the data in the same format in the same block is beneficial to the maximum utilization of the space, therefore, a plurality of buffers with different formats are set in the related art to store the data in different formats.

In the embodiment of the invention, after the io acceleration module obtains the data to be written corresponding to each message to be written, the data to be written is integrated or split, so that the integrated or split data meets the storage format of the buffer area, and therefore, only one buffer area is arranged in the solid state disk, thereby avoiding the arrangement of a plurality of buffer areas, avoiding the waste of resources and simplifying the buffer area management of firmware and the storage of flash memory. In addition, because all the writing messages are sent to the io acceleration module when the step S301 is executed in the embodiment of the present invention, after the io acceleration module obtains the data to be written corresponding to all the writing messages, all the messages to be written can be flexibly integrated or split, and all the types of format sizes can be supported only by one buffer area.

In an alternative embodiment, the format size of the buffer may be set according to actual requirements, and illustratively, the size of a single storage space in the buffer may be set to 4224 bits, 4224 bits may store 8 512 bits of data, or 8 (512+8) bits of data, or 1 4kbit of data, or 1 (4k+8) bit of data, and it is apparent that the size of a single storage space in the buffer may be set to 4224 bits, which may be compatible with data to be written in a plurality of different formats. When the firmware needs to store data with the persistent storage medium, the data list with a single storage space as a unit is only required to be sent to the controller of the memory and processed by the controller.

Step S303: the flash memory conversion layer module determines the physical block address corresponding to the data to be written in each message to be written, and sends a data transmission message corresponding to each message to be written to the memory access module, wherein the data transmission message comprises the position of each data to be written in the buffer area and the physical block address corresponding to each data to be written.

In an alternative embodiment, the to-be-written message includes a logical block address, and when the to-be-written data is written into the storage module, the to-be-written data can be written into the storage module only by determining a physical block address corresponding to the logical block address. In the embodiment of the invention, in order to improve the service life of the memory module, the memory position of the data to be written needs to be determined through a certain algorithm when the data to be written is written into the memory module every time, so that the memory module is prevented from being aged quickly due to unreasonable use of the memory space in the memory module, and therefore, the flash memory conversion layer module needs to be used, the flash memory conversion layer module can select the physical block address capable of storing the data to be written through a certain algorithm, and the corresponding relation between the physical block address and the logical block address is established.

Step S304: the direct memory access module receives the data transmission message, acquires the data to be written according to the buffer area position in the data transmission message, and writes the data to be written into the storage module according to the physical block address; and sending a fourth message to the io acceleration module, wherein the fourth message is used for representing that the writing message to be executed corresponding to the data transmission message is successfully executed.

Step S305: if the io acceleration module receives all fourth messages corresponding to the writing messages to be executed respectively, a fifth message is sent to the interface module.

Step S306: in response to the fifth message, the interface module sends an io completion command to the host.

In the embodiment of the invention, each time the direct memory access module completes one to-be-executed writing message, a fourth message is sent to the io acceleration module to indicate that the to-be-executed writing message is executed, when the io acceleration module receives all the fourth messages corresponding to all the to-be-executed writing messages respectively, it is determined that all the to-be-executed writing messages are executed, at the moment, the io acceleration module sends a fifth message to the interface module, and after the interface module receives the fifth message, the io acceleration module sends an io completion command to the host.

In the related art, after the host writes the message into the io message queue, every time the solid state disk system completes executing one message, one execution success message or execution failure message is fed back to the host, but in the embodiment of the invention, the io acceleration module is added, after determining that the io message queue has the write message to be executed, the interface module takes out all the write messages in the io message queue, and sends all the write messages to the io acceleration module after preprocessing, and when the direct memory access module completes one write message to be executed, a fourth message is sent to the io acceleration module, and when the io acceleration module determines that all the write messages to be executed are all executed according to the fourth message, a fifth message is sent to the interface module, so that the interface module sends an io completion command to the host. In the embodiment of the invention, only the direct memory access module and the io acceleration module are communicated when one message to be executed is completed, and the interface module and the host are not needed to participate in communication, so that the communication flow is saved, and the performance of the solid state disk system is improved. In addition, in the embodiment of the invention, if the message in the io message queue is a read message, the read message is executed by the io acceleration module, and if the message in the io message queue is a write message, the io acceleration module stores the message to be written into the buffer module, the flash memory conversion layer module executes other operations, and the read-write flow of the solid state disk system is decomposed by the io acceleration module, so that the data processing efficiency is further improved, and the unified management and the function transplantation are convenient by adopting a modularized implementation mode.

In an alternative embodiment, the interface module, when executing step S301 described above,

if the data source address of the data to be written contained in one writing message is a continuous address, the writing message is subjected to format conversion to form the writing message to be executed.

If the data source address of the data to be written contained in one writing message is a discontinuous address, firstly, dividing the writing message into a plurality of messages, wherein each message contains a section of continuous address, and the number of the messages is the same as the number of the sections of the data source address; then, format conversion is carried out on the messages to form a plurality of messages to be written.

Illustratively, if the data source address of the data to be written included in the write message includes 2 segments of non-consecutive addresses, the write message is split into two messages, each of which includes a segment of consecutive addresses.

In the embodiment of the invention, if the data source address of the data to be written in the writing information is a discontinuous address, the writing information is split first, so that the data source address in each information obtained by splitting is ensured to be a continuous address, and the data to be written is acquired through the continuous data source address when each information is executed, thereby avoiding system error reporting and improving the stability of system operation.

In an alternative embodiment, in the data transmission method provided in the embodiment of the present invention, each writing message corresponds to a first identifier, each writing message to be executed corresponds to a second identifier,

after preprocessing each writing message to obtain the writing message to be executed, the interface module distributes a unique second identifier for each writing message to be executed, and records the corresponding relation between each first identifier and each second identifier according to the corresponding relation between each writing message and the writing message to be executed. In an alternative embodiment, if one write message is split into a plurality of write messages to be executed when the write message is preprocessed, the first identifier of the write message corresponds to the second identifier of the plurality of write messages to be executed.

And after the direct memory access module writes the data to be written into the storage module, writing a second identification of the writing message to be executed corresponding to the data transmission message into the buffer.

In response to the fifth message, the interface module performs polling query on the buffer area before sending the io completion command to the host, and determines whether the writing message is completely completed according to the second identifier recorded in the buffer area and the corresponding relation between the first identifier and the second identifier recorded in advance; if it is determined that the write message is complete, an io completion command is sent to the host.

In an alternative embodiment, the interface module polls all the second identifiers in the query buffer, if the second identifiers corresponding to the first identifiers are stored in the buffer, the interface module determines that the writing messages are all completed, if one second identifier corresponding to the first identifier is not stored in the buffer, the interface module determines that the writing messages which are not completed exist, and at this time, the interface module can determine that the writing messages which are not completed are not executed according to the corresponding relation between the first identifier and the second identifier.

According to the solid state disk system provided by the embodiment of the invention, after each write message to be executed is completed, the direct memory access module does not need to feed back, and feeds back to the host only after all write messages in the io message queue are executed, so that the interactive flow among all modules in the solid state disk system is saved, the performance of the solid state disk system is improved, on the basis, in order to ensure that each write message is executed, the interface module establishes the association relation between the first identifier of the write message and the second identifier of the write message to be executed, and each time the direct memory access module completes one write message to be executed, the second identifier of the write message to be executed is written into the buffer zone, and after the interface module receives the fifth message of the io acceleration module, whether all write messages are completed is verified through the second identifier in the buffer zone, and the reliability of the solid state disk system in processing the write message is improved through the verification process.

In an optional embodiment, in the data transmission method provided by the embodiment of the present invention, the write message to be executed includes a logical storage address, the fourth message sent by the io acceleration module to the flash translation layer module further includes a logical storage address, and after the flash translation layer module determines a physical block address corresponding to the data to be written in each write message to be executed, the mapping relationship between the logical storage address and the physical block address of each write message to be executed is stored in the mapping relationship table.

In an alternative embodiment, the corresponding relationship between the logical storage address and the physical block address of each message to be written is written into the mapping relationship table, which means that the corresponding relationship between the logical storage address and the physical block address of the data to be written is written into the mapping relationship table, so when the host needs to perform a read operation on the data, the io acceleration module can read the mapping relationship table to obtain the physical block address of the data, and the physical block address of the data does not need to be determined through the flash memory conversion layer module.

In an optional embodiment, the solid state disk system further includes a doorbell register, and the data transmission method provided by the embodiment of the invention further includes: after the host writes the message into the io message queue, an access request is sent to the doorbell register to enable the interface module to fetch the message in the io message queue.

The embodiment of the invention also provides a solid state disk system, which adopts a non-volatile memory host controller interface specification, as shown in fig. 1, and comprises an interface module, an io acceleration module, a buffer zone, a direct memory access module, a storage module and an io message queue storage module, wherein the io message queue storage module stores an io message queue, the messages in the io message queue are written by a host, and each module executes the following steps:

if the message in the io message queue is a read message,

the interface module obtains all read messages in the io message queue, performs format conversion on the read messages, stores the read messages after format conversion in a buffer area, and sends a first message to the io acceleration module;

in response to the first message, the io acceleration module reads the read message in the buffer area, acquires data to be read corresponding to each read message from the storage module according to the read message, stores each data to be read into the buffer area, configures descriptors corresponding to each read message respectively at the storage position of the buffer area according to each data to be read, and sends the descriptors to the direct memory access module;

and the direct memory access module acquires the data to be read from the buffer area according to each descriptor and transmits the data to be read to the host.

In an optional embodiment, in the system provided by the embodiment of the present invention, after the direct memory access module transmits the data to be read to the host, a second message is sent to the io acceleration module, where the second message is used to characterize that the read message corresponding to the descriptor is successfully executed; if the io acceleration module receives second messages corresponding to all the read messages in the buffer zone respectively, sending a third message to the interface module, wherein the third message is used for representing that the read message processing in the buffer zone is completed; in response to the third message, the interface module sends an io completion command to the host.

In an optional embodiment, in the system provided by the embodiment of the present invention, the read message includes a source address, where the source address is a logical block address of data to be read, and the io acceleration module obtains a physical block address corresponding to the logical block address according to a mapping relation table stored in advance; and acquiring the data to be read corresponding to the read message from the storage module according to the physical block address.

In an alternative embodiment, in the system provided by the embodiment of the present invention, the system further includes a flash translation layer module, and if the message in the io message queue is a write message, each module in the providing performs the following steps:

the interface module obtains all write messages in the io message queue, preprocesses each write message to obtain write messages to be executed, and sends the write messages to be executed to the io acceleration module;

The io acceleration module acquires data to be written corresponding to each message to be written, integrates or splits the data to be written according to the storage format of the buffer area, and writes the data to be written into the buffer area; sending a fourth message to the flash memory conversion layer module, wherein the fourth message comprises the position of data to be written in a buffer area;

the flash memory conversion layer module determines the physical block address corresponding to the data to be written in each message to be written, and sends a data transmission message corresponding to each message to be written to the memory access module, wherein the data transmission message comprises the position of each data to be written in a buffer area and the physical block address corresponding to each data to be written;

the direct memory access module receives the data transmission message, acquires the data to be written according to the buffer area position in the data transmission message, and writes the data to be written into the storage module according to the physical block address; sending a fourth message to the io acceleration module, wherein the fourth message is used for representing that the writing message to be executed corresponding to the data transmission message is successfully executed;

if the io acceleration module receives fourth messages corresponding to all the writing messages to be executed respectively, a fifth message is sent to the interface module;

In response to the fifth message, the interface module sends an io completion command to the host.

In an optional embodiment, in the system provided by the embodiment of the present invention, the step of preprocessing the write message by the interface module to obtain the write message to be executed includes:

if the data source address of the data to be written contained in one writing message is a continuous address, the writing message is subjected to format conversion to form the writing message to be executed.

In an alternative embodiment, in the system provided by the embodiment of the present invention, if the data source address of the data to be written included in one write message is a discontinuous address,

splitting the writing information into a plurality of messages, wherein each message comprises a section of continuous address, and the number of the messages is the same as the number of the sections of the data source address;

and converting the formats of the messages to form a plurality of messages to be written.

In an alternative embodiment, in the system provided in the embodiment of the present invention, each write message corresponds to a first identifier, each write message to be executed corresponds to a second identifier,

the interface module is used for preprocessing each writing message to obtain a writing message to be executed, and recording the corresponding relation between each first identifier and each second identifier according to the corresponding relation between each writing message and the writing message to be executed;

After the direct memory access module writes the data to be written into the storage module, writing a second identification of the writing message to be executed corresponding to the data transmission message into the buffer;

in response to the fifth message, the interface module performs polling query on the buffer area before sending the io completion command to the host, and determines whether the writing message is completely completed according to the second identifier recorded in the buffer area and the corresponding relation between the first identifier and the second identifier recorded in advance; if it is determined that the write message is complete, an io completion command is sent to the host.

In an optional embodiment, in the system provided by the embodiment of the present invention, the write message to be executed includes a logical storage address, the fourth message sent by the io acceleration module to the flash translation layer module further includes a logical storage address, and after the flash translation layer module determines a physical block address corresponding to the data to be written in each write message to be executed, the mapping relationship between the logical storage address and the physical block address of each write message to be executed is stored in the mapping relationship table.

In an optional embodiment, in the system provided by the embodiment of the present invention, the to-be-executed write message includes a format of to-be-written data, and the io acceleration module integrates or splits each to-be-written data according to the format of each to-be-written data to obtain a plurality of data, writes each data into the buffer, and matches the format of each data with the storage format of the buffer.

In an optional embodiment, the system provided in the embodiment of the present invention further includes a doorbell register, and after the host writes the message into the io message queue, an access request is sent to the doorbell register, so that the interface module fetches the message in the io message queue.

The details of the solid state disk system are referred to the detailed description of the data transmission method in the above embodiments, and will not be repeated here.

Although embodiments of the present invention have been described in connection with the accompanying drawings, various modifications and variations may be made by those skilled in the art without departing from the spirit and scope of the invention, and such modifications and variations fall within the scope of the invention as defined by the appended claims.

Claims (11)

1. The data transmission method is applied to a solid state disk system, and is characterized in that the solid state disk system adopts a non-volatile memory host controller interface specification, the solid state disk system comprises an interface module, an io acceleration module, a buffer zone, a direct memory access module, a storage module and an io message queue storage module, the io message queue storage module stores an io message queue, and messages in the io message queue are written by a host, and the method comprises the following steps:

If the message in the io message queue is a read message,

the interface module obtains all read messages in the io message queue, performs format conversion on the read messages, stores the read messages after format conversion in the buffer area, and sends a first message to the io acceleration module;

responding to the first message, the io acceleration module reads the read message in the buffer area, acquires data to be read corresponding to each read message from the storage module according to the read message, stores each data to be read into the buffer area, configures descriptors corresponding to each read message respectively at the storage position of the buffer area according to each data to be read, and sends the descriptors to the direct memory access module;

and the direct memory access module acquires data to be read from the buffer area according to each descriptor and transmits the data to be read to a host.

2. The method of claim 1, wherein the step of determining the position of the substrate comprises,

after the direct memory access module transmits the data to be read to a host, a second message is sent to the io acceleration module, wherein the second message is used for representing that the read message corresponding to the descriptor is successfully executed;

If the io acceleration module receives second messages corresponding to all the read messages in the buffer zone respectively, sending a third message to the interface module, wherein the third message is used for representing that the read message processing in the buffer zone is completed;

in response to the third message, the interface module sends an io completion command to the host.

3. The method of claim 1, wherein the read message includes a source address, the source address being a logical block address of the data to be read,

the io acceleration module acquires a physical block address corresponding to the logical block address according to a pre-stored mapping relation table; and acquiring the data to be read corresponding to the read message from the storage module according to the physical block address.

4. The method of claim 1, wherein the solid state disk system further comprises a flash translation layer module,

if the message in the io message queue is a write message,

the interface module obtains all the write messages in the io message queue, preprocesses each write message to obtain a write message to be executed, and sends the write message to be executed to the io acceleration module;

The io acceleration module acquires data to be written corresponding to each message to be written, integrates or splits the data to be written according to the storage format of the buffer area, and writes the data to be written into the buffer area; sending a fourth message to the flash memory conversion layer module, wherein the fourth message comprises the position of data to be written in the buffer area;

the flash memory conversion layer module determines a physical block address corresponding to data to be written in each message to be written, and sends a data transmission message corresponding to each message to be written to the memory access module, wherein the data transmission message comprises the position of each data to be written in a buffer area and the physical block address corresponding to each data to be written;

the direct memory access module receives the data transmission message, acquires the data to be written according to the buffer area position in the data transmission message, and writes the data to be written into the storage module according to the physical block address; sending a fourth message to the io acceleration module, wherein the fourth message is used for representing that the writing message to be executed corresponding to the data transmission message is successfully executed;

If the io acceleration module receives fourth messages corresponding to all the writing messages to be executed respectively, a fifth message is sent to the interface module;

in response to the fifth message, the interface module sends an io completion command to the host.

5. The method of claim 4, wherein the step of determining the position of the first electrode is performed,

the step of preprocessing the write message by the interface module to obtain the write message to be executed comprises the following steps:

if the data source address of the data to be written contained in one writing message is a continuous address, the writing message is subjected to format conversion to form the writing message to be executed.

6. The method of claim 5, wherein the step of determining the position of the probe is performed,

if the data source address of the data to be written contained in a write message is a discontinuous address,

splitting the writing information into a plurality of information, wherein each information comprises a section of continuous addresses, and the number of the information is the same as the number of the sections of the data source addresses;

and converting the formats of the messages to form a plurality of messages to be written.

7. The method according to any one of claims 4-6, wherein each of the write messages corresponds to a first identifier, each of the write messages to be executed corresponds to a second identifier,

After preprocessing each writing message to obtain a writing message to be executed, the interface module records the corresponding relation between each first identifier and each second identifier according to the corresponding relation between each writing message and the writing message to be executed;

after the direct memory access module writes the data to be written into the storage module, writing a second identifier of the writing message to be executed corresponding to the data transmission message into the buffer area;

in response to the fifth message, the interface module performs a polling query on the buffer area before sending an io completion command to the host, and determines whether the write message is completely completed according to the second identifier recorded in the buffer area and the corresponding relationship between the first identifier and the second identifier recorded in advance; and if the writing information is judged to be all completed, sending the io completion command to the host.

8. The method of claim 4, wherein the write to be performed message includes a logical storage address, wherein the fourth message sent by the io acceleration module to the flash translation layer module further includes the logical storage address,

after the flash memory conversion layer module determines the physical block address corresponding to the data to be written in each message to be written, the corresponding relation between the logical storage address and the physical block address of each message to be written is stored in the mapping relation table.

9. The method of claim 4, wherein the write to be performed message includes a format of data to be written,

the io acceleration module integrates or splits each data to be written according to the format of each data to be written to obtain a plurality of data, and writes each data into the buffer, wherein the format of each data is matched with the storage format of the buffer.

10. The method of claim 1, wherein the solid state disk system further comprises a doorbell register, the method further comprising:

after the host writes the message into the io message queue, an access request is sent to the doorbell register, so that the interface module takes out the message in the io message queue.

11. A solid state disk system is characterized in that the system adopts a non-volatile memory host controller interface specification, the system comprises an interface module, an io acceleration module, a buffer zone, a direct memory access module, a storage module and an io message queue storage module, wherein the io message queue storage module stores an io message queue, the messages in the io message queue are written by a host,

if the message in the io message queue is a read message,

The interface module obtains all read messages in the io message queue, performs format conversion on the read messages, stores the read messages after format conversion in the buffer area, and sends a first message to the io acceleration module;

responding to the first message, the io acceleration module reads the read message in the buffer area, acquires data to be read corresponding to each read message from the storage module according to the read message, stores each data to be read into the buffer area, configures descriptors corresponding to each read message respectively at the storage position of the buffer area according to each data to be read, and sends the descriptors to the direct memory access module;

and the direct memory access module acquires data to be read from the buffer area according to each descriptor and transmits the data to be read to a host.