CN114238183A - Systems, methods, and media for implementing Virtio devices - Google Patents

Systems, methods, and media for implementing Virtio devices Download PDF

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Publication number
CN114238183A
CN114238183A CN202111521682.7A CN202111521682A CN114238183A CN 114238183 A CN114238183 A CN 114238183A CN 202111521682 A CN202111521682 A CN 202111521682A CN 114238183 A CN114238183 A CN 114238183A
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vdpa
driver
virtio
data
pcie interface
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CN114238183B (en
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鄢贵海
张宇
袁晓飞
孟繁毅
侯英乐
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Yusur Technology Co ltd
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Yusur Technology Co ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026—PCI express

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
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  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)

Abstract

The present disclosure relates to a system, method, and medium for implementing a Virtio device; wherein, this system includes: the Device comprises a host and equipment, wherein the host comprises a vDPA Driver and a first PCIe interface, the equipment comprises a vDPA Device and a second PCIe interface, and the vDPA Driver and the vDPA Device communicate through the first PCIe interface and the second PCIe interface; the vDPA Driver is used for realizing the control surface function of the Virtio equipment according to a vDPA framework and Virtio protocol specifications; and the vDPA Device is used for realizing the data plane function of the Virtio Device according to the second PCIe interface and the Virtio protocol specification. The embodiment of the disclosure can support a kernel framework with software and hardware cooperation and support the ecology with software and hardware cooperation.

Description

Systems, methods, and media for implementing Virtio devices
Technical Field
The present disclosure relates to the field of hardware interface technologies, and in particular, to a system, a method, and a medium for implementing a Virtio device.
Background
With the development of technologies such as cloud computing, virtualization, cloud native and the like, the interaction between a Host and an Input/Output (I/O) device of a computer system is required to meet the requirements of extremely high speed and low time delay, and the overhead of system resources of the Host is required to be reduced as much as possible.
In order to meet the requirements, a thought of unloading a software function module to hardware equipment is provided, Virtio is used as an open source IO interface protocol specification, defined Virtio equipment is virtual IO equipment realized by software, the Virtio equipment based on the Virtio protocol specification can be unloaded to hardware, but software interacting with the equipment is not planned and defined in the prior art, a kernel framework of software and hardware cooperation cannot be supported, and the ecology of the software and hardware cooperation cannot be supported.
Disclosure of Invention
To address the above technical problems, the present disclosure provides a system, method, and medium implementing a Virtio device.
In a first aspect, the present disclosure provides a system for implementing a Virtio device, the system comprising:
the Device comprises a virtual data path acceleration Device vDPA Device and a second PCIe interface, and the vDPA Driver and the vDPA Device communicate through the first PCIe interface and the second PCIe interface;
the vDPA Driver is used for realizing the control surface function of the Virtio equipment according to a vDPA framework and Virtio protocol specifications;
and the vDPA Device is used for realizing the data plane function of the Virtio equipment according to the second PCIe interface and the Virtio protocol specification.
Optionally, the second PCIe interface includes at least one physical function PF interface, each PF interface includes at least one register set, and each register set is in communication connection with one vDPA Device.
Optionally, the vDPA Driver is configured to:
accessing all register groups included in the corresponding PF interface according to the second PCIe interface to obtain target information corresponding to each register group;
and determining the vDPA devices respectively corresponding to each register group according to all the target information.
Optionally, the vDPA Driver is configured to:
after the target information corresponding to each register group is obtained, a target structure body example is created, and all the target information is stored in the target structure body example.
Optionally, the vDPA Driver is configured to:
writing first buffer area information of received data into a first register group corresponding to the vDPA Device;
the vDPA Device is configured to obtain the first buffer information according to the first register set, write data to be sent into a first data buffer corresponding to the first buffer information, and send a message that transmission of the data to be sent is successful to the vDPA Driver, so that the vDPA Driver sends the first buffer information to the vDPA framework.
Optionally, the vDPA Driver is configured to:
receiving second buffer area information of transmitted data sent by the vDPA framework, writing the second buffer area information into a second register group corresponding to the vDPA Device, and sending a message for reading data in a second data buffer area corresponding to the second buffer area information to the vDPA Device through a target register in the second register group;
and the vDPA Device is used for reading data from the second data buffer according to the received message.
Optionally, the second PCIe interface supports a single root input/output virtualization SR-IOV function.
Optionally, the host further includes a shared memory, the Device further includes a direct memory access DMA, and the vDPA Device performs data interaction with the shared memory based on the DMA.
In a second aspect, the present disclosure provides a method for implementing a Virtio device, which is applied to a system for implementing the Virtio device, where the system includes: the method comprises the following steps that a host and a Device are included, wherein the host comprises a virtual data path acceleration Driver vDPA Driver and a first high-speed serial computer expansion bus standard PCIe interface, the Device comprises a virtual data path acceleration Device vDPA Device and a second PCIe interface, and the vDPA Driver and the vDPA Device are communicated through the first PCIe interface and the second PCIe interface, and the method comprises the following steps:
the vDPA Driver realizes the control surface function of the Virtio equipment according to a vDPA framework and Virtio protocol specifications;
and the vDPA Device realizes the data plane function of the Virtio Device according to the second PCIe interface and the Virtio protocol specification.
Optionally, the second PCIe interface includes at least one physical function PF interface, each PF interface includes at least one register set, and each register set is in communication connection with one vDPA Device.
Optionally, the method further includes:
the vDPA Driver accesses all register groups included by the corresponding PF interface according to the second PCIe interface to obtain target information corresponding to each register group;
and determining the vDPA devices respectively corresponding to each register group according to all the target information.
Optionally, the method further includes:
after obtaining the target information corresponding to each register group, the vDPA Driver creates a target structure body example and stores all the target information into the target structure body example.
Optionally, the method further includes:
the vDPA Driver writes first buffer area information of received data into a first register group corresponding to vDPADevice;
the vDPA Device acquires the first buffer area information according to the first register set, writes data to be transmitted into a first data buffer area corresponding to the first buffer area information, and sends a message that the data to be transmitted is successfully transmitted to the vDPA Driver, so that the vDPA Driver sends the first buffer area information to the vDPA framework.
Optionally, the method further includes:
the vDPA Driver receives second buffer area information of data sent by the vDPA framework, writes the second buffer area information into a second register group corresponding to the vDPA Device, and sends a message of reading the data in a second data buffer area corresponding to the second buffer area information to the vDPA Device through a target register in the second register group;
and the vDPA Device reads data from the second data buffer according to the received message.
Optionally, the second PCIe interface supports a single root input/output virtualization SR-IOV function.
Optionally, the host further includes a shared memory, the Device further includes a direct memory access DMA, and the vDPA Device performs data interaction with the shared memory based on the DMA.
In a third aspect, the present disclosure also provides a computer-readable storage medium, on which a computer program is stored, which when executed by a processor, implements the method of implementing a Virtio device as set forth in any of the embodiments of the present disclosure.
Compared with the prior art, the technical scheme provided by the embodiment of the disclosure has the following advantages: the vDPA Driver is used for realizing the control surface function of the Virtio equipment according to a vDPA framework and Virtio protocol specifications; the vDPA Device is used for realizing the data plane function of the Virtio Device according to the second PCIe interface and Virtio protocol specification, enabling the system to be compatible with virtualization technology and cloud native technology ecology through a vDPA framework, enabling the system to be more flexible through the use of the vDPA Driver, and enabling the system to support a kernel framework with software and hardware in cooperation and support the ecology with software and hardware in cooperation.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.
In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present disclosure, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a schematic structural diagram of a system for implementing a Virtio device according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of another system for implementing a Virtio device according to an embodiment of the present disclosure;
fig. 3 is a flowchart illustrating a method for implementing a Virtio device according to an embodiment of the present disclosure.
Detailed Description
In order that the above objects, features and advantages of the present disclosure may be more clearly understood, aspects of the present disclosure will be further described below. It should be noted that the embodiments and features of the embodiments of the present disclosure may be combined with each other without conflict.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure, but the present disclosure may be practiced in other ways than those described herein; it is to be understood that the embodiments disclosed in the specification are only a few embodiments of the present disclosure, and not all embodiments.
Fig. 1 is a schematic structural diagram of a system for implementing a Virtio device, which is applied to a method for implementing the Virtio device according to an embodiment of the present disclosure. As shown in fig. 1, the system includes: a Host (Host)110 and a Device120, where the Host 110 includes a virtual data Path accelerated Driver (vDPA Driver)1101 and a first serial computer Interconnect Express (PCIe) interface 1102, the Device120 includes a vDPA Device (vDPA Device)1201 and a second PCIe interface 1202, and the vDPA Driver1101 and the vDPA Device1201 communicate through the first PCIe interface 1102 and the second PCIe interface 1202. The vDPA Driver1101 is connected to the first PCIe interface 1102, the vDPA Device1201 is connected to the second PCIe interface 1202, and communication between the first PCIe interface 1102 and the second PCIe interface 1202 is enabled.
Wherein, Virtio can be understood as an I/O para-virtualization solution, which is a program for virtualization of general I/O devices and abstracts a group of general I/O devices in para-virtualization Hypervisor. A Virtio device may be understood as a software-implemented virtual I/O device. The device120 may be a computer device or an electronic device, and this embodiment is not particularly limited. The vDPA Driver1101 can be understood as a device Driver component based on the vDPA framework. The vDPA framework may be understood as a kernel framework which is designed primarily for the offloading of Virtio devices to hardware devices. The Virtio protocol specification is the protocol or specification defined by Virtio. The Control Plane (Control Plane) can be understood as an implementation path of Control information in data communication. The Data Plane (Data Plane) can be understood as the realization path of the Data path in Data communication.
The vDPA Driver1101 implements the control plane function of the Virtio device according to the vDPA framework and the Virtio protocol specification, that is: the vDPA Driver1101 is used for implementing the control plane function of the Virtio device in a vDPA Driver based on a vDPA framework.
The vDPA Device1201 realizes the data plane function of the Virtio Device according to the second PCIe interface 1202 and the Virtio protocol specification, that is: the vDPA Device1201 is to offload the data plane functions of the Virtio Device to a hardware implementation.
Through the vDPA Driver1101 and the vDPA Device1201, the two parts are combined and abstracted into the Virtio Device conforming to the vDPA framework, so that the unified planning design of the hardware part and the software part is realized when the Virtio Device is subjected to hardware uninstallation.
In this embodiment, the vDPA Driver is configured to implement a control plane function of the Virtio device according to a vDPA framework and a Virtio protocol specification; the vDPA Device is used for realizing the data plane function of the Virtio Device according to the second PCIe interface and Virtio protocol specification, enabling the system to be compatible with virtualization technology and cloud native technology ecology through a vDPA framework, enabling the system to be more flexible through the use of the vDPA Driver, and enabling the system to support a kernel framework with software and hardware in cooperation and support the ecology with software and hardware in cooperation.
In this embodiment, optionally, the host further includes a shared memory, the Device further includes a direct memory access DMA, and the vDPA Device performs data interaction with the shared memory based on the DMA.
Direct Memory Access (DMA) allows hardware devices of different speeds to communicate with each other without relying on a large amount of interrupt load of a Central Processing Unit (CPU). The shared memory may include a number of data or resources, etc.
Specifically, the Host 110 includes a Host operating System (Host OS for short), and the vDPA Driver1101 and the Process (Process) run based on the Host OS. Because the Device120 includes the DMA, the vDPA Device1201 can perform data interaction with the shared memory in the host 110 according to the DMA, so that the vDPA Device1201 can obtain data from the shared memory in the host 110 or store data in the shared memory.
In the embodiment, the vDPA Device performs data interaction with the shared memory according to the DMA, so that the method is simpler and faster, time can be saved, and the working efficiency is improved.
Fig. 2 is a schematic structural diagram of another system for implementing a Virtio device according to an embodiment of the present disclosure. The embodiment is optimized on the basis of the embodiment. Optionally, the present embodiment explains the function of the second PCIe interface in detail.
As shown in fig. 2, the system includes a Host 110 and a device120, where the Host 110 includes a vDPA Driver1101, a first PCIe interface 1102, and a shared memory 1103, where the vDPA Driver1101, a process, and the shared memory 1103 run based on a Host OS; included in the device120 are vddavices 01201-0, vddavices 11201-1, …, vddavices N1201-N (N is a positive integer greater than 1), a second PCIe interface 1202, and DMAs 1203. vDPADevice 01201-0, vDPADevice 11201-1, …, vDPADevice N1201-N all belong to vDPA Device 1201.
It should be noted that: the shared memory 1103 and the DMA 1203 have been described in the previous embodiment, and are not described herein again.
The data interaction process of fig. 2 may specifically include: data interaction between a process and a shared memory, data interaction between a shared memory and a DMA, data interaction between a DMA and a vDPADevice 01201-0, a DMA and a vDPADevice 11201-1, …, and data interaction between a DMA and a vDPADevice N1201-N.
The second PCIe interface 1202 includes at least one physical function PF interface, each PF interface includes at least one register set, and each register set is communicatively connected to one vDPA Device.
Herein, a Physical Function (PF) interface may be understood as an interface for configuring information related to or controlling a PCIe device.
It should be noted that: the number of the register groups can be multiple, so that each register group can be in communication connection with the corresponding vDPA Device, and further, one PF interface can support multiple vDPA devices, the utilization rate of configuration resources is improved, and the number of the register groups is not specifically limited in the embodiment.
The Register set in this embodiment may be configured in a Base Address Register (BAR) space of the second PCIe interface 1202. The BAR space may be understood as the memory space pointed to by the base address register.
Illustratively, the second PCIe interface 1202 in fig. 2 includes a PF interface, where the PF interface includes N (N is a positive integer greater than 1) register sets, register set 0 and vDPA Device 01201-0 are communicatively connected, register set 1 and vDPA Device 11201-1 are communicatively connected, …, and register set N and vDPA Device N1201-N are communicatively connected.
It should be noted that: the second PCIe interface 1202 may further include a plurality of PF interfaces, which is not limited in this embodiment.
In this embodiment, optionally, when the second PCIe interface supports single root input/output virtualization SR-IOV, the PF interface may be configured to generate a VF interface; correspondingly, the second PCIe interface includes at least one PF interface and at least one VF interface, each PF interface and each VF interface include at least one register set, and each register set is communicatively connected to one vDPA Device.
The Single Root Input/Output Virtualization (SR-IOV for short) can be understood as a hardware-based Virtualization solution, which can improve performance and scalability, and the SR-IOV standard allows PCIe devices to be efficiently shared between virtual machines, which is implemented in hardware, and can obtain better I/O performance. When the second PCIe interface supports SR-IOV, the PF interface comprises an SR-IOV functional structure and can manage the functions of the SR-IOV. A Virtual Function (VF) may be understood as a Function associated with a PF in an SR-IOV. The VFs may share one or more physical resources with the PF as well as other VFs associated with the same PF. The VF has configuration resources for its own behavior.
It should be noted that: the second PCIe interface 1202 may further include a plurality of PF interfaces and a plurality of VF interfaces, which is not limited in this embodiment.
In this embodiment, by planning the BAR space of the second PCIe interface, when the second PCIe interface supports SR-IOV, the PF interface and the VF interface include a plurality of register sets, and a plurality of vDPA devices can be expanded according to the plurality of register sets, so that the utilization rate of resources is improved, and waste of resources is avoided.
In this embodiment, optionally, the vDPA Driver is configured to:
accessing all register groups included in the corresponding PF interface according to the second PCIe interface to obtain target information corresponding to each register group;
and determining the vDPA devices respectively corresponding to each register group according to all the target information.
Wherein the target information can be understood as identity information of the target vDPA Device connected to the register set.
Specifically, since the PF interface is arranged in the second PCIe interface 1202, the vDPA Driver1101 is connected to the first PCIe interface 1102, and the first PCIe interface 1102 is in communication connection with the second PCIe interface 1202, the vDPA Driver can access all register sets included in the corresponding PF interface in the second PCIe interface 1202 according to the first PCIe interface 1102 and the second PCIe interface 1202, and specifically can access according to the identity of the PF interface, for example, the name of the PF interface and the identification number of the PF interface. After the vDPA Driver accesses all register groups included in the PF interface, it can obtain target information corresponding to each register group in the PF interface, and according to all the target information, it can determine a vDPA Device corresponding to each register group, that is: it is determined which register set is connected to which vDPA Device.
In this embodiment, optionally, when the second PCIe interface supports SR-IOV, the PF interface may be configured to generate a VF interface; correspondingly, the second PCIe interface includes at least one PF interface and at least one VF interface, each PF interface and each VF interface include at least one register set, and each register set is in communication connection with one vDPA Device; at this time, the vDPA Driver is configured to: accessing all register groups included in corresponding PF interfaces and VF interfaces according to the second PCIe interface to obtain target information corresponding to each register group; and determining the vDPA devices respectively corresponding to each register group according to all the target information.
Specifically, since the PF interface and the VF interface are arranged in the second PCIe interface 1202, the vDPA Driver can access all register sets included in the corresponding PF interface and VF interface in the second PCIe interface 1202 according to the first PCIe interface 1102 and the second PCIe interface 1202, and specifically can access according to the identity of the PF interface and VF interface, for example, the name of the PF interface, the name of the VF interface, the identification number of the PF interface, the identification number of the VF interface, and the like. After the vDPA Driver accesses all register groups included in the PF interface and the VF interface, the target information corresponding to each register group in the PF interface and the VF interface can be obtained, and according to all the target information, the vDPA Device corresponding to each register group can be determined, that is: it is determined which register set is connected to which vDPA Device. In this embodiment, by determining the vDPA devices corresponding to each register group, management and access to a plurality of vDPA devices are facilitated, and errors are prevented.
In this embodiment, optionally, the vDPA Driver is configured to:
after the target information corresponding to each register group is obtained, a target structure body example is created, and all the target information is stored in the target structure body example.
The target structure body example can be understood as a structure body example written by structure body variables and is mainly used for storing target information corresponding to the register set.
In this embodiment, after the target information corresponding to each register group is obtained, the target structure body instance is created, and all the target information is stored in the target structure body instance, so that the target information can be conveniently obtained and used subsequently, and the target information is prevented from being lost.
In this embodiment, optionally, the vDPA Driver is configured to:
writing first buffer area information of received data into a first register group corresponding to the vDPA Device;
the vDPA Device is configured to obtain the first buffer information according to the first register set, write data to be sent into a first data buffer corresponding to the first buffer information, and send a message that transmission of the data to be sent is successful to the vDPA Driver, so that the vDPA Driver sends the first buffer information to the vDPA framework.
Wherein the first buffer information of the received data may be understood as information of a location where the first data buffer is recorded. The first data buffer may be understood as a region for storing data sent by the vDPA Device to the vDPA Driver. The data to be transmitted can be understood as data to be transmitted by the vDPA Device to the vDPA Driver. The first register set may be understood as a register set corresponding to the vDPA Device.
Specifically, a specific process of the vDPA Device1201 sending data to the vDPA Driver1101 may be as follows:
first, the vDPA Driver1101 defines first buffer information of received data, and writes the first buffer information into a first register group corresponding to the vDPA Device1201, so that the subsequent vDPA Device1201 can obtain the first buffer information. Then, the vDPA Device1201 can obtain the first buffer information by accessing the first register set, and can determine the first data buffer location according to the first buffer information, so as to write the data to be sent into the first data buffer, and after the data to be sent is written, send a message that the data to be sent is successfully transmitted to the vDPA Driver1101, where the message may be sent through an interrupt. After receiving the message sent by the vDPA Device1201 that the data to be sent is successfully transmitted, the vDPA Driver1101 sends the first buffer information to the vDPA framework according to the message, so that a subsequent operating system or other applications can obtain the data to be sent through the vDPA framework.
In this embodiment, the process of sending data from the vDPA Device to the vDPA Driver is implemented by the first buffer information and the first register group, and the first register group corresponds to the vDPA Driver, so that the process of sending data is efficient and fast, time can be saved, and work efficiency can be improved.
In this embodiment, optionally, the vDPA Driver is configured to:
receiving second buffer area information of transmitted data sent by the vDPA framework, writing the second buffer area information into a second register group corresponding to the vDPA Device, and sending a message for reading data in a second data buffer area corresponding to the second buffer area information to the vDPA Device through a target register in the second register group;
and the vDPA Device is used for reading data from the second data buffer according to the received message.
Wherein the second buffer information of the transmission data may be understood as information recording a location of the second data buffer. The second data buffer may be understood as a region for storing data transmitted by the vDPA Driver to the vDPA Device. The second register set may be understood as a register set corresponding to the vDPA Device. Since there may be a plurality of vDPA devices, when the same vDPA Device is used for receiving data and transmitting data, the first register set and the second register set are the same register set, otherwise, the first register set and the second register set may be different register sets. The first register set and the second register set may both include a plurality of registers, and the embodiment is not particularly limited. The destination register may be understood as a register for sending a corresponding message to the vDPA Device.
Specifically, a specific process of the vDPA Driver1101 sending data to the vDPA Device1201 may be as follows:
first, the vDPA Driver1101 receives second buffer information of transmitted data transmitted by the vDPA framework, writes the second buffer information into a second register group corresponding to the vDPA Device1201, and can transmit a message of reading data in a second data buffer corresponding to the second buffer information to the corresponding vDPA Device1201 through a target register in the second register group. After receiving the message sent by the vDPA Driver1101 to read the data in the second data buffer corresponding to the second buffer information, the vDPA Device1201 can read the corresponding data from the second data buffer according to the message.
In this embodiment, the process of sending data from the vdp adriver to the vDPA Device is implemented through the second buffer information and the second register group, and the second register group corresponds to the vDPA Device, so that the process of sending data is more efficient and faster, which is beneficial to saving time and improving work efficiency.
Fig. 3 is a schematic flowchart of a method for implementing a Virtio device according to an embodiment of the present disclosure, where the embodiment is applied to a system for implementing a Virtio device. As shown in fig. 3, the system includes: the system comprises a host and equipment, wherein the host comprises a vDPA Driver and a first PCIe interface, the equipment comprises a vDPA Device and a second PCIe interface, and the vDPA Driver and the vDPA Device communicate through the first PCIe interface and the second PCIe interface, and the method specifically comprises the following steps:
s310, a vDPA Driver realizes the control surface function of Virtio equipment according to a vDPA framework and Virtio protocol specifications;
and S320, the vDPA Device realizes the data plane function of the Virtio Device according to the second PCIe interface and the Virtio protocol specification.
In this embodiment, optionally, the second PCIe interface includes at least one physical function PF interface, each PF interface includes at least one register set, and each register set is communicatively connected to one vDPA Device.
In this embodiment, optionally, the method further includes:
the vDPA Driver accesses all register groups included in the corresponding PF interface according to the second PCIe interface to obtain target information corresponding to each register group;
and determining the vDPA devices respectively corresponding to each register group according to all the target information.
In this embodiment, optionally, the method further includes:
after obtaining the target information corresponding to each register group, the vDPA Driver creates a target structure body example and stores all the target information into the target structure body example.
In this embodiment, optionally, the method further includes:
the vDPA Driver writes first buffer area information of received data into a first register group corresponding to vDPADevice;
the vDPA Device acquires the first buffer area information according to the first register set, writes data to be transmitted into a first data buffer area corresponding to the first buffer area information, and sends a message that the data to be transmitted is successfully transmitted to the vDPA Driver, so that the vDPA Driver sends the first buffer area information to the vDPA framework.
In this embodiment, optionally, the method further includes:
the vDPA Driver receives second buffer area information of the transmitted data sent by the vDPA framework, writes the second buffer area information into a second register group corresponding to the vDPA Device, and sends a message of reading the data in a second data buffer area corresponding to the second buffer area information to the vDPA Device through a target register in the second register group;
and the vDPA Device reads data from the second data buffer according to the received message.
In this embodiment, optionally, the second PCIe interface supports a single root input/output virtualization SR-IOV function.
In this embodiment, optionally, the host further includes a shared memory, the Device further includes a direct memory access DMA, and the vDPA Device performs data interaction with the shared memory based on the DMA.
According to the method for realizing Virtio equipment provided by the embodiment of the disclosure, firstly, the vDPA Driver realizes the control surface function of the Virtio equipment according to the vDPA framework and the Virtio protocol specification, secondly, the vDPA Device realizes the data surface function of the Virtio equipment according to the second PCIe interface and the Virtio protocol specification, the vDPA framework enables the system to be compatible with virtualization technology and cloud native technology ecology, the use of the vDPA Driver enables the system to be more flexible, and the system can support a kernel framework with software and hardware cooperation and support the ecology with software and hardware cooperation.
The disclosed embodiments also provide a storage medium containing computer-executable instructions, which when executed by a computer processor, are used to implement the method for implementing a Virtio device provided by the disclosed embodiments.
Of course, the storage medium provided by the embodiments of the present disclosure contains computer-executable instructions, and the computer-executable instructions are not limited to the method operations described above, and may also perform related operations in the method for implementing a Virtio device provided by any embodiment of the present disclosure.
From the above description of the embodiments, it is obvious for a person skilled in the art that the present disclosure can be implemented by software and necessary general hardware, and certainly can be implemented by hardware, but in many cases, the former is a better embodiment. Based on such understanding, the technical solutions of the present disclosure may be embodied in the form of a software product, which may be stored in a computer-readable storage medium, such as a floppy disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a FLASH Memory (FLASH), a hard disk or an optical disk of a computer, and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) to execute the methods according to the embodiments of the present disclosure.
It should be noted that, in the embodiment of the system for implementing Virtio device, the included units and modules are only divided according to functional logic, but are not limited to the above division as long as the corresponding functions can be implemented; in addition, specific names of the functional units are only used for distinguishing one functional unit from another, and are not used for limiting the protection scope of the present disclosure.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing are merely exemplary embodiments of the present disclosure, which enable those skilled in the art to understand or practice the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A system for implementing a Virtio device, the system comprising: the Device comprises a virtual data path acceleration Device vDPA Device and a second PCIe interface, and the vDPA Driver and the vDPA Device communicate through the first PCIe interface and the second PCIe interface;
the vDPA Driver is used for realizing the control surface function of the Virtio equipment according to a vDPA framework and Virtio protocol specifications;
and the vDPA Device is used for realizing the data plane function of the Virtio equipment according to the second PCIe interface and the Virtio protocol specification.
2. The system of claim 1, wherein the second PCIe interface comprises at least one physical function PF interface, each PF interface comprises at least one register set, and each register set is communicatively coupled to one vDPA Device.
3. The system of claim 2, wherein the vDPA Driver is configured to:
accessing all register groups included in the corresponding PF interface according to the second PCIe interface to obtain target information corresponding to each register group;
and determining the vDPA devices respectively corresponding to each register group according to all the target information.
4. The system of claim 3, wherein the vDPA Driver is configured to:
after the target information corresponding to each register group is obtained, a target structure body example is created, and all the target information is stored in the target structure body example.
5. The system of claim 2, wherein the vDPA Driver is configured to:
writing first buffer area information of received data into a first register group corresponding to the vDPA Device;
the vDPA Device is configured to obtain the first buffer information according to the first register set, write data to be sent into a first data buffer corresponding to the first buffer information, and send a message that transmission of the data to be sent is successful to the vDPA Driver, so that the vDPA Driver sends the first buffer information to the vDPA framework.
6. The system of claim 2, wherein the vDPA Driver is configured to:
receiving second buffer area information of transmitted data sent by the vDPA framework, writing the second buffer area information into a second register group corresponding to the vDPA Device, and sending a message for reading data in a second data buffer area corresponding to the second buffer area information to the vDPA Device through a target register in the second register group;
and the vDPA Device is used for reading data from the second data buffer according to the received message.
7. The system of claim 2, wherein the second PCIe interface supports single root input/output virtualization (SR-IOV) functionality.
8. The system of any one of claims 1-7, wherein the host further comprises a shared memory, wherein the Device further comprises a Direct Memory Access (DMA), and wherein the vDPA Device performs data interaction with the shared memory based on the DMA.
9. A method for realizing Virtio equipment is applied to a system for realizing the Virtio equipment, and the system comprises the following steps: the method comprises the following steps that a host and a Device are included, wherein the host comprises a virtual data path acceleration Driver vDPA Driver and a first high-speed serial computer expansion bus standard PCIe interface, the Device comprises a virtual data path acceleration Device vDPA Device and a second PCIe interface, and the vDPA Driver and the vDPA Device are communicated through the first PCIe interface and the second PCIe interface, and the method comprises the following steps:
the vDPA Driver realizes the control surface function of the Virtio equipment according to a vDPA framework and Virtio protocol specifications;
and the vDPA Device realizes the data plane function of the Virtio Device according to the second PCIe interface and the Virtio protocol specification.
10. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the method as claimed in claim 9.
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