WO2020177567A1 - Method, apparatus, and system for migrating data - Google Patents

Abstract

A method, apparatus, and system for migrating data, relating to the technical field of computers. According to the method, migration of data is completed by means of a CPU (1) and a dedicated migration component (3), in which the operation of data migration is transferred from the CPU (1) to the migration component (3), and the CPU (1) only needs to collect information of data to be migrated. By means of the method, the consumption for resources of the CPU (1) can be reduced. The migration component (3) can be integrated on a smart network card, i.e., data migration is completed by means of coordination of the smart network card and the CPU (1).

Description

Method, device and system for migrating data

This application claims the priority of a Chinese patent application filed on March 5, 2019 with the application number 201910165515.X and the invention title "A method, device and system for migrating data", the entire content of which is incorporated herein by reference Applying.

Technical field

This application relates to the field of computer technology, and in particular to a method, device and system for migrating data.

Background technique

In cloud computing, it is inevitable to encounter scenarios where the host (or server) needs to be shut down for maintenance. Before the host is shut down for maintenance, in order to ensure the availability of the application in the host, the application needs to be migrated to the destination host to continue running. When migrating an application, the data stored in the memory of the host needs to be migrated to the destination host, so that the migrated data is used on the destination host to continue running the application.

At present, when migrating the data stored in the memory of the host to the destination host, the central processing unit (CPU) of the host obtains the stored data from the memory of the host, and then sends the obtained data to the destination host through the network card of the host. Therefore, the current operation of migrating data in the memory of the host is mainly performed by the CPU of the host, and therefore requires a large amount of CPU resources of the host.

Summary of the invention

The embodiments of the present application provide a method, device and system for migrating data to reduce the consumption of CPU resources. The following introduces the solutions provided by this application through different aspects. It should be understood that the implementation modes and beneficial effects of different aspects can be referred to each other.

In the first aspect, the present application provides a method for migrating data. The method is applied to a host that includes a processor, a memory, and a migration component. The processor is used to run an application instance, and the memory includes access for the application instance. In the method, the migration component sends a migration command to the processor, and the migration command is used to trigger the processor to generate an identification set, and the identification set includes the information in the application access area The identification of the at least one storage unit to be migrated; obtaining the identification set; sending the data stored in the storage unit corresponding to the identification in the identification set. Since the data transmission is completed by the migration component, the processor only needs to generate an identification set, so that part of the migration operation of the processor is shared by the migration component, thereby reducing the consumption of processor resources.

It should be noted that, in the embodiment of the present application, a central processing unit (CPU) is used as an example to introduce the processor, and the CPU is mainly widely used in desktop computers, notebooks, servers, and the like. Using this application can reduce CPU resource consumption. Obviously, this application can also be extended to other processors that need to reduce resource consumption, such as application processors on terminals or other processor types that have not yet been developed, and this application does not limit this.

In a possible implementation of the first aspect, the identifier set includes an identifier of each storage unit in the application access area.

This situation usually occurs when the migration component sends a migration command to the processor for the first time. When the processor first receives a migration command for an application instance sent by the migration component, since it is not sure which data in the application access area should be migrated, the identification set includes each storage unit in the application access area , So you can avoid missing data.

In a possible implementation of the first aspect, the identifier set includes the identifiers of the n storage units whose data is written by the application instance in the application access area from the first time to the current time (that is, when For the n storage units that have been modified within this period of time), the first time is the last time the processor generated the identification set. n is an integer, n is greater than or equal to 1 and less than or equal to the total number of storage cells included in the application access area.

This situation occurs when the migration component sends a migration command to the processor for the first time. The processor can record the modified storage units (such as dirty pages) after receiving the migration command for the first time, and then use the identification set to instruct the migration component to migrate only the modified storage units during the next migration, avoiding repeated migration of unmodified storage Unit to improve the accuracy of migration and reduce the power consumption of migration components.

In a possible implementation of the first aspect, no matter how many times the processor receives the migration command sent by the migration component, it sends the identifier of each storage unit in the application access area to the migration component to facilitate migration. All data in the access area of the component migration application. This can avoid missing data.

In a possible implementation of the first aspect, the migration component includes an interrupt interface and a migration control interface, and the migration component writes a migration command to the migration control interface; and sends a migration command to the processor through the interrupt interface. Sending an interrupt signal, where the interrupt signal is used to trigger the processor to read the migration command from the migration control interface. In this way, the migration command is sent to the processor.

In a possible implementation of the first aspect, the migration component includes a status notification interface, and the migration component reads collection generation completion information from the status notification interface, and the collection generation completion information is the processing The device writes the identification set into the status notification interface after writing the identification set into the interaction buffer area; the migration component reads the identification set from the interaction buffer area. In this way, the identification set provided by the processor is obtained.

In a possible implementation manner of the first aspect, when the host is started, the migration component receives initialization information sent by the processor, and the initialization information includes the address and space size of the interaction buffer area. The migration component determines the interaction buffer area according to the address and space size of the interaction buffer area, and reads the identification set from the interaction buffer area. In this way, the identification set provided by the processor is obtained.

In a possible implementation manner of the first aspect, the interaction buffer area includes a plurality of buffer areas, the set generation completion information carries an identifier of the buffer area, and the buffer area is the processor from the plurality of buffer areas. The buffer area selected in the buffer area, the buffer area selected by the processor is different from the buffer area selected last time by the processor; the buffer area corresponding to the identifier of the buffer area selected by the processor is read Identity collection. In this way, the identification set provided by the processor is obtained.

In a possible implementation manner of the first aspect, when the total capacity of the storage unit corresponding to each identifier in the identifier set does not exceed a preset threshold, the migration component sends a migration stop command to the processor The stop migration command is used to trigger the processor to stop running the application instance. When the total capacity of the storage unit corresponding to each identifier in the identifier set does not exceed the preset threshold, it indicates that the data migration is complete, and the application instance can be started on the destination host, and the migration stop command can be sent to the processor to make the processor Stop running the user instance and perform subsequent operations to maintain the host.

In a second aspect, the present application provides a method for migrating data. The method is applied to a host that includes a processor, a memory, and a migration component. The processor is used to run an application instance, and the memory includes access for the application instance. In the method: the processor receives the migration command sent by the migration component; generates an identification set according to the migration command, and the identification set includes at least the to-be-migrated in the application access area An identifier of a storage unit; the migration component is provided with the identifier set so that the migration component sends the data stored in the storage unit corresponding to the identifier in the identifier set. Since the identifier set is provided to the migration component, the migration component sends the data stored in the storage unit corresponding to the identifiers in the identifier set, so that the migration component shares part of the processor migration operation, thereby reducing the consumption of processor resources.

In a possible implementation of the second aspect, the processor receives the interrupt signal sent by the migration component through the interrupt interface; reads the migration command from the migration control interface according to the interrupt signal, so The migration command is written into the migration control interface by the migration component before sending the interrupt signal. In this way, the migration command is received.

In a possible implementation manner of the second aspect, when the migration command is a migration command received by the processor for the first time, the processor generates a first set of identifiers, and the migration command is the migration command. Sent when the component determines to start migrating the data stored in the application access area, the first identification set includes an identification of each storage unit in the application access area. At the beginning of the migration, since the processor does not know which data in the application access area should be migrated, the first identification set includes the identification of each storage unit in the application access area, which can avoid missing data.

In a possible implementation of the second aspect, the processor records the time of the last migration to the current time, and during this period of time, the application access area has n storages where data is written by the application instance. The identity of the unit. Correspondingly, when the processor receives the migration command for the xth time, the processor generates a third identification set, and the migration command is the storage unit corresponding to the identification in the second identification set sent by the migration component After the saved data is sent, the second identifier set is the identifier set generated last time by the processor, and the third identifier set includes the identifier set in the application access area from the first time to the current time. The identification of the n storage units where the application instance writes data, the first time is the time when the processor generates the second identification set, n is an integer, n is greater than or equal to 1 and less than or equal to the application access The total number of storage cells included in the area. Since the third set of identifiers includes the identifiers of the n storage units that are written by the application instance in the application access area from the first time to the current time, the migration is thus transferred from the first time to the current time. The data stored in the storage unit where the data is written improves the accuracy of data migration and reduces the power consumption of the migration component.

In a possible implementation of the second aspect, the migration component includes a status notification interface, the memory further includes an interactive buffer area, and the processor writes the set of identifiers into the interactive buffer area, and Write set generation completion information in the status notification interface, where the set generation completion information is used to trigger the migration component to obtain the identification set from the interaction buffer area. In this way, the identification set is provided to the migration component.

In a possible implementation of the second aspect, the interactive buffer area includes multiple buffer areas, the processor selects a buffer area from the multiple buffer areas, and the selected buffer area is connected to the The last time the processor selected a different buffer area, writes the set of identifiers into the selected buffer area, and writes set generation completion information on the status notification interface, and the set generation completion information carries the The ID of the selected buffer.

In a third aspect, this application provides a data migration device (or called a migration component), which is used to execute the first aspect or the method in any one of the possible implementations of the first aspect. Specifically, the device includes one or more units for executing the first aspect or any one possible implementation method of the first aspect. The device can be a network card or a device in the network card.

In a fourth aspect, the present application provides a processor configured to execute the second aspect or the method in any possible implementation manner of the second aspect. Specifically, the device includes one or more units for executing the second aspect or any one possible implementation method of the second aspect.

In a fifth aspect, this application provides a device for migrating data. The device includes a processor, a memory, an interrupt interface, a migration control interface, a status notification interface, a setting interface, a DMA interface, and a network transceiver interface. The processors are respectively Connect with memory, interrupt interface, migration control interface, status notification interface, setting interface, DMA interface and network transceiver interface. The memory stores one or more programs, the one or more programs are configured to be executed by the processor, and the one or more programs include any one of the first aspect or the first aspect. Instructions for possible implementation methods.

In a sixth aspect, the present application provides a computer program product. The computer program product includes a computer program stored in a computer-readable storage medium, and the calculation program is loaded by a processor to implement the first aspect and the first aspect. The second aspect, any possible implementation manner of the first aspect, or any possible implementation manner of the second aspect.

In a seventh aspect, this application provides a non-volatile computer-readable storage medium for storing a computer program that is loaded by a processor to execute the above-mentioned aspects of the first, second, and first aspects. Instructions for any possible implementation or any possible implementation of the second aspect.

In an eighth aspect, the present application provides a chip, the chip includes a logic circuit, and the logic circuit may be a programmable logic circuit. When the chip is running, it is used to implement the foregoing first aspect, second aspect, any possible implementation manner of the first aspect, or any possible implementation manner of the second aspect.

In a ninth aspect, the present application provides a chip that includes one or more physical cores and a storage medium, and the one or more physical cores implement the above-mentioned first after reading computer instructions in the storage medium. One aspect, the second aspect, any possible implementation manner of the first aspect, or any possible implementation manner of the second aspect.

In a tenth aspect, the present application provides a computer system that includes a memory, the data migration device described in the third aspect, and the processor described in the fourth aspect.

Description of the drawings

FIG. 1 is a schematic diagram of a network architecture provided by an embodiment of the present application;

FIG. 2 is a schematic diagram of a host structure provided by an embodiment of the present application;

FIG. 3 is a schematic diagram of another host structure provided by an embodiment of the present application;

4 is a flowchart of a method for migrating data provided by an embodiment of the present application;

FIG. 5 is a sequence diagram of data migration provided by an embodiment of the present application;

FIG. 6 is a flowchart of another data migration method provided by an embodiment of the present application;

FIG. 7 is a schematic structural diagram of a data migration device provided by an embodiment of the present application;

FIG. 8 is a schematic structural diagram of a processor provided by an embodiment of the present application;

FIG. 9 is a schematic diagram of a system structure for migrating data provided by an embodiment of the present application.

detailed description

The implementation manners of the present application will be described in further detail below in conjunction with the accompanying drawings.

Referring to Fig. 1, the present application provides a network architecture including a source host and a destination host. A network connection is established between the source host and the destination host, and the network connection may be a wired connection or a wireless connection.

There are application instances running on the source host. When the source host is shut down for maintenance, the data stored in the memory of the source host is migrated to the destination host. The data stored in the memory of the source host includes the data generated by the source host when the application instance is running. , So that the application instance can be started and run through the data in the destination host. The application instance may be a bare metal virtualization instance, such as an AWS (Amazon Web Services) i3.meal instance, an Alibaba Dragon cloud server instance, and a Microsoft Azure bare metal server instance.

The memory of the source host may be the memory or disk of the source host. In any of the following embodiments, the memory of the source host uses the memory of the source host as an example to illustrate how to migrate data stored in the memory of the source host to the destination host. The memory of the source host includes storage units as memory pages. For the disk of the source host, a person of ordinary skill in the art can replace the memory in any of the following embodiments with a disk, and replace the memory page with a storage unit of the disk, or combine some adaptive changes to obtain the disk of the source host. The detailed scheme for migrating the data stored in the data to the destination host is not described in detail in this application.

Referring to FIG. 2, an embodiment of the present application provides a host. The host may be the source host in the network architecture shown in FIG. 1. In implementation, the host may be a server, a personal computer (PC), or a notebook. Computers, smart terminals, vehicle-mounted devices, artificial intelligence devices, or virtual reality/augmented reality/mixed reality, etc., including:

CPU1, memory 2, migration part 3 and main board (shown in the figure). The CPU1, the memory 2 and the migration component 3 are connected through a motherboard.

Optionally, the motherboard includes a system bus, and the CPU1, the memory 2 and the migration component 3 can be connected through the system bus in the motherboard.

The memory 2 includes a non-overlapping code storage area 21, an interactive buffer area 22, and an application access area 23. The code storage area 21 can store the implementation code of the application instance and the implementation code of the memory page collection module.

The implementation code of the application instance can be called and run by CPU1. In the process of running the application instance, the application instance can access the application access area 23. Optionally, that the application instance accesses the application access area 23 means that the CPU 1 can write data to the application access area 23 and/or read data from the application access area 23 when the CPU 1 runs the application instance.

The implementation code of the memory page collection module can be called and run by the CPU1. When the memory page collection module is running, the CPU1 generates an identification set through the memory page collection module. The identification set includes the identification of the memory page to be migrated in the application access area 23. Optionally, the CPU 1 obtains the identification of the memory page to be migrated from the application access area 23 by running the memory page collection module, and composes the obtained identification into an identification set. Migrating the data in the memory of the source host to the destination host refers to migrating the data in the user access area 23 of the source host to the destination host.

The interaction buffer 22 is used to store the identification set. That is, after the CPU 1 generates the identification set, the identification set can be written into the interaction buffer area 22.

In other embodiments, the host may also include a disk or other types of external storage devices, and the disk may be connected to the CPU 1, the memory 2 and the migration component 3 through the system. The disk can save the implementation code of the application instance and the implementation code of the memory page collection module. When the host starts, the CPU1 can read the implementation code of the application instance and the implementation code of the memory page collection module from the disk, and store the implementation code of the application instance And the implementation code of the memory page collection module is loaded into the code storage area 21.

When the source host starts to migrate the data in the memory of the source host to the destination host, the migration component 3 sends a migration command to CPU1, and CPU1 receives the migration command, generates an identification set through the memory page collection module according to the migration command, and sends data to The migration component 3 provides this identification set. After obtaining the identification set, the migration component 3 sends to the destination host the data stored in the memory page corresponding to the identification in the identification set.

3, the migration component 3 includes a processor 31, an interrupt interface 32, a migration control interface 33, a status notification interface 34, a setting interface 35, a direct memory access (DMA) interface 36, a network transceiver interface 37 and Storage 38. The processor 31 is connected to the interrupt interface 32, the migration control interface 33, the status notification interface 34, the setting interface 35, the DMA interface 36, the network transceiver interface 37 and the memory 38 respectively.

When the host is turned on, the CPU 1 may send initialization information to the migration component 3, and the initialization information may include information such as interrupt mode, command code, address of the interactive buffer area, and space size. The command code may include migration commands and so on.

Optionally, the interactive buffer area may include a plurality of buffer areas of equal size, and the address of the interactive buffer area includes the address of each buffer area. For example, the interactive buffer area includes a first buffer area and a second buffer area, and the address of the interactive buffer area includes the address of the first buffer area and the address of the second buffer area.

The processor 31 may receive the initialization information sent by the CPU 1 through the setting interface 35, and store the initialization information in the memory 38.

Optionally, the processor 31 may send a migration command to the CPU1 through the interrupt interface 32 and the migration control interface 33 according to the interrupt mode stored in the memory 38; obtain the identification set provided by the CPU1 through the status notification interface 34; and through the DMA interface 36 and The network transceiver interface 37 sends the data stored in the memory page corresponding to the identifier in the identifier set.

Optionally, the interrupt interface 32, the migration control interface 33, the status notification interface 34, the setting interface 35, and the DMA interface 36 can be five different registers in the migration component 3, or the interrupt interface 32, the migration control interface 33, and the status The notification interface 34, the setting interface 35, and the DMA interface 36 can be five different storage areas in the memory 2. The five storage areas are the code storage area 21, the interactive buffer area 22, and the application access area 23 in the memory 2. Other areas.

The migration component 3 may be integrated on the network card of the host. In this case, the network transceiver interface 37 may be a network port on the network card.

The migration component 3 may be a board card, which can be plugged into the main board. The migration component 3 may include a network transceiver interface 37, or the network card of the host may be used as the network transceiver interface 37 of the migration component 3. Optionally, the board may be a high-speed serial computer expansion bus standard (peripheral component interconnect express, PCIe) board.

Optionally, the CPU 1 can run the first instruction for data migration to receive the migration command sent by the migration component 3, call and run the implementation code of the memory page collection module, and generate an identification set through the memory page collection module.

Optionally, the first instruction may be stored in a disk, and the CPU 1 may call and execute the instruction. Or, the first instruction may be solidified in CPU1, and CPU1 may directly run the instruction.

Optionally, the processor 31 included in the migration component can run a second instruction for migrating data to implement operations such as sending a migration command to CPU1, obtaining an identifier set, and sending data stored in a memory page corresponding to an identifier in the identifier set. .

Optionally, the second instruction may be stored in the memory 38 of the migration component 3 or the disk of the host, and the processor 31 may call the second instruction from the memory 38 or the disk of the host and run the second instruction. Alternatively, the second instruction may be solidified in the processor 31, and the processor 31 may directly execute the second instruction.

Referring to FIG. 4, an embodiment of the present application provides a method for migrating data, which can be applied to the host provided in the embodiments shown in FIGS. 2 and 3 above.

Step 301: The migration component sends a migration command to the CPU for the first time, which is referred to as a start migration command below.

The migration component, memory, and CPU belong to the same host, and the migration component, memory, and CPU are connected through the mainboard of the host. The CPU is used to run an application instance, and the application instance can access the application access area of the memory when the CPU runs the application instance. For example, the application instance can write data to the application access area or read data from the application access area.

Referring to Fig. 2, the memory of the host also includes a code storage area, and the code storage area includes implementation codes of application examples. The CPU can call and run the implementation code of the application instance to realize the operation of the application instance.

When the application instance running in the host needs to be migrated to the destination host, the data saved in the application access area needs to be migrated to the destination host. The application access area includes the data written by the application instance at runtime, so that the destination host can be based on The data starts and continues to run the application instance.

In this step, when the data stored in the application access area of the memory needs to be migrated to the destination host, the user can input a trigger command to the migration component on the host. The migration component receives the trigger command, and sends a start migration command to the CPU in response to the trigger command.

Referring to Figure 3, the migration components include a processor, an interrupt interface, a migration control interface, a status notification interface, a setting interface, a DMA interface, a memory, and a network transceiver interface.

In this step, the migration component writes a migration command to the migration control interface, and then sends an interrupt signal to the CPU through the interrupt interface; the CPU receives the interrupt signal, pauses and continues to run the application instance according to the interrupt signal, and migrates from the migration component The migration command is read in the control interface, so the migration component realizes sending the start migration command to the CPU.

Optionally, when the host is started, the CPU may send initialization information to the migration component, and the initialization information may include information such as interrupt mode, command code, address of the interactive buffer area, and space size. The command code can include a migration command and a stop migration command.

Optionally, the interactive buffer area may be a storage area. Alternatively, the interactive buffer area may include a plurality of buffer areas of equal size, and the address of the interactive buffer area includes the address of each buffer area. For example, the interactive buffer area includes a first buffer area and a second buffer area, the address of the interactive buffer area includes the address of the first buffer area and the address of the second buffer area, and the size of the space in the initialization information is the space of the first buffer area Size and the space size of the second buffer area.

Optionally, the initialization information may further include an identifier of the first buffer area corresponding to the address of the first buffer area, and an identifier of the second buffer area corresponding to the address of the second buffer area.

Optionally, the identifier of the buffer area may be the address of the buffer area or the number of the buffer area.

Optionally, when the application instance is a bare metal instance, the interrupt mode may include a system management interrupt (SMI) interrupt mode and a non-maskable interrupt (NMI) interrupt mode. When the application instance is a virtual machine, the interrupt mode is the NMI interrupt mode.

The processor of the migration component may receive the initialization information sent by the CPU through the setting interface, and save the initialization information in the memory of the migration component.

In this step, the processor of the migration component can read the interrupt mode and migration command from the memory of the migration component, write the migration command to the migration control interface, and send an interrupt signal to the CPU through the interrupt interface according to the interrupt mode.

Optionally, when the application instance is a bare metal instance, the read interrupt mode includes SMI interrupt mode and NMI interrupt mode, according to the SMI interrupt mode, the first interrupt signal is sent to the CPU through the interrupt interface, and then according to the NMI interrupt mode , Send a second interrupt signal to the CPU through the interrupt interface. When the application instance is a virtual machine, the read interrupt mode includes the NMI interrupt mode, and according to the NMI interrupt mode, the second interrupt signal is sent to the CPU through the interrupt interface.

Optionally, taking an x86 processor-based bare metal instance in Infrastructure as a Service (IaaS) as an example, the memory page collection module may also be referred to as a dirty page collection module. In the bare metal instance, the application instance runs in a non-virtualized mode. At this time, the dirty page collection module appears as a component of the host's Basic Input Output System (BIOS) and resides in a system that can only be accessed by x86 In the memory accessible by the System Management Mode (SMM) mode. The migration component is a network card that contains the function of data migration. The migration control interface, status notification interface, and setting interface are all embodied as different registers exposed by the network card to the host. The internal storage space includes the private registers and private storage inside the device. Space, the private register is used to store the setting information of the host CPU for this network card: the method of sending interrupts, the physical address and length of the information exchange buffer, etc. The private storage space is used to cache dirty page information.

Step 302: The CPU receives the migration command and generates a first identification set, where the first identification set includes the identification of each memory page in the application access area.

After the CPU receives the migration command, it can obtain the identifier of each memory page in the application access area, and compose the identifier of each memory page into the first identifier set.

The space size of each memory page in the application access area can be equal or unequal. The identification of the memory page may be the starting address of the memory page; or, each memory page in the application access area may be sequentially numbered in advance, and the identification of the memory page may also be the number of the memory page.

The application access area saves the data written by the application instance, but because the CPU does not know which memory pages in the application access area store the data that should be migrated when the migration starts, the CPU will be in the application access area when the migration starts All memory pages in are determined as memory pages to be migrated, and the identifier of each memory page in the application access area is obtained, and the identifiers in each memory are formed into a first identifier set.

Optionally, the code storage area may also include the implementation code of the memory page collection module. After receiving the migration command, the CPU suspends running the application instance, calls and runs the implementation code of the memory page collection module, and obtains application access by running the memory page collection module The identifier of each memory page in the area composes the identifier of each memory page into the first identifier set.

Optionally, when the application instance is a bare metal instance, the CPU receives the first interrupt signal, switches the host to the virtual state according to the first interrupt signal, and then receives the second interrupt signal, and stops running the application instance according to the second interrupt signal. , Read the migration command from the migration control interface to realize the reception of the migration command.

Optionally, when the application instance is a virtual machine, because the host is already in a virtual state, the CPU receives the second interrupt signal, stops running the application instance according to the second interrupt signal, and reads the migration command from the migration control interface to Realize receiving the migration command.

When the application instance is a bare metal instance, the host will remain in the virtual state after the host is switched to the virtual state. When the application instance is a virtual machine, the host will be in the virtual state. When the host is in a virtual state, after the CPU generates the first identification set, the attribute of each memory page in the application access area may also be set to write protection. After the properties of the memory page are set to write protection, while the CPU continues to run the application instance, when the application instance writes data to the memory page, the CPU can learn that the memory page is written by the application instance and record the The identifier of the memory page.

Optionally, the CPU may record the learned identifier of the memory page in a storage area in the memory, where the storage area is a storage area in the memory excluding the code storage area, the interaction buffer area, and the application access area.

Step 303: The CPU provides the first identification set to the migration component.

Referring to Figure 2, the memory may also include an interactive buffer area. The CPU may write the first set of identifiers to the interactive buffer area, and write the set to the status notification interface of the migration component to generate a complete message to provide the migration component with the first identifier. set.

Optionally, the interactive buffer area includes a first buffer area and a second buffer area with equal spaces. In this step, the CPU selects a buffer area from the first buffer area and the second buffer area, writes the first identification set into the selected buffer area, and writes the set generation completion message to the status notification interface of the migration component. The generated completion message carries the identifier of the selected buffer area.

Optionally, referring to FIG. 5, after the CPU writes the first set of identifiers into the interactive buffer area, the application instance may continue to run.

Step 304: The migration component obtains the first set of identifiers provided by the CPU.

The migration component reads the set generation completion message from its status notification interface, generates the completion message according to the set, and reads the first identification set from the interaction buffer area.

Optionally, the status notification interface may be a register in the migration component. When the CPU writes the set generation completion message to the status notification interface of the migration component, the processor of the migration component can find that the status notification interface is written with the message. And read the collection generation completion message from the status notification interface. Alternatively, the status notification interface can be a storage area in the memory. After the processor of the migration component sends the start migration command, it periodically or irregularly reads the status notification interface, and when the CPU writes to the status notification interface, the set generation is completed After the message, the processor of the migration component reads the set generation completion message from the state notification interface.

Optionally, when the interaction buffer area includes an area, the processor of the migration component reads the address and space size of the interaction buffer area from the memory of the migration component, and determines the interaction buffer area in the memory according to the address and space size. Read the first set of identifiers from the interactive buffer area.

When the interactive buffer area includes multiple buffer areas of equal size, the set generation completion message read by the migration component also carries the identifier of the buffer area selected by the CPU, and the address and address of the buffer area corresponding to the identifier are obtained from the memory of the migration component. The size of the space, the buffer area in the memory is determined according to the address and the size of the space, and the first identification set is read from the buffer area.

Step 305: The migration component (to the destination host) sends the data stored in the memory page corresponding to the identifier in the first identifier set. Specifically, when the total capacity of the memory page corresponding to each identifier in the first identifier set exceeds a preset threshold, the migration component sends the data stored in the memory page corresponding to the identifier in the first identifier set. The preset threshold is usually less than the capacity of the application access area.

Optionally, the size of each memory page in the memory is equal, and the initialization information sent by the CPU to the migration component may include the size of the memory page. The processor of the migration component receives the initialization information sent by the CPU through the setting interface, and saves the initialization information in the memory of the migration component. In this step, the processor of the migration component can read the size of the memory page from the memory of the migration component, and obtain each identifier in the first identifier set according to the number of identifiers included in the first identifier set and the size of the memory page. The total capacity of the corresponding memory page determines whether the total capacity exceeds the preset threshold.

Optionally, the size of each memory page in the memory varies, and the initialization information sent by the CPU to the migration component may include the identification and size of each memory page. The processor of the migration component receives the initialization information sent by the CPU through the setting interface, and stores the initialization information in the memory of the migration component, that is, the memory page identifier and the memory page identifier corresponding to the memory page identifier are stored in the memory of the migration component The size of the memory page. In this step, the processor of the migration component can read the size of the memory page corresponding to each identifier included in the first identifier set from the memory of the migration component, and obtain the first memory page size according to the size of the memory page corresponding to each identifier. The total capacity of the memory page corresponding to each identifier in the identifier set is determined, and it is determined whether the total capacity exceeds a preset threshold.

In this step, since the first identification set includes the identification of each memory page in the application access area, the total capacity of the memory page corresponding to each identification in the first identification set is equal to the capacity of the application access area and exceeds With a preset threshold, the processor of the migration component can read data from the memory page corresponding to the identifier through the DMA interface according to the identifier in the first identifier set, and send the read data to the destination host through the network transceiver interface.

Optionally, the processor of the migration component may select at least one identifier from the first set of identifiers, the total capacity of the memory page corresponding to each selected identifier is less than or equal to the maximum allowable capacity, and the memory page corresponding to each selected identifier is sent Data saved inside.

Optionally, the migration component may be a PCI device with network transmission capability, which may also be called an intelligent network card, including an internal processor, a network card, and a memory; PCI space interface registers. The PCI space interface register supports the processor to input the address of the dirty page information, and supports the output of the current working status to the processor. The dirty page information is the memory page in the memory where data is written by the application instance. When the application instance needs to be moved out of the machine, the internal processor sends an SMI interrupt signal to the CPU through the interrupt sending interface, and updates the device status to: notify the CPU to enter the dirty page tracking state. When the dirty page information address is obtained from the CPU, the dirty page information is read from the CPU by DMA and stored in the internal memory, and then the dirty pages registered in the internal memory are scanned and transferred to the destination host through DMA.

Optionally, reserve SMM state dedicated storage space when the host starts, where: SMI interrupt processing program function is: according to the self-developed hardware state, decide to perform one of the following actions; return SMI interrupt processing to vmx non-root state to continue execution The instruction before the SMI interrupt occurs, enables the dirty page tracking function of the user instance, and stores the dirty page information in the memory area accessible by self-developed hardware, the storage space of the EPT page table and the storage space of dirty page information.

After the migration component obtains the identification set, it takes a period of time to send the data stored in the memory page corresponding to the identification in the identification set. The application instance continues to run during the process of sending data. During the operation, the application instance may also send the data to the application The access area writes data, so after completing a data transmission, you can continue to migrate the memory data through the following steps 401 to 407, see Figure 6, the steps 401 to 407 are:

Step 401: After sending the data stored in the memory page corresponding to the identifier in the second identifier set, the migration component sends a migration command to the CPU. The following migration command is also referred to as a memory page acquisition command, which is used to acquire dirty page information.

The second identification set is the identification set acquired by the migration component last time, that is, the identification set generated by the CPU last time. When the last identifier set generated by the CPU is the first identifier set, the second identifier set is the same as the first identifier set.

In this step, the processor of the migration component can read the NMI interruption mode and migration command from the memory of the migration component, write the migration command to the migration control interface, and send the first migration command to the CPU through the interrupt interface according to the NMI interruption mode. 2. Interrupt signal.

Regardless of whether the application instance is a bare metal instance or a virtual machine, the host is already in a virtual state at this time, so the processor of the migration component sends a second interrupt signal to the CPU according to the NMI interrupt mode.

Step 402: The CPU receives the migration command and generates a third identification set. The third identification set includes the identifications of the n memory pages that are written by the application instance in the application access area from the first time to the current time, and n is greater than or equal to 1 and less than or equal to the total number of memory pages included in the application access area.

The first time is determined based on the time when the CPU generates the second identification set. For example, the first time is the time when the CPU generates the second identification set. Specifically, whether it is before, after, or at the same time when the second identification set is generated, this embodiment does not do it. limited.

Optionally, referring to FIG. 5, the CPU receives the interrupt signal, stops running the application instance according to the interrupt signal, and reads the migration command from the migration control interface to realize the reception of the migration command.

After the CPU receives the migration command, since the migration command is the migration command received the xth time, the CPU obtains the identifier of the memory page recorded between the first time and the current time according to the trigger of the migration command received the xth time. The identifiers of the acquired memory pages are formed into a third identifier set, and x is an integer greater than 1.

Optionally, after receiving the migration command, the CPU suspends running the application instance, calls and runs the implementation code of the memory page collection module, and obtains the identification of the memory page recorded between the first time and the current time by running the memory page collection module , Compose the acquired identifiers of the memory pages into a third identifier set.

Optionally, after forming the third identification set, the CPU may delete the recorded identification.

Optionally, after the CPU generates the third identification set, the attribute of each memory page in the application access area is set to write protection. When the properties of the memory page are set to write protection, the CPU can learn that the memory page is written by the application instance when the application instance writes data to the memory page while the CPU continues to run the application instance, and record the The identifier of the memory page.

Optionally, when migrating data, you can allocate and initialize the memory space required for data migration from the memory of the currently available host. These memory spaces will be used to store the code of the dirty page collection module; auxiliary storage required for dirty page collection Space (such as a storage area used to record dirty pages); buffers for information interaction with migration components (for example, for CPU to write dirty page information or migration components write control commands, such as interactive buffers, migration components included Interrupt interface, migration control interface, status notification interface, setting interface, DMA interface), and adjust the range of physical memory accessible to the application instance to ensure that the application instance cannot access this memory space; and to set the host's CPU so that After the CPU receives the interrupt issued by the migration component, it will immediately interrupt the operation of the application instance and immediately transfer control to the interrupt processing entry of the dirty page collection module for execution. Write the communication method expected by the dirty page collection module to the migration component (for example, the physical memory address of the allocated information exchange buffer is 0x100000 and the length is 8192 bytes; the dirty page collection module expects to obtain notification through the NMI interrupt).

Step 403: The CPU provides a third identification set to the migration component.

Optionally, the CPU may write the third identification set to the interaction buffer area, and write the set generation completion message to the status notification interface of the migration component, so as to provide the third identification set to the migration component.

Optionally, the interactive buffer area includes a plurality of buffer areas of equal size. In this step, the CPU selects a buffer area from multiple buffer areas, and the selected buffer area is different from the last selected buffer area by the CPU, and writes the third set of identifiers into the selected buffer area to transfer the status of the component The notification interface writes a set generation complete message, and the set generation complete message carries the identifier of the selected buffer area.

For example, the interactive buffer area includes a first buffer area and a second buffer area with equal spaces. The CPU selects a buffer area from the first buffer area and the second buffer area.

Optionally, referring to FIG. 5, after the CPU writes the third set of identifiers into the interactive buffer area, the application instance can continue to run.

Step 404: The migration component obtains a third identifier set provided by the CPU, and the third identifier set includes the identifiers of the n memory pages.

The migration component reads the set generation completion message from its state notification interface, generates the completion message according to the set, and reads the third identification set from the interaction buffer area.

Optionally, the status notification interface may be a register in the migration component. When the CPU writes the set generation completion message to the status notification interface of the migration component, the processor of the migration component can find that the status notification interface is written with the message. And read the collection generation completion message from the status notification interface. Alternatively, the status notification interface can be a storage area in the memory. After sending the migration command, the processor of the migration component will periodically or irregularly read the status notification interface. When the CPU writes the set to the status notification interface, the generation is completed After the message, the processor of the migration component reads the set generation completion message from the state notification interface.

Optionally, when the interaction buffer area includes an area, the processor included in the migration component reads the address and space size of the interaction buffer area from the memory included in the migration component, and determines the interaction buffer in the memory according to the address and space size Area, read the third identification set from the interactive buffer area.

When the interactive buffer area includes multiple buffer areas of equal size, the set generation completion message read by the processor of the migration component carries the identifier of the buffer area selected by the CPU, and the processor of the migration component obtains the identifier from the memory of the migration component. The address and space size of the corresponding buffer area, the buffer area selected by the CPU is determined according to the address and the space size, and the third set of identifiers is read from the determined buffer area.

Step 405: The migration component judges whether the total capacity of the n memory pages exceeds a preset threshold, if it exceeds, execute step 406, and if it does not exceed, execute step 407.

Optionally, the size of each memory page in the memory is equal, and the processor of the migration component can read the size of the memory page from the memory of the migration component, according to the number n of identifiers included in the third identifier set and the size of the memory page Obtain the total capacity of the n memory pages, and determine whether the total capacity exceeds a preset threshold.

Optionally, the size of each memory page in the memory is not equal, the processor of the migration component can read from the memory of the migration component the size of the memory page corresponding to each identifier included in the third identifier set, according to each Identify the size of the corresponding memory page to obtain the total capacity of the n memory pages, and determine whether the total capacity exceeds a preset threshold.

Step 406: The migration component sends the data stored in the memory page corresponding to the identifier in the third identifier set, and returns to perform step 401.

In this step, the processor included in the migration component can read data from the memory page corresponding to the identifier through the DMA interface according to the identifier in the third identifier set, and send the read data to the destination host through the network transceiver interface.

Optionally, the processor of the migration component may select at least one identifier from the third identifier set, and the total capacity of the memory page corresponding to each selected identifier is less than or equal to the maximum allowable capacity, and sends the memory page corresponding to each selected identifier Data saved inside. This can reduce the amount of data sent twice, so as to reduce the time of sending data twice, and can try to avoid the application instance after writing data to a memory page, the data has not been sent by the migration component and re-reset by the application instance. The written data is overwritten.

Optionally, usually there are not many identities in the third identity set, and the number of identities in the third identity set is less than or equal to the preset number threshold. Therefore, in general, the processor of the migration component will select the identities in the third identity set. All logos.

Optionally, after the processor of the migration component obtains the second identification set, if all the identifications in the second identification set have not been selected, that is, there are still unselected identifications in the second identification set, then the third identification Before selecting the identity in the set, add the unselected identity in the second identity set to the third identity set, and then select the identity from the third identity set.

Step 407: The migration component sends a stop migration command to the CPU, sends the data stored in the memory page corresponding to the identifier in the third identifier set, and ends the operation.

In this step, the processor of the migration component can read the interrupt mode and stop migration command from the memory of the migration component, write the stop migration command to the migration control interface, and send an interrupt signal to the CPU through the interrupt interface according to the interrupt mode . The processor of the migration component may read data from the memory page corresponding to each identifier through the DMA interface according to each identifier in the third identifier set, and send the read data to the destination host through the network transceiver interface.

Optionally, the CPU receives an interrupt signal, stops running the application instance according to the interrupt signal, reads the migration stop command from the migration control interface, and stops running the application instance according to the migration stop command.

The total capacity of the n memory pages does not exceed the preset threshold, indicating that the migration component has obtained all the data generated by the application instance, and then continues to run the application instance, the application instance may not generate new data, so you can stop continuing to run the application instance , And after sending the data stored in the memory page corresponding to each identifier in the third identifier set, the host can be shut down.

Among them, the interactive buffer is used to store dirty page information, that is, the first identification set, the second identification set, or the third identification set. It is divided into two buffer areas of the same size but not overlapping, and one is used for migration components. Dirty page information is obtained by DMA, and the other is used for the dirty page collection module to cache the latest dirty page information. The dirty page collection module informs the migration component from which area to obtain dirty page information through the status notification interface, and uses the other buffer area To cache dirty page information.

The SMI interrupt handler is responsible for responding to the SMI interrupt sent by the smart peripheral and setting the current user to run in a virtual state. Specifically, after the SMI interrupt handler obtains control of the CPU due to the SMI interrupt, it executes a process including the following steps:

(1) Turn on the virtualization support capability of the current processor.

(2) Create related data structures for running the current application instance in a virtual state. These data structures can not only ensure that the application instance can run in the virtual state, but also meet the following constraints: 1) If the processor is running in the virtual state After receiving the NMI interrupt, it exits from the virtual state and makes the dirty page collection module gain control; 2) When the application instance starts to run, the physical memory that the application instance can access is all in a write-protected state; 3) When the application instance When the virtual state is running, modifying the memory in the write-protected state will cause the processor to execute the dirty page collection module to record the modified physical memory address information; 4) The various processors of the application instance cannot directly send NMI interrupts, and Only the virtual machine running support module can send it on its behalf.

(3) Initialize the dirty page information in the interactive buffer to "all physical memory accessible by the application instance has been modified".

(4), through the host status notification interface, notify the migration component of "Dirty Page Collection Complete".

(5) Continue to run the current application instance in the virtual state.

The virtual machine operation support module is similar to the virtual machine monitor (VMM) function in the traditional virtualization technology. It is responsible for ensuring that the user instance can run normally in the non-root state of the x86 processor. When the processor exits the non-root state because of receiving an NMI interrupt, the virtual machine running support module queries the migration control interface. When this interface is set with a valid control command, it calls the dirty page collection module to perform the actions expected by the smart peripheral .

In this embodiment, the smart peripheral first wakes up the dirty page collection module through the SMI interrupt, and then uses the NMI interrupt to communicate with the dirty page collection module because the cost of the SMI interrupt is significantly higher than the NMI interrupt, so the NMI interrupt can also achieve For the purpose, use NMI interrupt instead.

In the embodiment of the present application, the migration component may send a migration command to the CPU, and the CPU suspends running the application instance according to the migration command, and generates an identification set (may be the first identification set or the third identification set), and the identification set includes application access The identification of at least one memory page to be migrated in the area, provides the identification set to the migration component, and then continues to run the application instance; the migration component obtains the identification set provided by the CPU, and sends the identification in the identification set to the memory page corresponding to the storage The data. In this way, part of the CPU migration operation is shared by the migration component, thereby reducing the consumption of CPU resources.

Referring to FIG. 7, an embodiment of the present application provides an apparatus 500 for migrating data. The device can be a network card or a migration component integrated on the network card. The device 500 is applied to a host including a CPU, a memory, and the device 500. The CPU is used to run an application instance, and the memory includes an application access area accessed by an application instance. The device 500 includes:

The sending unit 501 is configured to send a migration command to the CPU, where the migration command is used to trigger the CPU to generate an identification set, the identification set including an identification of at least one storage unit to be migrated in an application access area;

The processing unit 502 is configured to obtain the identification set;

The sending unit 501 is further configured to send the data stored in the storage unit corresponding to the identifier in the identifier set.

Optionally, the sending unit 501 is configured to:

When the processing unit 502 determines to start migrating the data stored in the application access area, it sends a migration command to the CPU. The migration command is used to trigger the CPU to generate a first identification set. The first identification set includes the identification of each storage unit in the application access area. .

Optionally, the sending unit 501 is configured to:

After the sending unit 501 sends the data stored in the storage unit corresponding to the identifiers in the second identifier set, it sends a migration command to the CPU. The second identifier set is the identifier set generated by the CPU last time. The migration command is used to trigger the CPU to generate The third identification set. The third identification set includes identifications of n storage units that are written by the application instance in the application access area from the first time to the current time. The first time is the time when the CPU generates the second identification set, n It is an integer, n is greater than or equal to 1 and less than or equal to the total number of storage cells included in the application access area.

Optionally, the device 500 includes an interrupt interface and a migration control interface,

The processing unit 502 is further configured to write a migration command to the migration control interface;

The sending unit 501 is configured to send an interrupt signal to the CPU through the interrupt interface, and the interrupt signal is used to trigger the CPU to read the migration command from the migration control interface.

Optionally, the device 500 includes a status notification interface, the memory also includes an interactive buffer area, and the processing unit 502 is configured to:

Read the collection generation completion information from the status notification interface, and the collection generation completion information is written into the status notification interface by the CPU after writing the identification collection to the interactive buffer area;

Read the set of identifiers from the interactive buffer area.

Optionally, the interactive buffer area includes a first buffer area and a second buffer area, and the collectively generated information carries the identifier of the buffer area, and the buffer area is a buffer area selected by the CPU from the first buffer area and the second buffer area. CPU selection The buffer area of is different from the buffer area selected last time by the CPU;

The processing unit 502 is used for:

The identifier set is read from the buffer area corresponding to the identifier of the buffer area selected by the CPU.

Optionally, the sending unit 501 is configured to:

When the total capacity of the storage unit corresponding to each identifier in the identifier set exceeds a preset threshold, sending the data stored in the storage unit corresponding to the identifier in the identifier set;

When the total capacity of the storage unit corresponding to each identifier in the identifier set does not exceed the preset threshold, a migration stop command is sent to the CPU, and the migration stop command is used to trigger the CPU to stop running the application instance and send the identifier set The identifier in corresponds to the data stored in the storage unit.

In the embodiment of the present application, the sending unit may send a migration command to the CPU to cause the CPU to generate an identification set that includes the identification of at least one storage unit to be migrated in the application access area, and the processing unit obtains the identification set provided by the CPU, Send the data stored in the storage unit corresponding to the identifier in the identifier set. In this way, the sending unit and the processing unit share part of the CPU migration operation, thereby reducing the consumption of CPU resources.

Referring to FIG. 8, an embodiment of the present application provides a processor 600 that is applied to a host including a memory, a migration component, and the processor 600, and the processor 600 is configured to run an application instance, and the memory includes For the application access area accessed by the application instance, the processor 600 includes:

The receiving unit 601 is configured to receive a migration command sent by the migration component;

The processing unit 602 is configured to generate an identification set according to the migration command, the identification set including an identification of at least one storage unit to be migrated in the application access area;

The processing unit 602 is further configured to provide the identifier set to the migration component, so that the migration component sends the data stored in the storage unit corresponding to the identifier in the identifier set.

Optionally, the migration component includes an interrupt interface and a migration control interface, and the receiving unit 601 is configured to receive an interrupt signal sent by the migration component through the interrupt interface;

The processing unit 602 is further configured to read a migration command from the migration control interface according to the interrupt signal, and the migration command is written into the migration control interface by the migration component before sending the interrupt signal.

Optionally, the processing unit 602 is configured to:

When the migration command is the migration command received for the first time by the receiving unit 601, a first identification set is generated. The migration command is sent when the migration component determines to start migrating data stored in the application access area. The first identification set includes application access. The identifier of each storage unit in the area.

Optionally, the processing unit 602 is configured to:

When the migration command is the migration command received by the receiving unit 601 for the xth time, a third identification set is generated, where x is an integer greater than 1, and the migration command is the storage unit corresponding to the identification in the second identification set sent by the migration component After the saved data is sent, the second identification set is the identification set generated last time by the processing unit 602, and the third identification set includes n storages where data is written by the application instance in the application access area from the first time to the current time. The identification of the unit, the first time is the time when the processing unit 602 generates the second identification set, n is an integer, and n is greater than or equal to 1 and less than or equal to the total number of storage units included in the application access area.

Optionally, the migration component includes a status notification interface, the memory also includes an interactive buffer area, and the processing unit 602 is configured to:

The identification set is written into the interaction buffer area, and the set generation completion information is written in the status notification interface, and the set generation completion information is used to trigger the migration component to obtain the identification set from the interaction buffer area.

Optionally, the interactive buffer area includes a first buffer area and a second buffer area, and the processing unit 602 is configured to:

Select a buffer area from the first buffer area and the second buffer area, the selected buffer area is different from the buffer area selected last time by the processing unit 602,

The identification set is written into the selected buffer area, and the set generation completion information is written in the status notification interface. The set generation completion information carries the identification of the selected buffer.

In the embodiment of the present application, the receiving unit may receive the migration command sent by the migration component, the processing unit suspends running the application instance according to the migration command, and generates an identification set (may be the first identification set or the third identification set), and the identification set Include the identifier of at least one storage unit to be migrated in the application access area, provide the identifier set to the migration component, and then continue to run the application instance; the migration component obtains the identifier set provided by the CPU, and sends the storage corresponding to the identifier in the identifier set Data saved in the unit. In this way, the migration component is used to share part of the migration operation of the processor, thereby reducing the consumption of the processor resources.

Referring to FIG. 9, an embodiment of the present application provides a system 700 for migrating data, and the system 700 is a computer system. The system 700 includes an apparatus 500 as described in FIG. 7 and a processor 600 as described in FIG. 8. The apparatus 500 may be a migration component 701, and the processor 600 may be a CPU 702.

Those of ordinary skill in the art can understand that all or part of the steps in the foregoing embodiments can be implemented by hardware, or by a program instructing relevant hardware to be completed. The program can be stored in a computer-readable storage medium. The storage medium mentioned can be a read-only memory, a magnetic disk or an optical disk, etc.

The above descriptions are only optional embodiments of this application and are not intended to limit this application. Any modification, equivalent replacement, improvement, etc. made within the principles of this application shall be included in the protection scope of this application. Inside.

Claims (31)

1. A method for migrating data, characterized in that the method is applied to a host including a processor, a memory, and a migration component, the processor is used to run an application instance, and the memory includes an application access area accessible by the application instance , The method includes:

   Sending, by the migration component, a migration command to the processor, the migration command being used to trigger the processor to generate an identification set, the identification set including an identification of at least one storage unit to be migrated in the application access area;

   The migration component obtains the identification set;

   The migration component sends the data stored in the storage unit corresponding to the identifier in the identifier set.
2. The method according to claim 1, wherein the identification set includes an identification of each storage unit in the application access area.
3. The method according to claim 1, wherein the set of identifiers includes the identifiers of n storage units in the application access area that are written by the application instance from the first time to the current time, wherein, The first time is the last time the processor generated the identification set last time, n is an integer, and n is greater than or equal to 1 and less than or equal to the total number of storage units included in the application access area.
4. The method according to any one of claims 1 to 3, wherein the migration component includes an interrupt interface and a migration control interface, and the migration component sending a migration command to the processor includes:

   The migration component writes a migration command to the migration control interface;

   The migration component sends an interrupt signal to the processor through the interrupt interface, where the interrupt signal is used to trigger the processor to read the migration command from the migration control interface.
5. The method according to any one of claims 1 to 4, wherein the migration component includes a status notification interface, the memory further includes an interactive buffer area, and the migration component acquiring the identification set includes:

   The migration component reads collection generation completion information from the status notification interface, where the collection generation completion information is written to the status by the processor after writing the identification collection to the interaction buffer area In the notification interface;

   The migration component reads the identification set from the interaction buffer area.
6. The method according to claim 5, wherein the interactive buffer area includes a plurality of buffer areas, the set generation completion information carries the identifier of the buffer area, and the buffer area is the processor from the plurality of buffer areas. The buffer area selected in the buffer area, the buffer area selected by the processor is different from the buffer area selected last time by the processor;

   The migration component reading the identifier set from the interaction buffer area includes:

   The migration component reads the identifier set from the buffer area corresponding to the identifier of the buffer area selected by the processor.
7. The method according to any one of claims 1 to 6, wherein after the migration component obtains the identification set, the method further comprises:

   When the total capacity of the storage unit corresponding to each identifier in the identifier set does not exceed a preset threshold, the migration component sends a migration stop command to the processor, and the migration stop command is used to trigger the processor Stop running the application instance.
8. A method for migrating data, characterized in that the method is applied to a host including a processor, a memory, and a migration component, the processor is used to run an application instance, and the memory includes an application access area accessible by the application instance , The method includes:

   The processor receives the migration command sent by the migration component;

   Generating, by the processor, an identification set according to the migration command, the identification set including an identification of at least one storage unit to be migrated in the application access area;

   The processor provides the identifier set to the migration component, so that the migration component sends the data stored in the storage unit corresponding to the identifier in the identifier set.
9. The method according to claim 8, wherein the migration component includes an interrupt interface and a migration control interface, and the processor receiving the migration command sent by the migration component includes:

   The processor receives the interrupt signal sent by the migration component through the interrupt interface;

   The processor reads a migration command from the migration control interface according to the interrupt signal, and the migration command is written into the migration control interface by the migration component before sending the interrupt signal.
10. The method according to claim 8 or 9, wherein the identification set includes an identification of each storage unit in the application access area.
11. The method according to claim 8 or 9, wherein the set of identifiers includes the identifiers of n storage units whose data is written by the application instance in the application access area from the first time to the current time, Wherein, the first time is the last time the processor generated the identification set last time, n is an integer, and n is greater than or equal to 1 and less than or equal to the total number of storage units included in the application access area.
12. The method according to any one of claims 8 to 11, wherein the migration component includes a status notification interface, the memory further includes an interactive buffer area, and the processor provides the identification set to the migration component ,include:

    The processor writes the set of identifiers into the interaction buffer area, and writes the set generation completion information on the status notification interface, and the set generation completion information is used to trigger the migration component from the interaction buffer The identification set is acquired in the area.
13. The method according to claim 12, wherein the interactive buffer area includes a plurality of buffer areas, and the processor writes the first set of identifiers into the interactive buffer area, and notifies in the state Interface write collection generation complete information, including:

    The processor selects a buffer area from the plurality of buffer areas, and the selected buffer area is different from the buffer area selected last time by the processor,

    The processor writes the identifier set into the selected buffer area, and writes set generation completion information on the status notification interface, where the set generation completion information carries the identifier of the selected buffer area.
14. A device for migrating data, characterized in that the device is applied to a host including a processor, a memory, and the device, the processor is used to run an application instance, and the memory includes application access for the application instance to access Area, the device includes:

    A sending unit, configured to send a migration command to the processor, the migration command being used to trigger the processor to generate an identification set, the identification set including an identification of at least one storage unit to be migrated in the application access area ；

    A processing unit for obtaining the set of identifiers;

    The sending unit is further configured to send the data stored in the storage unit corresponding to the identifiers in the identifier set.
15. The apparatus of claim 14, wherein the identification set includes an identification of each storage unit in the application access area.
16. The apparatus according to claim 14, wherein the set of identifiers includes identifiers of n storage units in the application access area where data is written by the application instance from the first time to the current time, wherein, The first time is the last time the processor generated the identification set last time, n is an integer, and n is greater than or equal to 1 and less than or equal to the total number of storage units included in the application access area.
17. The device according to any one of claims 14-16, wherein the device comprises an interrupt interface and a migration control interface,

    The processing unit is further configured to write a migration command to the migration control interface;

    The sending unit is configured to send an interrupt signal to the processor through the interrupt interface, where the interrupt signal is used to trigger the processor to read the migration command from the migration control interface.
18. The device according to any one of claims 14 to 17, wherein the device comprises a status notification interface, the memory further comprises an interactive buffer area, and the processing unit is configured to:

    Read set generation completion information from the status notification interface, where the set generation completion information is written by the processor to the status notification interface after writing the identification set to the interaction buffer area ；

    Reading the identification set from the interaction buffer area.
19. The device according to claim 18, wherein the interactive buffer area includes a plurality of buffer areas, the set generation completion information carries an identifier of the buffer area, and the buffer area is the processor from the plurality of buffer areas. The buffer area selected in the buffer area, the buffer area selected by the processor is different from the buffer area selected last time by the processor; the processing unit is configured to:

    Read the set of identifiers from the buffer area corresponding to the identifier of the buffer area selected by the processor.
20. The device according to any one of claims 14 to 19, wherein the sending unit is further configured to:

    When the total capacity of the storage unit corresponding to each identifier in the identifier set does not exceed a preset threshold, a migration stop command is sent to the processor, and the migration stop command is used to trigger the processor to stop running the Applications.
21. A processor, characterized in that the processor is applied to a host including a memory, a migration component, and the processor, the processor is used to run an application instance, and the memory includes an application access for the application instance to access Area, the processor includes:

    A receiving unit, configured to receive a migration command sent by the migration component;

    A processing unit, configured to generate an identification set according to the migration command, the identification set including an identification of at least one storage unit to be migrated in the application access area;

    The processing unit is further configured to provide the identification set to the migration component, so that the migration component sends the data stored in the storage unit corresponding to the identification in the identification set.
22. 22. The processor of claim 21, wherein the migration component comprises an interrupt interface and a migration control interface, and the receiving unit is configured to receive an interrupt signal sent by the migration component through the interrupt interface;

    The processing unit is further configured to read a migration command from the migration control interface according to the interrupt signal, where the migration command is written by the migration component into the migration control interface before sending the interrupt signal of.
23. The processor according to claim 21 or 22, wherein the identification set includes an identification of each storage unit in the application access area.
24. The processor according to claim 21 or 22, wherein the identifier set includes identifiers of n storage units in the application access area whose data is written by the application instance from the first time to the current time , Wherein the first time is the last time the processor generated the identification set last time, n is an integer, and n is greater than or equal to 1 and less than or equal to the total number of storage units included in the application access area.
25. The processor according to any one of claims 21 to 24, wherein the migration component comprises a status notification interface, the memory further comprises an interactive buffer area, and the processing unit is configured to:

    The identification set is written into the interactive buffer area, and the set generation completion information is written in the status notification interface, and the set generation completion information is used to trigger the migration component to obtain all information from the interactive buffer area. Said logo collection.
26. The processor according to claim 25, wherein the interaction buffer area comprises a plurality of buffer areas, and the processing unit is configured to:

    Selecting a buffer area from the plurality of buffer areas, and the selected buffer area is different from the buffer area selected last time by the processing unit,

    The identification set is written into the selected buffer area, and the set generation completion information is written in the status notification interface, and the set generation completion information carries the identification of the selected buffer.
27. A computer system, wherein the computer system includes a memory, the data migration device according to any one of claims 14 to 20, and the processor according to any one of claims 21 to 26.
28. A chip, characterized in that the chip includes a programmable logic circuit, which is used to implement the method according to any one of claims 1-7 when the chip is running.
29. A chip, characterized in that the chip includes a logic circuit, which is used to implement the method according to any one of claims 8-13 when the chip is running.
30. A chip, characterized in that, the chip includes one or more physical cores and a storage medium, and the one or more physical cores realize the implementation according to claims 1-7 after reading the computer instructions in the storage medium. Any of the methods described.
31. A chip, characterized in that, the chip includes one or more physical cores and a storage medium, and the one or more physical cores realize the implementation as claimed in claims 8-13 after reading computer instructions in the storage medium. Any of the methods described.

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