CN117134009A

CN117134009A - Charging method and electronic equipment

Info

Publication number: CN117134009A
Application number: CN202310461793.6A
Authority: CN
Inventors: 孙媛; 徐可
Original assignee: Honor Device Co Ltd
Current assignee: Honor Device Co Ltd
Priority date: 2023-04-21
Filing date: 2023-04-21
Publication date: 2023-11-28

Abstract

The application is applicable to the technical field of terminals, and provides a charging method and electronic equipment, wherein the charging method is applied to first electronic equipment and comprises the following steps: in the starting initialization process, the main frequency of the embedded controller is increased from a first frequency to a second frequency; after the power-on, if the second electronic equipment is detected to be accessed, charging the second electronic equipment with the first power in a first period of time after the second electronic equipment is accessed; in a first period, the embedded controller processes charging negotiation data between the first electronic device and the second electronic device at a second frequency; after the first period, under the condition that the power supply state meets the reverse fast charging condition, charging the second electronic equipment with second power; the second power is the charging power determined by negotiation between the first electronic device and the second electronic device in the first period, and the second power is larger than the first power, so that the charging speed of the first electronic device for charging the second electronic device can be increased, and the charging experience of a user is improved.

Description

Charging method and electronic equipment

Technical Field

The present application relates to the field of terminal technologies, and in particular, to a charging method and an electronic device.

Background

In many scenarios of daily life, a user will charge a cell phone using a personal computer (personal computer, PC). For example, without a power outlet, a power adapter, or a power device such as a mobile power source (e.g., a charger) the user may connect the handset to a PC to charge the handset through the PC.

However, when a PC is used as a charger, only an output voltage of 5 volts (V) and an output current of 2 amperes (a) are usually supported, and the output power is low, resulting in a low charging speed at which the PC charges a mobile phone.

Disclosure of Invention

The embodiment of the application provides a charging method and electronic equipment, which can improve the charging speed of a first electronic equipment for charging a second electronic equipment, so that the charging experience of a user when the user charges the second electronic equipment through the first electronic equipment is improved.

In a first aspect, an embodiment of the present application provides a charging method, including:

in the starting initialization process, the main frequency of the embedded controller is increased from a first frequency to a second frequency;

after the power-on, if the second electronic equipment is detected to be accessed, charging the second electronic equipment with first power in a first period of time after the second electronic equipment is accessed; during the first period of time, the embedded controller processes charging negotiation data between the first electronic device and the second electronic device at the second frequency;

After the first period, charging the second electronic device with a second power under the condition that the power supply state meets a reverse fast charging condition; the second power is the charging power determined by negotiation between the first electronic device and the second electronic device in the first period, and the second power is larger than the first power.

The power-on initialization process may refer to a process that continues from the start of the power-on to the completion of the power-on (i.e., entering a normal operating state).

The dominant frequency of the EC may refer to the operating frequency of the EC.

The first frequency may be a default operating frequency of the EC. The second frequency is greater than the first frequency.

In a specific implementation, the step of increasing the dominant frequency of the EC from the first frequency to the second frequency may include:

the dominant frequency of EC is multiplied from the first frequency to the second frequency.

For example, the primary frequency of the EC may be doubled to the second frequency by writing a register value corresponding to the second frequency to a first register in the EC. Wherein the first register is a register for controlling the dominant frequency of the EC.

The first period of time may be followed by completion of a charge negotiation process between the first electronic device and the second electronic device.

According to the charging method provided by the embodiment of the application, the main frequency of the EC is increased from the first frequency to the second frequency in the starting initialization process, so that the data processing efficiency of the EC is greatly improved, the data response time of the first electronic equipment can be shortened, the second electronic equipment can receive the response data sent by the first electronic equipment in a specified time, the smooth proceeding of the charging negotiation process between the first electronic equipment and the second electronic equipment is ensured, the quick charging of the second electronic equipment by the first electronic equipment is realized, and the charging experience of a user when the second electronic equipment is charged by the first electronic equipment is improved.

In an optional implementation manner of the first aspect, the method further includes:

and in the starting initialization process, the communication rate of a data interface used for transmitting the charging negotiation data in the embedded controller is increased from a first rate to a second rate.

The charging negotiation data may include data interacted between the first electronic device and the second electronic device when the first electronic device and the second electronic device negotiate charging information of the second electronic device based on a fast charging protocol.

The data interface in the EC for transmitting the charging negotiation data may be any one of a set of idle I2C interfaces in the EC for connecting the first chip U1.

According to the charging method provided by the embodiment of the application, the communication rate of the data interface for transmitting the charging negotiation data in the EC is increased from the first rate to the second rate, so that the data response speed of the first electronic device is further improved, the first electronic device and the second electronic device can complete the charging negotiation process more rapidly, and the quick charging efficiency of the first electronic device to the second electronic device is improved.

In an optional implementation manner of the first aspect, in a case where a power state meets a reverse fast charging condition, charging the second electronic device with a second power includes:

And under the condition that the first electronic equipment is connected with a charger, charging the second electronic equipment with second power.

and under the condition that the first electronic equipment is not connected with a charger and the residual electric quantity of the first electronic equipment is larger than or equal to a first electric quantity threshold value, charging the second electronic equipment with second power.

after the first period, charging the second electronic device with the first power if the power state does not satisfy the reverse fast charge condition and a reverse slow charge condition is satisfied.

In an optional implementation manner of the first aspect, in a case where the power state does not meet the reverse fast charging condition and meets a reverse slow charging condition, charging the second electronic device with the first power includes:

and under the condition that the first electronic equipment is not connected with a charger, and the residual electric quantity of the first electronic equipment is smaller than a first electric quantity threshold value and larger than or equal to a second electric quantity threshold value, charging the second electronic equipment with the first power.

In an optional implementation manner of the first aspect, if the second electronic device is detected to be accessed, charging the second electronic device with the first power in a first period of time after the second electronic device is accessed includes:

and under the condition that the second electronic equipment is detected to be accessed and the power state of the first electronic equipment meets the reverse slow charging condition, charging the second electronic equipment with first power in a first period after the second electronic equipment is accessed.

In an optional implementation manner of the first aspect, when it is detected that the second electronic device is connected, and a power state of the first electronic device meets a reverse slow charging condition, charging the second electronic device with a first power in a first period after the second electronic device is connected, includes:

and under the condition that the second electronic equipment is detected to be accessed, and the residual electric quantity of the first electronic equipment is larger than or equal to a second electric quantity threshold value, charging the second electronic equipment with first power in a first period after the second electronic equipment is accessed.

After the first period, stopping charging the second electronic device if the power state does not satisfy a reverse slow charge condition.

In an optional implementation manner of the first aspect, the stopping the charging of the second electronic device in a case where the power state does not meet a reverse slow charging condition includes:

and stopping charging the second electronic device under the condition that the residual electric quantity of the first electronic device is smaller than a second electric quantity threshold value.

According to the charging method provided by the embodiment of the application, the charging mode of the first electronic equipment for charging the second electronic equipment can be switched and controlled based on the power state of the first electronic equipment, so that the second electronic equipment can be charged, and the influence on the normal operation of the first electronic equipment can be avoided.

In an optional implementation manner of the first aspect, after the charging the second electronic device with the second power, the method further includes:

and reducing the main frequency of the embedded controller from the second frequency to the first frequency.

The communication rate is reduced from the second rate to the first rate.

According to the charging method provided by the embodiment of the application, after the first electronic equipment and the second electronic equipment complete the charging negotiation process, the main frequency of the EC is restored to the first frequency, and the communication rate of the data interface used for transmitting the charging negotiation data in the EC is restored to the first rate, so that the EC can process other non-quick charging events conveniently.

In a second aspect, an embodiment of the present application provides an electronic device, including: one or more processors; one or more memories; the one or more memories store one or more computer-executable programs comprising instructions that, when executed by the one or more processors, cause the electronic device to perform steps in a charging method as described in any implementation of the first aspect above.

In an alternative implementation of the second aspect, the processor includes an embedded controller; the electronic equipment further comprises a quick charge control module, a battery, a power management module and a USB interface;

the fast charge control module is connected with the embedded controller, the battery management module and the USB interface, and the power management module is connected with the battery.

In a third aspect, embodiments of the present application provide a computer-readable storage medium storing a computer-executable program which, when invoked by a computer, causes the computer to perform the steps of the charging method as described in any implementation manner of the first aspect.

In a fourth aspect, embodiments of the present application provide a computer-executable program product for causing an electronic device to perform steps in a charging method according to any implementation of the first aspect, when the computer-executable program product is run on the electronic device.

In a fifth aspect, an embodiment of the present application provides a chip system, including a processor, where the processor is coupled to a memory, and the processor executes a computer executable program stored in the memory, to implement steps in a charging method according to any implementation manner of the first aspect. The chip system can be a single chip or a chip module composed of a plurality of chips.

It will be appreciated that the advantages of the second to fifth aspects may be found in the relevant description of the first aspect, and are not described here again.

Drawings

Fig. 1 is a schematic structural diagram of a first electronic device according to an embodiment of the present application;

fig. 2 is a schematic circuit diagram of a first electronic device according to an embodiment of the present application;

fig. 3 is a schematic flow chart of a charging method according to an embodiment of the present application;

fig. 4 is a schematic flow chart of a charging method according to another embodiment of the present application;

fig. 5 is an exemplary diagram of an interaction flow involved in a charge negotiation process between a first electronic device and a second electronic device according to an embodiment of the present application;

fig. 6 is a schematic diagram of signal waveforms involved in a charge negotiation process according to an embodiment of the present application;

fig. 7 is a schematic architecture diagram of a first electronic device according to an embodiment of the present application.

Detailed Description

It should be noted that the terms used in the implementation section of the embodiment of the present application are only used to explain the specific embodiment of the present application, and are not intended to limit the present application. In the description of the embodiments of the present application, unless otherwise indicated, "/" means or, for example, a/B may represent a or B; "and/or" herein is merely an association relationship describing a relationship, meaning that there may be three relationships, e.g., a and/or B, may mean: three cases I exist, a alone, a and B together, and B alone. In addition, in the description of the embodiments of the present application, unless otherwise indicated, "a plurality" means two or more, and "at least one", "one or more" means one, two or more.

The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a definition of "a first", "a second" feature may explicitly or implicitly include one or more of such features.

Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.

In view of the fact that the charging speed of the PC is low when the PC charges the mobile phone, and the battery capacity of the PC is high, the PC itself has a power basis for discharging high power to the outside. The charging method may be applied to the first electronic device, that is, the execution subject of the charging method may be the first electronic device.

The first electronic device may include a PC, an in-vehicle device, an Augmented Reality (AR) device, a Virtual Reality (VR) device, and the like. The PC may include a desktop computer, a notebook computer, a tablet computer, a netbook, an ultra-mobile personal computer (UMPC), and the like.

The charging method provided by the embodiment of the application can be applied to an application scene that the first electronic device charges the second electronic device. The second electronic device may include, for example, an electronic device such as a cell phone or a wearable device.

In order to facilitate understanding of the charging method provided by the embodiment of the present application, a structure of a first electronic device to which the charging method provided by the embodiment of the present application is applied will be described below by taking a PC as an example.

Fig. 1 is a schematic structural diagram of a first electronic device according to an embodiment of the present application. As shown in fig. 1, the first electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (universal serial bus, USB) interface 130, a charge management module 140, a power management module 141, a battery 142, a quick charge control module 143, a display 150, a keypad 151, a touch pad 152, a camera 153, a wireless communication module 160, an antenna 161, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, and the like. The sensor module 180 may include a temperature sensor 180A, among other things.

The processor 110 may include one or more processing units, for example, the processor 110 may include a central processor (central processing unit, CPU), an application processor (application processor, AP), a modem processor, a graphics processor (graphics processing unit, GPU), an image signal processor (image signal processor, ISP), a controller, a video codec, a digital signal processor (digital signal processor, DSP), a baseband processor, and/or a neural-network processor (neural-network processing unit, NPU), etc. Wherein the different processing units may be separate devices or may be integrated in one or more processors.

The controller can generate operation control signals according to the instruction operation codes and the time sequence signals to finish the control of instruction fetching and instruction execution. By way of example, the controller may comprise an embedded controller (embedded controller, EC).

The EC may be used for power management. For example, the EC may be used to monitor the battery power, control the power up and power down timing of the PC on/off, control the power up and power down timing of the PC sleep or suspend, control the battery charge and discharge, and the like.

EC may also be used for temperature management. For example, the EC may monitor the temperature inside the PC based on temperature information acquired by the temperature sensor 180A, and adjust the rotational speed of the fan as needed for temperature control.

EC may also be used to clock the PC. For example, the EC may be used to control the PC to enter sleep mode, or may be used to wake up the PC.

The EC may also be used to manage low-speed peripherals such as a keyboard 151 or a touch pad 152, etc.

A memory may also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may hold instructions or data that the processor 110 has just used or recycled. If the processor 110 needs to reuse the instruction or data, it can be called directly from the memory. Repeated accesses are avoided and the latency of the processor 110 is reduced, thereby improving the efficiency of the system.

The processor 110 may include one or more interfaces. The interfaces may include an integrated circuit (inter-integrated circuit, I2C) interface, an integrated circuit built-in audio (inter-integrated circuit sound, I2S) interface, a pulse code modulation (pulse code modulation, PCM) interface, a universal asynchronous receiver transmitter (universal asynchronous receiver/transmitter, UART) interface, a mobile industry processor interface (mobile industry processor interface, MIPI), a general-purpose input/output (GPIO) interface, and/or a USB interface, among others.

The I2C interface is a bi-directional synchronous serial bus comprising a serial data line (SDA) and a serial clock line (derail clock line, SCL). In some embodiments, the processor 110 may contain multiple sets of I2C buses. The processor 110 may be coupled to the fast charge control module 143, charger, flash, camera 153, etc. via different I2C bus interfaces, respectively. For example, the processor 110 may be coupled to the fast charge control module 143 through an I2C interface, so that the EC in the processor 110 and the fast charge control module 143 communicate through an I2C bus interface to implement the reverse fast charge function of the first electronic device 100.

The I2S interface may be used for audio communication. In some embodiments, the processor 110 may contain multiple sets of I2S buses. The processor 110 may be coupled to the audio module 170 via an I2S bus to enable communication between the processor 110 and the audio module 170. In some embodiments, the audio module 170 may transmit an audio signal to the wireless communication module 160 through the I2S interface, to implement a function of answering a call through the bluetooth headset.

PCM interfaces may also be used for audio communication to sample, quantize and encode analog signals. In some embodiments, the audio module 170 and the wireless communication module 160 may be coupled through a PCM bus interface. In some embodiments, the audio module 170 may also transmit audio signals to the wireless communication module 160 through the PCM interface to implement a function of answering a call through the bluetooth headset. Both the I2S interface and the PCM interface may be used for audio communication.

The UART interface is a universal serial data bus for asynchronous communications. The bus may be a bi-directional communication bus. It converts the data to be transmitted between serial communication and parallel communication. In some embodiments, a UART interface is typically used to connect the processor 110 with the wireless communication module 160. For example, the processor 110 communicates with a bluetooth module in the wireless communication module 160 through a UART interface to implement a bluetooth function. In some embodiments, the audio module 170 may transmit an audio signal to the wireless communication module 160 through a UART interface, to implement a function of playing music through a bluetooth headset.

The MIPI interface may be used to connect the processor 110 to peripheral devices such as the display 150, camera 153, and the like. The MIPI interfaces include camera serial interfaces (camera serial interface, CSI), display serial interfaces (display serial interface, DSI), and the like. In some embodiments, the processor 110 and the camera 153 communicate through a CSI interface to implement the photographing function of the first electronic device 100. The processor 110 and the display 150 communicate via a DSI interface to implement the display functionality of the first electronic device 100.

The GPIO interface may be configured by software. The GPIO interface may be configured as a control signal or as a data signal. In some embodiments, a GPIO interface may be used to connect the processor 110 with the fast charge control module 143, the camera 153, the display 150, the wireless communication module 160, the audio module 170, the sensor module 180, and the like. The GPIO interface may also be configured as an I2C interface, an I2S interface, a UART interface, an MIPI interface, etc.

The USB interface 130 is an interface conforming to the USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, or the like. The USB interface 130 may be used to connect a charger to charge the first electronic device 100; may also be used to transfer data between the first electronic device 100 and a peripheral device; the device can also be used for connecting headphones, and playing audio through the headphones; and the device can also be used for connecting other electronic devices (such as mobile phones and the like) to supply power for the other electronic devices.

It should be understood that the above-mentioned interfacing relationship between the modules is only schematically illustrated, and does not limit the structure of the first electronic device 100. In other embodiments of the present application, the first electronic device 100 may also adopt different interfacing manners in the above embodiments, or a combination of multiple interfacing manners.

The charge management module 140 is configured to receive a charge input from a charger. The charger can be a wireless charger or a wired charger. In some wired charging embodiments, the charge management module 140 may receive a charging input of a wired charger through the USB interface 130. In some wireless charging embodiments, the charge management module 140 may receive wireless charging input through a wireless charging coil of the first electronic device 100. It is understood that the battery 142 is charged by the charging management module 140, and the electronic device can be powered by the power management module 141.

The power management module 141 is used for connecting the battery 142, and the charge management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and/or the charge management module 140 and provides power to the processor 110, the internal memory 121, the display 150, the camera 153, the wireless communication module 160, and the like. The power management module 141 may also be configured to monitor battery capacity, battery cycle number, battery health (leakage, impedance) and other parameters. In other embodiments, the power management module 141 may also be provided in the processor 110. In other embodiments, the power management module 141 and the charge management module 140 may be disposed in the same device.

The fast charge control module 143 is used for connecting the USB interface 130, the power management module 141 and the EC in the processor 110. The fast charging control module 143 may be configured to, when the second electronic device accesses the first electronic device through the USB interface, and the fast charging control module 143 identifies that the second electronic device is a device supporting a fast charging protocol, perform negotiation of a charging voltage and a charging current with the second electronic device, and instruct the power management module to supply power to the second electronic device based on the negotiated charging voltage and charging current.

The wireless communication function of the first electronic device 100 may be implemented by the antenna 161, the wireless communication module 160, a modem processor, a baseband processor, and the like.

The antenna 161 is for transmitting and receiving electromagnetic wave signals.

The modem processor may include a modulator and a demodulator. The modulator is used for modulating the low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used for demodulating the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low frequency baseband signal to the baseband processor for processing. The low frequency baseband signal is processed by the baseband processor and then transferred to the application processor. The application processor outputs sound signals through an audio device (not limited to the speaker 170A, the receiver 170B, etc.), or displays images or videos through the display screen 150. In some embodiments, the modem processor may be a stand-alone device. In other embodiments, the modem processor may be separate from the processor 110 and located in the same device as the other functional modules.

The wireless communication module 160 may provide solutions for wireless communication including wireless local area network (wireless local area networks, WLAN) (e.g., wireless fidelity (wireless fidelity, wi-Fi) network), bluetooth (BT), global navigation satellite system (global navigation satellite system, GNSS), frequency modulation (frequency modulation, FM), near field wireless communication technology (near field communication, NFC), infrared technology (IR), etc., applied on the first electronic device 100. The wireless communication module 160 may be one or more devices that integrate at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 161, modulates the electromagnetic wave signals, filters the electromagnetic wave signals, and transmits the processed signals to the processor 110. The wireless communication module 160 may also receive a signal to be transmitted from the processor 110, frequency modulate it, amplify it, and convert it to electromagnetic waves for radiation via the antenna 161.

The first electronic device 100 implements display functions through a GPU, a display screen 150, an application processor, and the like. The GPU is a microprocessor for image processing, and is connected to the display 150 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 110 may include one or more GPUs that execute program instructions to generate or change display information.

The display screen 150 is used to display images, videos, and the like. The display 150 includes a display panel. The display panel may employ a liquid crystal display (liquid crystal display, LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED) or an active-matrix organic light-emitting diode (matrix organic light emitting diode), a flexible light-emitting diode (flex), a mini, a Micro led, a Micro-OLED, a quantum dot light-emitting diode (quantum dot light emitting diodes, QLED), or the like. In some embodiments, the first electronic device 100 may include 1 or N display screens 150, N being a positive integer greater than 1.

The first electronic device 100 may implement a photographing function through an ISP, a camera 153, a video codec, a GPU, a display screen 150, an application processor, and the like.

The ISP is used to process the data fed back by the camera 153. For example, when photographing, the shutter is opened, light is transmitted to the camera photosensitive element through the lens, the optical signal is converted into an electric signal, and the camera photosensitive element transmits the electric signal to the ISP for processing and is converted into an image visible to naked eyes. ISP can also optimize the noise, brightness and skin color of the image. The ISP can also optimize parameters such as exposure, color temperature and the like of a shooting scene. In some embodiments, the ISP may be provided in the camera 153.

The camera 153 is used to capture still images or video. The object generates an optical image through the lens and projects the optical image onto the photosensitive element. The photosensitive element may be a charge coupled device (charge coupled device, CCD) or a Complementary Metal Oxide Semiconductor (CMOS) phototransistor. The photosensitive element converts the optical signal into an electrical signal, which is then transferred to the ISP to be converted into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard RGB, YUV, or the like format. In some embodiments, the first electronic device 100 may include 1 or N cameras 153, N being a positive integer greater than 1.

The digital signal processor is used for processing digital signals, and can process other digital signals besides digital image signals. For example, when the first electronic device 100 selects a frequency bin, the digital signal processor is used to fourier transform the frequency bin energy, or the like.

Video codecs are used to compress or decompress digital video. The first electronic device 100 may support one or more video codecs. Thus, the first electronic device 100 can play or record video in various encoding formats, for example, moving picture experts group (moving picture experts group, MPEG) 1, MPEG2, MPEG3, MPEG4, etc.

The NPU is a neural-network (NN) computing processor, and can rapidly process input information by referencing a biological neural network structure, for example, referencing a transmission mode between human brain neurons, and can also continuously perform self-learning. Applications such as intelligent recognition of the first electronic device 100, for example, image recognition, face recognition, voice recognition, text understanding, etc., may be implemented by the NPU.

The external memory interface 120 may be used to connect an external memory card, such as a Micro SD card, to enable expansion of the memory capabilities of the first electronic device 100. The external memory card communicates with the processor 110 through an external memory interface 120 to implement data storage functions. For example, files such as music, video, etc. are stored in an external memory card.

The internal memory 121 may be used to store computer executable program code including instructions. The internal memory 121 may include a storage program area and a storage data area. The storage program area may store an application program (such as a sound playing function, an image playing function, etc.) required for at least one function of the operating system, etc. The storage data area may store data created during use of the first electronic device 100 (e.g., audio data, phonebook, etc.), and so on. In addition, the internal memory 121 may include a high-speed random access memory, and may further include a nonvolatile memory such as at least one magnetic disk storage device, a flash memory device, a universal flash memory (universal flash storage, UFS), and the like. The processor 110 performs various functional applications of the first electronic device 100 and data processing by executing instructions stored in the internal memory 121 and/or instructions stored in a memory provided in the processor.

The first electronic device 100 may implement audio functions through an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, an application processor, and the like. Such as music playing, recording, etc.

The audio module 170 is used to convert digital audio information into an analog audio signal output and also to convert an analog audio input into a digital audio signal. The audio module 170 may also be used to encode and decode audio signals. In some embodiments, the audio module 170 may be disposed in the processor 110, or a portion of the functional modules of the audio module 170 may be disposed in the processor 110.

The speaker 170A, also referred to as a "horn," is used to convert audio electrical signals into sound signals. The first electronic device 100 may listen to music, or to hands-free calls, through the speaker 170A.

A receiver 170B, also referred to as a "earpiece", is used to convert the audio electrical signal into a sound signal. When the first electronic device 100 is answering a telephone call or voice message, voice can be received by placing the receiver 170B close to the human ear.

Microphone 170C, also referred to as a "microphone" or "microphone", is used to convert sound signals into electrical signals. When making a call or transmitting voice information, the user can sound near the microphone 170C through the mouth, inputting a sound signal to the microphone 170C. The first electronic device 100 may be provided with at least one microphone 170C. In other embodiments, the first electronic device 100 may be provided with two microphones 170C, and may implement a noise reduction function in addition to collecting sound signals. In other embodiments, the first electronic device 100 may further be provided with three, four or more microphones 170C to enable collection of sound signals, noise reduction, identification of sound sources, directional recording, etc.

The earphone interface 170D is used to connect a wired earphone. The headset interface 170D may be a USB interface 130 or a 3.5mm open mobile electronic device platform (open mobile terminal platform, OMTP) standard interface, a american cellular telecommunications industry association (cellular telecommunications industry association of the USA, CTIA) standard interface.

The temperature sensor 180A is used to detect temperature. In some embodiments, the first electronic device 100 performs a temperature processing strategy using the temperature detected by the temperature sensor 180A. For example, when the temperature reported by the temperature sensor 180A exceeds a threshold, the first electronic device 100 performs a reduction in performance of a processor located in the vicinity of the temperature sensor 180A in order to reduce power consumption to implement thermal protection. In other embodiments, when the temperature is below another threshold, the first electronic device 100 heats the battery 142 to avoid the low temperature causing the first electronic device 100 to be abnormally shut down. In other embodiments, when the temperature is below a further threshold, the first electronic device 100 performs boosting of the output voltage of the battery 142 to avoid abnormal shutdown caused by low temperatures.

It is to be understood that the structure illustrated in fig. 1 does not constitute a specific limitation on the first electronic device 100. In other embodiments, the first electronic device 100 may include more or fewer components than shown, or combine certain components, or split certain components, or a different arrangement of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

Fig. 2 is a schematic circuit diagram of a first electronic device according to an embodiment of the application. As shown in fig. 2, the fast charge control module 143 in the first electronic device 100 may include a first chip U1 and a first switching device S1.

The first chip U1 may be a chip supporting a fast charging protocol (hereinafter referred to as a fast charging protocol). Illustratively, the fast charge protocol may include a super charge protocol (super charge protocol, SCP). It can be understood that, since the first chip U1 supports the fast charging protocol, the first electronic device has a reverse fast charging function, that is, when the first electronic device is used as a charger, the first electronic device can be charged fast for other electronic devices.

Specifically, the first data pin d1+ of the first chip U1 may be connected with the first differential data pin d+ of the USB interface 130, the second data pin D1-of the first chip U1 may be connected with the second differential data pin D-of the USB interface 130, and the first switching device S1 may be connected between the first differential data pin d+ and the second differential data pin D-of the USB interface 130. In addition, the GPIO interface GPIO1 of the first chip U1 may be connected to the GPIO interface CPIO2 of the EC, the I2C interface of the first chip U1 (including the pin SCL1 and the pin SDA) may be connected to the I2C interface of the EC (including the pin SCL2 and the pin SDA 2), and the first chip U1 may be further connected to the power management module 141.

When the first chip U1 detects that the second electronic device accesses the first electronic device through the USB interface 130, the first chip U1 may determine whether the second electronic device is a target device supporting the fast charging function. In the case that the first chip U1 determines that the second electronic device is the target device, the first chip U1 may enter the SCP mode and inform the second electronic device that the first chip U1 is ready to receive the charge negotiation data from the second electronic device. And then, the first electronic device and the second electronic device enter a charging negotiation process to negotiate charging information of the second electronic device.

For example, the charging information of the second electronic device may include a charging current and a charging voltage of the second electronic device, and the like.

The charge negotiation data from the second electronic device may include a read data instruction, a write data instruction, and the like.

The read command may be used to read power information of the first electronic device. The power supply information of the first electronic device may include, for example, a maximum output voltage, a maximum output current, a minimum output voltage, a minimum output current, and the like of the first electronic device.

The data writing instruction can be used for writing the charging current, the charging voltage and the like of the second electronic device, which are determined by negotiation between the first electronic device and the second electronic device, into the first chip U1.

In practical application, after the first electronic device negotiates with the second electronic device about the charging information of the second electronic device, the first chip U1 in the first electronic device may send the negotiated charging information to the power management module 141, so as to control the power management module 141 to charge the second electronic device with the negotiated charging voltage and charging current.

It should be noted that, in the process of negotiating the charging information of the second electronic device between the first electronic device and the second electronic device, the second electronic device may send a plurality of data reading instructions or data writing instructions to the first chip U1. When the first chip U1 receives a read data instruction or a write data instruction from the second electronic device, the read data instruction or the write data instruction is transmitted to the EC, the EC processes the read data instruction or the write data instruction, and a corresponding register in the first chip U1 is configured based on the read data instruction or the write data instruction so as to control the first chip U1 to respond to the read data instruction or the write data instruction.

However, the default operating frequency of the EC is generally low, typically 9.2 megahertz (MHz), and if the EC performs data processing at the default operating frequency, for each read data command or write data command, the duration from when the EC receives the read data command or write data command to when the first chip U1 responds to the read data command or write data command is about 25 milliseconds (ms), and exceeds the upper limit of the time for the second electronic device to wait for the response (typically 6 ms), which may result in that the charge negotiation process between the first electronic device and the second electronic device cannot be performed normally.

Based on the above, in the embodiment of the application, the main frequency of the EC is increased from the first frequency to the second frequency in the startup initialization process, so that the data processing efficiency of the EC is greatly improved, the data response time of the first electronic device can be shortened, the second electronic device can receive the response data sent by the first electronic device in a specified time, the smooth proceeding of the charging negotiation process between the first electronic device and the second electronic device is ensured, the quick charging of the second electronic device by the first electronic device is realized, and the charging experience of a user when charging the second electronic device by the first electronic device is improved.

Referring to fig. 3, a schematic flowchart of a charging method according to an embodiment of the present application may include S301 to S303, which are described in detail as follows:

s301: and in the starting initialization process of the first electronic equipment, the main frequency of the EC is increased from the first frequency to the second frequency.

The first frequency may be a default operating frequency of the EC. The default operating frequency of the EC may be, for example, 9.2 megahertz (MHz).

The second frequency is greater than the first frequency. The second frequency may be set according to actual requirements, and is not particularly limited herein. The second frequency may be, for example, 64.5MHz.

In this embodiment, the data processing efficiency of the EC may be improved by adjusting the primary frequency of the EC from the first frequency to the second frequency.

S302: after the first electronic equipment is started, if the second electronic equipment is detected to be accessed, the first electronic equipment charges the second electronic equipment with first power in a first period of time after the second electronic equipment is accessed; during a first period, the EC processes charge negotiation data between the first electronic device and the second electronic device at a second frequency.

In an optional implementation manner, after the first electronic device is started, if the second electronic device is detected to be connected, the first electronic device may directly charge the second electronic device with the first power in a first period after the second electronic device is connected.

The first period may be a period during which a charge negotiation process between the first electronic device and the second electronic device continues. That is, the first electronic device negotiates charging information of the second electronic device with the second electronic device in the first period. The charging information of the second electronic device may include, but is not limited to, a target charging voltage and a target charging current of the second electronic device, and the like.

In another optional implementation manner, in order to ensure that the first electronic device has enough electric quantity for normal operation, after the first electronic device is started, the second electronic device can be charged with the first power in a first period when the second electronic device is detected to be connected and the power state of the first electronic device meets a reverse slow charging condition.

For example, the power state of the first electronic device may satisfy the reverse slow charge condition, where the remaining power of the first electronic device is greater than the second power threshold. The second charge threshold may be, for example, 20% of full charge.

In a specific implementation, the first electronic device charging the second electronic device with the first power may include:

the first electronic device outputs a first charging voltage and a first charging current to the second electronic device.

Wherein the product of the first charging voltage and the first charging current is equal to the first power. For example, the first power may be 10 watts (W), based on which the first charging voltage may be 5V and the first charging current may be 2A.

It is understood that in some embodiments, before the first electronic device negotiates charging information of the second electronic device with the second electronic device, the first electronic device may identify whether the second electronic device is a target device supporting the fast charging function. And under the condition that the second electronic equipment is the target equipment, the first electronic equipment and the second electronic equipment carry out a charging negotiation process.

Based on this, in another embodiment of the present application, after the first electronic device detects that the second electronic device is connected, the charging method may further include S401 to S404 as shown in fig. 4 before the first electronic device negotiates charging information of the second electronic device with the second electronic device. S401 to S404 may be performed by a first chip in the first electronic device, for example.

S401, detecting the voltage on a power pin VBUS of a USB interface of the first electronic device.

S402, under the condition that the voltage on the power supply pin VBUS is greater than or equal to a first voltage threshold value, shorting the first differential data pin D+ and the second differential data pin D-of the USB interface.

The first voltage threshold is a voltage lower limit value capable of supporting smooth progress of a charging negotiation process between the first electronic device and the second electronic device. The first voltage threshold may be, for example, 5V.

In a specific implementation manner, the step of shorting the first differential data pin d+ and the second differential data pin D-of the USB interface may specifically include:

the first switching device S1 connected between the first differential data pin d+ and the second differential data pin D-is controlled to be closed.

S403, detecting the voltage on the first differential data pin D+ of the USB interface.

S404, under the condition that the voltage on the first differential data pin D+ of the USB interface is continuously longer than the second voltage threshold value, determining the second electronic device as the target device, and disconnecting the connection between the first differential data pin D+ and the second differential data pin D-of the USB interface.

The first duration may be set according to actual requirements. Illustratively, the first duration may be 1 second(s).

The second voltage threshold may be set according to actual requirements. The second voltage threshold may be, for example, 0.5V to 0.7V.

In a specific application, the second differential data pin D-of the USB interface is connected to ground through a resistor, so after the first electronic device disconnects the first differential data pin d+ of the USB interface from the second differential data pin D-, the second differential data pin D-of the USB interface is pulled down, so that the second electronic device can learn that the first chip in the first electronic device has entered the SCP mode, i.e. the first electronic device is ready to receive the charging negotiation data.

In a specific implementation, the interaction flow involved in the charging negotiation process between the first electronic device and the second electronic device may include S501 to S502 shown in fig. 5. Alternatively, the first electronic device may execute S501 to S502 after S401 to S404 are executed. S501 may include S5011 to S5013, which are described in detail below:

s5011, the first chip configures a register for managing an operation mode of the first chip inside.

The operation modes of the first chip may include a normal mode and an SCP mode, for example. When the value of the target bit of the register for managing the operation mode of the first chip is 1, it may indicate that the first chip is in the SCP mode; when the value of the target bit of the register for managing the operation mode of the first chip is 0, it may indicate that the first chip is in the normal mode. When the first chip is in SCP mode, the first chip can negotiate charging information with the second electronic device.

Based on this, the first chip configures a register therein for managing an operation mode of the first chip, and may include:

the first chip configures a value of a target bit of a register, which is internally used to manage an operation mode of the first chip, to 1.

S5012, the first chip configures a register for monitoring interrupt signals inside.

When the value of the target bit of the register for monitoring the interrupt signal is 1, it may indicate that the first chip needs to send a termination signal to the EC. Based on this, the first chip may configure the value of the target bit of the register whose interior is used to monitor the interrupt signal to 1.

S5013, the first chip sends an interrupt signal to the EC.

In the embodiment of the application, the purpose of the first chip sending the interrupt signal to the EC is to inform the EC that the first chip is ready to receive the charging negotiation data from the second electronic device.

For example, the charge negotiation data from the second electronic device may include a read data instruction, a write data instruction, and the like.

The data writing instruction can be used for writing the charging current, the charging voltage and the like of the second electronic device, which are determined by negotiation of the first electronic device and the second electronic device, into the first chip.

In addition, the charge negotiation data between the first electronic device and the second electronic device may further include charge negotiation data from the first electronic device. For example, the charge negotiation data from the first electronic device may include response data corresponding to the read data instruction and/or the write data instruction.

In a specific implementation, the first chip sends an interrupt signal to the EC, which may include: the first chip outputs a low-level signal to the EC through a GPIO interface connected with the EC so as to pull down the level at the corresponding GPIO interface in the EC.

It should be noted that the first chip may execute S5011, S5012, and S5013 simultaneously.

S502, the first chip receives a data reading instruction from the second electronic device.

S503, the EC acquires a data reading instruction sent by the second electronic device from the first chip.

In a specific implementation, the EC may obtain, from the first chip, a read data instruction sent by the second electronic device through an I2C interface connected to the first chip.

S504, the EC configures a register for managing data interaction in the first chip based on the data reading instruction.

The registers in the first chip for managing data interactions may include, for example, a response identification register, a response data length register, a response data value register, and a response data status register.

The response identification register is used for recording whether the read data instruction or the write data instruction responds.

The response data length register is used for recording the length of response data corresponding to the read data instruction.

The response data value register is used for recording the value of response data corresponding to the read data instruction.

The response data status register is used to record whether the response data is ready to be completed.

For example, the EC may determine response data corresponding to the read data instruction based on the read data instruction, and configure a register in the first chip for managing data interaction based on the response data.

S505, the first chip returns response data corresponding to the read data instruction to the second electronic device.

After the register for managing data interaction in the first chip is configured, the first chip actively returns response data corresponding to the data reading instruction to the second electronic device.

S506, the first chip receives a data writing instruction from the second electronic device.

S507, the EC acquires a write data instruction from the first chip.

In a specific implementation, the EC may obtain the data writing instruction sent by the second electronic device from the first chip through an I2C interface connected to the first chip.

S508, the EC configures a register for managing data interaction in the first chip based on the data writing instruction.

S509, the first chip responds to the write data instruction.

After the register used for managing data interaction in the first chip is configured, the first chip can actively respond to the data writing instruction to inform the second electronic device that the data corresponding to the data writing instruction is written.

It should be noted that, in the charging negotiation process, the second electronic device generally sends a plurality of data reading instructions or data writing instructions to the first electronic device, so that in the charging negotiation process, the EC and the first chip in the first electronic device may poll and execute the above-mentioned S502 to S509. For example, please refer to fig. 6, which is a schematic diagram of signal waveforms involved in a charge negotiation process according to an embodiment of the present application. Wherein XH1 may be a voltage waveform at a GPIO interface in EC for receiving an interrupt signal, and XH2 may be a voltage waveform of a data signal transmitted between the first chip and the second electronic device. It can be seen that the data interaction between the first electronic device and the second electronic device is only performed if the level at the GPIO interface for receiving the interrupt signal in the EC is pulled low.

The first electronic device adjusts the main frequency of the EC to the second frequency when the first electronic device is started and initializes, and adjusts the communication rate of the data interface used for transmitting the charging negotiation data in the EC to the second rate, so that in the charging negotiation process, the EC can process data at the second frequency and acquire a data reading instruction or a data writing instruction from the first chip at the second rate, or can configure a register used for managing data interaction in the first chip at the second rate. In this way, the duration from the time when the first electronic device receives the read data instruction or the write data instruction to the time when the first electronic device responds to the read data instruction or the write data instruction is less than the upper time limit when the second electronic device waits for the response, so that the charging negotiation process can be smoothly performed.

S303: after the second electronic device is accessed for a first period of time, under the condition that the power state of the first electronic device meets a reverse fast charging condition, the first electronic device charges the second electronic device with the second power.

The first period may refer to after the charging negotiation process between the first electronic device and the second electronic device is completed.

In an alternative implementation, the power state of the first electronic device meeting the reverse fast charging condition may be, for example, that the first electronic device is connected to a charger. That is, in the case where the first electronic device is connected to the charger, the first electronic device can always charge the second electronic device quickly.

In another optional implementation manner, the power state of the first electronic device may, for example, be that the first electronic device is not connected to the charger and the remaining power of the first electronic device is greater than or equal to the first power threshold.

The first power threshold may be set according to actual requirements, and is not particularly limited herein. For example, the first charge threshold may be 30% of full charge.

The second power may be a charging power determined by the first electronic device negotiating with the second electronic device during the first period. The second power is greater than the first power. Illustratively, the second power may be 20W or 18W, etc.

In a specific implementation, the first electronic device charging the second electronic device with the second power may include:

the first electronic device outputs a second charging voltage and a second charging current to the second electronic device.

Wherein the product of the second charging voltage and the second charging current is equal to the second power.

Optionally, the second charging voltage is greater than the first charging voltage, and the second charging current is equal to the first charging current. For example, the second power may be 18W, wherein the second charging voltage may be 9A and the second charging current may be 2A.

Optionally, the second charging voltage is equal to the first charging voltage, and the second charging current is greater than the first charging current. For example, the second power may be 20W, wherein the second charging voltage may be 5A and the second charging current may be 4A.

Optionally, the second charging voltage is greater than the first charging voltage, and the second charging current is greater than the first charging current. For example, the second power may be 36W, wherein the second charging voltage may be 9A and the second charging current may be 4A.

As can be seen from the above, in the embodiment of the present application, by adjusting the main frequency of the EC from the first frequency to the second frequency during the startup initialization, the data processing efficiency of the EC is greatly improved, so that the data response time of the first electronic device can be shortened, the second electronic device can receive the response data sent by the first electronic device within a specified time, smooth progress of the charging negotiation process between the first electronic device and the second electronic device is ensured, thereby realizing rapid charging of the second electronic device by the first electronic device, and improving the charging experience when the user charges the second electronic device by the first electronic device.

With continued reference to fig. 3, in yet another embodiment of the present application, the charging method may further include S304, which is described in detail below:

S304, the first electronic device increases the communication rate of the data interface for transmitting the charging negotiation data in the EC from the first rate to the second rate in the startup initialization process.

Illustratively, in connection with fig. 2, the data interface in the EC for transmitting the charging negotiation data may be any set of idle I2C interfaces in the EC for connecting the first chip U1. The first rate may be a default communication rate of the I2C interface. The second rate is greater than the first rate. For example, the first rate may be 100 kilohertz (kHz) and the second rate may be 1MHz.

For example, the communication rate of the data interface in the EC for transmitting the charge negotiation data may be adjusted to the second rate by writing a register value corresponding to the second rate to the second register in the EC.

According to the method, the communication rate of the data interface used for transmitting the charging negotiation data in the EC is increased from the first rate to the second rate, so that the data response speed of the first electronic device is further improved, the charging negotiation process can be completed more rapidly by the first electronic device and the second electronic device, and the quick charging efficiency of the first electronic device to the second electronic device is improved.

The execution sequence of S301 and S304 is not limited in this embodiment. That is, the first electronic device may execute S301 first, and then execute S304; alternatively, the first electronic device may execute S304 first, and then execute S301; alternatively still, the first electronic device may perform S301 and S304 simultaneously.

With continued reference to fig. 3, in still another embodiment of the present application, after the first period after the second electronic device is accessed, the charging method may further include S305, which is described in detail below:

s305, after the second electronic device is accessed for a first period of time, under the condition that the power state of the first electronic device does not meet the reverse fast charging condition and the reverse slow charging condition is met, the first electronic device charges the second electronic device with the first power.

In a specific implementation manner, the power state of the first electronic device does not meet the reverse fast charging condition, and the satisfaction of the reverse slow charging condition may be that the first electronic device is not connected to the charger, and the remaining power of the first electronic device is smaller than the first power threshold and greater than or equal to the second power threshold.

With continued reference to fig. 3, in still another embodiment of the present application, after the first period after the second electronic device is accessed, the charging method may further include S306, which is described in detail below:

And S306, after the first period of time after the second electronic device is accessed, stopping charging the second electronic device by the first electronic device under the condition that the power state of the first electronic device does not meet the reverse slow charging condition.

In a specific implementation manner, the power state of the first electronic device does not meet the reverse slow charging condition may be that the remaining power of the first electronic device is less than the second power threshold.

As can be seen from the above, the charging method provided in this embodiment can switch and control the charging mode of the first electronic device for charging the second electronic device based on the power state of the first electronic device, so that not only can the charging of the second electronic device be realized, but also the normal operation of the first electronic device can be prevented from being affected.

With continued reference to fig. 3, in still another embodiment of the present application, after the first electronic device charges the second electronic device with the second power, the charging method may further include S307, which is described in detail below:

s307, the first electronic device reduces the main frequency of the EC from the second frequency to the first frequency.

In yet another embodiment of the present application, after the first electronic device charges the second electronic device with the second power, the charging method may further include S308, which is described in detail below:

S308, the first electronic device decreases the communication rate of the data interface for transmitting the charge negotiation data in the EC from the second rate to the first rate.

Note that, the execution order of S307 and S308 is not particularly limited in the embodiment of the present application. The first electronic device may execute S307 first, and then execute S308; the first electronic device may execute S308 first, and then execute S307; the first electronic device may also perform S307 and S308 simultaneously.

According to the method, after the first electronic device and the second electronic device complete the charging negotiation process, the main frequency of the EC is restored to the first frequency, and the communication rate of the data interface used for transmitting the charging negotiation data in the EC is restored to the first rate, so that the EC can process other non-fast charging events conveniently.

In still another embodiment of the present application, in order to facilitate the control of the charging manner in which the first electronic device charges the second electronic device by the user, as shown in fig. 7, a housekeeping application may be installed in the application layer of the first electronic device.

The housekeeping application may interact with the EC of the hardware layer.

For example, the EC may report power state information or operational state information, etc., of the first electronic device to the housekeeping application. The manager application can output a control instruction to the EC based on the power state information or the working state information of the first electronic device, and the EC can realize corresponding control of the first electronic device by executing the control instruction.

The power state information may be used to describe a remaining power of the first electronic device, a connection status of the charger, and the like.

The operation state information may be used to describe an operation state in which the first electronic device is located, and the operation state of the first electronic device may include an operation state (S0 state), a standby state (S3 state), a sleep state (S4 state), a shutdown state (S5 state), and the like, for example.

A switch control for turning on or off the reverse fast charge function of the first electronic device may be provided in the housekeeping application.

Based on the above, when the user needs to use the first electronic device to charge the second electronic device quickly, the user can put the switch control in an on state in the application of the housekeeper so as to start the reverse quick charging function of the first electronic device; when the user needs to close the reverse fast-charging function of the first electronic device, the user can put the switch control in a closing state in the housekeeping application so as to close the reverse fast-charging function of the first electronic device.

It should be noted that, when the reverse fast charging function of the first electronic device is in an on state, the first electronic device may perform a charging negotiation process with the second electronic device, and the first electronic device may perform fast charging for the second electronic device. When the reverse quick charging function of the first electronic equipment is in a closed state, the first electronic equipment does not carry out a charging negotiation process with the second electronic equipment, and the first electronic equipment charges the second electronic equipment with the first power all the time.

Specifically, when the reverse quick charging function of the first electronic device is in an on state, the housekeeper application may send first indication information to the EC to instruct the EC to control the first chip and the second electronic device to perform a charging negotiation process, so as to control the first electronic device to perform quick charging for the second electronic device. When the reverse quick charging function of the first electronic device is in a closed state, the housekeeper application can send second indication information to the EC so as to instruct the EC to control the first chip to stop data interaction with the second electronic device, and therefore the first electronic device is controlled to stop quick charging for the second electronic device.

Based on the same technical idea, the embodiment of the present application also provides a computer-readable storage medium storing a computer-executable program that, when called by a computer, causes the computer to perform one or more steps of any one of the flowcharts shown in fig. 3 to 5.

Based on the same technical concept, the embodiment of the present application further provides a chip system, including a processor, where the processor is coupled to the memory, and the processor executes a computer executable program stored in the memory to implement one or more steps in any one of the processes shown in fig. 3 to 5. The chip system can be a single chip or a chip module composed of a plurality of chips.

Based on the same technical idea, an embodiment of the present application further provides a computer executable program product, which when run on an electronic device, causes the electronic device to perform one or more steps of any one of the flows shown in fig. 3 to 5.

In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference may be made to related descriptions of other embodiments. It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not limit the implementation process of the embodiment of the present application.

In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, produces a flow or function in accordance with embodiments of the present application, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in or transmitted across a computer-readable storage medium. The computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital subscriber line), or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a Solid State Disk (SSD)), or the like.

Those of ordinary skill in the art will appreciate that implementing all or part of the above-described method embodiments may be accomplished by a computer program to instruct related hardware, the program may be stored in a computer readable storage medium, and the program may include the above-described method embodiments when executed. And the aforementioned storage medium includes: ROM or random access memory RAM, magnetic or optical disk, etc.

The foregoing is merely a specific implementation of the embodiment of the present application, but the protection scope of the embodiment of the present application is not limited to this, and any changes or substitutions within the technical scope disclosed in the embodiment of the present application should be covered in the protection scope of the embodiment of the present application. Therefore, the protection scope of the embodiments of the present application shall be subject to the protection scope of the claims.

Claims

1. A charging method, applied to a first electronic device, comprising:

2. The charging method according to claim 1, characterized by further comprising:

3. The charging method according to claim 1 or 2, wherein the charging the second electronic device with the second power in a case where the power supply state satisfies a reverse fast charging condition includes:

4. The charging method according to claim 1 or 2, wherein the charging the second electronic device with the second power in a case where the power supply state satisfies a reverse fast charging condition includes:

5. The charging method according to any one of claims 1 to 4, characterized by further comprising:

6. The charging method according to claim 5, wherein charging the second electronic device with the first power in a case where the power supply state does not satisfy the reverse fast charging condition and a reverse slow charging condition is satisfied, comprises:

7. The charging method according to any one of claims 1-6, wherein charging the second electronic device with the first power for a first period of time after the second electronic device is connected if the second electronic device is detected to be connected, comprises:

8. The charging method according to claim 7, wherein, in the case where the second electronic device is detected to be connected, and the power state of the first electronic device satisfies a reverse slow charging condition, charging the second electronic device with the first power in a first period after the second electronic device is connected, includes:

9. The charging method according to any one of claims 1 to 8, characterized by further comprising:

and stopping charging the second electronic equipment under the condition that the power supply state does not meet the reverse slow charging condition.

10. The charging method according to claim 8, wherein the stopping the charging of the second electronic device in the case where the power supply state does not satisfy a reverse slow charging condition includes:

11. The charging method according to any one of claims 1 to 10, characterized by further comprising, after the charging of the second electronic device with the second power:

12. The charging method of claim 2, further comprising, after said charging said second electronic device with said second power:

the communication rate is reduced from the second rate to the first rate.

13. An electronic device, comprising:

one or more processors;

one or more memories;

the one or more memories store one or more computer-executable programs comprising instructions that, when executed by the one or more processors, cause the electronic device to perform the steps in the charging method of any of claims 1-12.

14. The electronic device of claim 13, wherein the processor comprises an embedded controller; the electronic equipment further comprises a quick charge control module, a battery, a power management module and a USB interface;

15. A computer readable storage medium, characterized in that the computer readable storage medium stores a computer executable program which, when called by a computer, causes the computer to perform the steps of the charging method according to any one of claims 1-12.

16. A system on a chip, comprising a processor coupled to a memory for storing computer program instructions that, when executed by the processor, cause the system on a chip to perform the steps of the charging method according to any one of claims 1-12.