CN117133803A

CN117133803A - GaN HEMT device with gate structure of SBD diode and manufacturing method thereof

Info

Publication number: CN117133803A
Application number: CN202310716425.1A
Authority: CN
Inventors: 吴龙江
Original assignee: Shenzhen Sirius Semiconductor Co ltd
Current assignee: Shenzhen Sirius Semiconductor Co ltd
Priority date: 2023-06-15
Filing date: 2023-06-15
Publication date: 2023-11-28

Abstract

The application discloses a GaN HEMT device with a gate structure of an SBD diode and a manufacturing method thereof, wherein the GaN HEMT device comprises the following components from bottom to top: the GaN-based semiconductor device comprises a substrate, a GaN buffer layer, an AlGaN barrier layer and an insulating layer; a groove is etched between the insulating layer and the AlGaN barrier layer, and gate ohmic metal and SBD metal are sequentially deposited on the groove from inside to outside; the gate ohmic metal at the bottom of the recess is etched with a notch through which the SBD metal contacts the AlGaN barrier layer. According to the application, under the condition of being compatible with GaN HEMT gate recess technology, one SBD photomask is added, so that the GaN HEMT gate is connected with one SBD diode in series, and the gate leakage problem of the GaN HEMT device is reduced under the condition that only one low-resolution photomask is added.

Description

GaN HEMT device with gate structure of SBD diode and manufacturing method thereof

Technical Field

The application relates to the technical field of semiconductor devices, in particular to a GaN HEMT device with a gate structure of an SBD diode and a manufacturing method thereof.

Background

In recent years, alGaN/GaN HEMT devices have received wide attention because of their many excellent characteristics in the high frequency and high power application fields. Although AlGaN/GaN HEMTs have improved significantly in terms of material quality and device design, their reliability still suffers from a number of problems, such as: gate leakage/gate leakage problems for AlGaN/GaN HEMT devices.

In the study and practice of the prior art, the inventors of the present application found that: various mechanisms have been proposed to explain the reverse leakage problem of AlGaN/GaN schottky gates. Among them, trap-assisted tunneling (TAT), the Poole-Frenkel emission associated with conducting dislocations is two of the most dominant mechanisms in small electric fields. And when the electric field in the AlGaN barrier layer is large enough, the reverse gate leakage current is mainly due to Fowler-Nordheim (FN) tunneling. In order to reduce the reverse gate leakage of AlGaN/GaN HEMT devices, attempts have been made to introduce techniques such as gate dielectric layer, surface treatment, post Gate Annealing (PGA), etc. Although the processing modes can reduce the electric leakage of the AlGaN/GaN HEMT device to a certain extent, the processing method is complex and has huge cost.

Therefore, it is necessary to provide a GaN HEMT device with a gate structure of an SBD diode and a method for fabricating the same to solve the above-mentioned problems.

Disclosure of Invention

In order to solve at least one technical problem set forth above, the present application provides a GaN HEMT device with a gate structure of an SBD diode and a method for fabricating the same.

In a first aspect, a GaN HEMT device having a gate structure of an SBD diode is provided, the GaN HEMT device comprising, in order from a substrate layer upward in a longitudinal direction: a GaN buffer layer, an AlGaN barrier layer and an insulating layer;

a groove is etched between the insulating layer and the AlGaN barrier layer, and gate ohmic metal and SBD metal are sequentially deposited on the groove from inside to outside; the gate ohmic metal at the bottom of the recess is etched with a notch through which the SBD metal contacts the AlGaN barrier layer.

In this aspect, the GaN HEMT device is a gate recess GaN HEMT structure with gate diode. The threshold voltage is taken as a switch by the disappearance of the gate control 2DEG generation. And when the semiconductor is conducted, one SBD metal is contacted with GaN to form an SBD diode. The Diode can block the 2DEG from flowing to the gate, and reduce electric leakage when the SBD metal and the ohmic metal of the gate are turned off in a reverse bias mode.

By using the photomask of one SBD under the condition compatible with GaN HEMT gate recess technology, the GaN HEMT gate is connected with one SBD diode in series, so that the gate leakage problem of the GaN HEMT device is reduced under the condition that only one photomask with low resolution is added.

In one possible implementation, the GaN buffer layer is a high-resistance GaN buffer layer, including a GaN buffer region and a GaN channel upward from the substrate layer; and the AlGaN barrier layer comprises an unreflected n-AlGaN barrier layer and a flected n-AlGaN barrier layer upwards from the substrate layer.

In this possible implementation, the high-resistance GaN buffer layer material and AlGaN barrier layer material are sequentially arranged from the substrate material upward in the longitudinal direction (direction perpendicular to the heterojunction face).

In one possible implementation, a gate, a source and a drain are disposed on the upper surface of the GaN HEMT device; the grid is a Schottky contact electrode, and the source electrode and the drain electrode are ohmic contact electrodes formed by connecting with the 2DEG respectively, wherein the 2DEG is positioned in a channel on the side of the GaN buffer layer of the n-AlGaN/GaN heterojunction interface which is not etched back.

In this possible implementation, since the gate, the source and the drain are all fabricated on the upper surface of the device, the current formed by the 2DEG flows horizontally in the channel, and is therefore referred to as a lateral structure device. The device structure may be fabricated on different substrate materials by a heteroepitaxial growth technique (e.g., MOCVD technique) or an epitaxial structure transfer technique.

In one possible implementation, a layer of AlN material is interposed between the n-AlGaN barrier layer and the GaN buffer layer that are not etched back; and a layer of GaN cap layer material grows on the surface of the n-AlGaN barrier layer.

In this possible implementation, to reduce the scattering effect of alloy disorder in the AlGaN barrier layer on the 2DEG in the channel, a thin layer (about 1nm thick) of AlN material is interposed between the n-AlGaN barrier layer and the GaN buffer layer that are not etched back; in order to protect the AlGaN barrier layer from oxidation, a GaN cap layer material of about 3nm is grown on the surface of the etched-back n-AlGaN barrier layer.

In one possible implementation, the resolution of the mask used to etch the recess is greater than the resolution of the mask used to etch the notch.

In this possible implementation, the resolution of the mask used to etch the grooves is approximately twice the resolution of the mask used to etch the notches. Based on this, the leakage reduction benefit is obtained by adding only one mask.

In a second aspect, a method for manufacturing a GaN HEMT device having a gate structure of an SBD diode is provided, the method comprising:

sequentially epitaxially growing a GaN buffer layer and an AlGaN barrier layer from the substrate layer upwards in the longitudinal direction, and depositing an insulating layer on the AlGaN barrier layer;

etching a groove between the insulating layer and the AlGaN barrier layer, and depositing a layer of gate ohmic metal on the inner wall of the groove;

etching a notch on the gate ohmic metal at the bottom of the groove, wherein the notch is communicated with the AlGaN barrier layer;

and depositing SBD metal in the groove.

In one possible implementation, the GaN buffer layer is a high-resistance GaN buffer layer;

and (3) sequentially epitaxially growing a GaN buffer layer and an AlGaN barrier layer from the substrate layer upwards, wherein the GaN buffer layer and the AlGaN barrier layer comprise:

sequentially epitaxially growing a GaN buffer region, a GaN channel, an n-AlGaN barrier layer which is not etched back and an n-AlGaN barrier layer which is etched back from the substrate layer upwards; wherein,

growing an AlN inserting layer on the GaN channel;

and growing a GaN cap layer on the surface of the n-AlGaN barrier layer.

In one possible implementation manner, the manufacturing method further includes:

determining a source electrode and a drain electrode to-be-evaporated area, performing metal deposition on the source electrode and the drain electrode to-be-evaporated area, and performing annealing treatment to form an ohmic contact source electrode and a ohmic contact drain electrode; the source electrode and the drain electrode to-be-evaporated areas are etched to the upper part of the GaN channel;

and determining a grid electrode region to be evaporated, and performing metal deposition on the grid electrode region to be evaporated to form a grid electrode with Schottky contact.

In a third aspect, an electronic device is provided, comprising: the electronic device comprises a processor, a transmitting device, an input device, an output device and a memory, wherein the memory is used for storing computer program codes, the computer program codes comprise computer instructions, and when the processor executes the computer instructions, the electronic device executes the manufacturing method of any one of the above.

In a fourth aspect, a computer-readable storage medium is provided, in which a computer program is stored, the computer program comprising program instructions which, when executed by a processor of an electronic device, cause the processor to perform a method of making any one of the above.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

In order to more clearly describe the embodiments of the present application or the technical solutions in the background art, the following description will describe the drawings that are required to be used in the embodiments of the present application or the background art.

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the technical aspects of the disclosure.

Fig. 1 is a schematic structural diagram of a GaN HEMT device with a gate structure of an SBD diode according to an embodiment of the present application;

FIG. 2 is a schematic diagram of a gate recess GaN HEMT structure in the prior art;

fig. 3 is a process flow chart of a method for manufacturing a GaN HEMT device with a gate structure of an SBD diode according to an embodiment of the present application;

fig. 4 is a process flow diagram of a method of fabricating a gate recess GaN HEMT structure in the prior art.

Detailed Description

In order that those skilled in the art will better understand the present application, a technical solution in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

The terms first, second and the like in the description and in the claims and in the above-described figures are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.

The term "and/or" is herein merely an association relationship describing an associated object, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the term "at least one" herein means any one of a plurality or any combination of at least two of a plurality, for example, including at least one of A, B, C, and may mean including any one or more elements selected from the group consisting of A, B and C.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.

Furthermore, in the following detailed description, numerous specific details are set forth in order to provide a better illustration of the application. It will be understood by those skilled in the art that the present application may be practiced without some of these specific details. In some instances, well known methods, procedures, components, and circuits have not been described in detail so as not to obscure the present application.

Various mechanisms have been proposed to address the gate leakage/gate leakage problem of AlGaN/GaN HEMT devices to account for the reverse leakage problem of AlGaN/GaN schottky gates. Among them, trap-assisted tunneling (TAT), the Poole-Frenkel emission associated with conducting dislocations is two of the most dominant mechanisms in small electric fields. And when the electric field in the AlGaN barrier layer is large enough, the reverse gate leakage current is mainly due to Fowler-Nordheim (FN) tunneling. In order to reduce the reverse gate leakage of AlGaN/GaN HEMT devices, attempts have been made to introduce techniques such as gate dielectric layer, surface treatment, post Gate Annealing (PGA), etc. Although the processing modes can reduce the electric leakage of the AlGaN/GaN HEMT device to a certain extent, the processing method is complex and has huge cost.

Based on this, it is necessary to provide a GaN HEMT device with a gate structure of an SBD diode and a method for fabricating the same, in which a recess is etched between an insulating layer and an AlGaN barrier layer, and gate ohmic metal and SBD metal are sequentially deposited in the recess from inside to outside; the gate ohmic metal at the bottom of the recess is etched with a notch through which the SBD metal contacts the AlGaN barrier layer. By adding an SBD photomask, the GaN HEMT gate is connected with an SBD diode in series, so that the gate leakage problem of the GaN HEMT device is reduced.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a GaN HEMT device with a gate structure of an SBD diode according to an embodiment of the present application.

A GaN HEMT device having a gate structure of an SBD diode, comprising, in order from a substrate layer in a longitudinal direction, up: a GaN buffer layer, an AlGaN barrier layer and an insulating layer; a groove is etched between the insulating layer and the AlGaN barrier layer, and gate ohmic metal and SBD metal are sequentially deposited on the groove from inside to outside; the gate ohmic metal at the bottom of the recess is etched with a notch through which the SBD metal contacts the AlGaN barrier layer.

Among them, gallium nitride high electron mobility transistor GaN HEMTs (highelectron mobility transistors) are representative of Wide Bandgap (WBG) power semiconductor devices, which have great potential in high frequency power applications. GaN materials have higher electron mobility, saturated electron velocity, and breakdown electric field than Si and SiC. Due to material advantages, gaN power devices can achieve smaller on-resistance and gate charge (meaning better conduction and switching performance). Therefore, the GaN power device is more suitable for high-frequency application, and is very beneficial to improving the efficiency and the power density of the converter.

Among them, schottky barrier diode (SBD for short). Schottky diodes, also known as hot carrier diodes, are a type of semiconductor diode with low forward voltage drop and very fast switching action. When current flows through the schottky diode, there is a small voltage drop across the schottky diode terminals. The voltage drop of a common diode is between 0.6V-1.7V, while the voltage drop of a schottky diode is typically between 0.15V-0.45V.

This lower voltage drop provides better system efficiency and higher switching speed. In a schottky diode, a semiconductor-metal junction is formed between the semiconductor and the metal, thereby forming a schottky barrier. The N-type semiconductor serves as the cathode and the metal side serves as the anode of the diode. Such schottky barriers result in low forward voltage drops and very fast switching.

Schottky diodes are formed by connecting a doped semiconductor region (typically N-type) with a metal (e.g., gold, silver, platinum). Not the PN junction, but a metal-semiconductor. When a metal is bonded to an N-type semiconductor, an MS junction is formed. This junction is called a schottky barrier. The behavior of the schottky barrier will vary depending on whether the diode is in an unbiased, forward biased or reverse biased state.

The VI characteristics of the schottky barrier diode are similar to those of a normal PN junction diode, but the following differences still exist. The forward voltage drop of the schottky barrier diode is lower than that of a normal PN junction diode. The forward voltage drop of the schottky barrier diode made of silicon exhibits a forward voltage drop of 0.3 v to 0.5 v. The forward voltage drop increases with increasing n-type semiconductor doping concentration. The VI characteristics of schottky barrier diodes are steeper than those of normal PN junction diodes due to the high concentration of carriers.

It should be noted that, as the reverse bias voltage increases, the leakage current of the schottky diode increases far beyond the level of the current generated by the space charges in the depletion region, and when the schottky barrier diode is in reverse bias operation, there is a mirror force, so the schottky barrier height decreases.

The impurities unintentionally introduced in the growth process of the GaN buffer layer are mainly shallow donor impurities such as Si, O and the like, so that the GaN buffer layer usually shows an N-type background and the breakdown performance of the buffer layer is affected. For a GaN microwave power device, the GaN buffer layer not only needs to have low defect density, but also needs to have high resistance so as to reduce the electric leakage of the device and improve the breakdown characteristic and the frequency characteristic of the GaN HEMT.

Among them, an SiO2 thin film is taken as an example of the insulating layer. In the process of fabricating a thin film sensor on a conductive substrate, it is necessary to deposit an insulating film between the substrate and the thin film electrode. The silicon dioxide film has good insulating property, good stability, firm film layer and long-term use temperature of more than 1000 ℃. The current methods for preparing SiO2 film mainly include magnetron sputtering, ion beam sputtering, chemical vapor deposition, thermal oxidation method, gel-sol method, etc.

SiO2 thin films are widely used in the fields of semiconductors, microwaves, photoelectrons, optical devices, thin film sensors and the like by virtue of excellent performances. In microelectronics, siO2 films are used as diffusion masking layers, insulating gates for MOS devices, insulating spacers for multilayer wiring, passivation layers for device surfaces, and the like. The SiO2 film is also used for surface protection and antireflection coating of optical parts with its characteristics of low refractive index (n=1.458) and good light transmittance. In addition, the SiO2 film has good insulativity, stability and mechanical characteristics, high hardness, fine structure, firm film layer, wear resistance, corrosion resistance and high melting point, and is used for an insulating layer of the multilayer film sensor.

In this embodiment, the GaN HEMT device is a gate recess GaN HEMT structure with gate diode. The threshold voltage is taken as a switch by the disappearance of the gate control 2DEG generation. And when the semiconductor is conducted, one SBD metal is contacted with GaN to form an SBD diode. The Diode can block the 2DEG from flowing to the gate, and reduce electric leakage when the SBD metal and the ohmic metal of the gate are turned off in a reverse bias mode.

Referring to fig. 2, fig. 2 is a schematic diagram of a gate recess GaN HEMT structure in the prior art. In GaN HEMT (gallium nitride high electron mobility transistor), gate recess is a common manufacturing technology, which can improve carrier mobility and capacitance of the device, so as to improve performance of the device. The gate recess is formed on the GaN material by chemical etching or physical etching. The gate recess region can separate the gate from the channel region, thereby reducing the surface defect density of the channel region and improving the carrier mobility and capacitance. gate access also has the advantage of controlling the depth and shape of the channel region, further tuning the device characteristics. In general, the choice of gate depth depends on the application requirements of the device. For example, in high power applications, the depth of gate stress may be increased, thereby improving the device's voltage endurance and reliability.

Therefore, the gate stress can improve the performance of the GaN HEMT, and the gate stress can reduce the surface defect density of the channel region and improve the carrier mobility and the capacitance value, so that the performance and the reliability of the device are improved.

The GaN HEMT has the problem of gate leakage, and if a diode is connected in series to the gate terminal, the gate leakage at the time of closing can be reduced. According to the embodiment, one SBD photomask is added under the condition compatible with the GaN HEMT gate recess process, so that the GaN HEMT gate is connected with one SBD diode in series, and the gate leakage problem of the GaN HEMT device is reduced under the condition that only one low-resolution photomask is added.

It will be appreciated that the device structure may be fabricated on a different substrate material, such as a SiC substrate, a sapphire substrate, a Si substrate, a GaN substrate, a diamond substrate, or other suitable substrate material, by a heteroepitaxial growth technique (such as MOCVD technique) or an epitaxial structure transfer technique.

In this possible implementation, the epitaxial structure comprises: the substrate (sapphire or silicon carbide is commonly used at present), the GaN buffer layer, the GaN channel layer and the 20-30 nmAlxGa1-xN barrier layer, wherein x is generally 0.20-0.30.

In one possible implementation, a gate, a source and a drain are disposed on the upper surface of the GaN HEMT device; the grid is a Schottky contact electrode, and the source electrode and the drain electrode are ohmic contact electrodes formed by connecting with the 2DEG respectively, wherein the 2DEG is positioned in a channel on the GaN buffer layer side of the AlGaN/GaN heterojunction interface.

Among them, alGaN/GaNSBD works on the principle that the unidirectional conductivity of metal-semiconductor schottky contact is utilized, and when a metal contacts AlGaN/GaN, a potential barrier is formed on the metal side. Unlike common bulk materials, at the AlGaN/GaN heterojunction interface, the energy bands are abrupt due to the difference of the forbidden bandwidths of AlGaN and GaN, and the polarization effect generated by the abrupt change causes a quasi-triangle potential well to be formed at the interface, and a large number of electrons are confined in the triangle well. These electrons are quantized in a direction perpendicular to the heterojunction interface and free to move in a direction parallel to the heterojunction interface, which is a two-dimensional electron gas (2 DEG). The 2DEG has extremely high concentration and electron mobility, making AlGaN/GaN heterojunction structure the best choice for fabricating lateral GaN-based SBD devices.

In this embodiment, a gate recess GaN HEMT structure with gate diode, the threshold voltage is taken as a switch by the disappearance of the gate control 2DEG generation. And when the metal is turned on, one SBD metal is contacted with GaN to form an SBD diode. The Diode can block the 2DEG from flowing to the gate, and reduce electric leakage when the SBD metal and the ohmic metal of the gate are turned off in a reverse bias mode.

In this embodiment, the two-dimensional electron gas (2 DEG) density in the channel can be regulated by adjusting the applied gate voltage (relative to the source), thereby achieving control of the gate voltage and drain voltage over the drain current (output current). The working principle of the device can be quantitatively described by a one-dimensional linear charge model along the direction perpendicular to the heterojunction surface. The charge control model is the control effect of the gate voltage on the density of the 2DEG when there is no drain voltage.

The density of the 2DEG in the AlGaN/GaN HEMT device can be obtained by solving poisson's equation and Xue Dinge equation with the applied gate voltage. Under the full depletion approximation, i.e. when the depletion region of the schottky junction under the gate overlaps with the depletion region of the AlGaN/GaN heterojunction, the depletion layer charge distribution of the AlGaN region can be obtained by solving the seesaw equation.

In this embodiment, the areal density of the 2DEG increases with increasing AlGaN thickness, but its relationship to AlGaN thickness is not linear. When the AlGaN thickness reaches a certain value, the areal density of the 2DEG does not increase with an increase in thickness, and is kept almost at a stable value and does not change. When electron concentrations of different AlGaN barrier layer thicknesses are compared, the electron concentration increases with increasing barrier layer thickness regardless of strain relaxation.

Under the conditions that the thickness of the AlGaN layer is 20nm, 30nm and 40nm, the leakage current is output under different gate voltages, the obtained current changes along with the thickness of the AlGaN layer, and the output current correspondingly increases along with the increase of the thickness of the AlGaN barrier layer. The output current can be increased by increasing the thickness of the AlGaN layer, however, too much thickness of the AlGaN layer may cause strain relaxation.

In one possible implementation, a layer of AlN material is interposed between the AlGaN barrier layer and the GaN buffer layer; and a layer of GaN cap layer material grows on the surface of the n-AlGaN barrier layer.

In this possible implementation, the 2DEG is located in the GaN-side channel of the AlGaN/GaN heterojunction interface, and a thin layer (about 1nm thick) of AlN material is interposed between the AlGaN barrier layer and the GaN buffer layer in order to reduce the scattering effect of the alloy disorder in the AlGaN barrier layer on the 2DEG in the channel; in order to protect the AlGaN barrier layer from oxidation, a GaN cap layer material of about 3nm is grown on the surface of the n-AlGaN barrier layer.

In this embodiment, the AlN material has a very high direct bandgap (6.2 eV), which is an important blue and ultraviolet light emitting material; the AlN dielectric constant is small, the thermal conductivity, the high resistivity and the breakdown field intensity are good, and the AlN dielectric constant is an excellent high-temperature, high-frequency and high-power device material; alN, which is oriented along the c-axis, has excellent piezoelectricity and extremely high Surface Acoustic Wave (SAW) transmission speed, and is an excellent piezoelectric material for SAW devices. Compared with a sapphire or SiC substrate, the AlN crystal has higher lattice constant matching, thermal matching and chemical compatibility with AlGaN, and can greatly reduce the defect density in the device when being used as an epitaxial substrate of the AlGaN device.

Among them, the preparation method of AlN single crystal mainly includes Molecular Beam Epitaxy (MBE), hydride Vapor Phase Epitaxy (HVPE), metal Organic Compound Vapor Deposition (MOCVD), physical Vapor Transport (PVT) method, and the like. The HVPE, MOCVD and MBE methods are used for preparing films, the HVPE growth speed is high (100 mu m/h) and is almost 100 times that of the MOCVD and MBE methods, and the HVPE film is suitable for preparing thicker AlN films. The basic principle of PVT technology is that AlN source in high temperature area is decomposed and sublimated, and the temperature gradient is used to drive the surface of seed crystal to re-sublimate into crystal, and the growth speed is faster than HVPE and the crystal quality is higher.

In this embodiment, the introduction of a GaN cap structure is typically used to reduce the current collapse effect.

Introducing a GaN cap layer on the AlGaN layer surface of AlGaN/GaN heterojunction, the polarization effect will be causedResulting in an increase in the effective barrier height of the barrier layer, which is advantageous for reducing the gate leakage current of the schottky gate transistor. The height of the effective potential barrier of the barrier layer is set to be the highest point of the conduction band in the barrier layer, namely, the conduction band on the AlGaN side at the AlGaN/GaN interface, so that the height is important along with the change of structural parameters. The barrier layer is not doped, and the unaided doping concentration of the whole structure is 1X 1015/cm ³ . The thickness of the GaN cap layer is changed, the barrier height is increased along with the increase of the thickness of the GaN cap layer corresponding to the energy band conditions of different GaN cap layer thicknesses, and the gate leakage current of the Schottky gate transistor is reduced.

The introduction of the GaN cap layer creates another polarization charge layer, gaN/AlGaN. Assuming that the AlGaN/GaN interface polarization charge is σ0, this charge is positive, its electric lines of force diverge outward, ending mainly at the two-dimensional electron gas without the GaN cap layer, so the density of the two-dimensional electron gas and σ0 are very close. After the GaN cap layer is introduced, the GaN/AlGaN heterojunction interface also generates polarized charges-sigma 1, but in the opposite direction, and the density is lower (mainly because of the opposite directions of piezoelectric polarization and spontaneous polarization). Part of sigma 0 ends in polarized charge-sigma 1 of GaN/AlGaN heterojunction interface, and the power line density of two-dimensional electron gas ends in the two-dimensional electron gas and the concentration of the two-dimensional electron gas decrease, so that new electrostatic balance is formed. When the CAP layer is increased, the electric lines of force between-sigma 1 and sigma 0 become short and dense, the electric field of the AlGaN layer is enhanced, and the electric field between sigma 0 and the two-dimensional electron gas is correspondingly reduced, so that the two-dimensional electron gas density is reduced; the electric field abrupt change of the GaN/AlGaN interface is-sigma 1, and the electric field in the GaN cap layer is correspondingly reduced.

Wherein, the mask plate (photo mask) is also called a Photomask, a photoetching mask plate, a mask plate and the like, and is a pattern transfer tool or a master plate in the microelectronic manufacturing process.

The mask plate functions like a 'negative film' of a traditional camera, and the production process is as follows: 1. the quartz glass is used as a substrate (other substrate materials exist), and a layer of metal chromium and photosensitive glue are plated on the quartz glass to form a photosensitive material, namely a blank mask. 2. And exposing the designed circuit pattern on the photoresist through electronic laser equipment according to the requirements of downstream clients, developing the exposed area to form the circuit pattern on the metal chromium, and washing away the unnecessary metal layer and the adhesive layer to obtain the mask plate product. 3. The downstream manufacturer prints the fine circuit image on the mask plate on a substrate (the substrate is generally referred to as a silicon wafer, or other metal layers or dielectric layers) through a photoetching machine, and then the chip is obtained.

Based on the above embodiments, the device operation mode is as follows: it can be divided into two modes, normally open (depletion type) and normally closed (enhancement type). A GaN Heterojunction Field Effect Transistor (HFET) consisting of an AlGaN/GaN heterojunction in a lateral structure includes a layer of high mobility electrons: two-dimensional electron gas (2 DEG), the 2DEG forms a channel between the drain and source of the power device. Normally open (depletion): when the gate-source voltage is zero, a 2DEG channel exists between the drain and the source, and the device is conducted. When the gate-source voltage is less than zero, the drain-source 2DEG channel is disconnected and the device is turned off. Normally off (enhancement) when the gate-source voltage is greater than zero, a 2DEG channel is formed between the drain and source, and the device is turned on.

The bottommost layer of the device is a substrate layer (generally SiC or Si material), then an N-type GaN buffer layer is epitaxially grown, and an epitaxially grown P-type AlGaN barrier layer is formed to form an AlGaN/GaN heterojunction. And finally, depositing a grid electrode (G) forming Schottky contact on the AlGaN layer, carrying out high-concentration doping on the source electrode (S) and the drain electrode (D) and connecting the source electrode (S) and the drain electrode (D) with two-dimensional electrons in a channel to form ohmic contact.

AlGaN/GaN HEMT is a heterojunction structure device, and an AlGaN/GaN heterojunction is formed by vapor deposition or molecular beam epitaxy growth of an AlGaN layer on the GaN layer. The GaN semiconductor material mainly comprises two non-centrosymmetric crystal structures of wurtzite and sphalerite structures.

Of these two structures, wurtzite structure has lower symmetry, and when no external stress condition is applied, positive and negative charge centers in GaN crystal are separated, and polarization phenomenon is generated in the direction along the polar axis, which is called spontaneous polarization effect of GaN. Under the external stress, the crystal is stressed to generate lattice deformation, so that positive and negative charges in the crystal are separated, an electric field is formed in the crystal, polarized charges are induced on the surface of the crystal, and a piezoelectric effect is generated. As the piezoelectric polarization and the spontaneous polarization electric field have the same direction, polarization charges are induced at the junction of the heterojunction interface under the action of the electric field.

Since AlGaN materials have a wider band gap than GaN materials, when equilibrium is reached, the energy band at the interface of the heterojunction is bent, resulting in discontinuity of the conduction band and the valence band, and a triangular potential well is formed at the heterojunction interface. On the GaN side, the conduction band bottom EC is already below the fermi level EF, so there will be a large number of electrons accumulated in the triangular potential well. At the same time, the high barrier on the side of the wide bandgap AlGaN makes it difficult for electrons to surmount the potential well, and electrons are confined to move laterally in a thin layer of interface, known as a two-dimensional electron gas (2 DEG).

And the AlGaN/GaN HEMT device structure is formed. The drain-source voltage VDS enables a transverse electric field to be generated in the channel, and under the action of the transverse electric field, two-dimensional electron gas is transported along a heterojunction interface to form drain output current IDS. The grid electrode and the AlGaN barrier layer are in Schottky contact, the depth of a potential well in the AlGaN/GaN heterojunction is controlled through the size of the grid voltage VGS, and the size of the two-dimensional electron gas surface density in a channel is changed, so that the drain electrode output current in the channel is controlled.

In one possible implementation, by analyzing the change rule of the current-voltage curve of the device with temperature before and after the PGA (400 ℃) process, the leakage current mechanism of the corresponding device under low reverse bias is realized. In the low reverse bias region (Vth < VG < 0V), the reverse gate leakage current of the device and the electric field in the barrier layer meet the Poole-Frenkel (PF) emission mechanism, and after PGA treatment, the emission barrier height of the PF leakage mechanism is increased from 0.139eV to 0.256eV. Accordingly, the reverse gate leakage current of the device is reduced by an order of magnitude. In addition, the reliability of the Schottky gate of the device before and after annealing is studied by applying reverse step stress to the device, and the phenomenon of abrupt increase of leakage current can occur in the unannealed device in the step stress applying process. This indicates that the gate of the unannealed device is significantly damaged under stress. In contrast, the leakage current of the annealed device remains stable during the whole stress process, which indicates that the gate of the annealed device is not significantly damaged under the stress. This shows that PGA processing can effectively reduce the reverse gate leakage current of the device and improve the gate reliability of the device.

The GaN HEMT device of the embodiment of the application is described in detail above, and the method for manufacturing the GaN HEMT device of the embodiment of the application is provided below.

Referring to fig. 3, fig. 3 is a process flow chart of a method for manufacturing a GaN HEMT device with a gate structure of an SBD diode according to an embodiment of the application.

A manufacturing method of a GaN HEMT device with a gate structure of an SBD diode comprises the following steps:

and depositing SBD metal in the groove.

Referring to fig. 4, fig. 4 is a process flow diagram of a method for fabricating a gate recess GaN HEMT structure according to the prior art.

Compare fig. 3 with fig. 4. In this embodiment, the required materials for each layer are deposited first, then the required trench size and depth are etched first, then the gate ohmic metal is deposited, then a portion of the gate ohmic metal is etched second to expose the width of the SBD to GaN contact and then the SBD metal is deposited.

In one possible implementation, a GaN buffer layer is grown using a metal-organic chemical vapor deposition technique or a molecular beam epitaxy method, and an AlGaN barrier layer is grown on the GaN buffer layer.

sequentially epitaxially growing a GaN buffer area, a GaN channel, an AlGaN barrier layer and an n-AlGaN barrier layer from the substrate layer upwards by adopting a metal organic chemical vapor deposition technology or a molecular beam epitaxy method; wherein,

an AlN inserting layer is further grown on the GaN channel by adopting a metal organic chemical vapor deposition technology or a molecular beam epitaxy method;

and a GaN cap layer is further grown on the surface of the n-AlGaN barrier layer by adopting a metal organic chemical vapor deposition technology or a molecular beam epitaxy method.

In one possible implementation, the device is subjected to photolithography to form source and drain regions to be evaporated, then an electron beam evaporation technique is used to deposit metal in the source and drain regions to be evaporated, and an annealing process is performed to form ohmic contacts. And photoetching the device to form a grid electrode region to be evaporated, and then adopting an electron beam evaporation technology to perform metal deposition on the grid electrode region to be evaporated to form a grid electrode which is in Schottky contact with the p-GaN layer.

In one possible implementation, a photoetching process is adopted to select source and drain ohmic contact region patterns at two ends of the barrier layer, and dry etching treatment is carried out on the source and drain ohmic contact region patterns to be above the channel layer so as to form ohmic contact region grooves; using metal-organic chemical vapor deposition techniques or moleculesBeam epitaxy method for growing Si doped n-type GaN layer with thickness of 4-32 nm in ohmic contact region groove, wherein Si doping concentration is (1-5) x 10 ²⁰ cm ^-3 Forming an ohmic contact region; depositing ohmic contact metal Ti/Al/Ni/Au in ohmic contact areas of a source electrode and a drain electrode by adopting an electron beam evaporation process, and annealing in a nitrogen atmosphere at 830 ℃ to form the source electrode and the drain electrode; depositing an insulating gate dielectric layer (9) with the thickness of 3-20 nm on the barrier layer by adopting an atomic layer deposition process; a photoetching process is adopted to select a gate electrode pattern on the surface of the insulated gate dielectric layer (9), and an electron beam evaporation process is adopted to deposit a Ni/Au metal combination on the pattern to form a gate electrode.

It will be appreciated by those skilled in the art that in the above-described method of the specific embodiments, the written order of steps is not meant to imply a strict order of execution but rather should be construed according to the function and possibly inherent logic of the steps.

In some embodiments, the process flow provided by the embodiments of the present disclosure may be used to manufacture the GaN HEMT device described in the foregoing embodiments, and the specific implementation of the process flow may refer to the description of the foregoing GaN HEMT device embodiments, which is not repeated herein for brevity.

The application also provides a processor for executing the test method.

The application also provides an electronic device, comprising: the electronic device comprises a processor, a transmitting device, an input device, an output device and a memory, wherein the memory is used for storing computer program codes, the computer program codes comprise computer instructions, and when the processor executes the computer instructions, the electronic device executes the testing method.

The present application also provides a computer readable storage medium having stored therein a computer program comprising program instructions which, when executed by a processor of an electronic device, cause the processor to perform a test method as described above.

In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions in accordance with embodiments of the present application are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in or transmitted across a computer-readable storage medium. The computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital Subscriber Line (DSL)), or wireless (e.g., infrared, wireless, microwave, etc.). Computer readable storage media can be any available media that can be accessed by a computer or data storage devices, such as servers, data centers, etc., that contain an integration of one or more available media. Usable media may be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., digital Versatile Discs (DVDs)), or semiconductor media (e.g., solid State Drives (SSDs)), etc.

Those of ordinary skill in the art will appreciate that implementing all or part of the above-described method embodiments may be accomplished by a computer program to instruct related hardware, the program may be stored in a computer readable storage medium, and the program may include the above-described method embodiments when executed. And the aforementioned storage medium includes: a read-only memory (ROM) or a Random Access Memory (RAM), a magnetic disk or an optical disk, or the like.

Claims

1. A GaN HEMT device having a gate structure of an SBD diode, comprising, in order from a substrate layer in a longitudinal direction: a GaN buffer layer, an AlGaN barrier layer and an insulating layer;

a groove is etched between the insulating layer and the AlGaN barrier layer, and gate ohmic metal and SBD metal are sequentially deposited in the groove from inside to outside; and a notch is etched in the gate ohmic metal at the bottom of the groove, and the SBD metal is contacted with the AlGaN barrier layer through the notch.

2. The GaN HEMT device of claim 1, wherein said GaN buffer layer is a high-resistance GaN buffer layer comprising a GaN buffer region and a GaN channel from the substrate layer upward; the AlGaN barrier layer comprises an n-AlGaN barrier layer which is not etched back and an n-AlGaN barrier layer which is etched back upwards from the substrate layer.

3. The GaN HEMT device of claim 2, wherein a gate, a source and a drain are provided on an upper surface of the GaN HEMT device; the grid electrode is a Schottky contact electrode, the source electrode and the drain electrode are ohmic contact electrodes formed by connecting with the 2DEG respectively, wherein the 2DEG is positioned in a channel on the GaN buffer layer-side of the n-AlGaN heterojunction interface which is not etched back/the n-AlGaN heterojunction interface which is etched back.

4. A GaN HEMT device with a gate structure of an SBD diode according to claim 2 or 3, wherein a layer of AlN material is interposed between the non-etched-back n-AlGaN barrier layer and the GaN buffer layer; and a layer of GaN cap layer material grows on the surface of the n-AlGaN barrier layer.

5. The GaN HEMT device of claim 1, wherein a resolution of a mask used to etch the recess is greater than a resolution of a mask used to etch the notch.

6. The manufacturing method of the GaN HEMT device with the gate structure of the SBD diode is characterized by comprising the following steps of:

and depositing SBD metal in the groove.

7. The method for manufacturing the GaN HEMT device with the gate structure of the SBD diode according to claim 6, wherein the GaN buffer layer is a high-resistance GaN buffer layer;

and sequentially epitaxially growing a GaN buffer layer and an AlGaN barrier layer from the substrate layer upwards, wherein the GaN buffer layer and the AlGaN barrier layer comprise:

growing an AlN inserting layer on the GaN channel;

and growing a GaN cap layer on the surface of the etched-back n-AlGaN barrier layer.

8. The method for manufacturing the GaN HEMT device with the gate structure of the SBD diode according to claim 6, further comprising:

9. An electronic device, comprising: a processor, transmission means, input means, output means and memory for storing computer program code comprising computer instructions which, when executed by the processor, cause the electronic device to perform the method of manufacture of any of claims 6 to 8.

10. A computer readable storage medium, characterized in that a computer program is stored in the computer readable storage medium, the computer program comprising program instructions which, when executed by a processor of an electronic device, cause the processor to perform the production method of any one of claims 6 to 8.