CN117130975A

CN117130975A - Bus interface expansion method and related equipment

Info

Publication number: CN117130975A
Application number: CN202310490215.5A
Authority: CN
Inventors: 钟澔; 王一博; 王峰
Original assignee: Honor Device Co Ltd
Current assignee: Honor Device Co Ltd
Priority date: 2023-04-28
Filing date: 2023-04-28
Publication date: 2023-11-28
Anticipated expiration: 2043-04-28
Also published as: CN117130975B

Abstract

The embodiment of the application relates to a bus interface expansion method and related equipment. In the method, if the integrated circuit device detects that the host is connected with the SPMI bus, the slave connected with the SPMI bus is detected, communication data sent by the host is acquired, and the communication data is broadcast to all the slaves or sent to the appointed slaves. Because all the slaves receiving the set communication data or the appointed slaves and the master belong to different manufacturers, the embodiment of the application can realize the interaction between the masters of different manufacturers and the slaves on the SPMI bus and realize the expansion of the slaves in quantity on the SPMI bus. In addition, the application increases the driving capability of the signals of the SPMI bus through the integrated circuit device, can use longer SPMI bus to carry out the layout of the host and the slave on the PCB, and solves the problem that the prior host and slave are limited when laid out on the PCB.

Description

Bus interface expansion method and related equipment

Technical Field

The present application relates to the field of bus communications technologies, and in particular, to a bus interface extension method and related devices.

Background

The existing system power management interface (System Power Management Interface, SPMI) is a two-wire serial interface, typically used as a power management interface, which can connect a host to a slave. For example, the host may be a System-on-a-Chip (SOC)), and the slave may be a Power Management Chip (PMIC). The related slave can be accurately monitored and controlled through the SPMI bus. However, the number of devices connected on the existing SPMI bus is limited, and no expansion in number of the master or slave can be implemented on the SPMI bus.

Disclosure of Invention

In view of the foregoing, it is desirable to provide a bus interface extension method and related devices to solve the problem that the number of the masters or slaves cannot be extended on the SPMI bus.

In a first aspect, an embodiment of the present application provides a bus interface extension method, which is applied to an integrated circuit device, where the method includes: when detecting that the host is connected with the SPMI bus, detecting a slave connected with the SPMI bus; acquiring communication data sent by a host; the communication data is broadcast to all slaves or sent to a designated slave. In the above technical solution, since all the slaves or the designated slaves receiving the set communication data belong to different manufacturers, the application can realize the interaction between the slaves and the hosts of different manufacturers on the SPMI bus. In addition, since all slaves or designated slaves that receive communication data also include slaves that are extended by integrated circuit devices, the extension of the slaves in number is implemented on the SPMI bus. In addition, the application transmits the communication data acquired from the host to all the slaves or the appointed slaves through the integrated circuit device, and the integrated circuit device can increase the driving capability of the signals of the SPMI bus, so that the longer SPMI bus can be used for carrying out the layout of the host and the slaves on the PCB, and the problem of limitation when the host and the slaves are laid out on the PCB is solved. In one embodiment of the present application, broadcasting communication data to all slaves or transmitting communication data to a designated slave includes: if the sending mode of the communication data is determined to be a broadcasting mode according to the configuration information, broadcasting the communication data to all the slaves; and if the transmission mode of the communication data is determined to be the mode of transmitting to the appointed slave machine according to the configuration information, transmitting the communication data to the appointed slave machine. According to the technical scheme, the sending mode of the communication data can be determined according to the configuration information, so that the slave machine performs parameter configuration according to the communication data.

In one embodiment of the present application, the configuration information is preset in the integrated circuit device.

In one embodiment of the present application, the configuration information is preset in the integrated circuit device including:

configuration information input by a user is received through a user interface and is set in the integrated circuit device. In the above technical solution, the configuration information may be set in the integrated circuit device through the user interface.

In an embodiment of the present application, after obtaining the communication data sent by the host, the method further includes: identifying one or more of the following of the communication data by parsing the communication data: the address of the host, the address of the slave, the address of the register of the slave, the read-write instruction and the read-write data. In the above technical solution, the integrated circuit device can analyze the communication data sent by the host, so as to obtain the content of the communication data.

In one embodiment of the application, detecting that the host is connected to the SPMI bus includes: transmitting a first in-place instruction to a host mounted on the SPMI bus through the SPMI bus; if a first reply signal is received in response to the first in-place instruction, it is determined that the host is detected to be connected to the SPMI bus. In the above technical solution, the first in-place instruction replied by the host is received in the interaction between the integrated circuit device and the host, so that it can be determined that the host is connected to the SPMI bus.

In one embodiment of the application, detecting a slave connected to the SPMI bus includes: transmitting a second in-place instruction to all slaves mounted on the SPMI bus through the SPMI bus; all slaves connected to the integrated circuit device are determined based on the second reply signals of all responses. In the technical scheme, the slave machine can be determined to be connected to the SPMI bus by receiving the second in-place instruction replied by the slave machine in the interaction of the integrated circuit device and the slave machine.

In one embodiment of the application, all slaves include a non-extended slave and an extended slave: the slave connected with the SPMI bus comprises a non-extended slave and an extended slave, wherein the non-extended slave is connected with the integrated circuit device through a first lower port, and the extended slave is connected with the integrated circuit device through a second lower port.

In one embodiment of the application, the integrated circuit device comprises at least one of a field programmable gate array chip, a micro control unit, an active device circuit, and an application specific integrated circuit chip.

In a second aspect, an embodiment of the present application provides a bus interface extension method, which is applied to an integrated circuit device, where the method includes: if the SPMI bus is determined to be in an idle state, detecting whether an extended host is connected with the SPMI bus; if an extended host is connected with the SPMI bus, acquiring first communication data sent by the extended host; the first communication data is broadcast to all slaves on the SPMI bus or sent to a designated slave on the SPMI bus. In the above technical solution, because the integrated circuit device can broadcast the communication data sent by the hosts expanded by different manufacturers to all the slaves or send the communication data to the designated slaves, the embodiment of the application can realize the interaction between the hosts and the slaves of different manufacturers on the SPMI bus. In addition, since the extended host is also capable of broadcasting communication data to all slaves or transmitting communication data to a designated slave through the integrated circuit device, the extension of the host in number and the customized characteristic function of the host are realized on the SPMI bus. In addition, because the integrated circuit device can increase the driving capability of the signals of the SPMI bus, the longer SPMI bus can be used for carrying out the layout of the master and the slave on the circuit board, and the problem that the master and the slave are limited when being laid out on the circuit board is solved.

In an embodiment of the present application, if it is determined that the SPMI bus is in the idle state, the method further includes: if the connection of the non-expanded host computer and the SPMI bus is detected, second communication data sent by the non-expanded host computer is obtained.

In an embodiment of the application, the method further comprises: and if the SPMI bus is determined not to be in the idle state, broadcasting the second communication data to all slaves on the SPMI bus or sending the second communication data to a designated slave on the SPMI bus. In the above technical solution, when the SPMI bus is not in an idle state, the communication data sent by the non-extended host is broadcasted to all the slaves on the SPMI bus or the second communication data is sent to the designated slave on the SPMI bus, so that the slave performs parameter configuration according to the communication data sent by the non-extended host.

In one embodiment of the application, a non-expanded host is coupled to a first upper port of the integrated circuit device and an expanded host is coupled to a second upper port of the integrated circuit device.

In one embodiment of the application, broadcasting the first communication data to all slaves on the SPMI bus or transmitting the first communication data to a designated slave on the SPMI bus includes: if the sending mode of the first communication data is determined to be a broadcasting mode according to the configuration information, broadcasting the communication data to all the slaves; and if the transmission mode of the first communication data is determined to be the mode of transmitting to the appointed slave machine according to the configuration information, transmitting the first communication data to the appointed slave machine. According to the technical scheme, the sending mode of the communication data can be determined according to the configuration information, so that the slave machine performs parameter configuration according to the communication data sent by the extended host machine.

In a third aspect, some embodiments of the application provide an integrated circuit device comprising a chip, the integrated circuit device coupled to a memory in an electronic device: a memory for storing program instructions; and the chip is used for controlling the integrated circuit device to execute the bus interface expansion method.

In a fourth aspect, some embodiments of the application provide an electronic device comprising a memory and a processor: wherein the memory is used for storing program instructions; and the processor is used for reading and executing the program instructions stored in the memory, and when the program instructions are executed by the processor, the electronic equipment is caused to execute the bus interface expansion method.

In a fifth aspect, some embodiments of the present application provide a computer storage medium storing program instructions that, when executed on an electronic device, cause the electronic device to perform the bus interface extension method described above.

The technical effects of the third to fifth aspects may be referred to in the description related to the method designed in the method section above, and are not repeated here.

Drawings

Fig. 1 is a schematic diagram of an SPMI bus structure in the related art.

FIG. 2 is a diagram illustrating SPMI bus instruction cycle according to an embodiment of the present application.

FIG. 3 is a schematic diagram of an SPMI bus according to an embodiment of the present application.

FIG. 4 is a flowchart of a bus interface extension method according to an embodiment of the application.

FIG. 5 is a flowchart of a bus interface extension method according to another embodiment of the present application.

FIG. 6 is a flowchart of a bus interface extension method according to another embodiment of the present application.

Fig. 7 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the application.

Detailed Description

The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In describing some embodiments of the application, words such as "exemplary" or "such as" are used to mean serving as examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "e.g." in some embodiments of the present application should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. It is to be understood that, unless otherwise indicated, a "/" means or. For example, A/B may represent A or B. The "and/or" in some embodiments of the present application is merely one association relationship describing the associated object, meaning that three relationships may exist. For example, a and/or B may represent: a exists alone, A and B exist simultaneously, and B exists alone. "at least one" means one or more. "plurality" means two or more than two. For example, at least one of a, b or c may represent: seven cases of a, b, c, a and b, a and c, b and c, a, b and c.

Referring to fig. 1, a schematic diagram of a related art system power management interface (System Power Management Interface, SPMI) bus is shown. The SPMI bus is an asynchronous bus, and can connect a plurality of hosts 11 and a plurality of slaves 12, and the plurality of hosts 11 and the plurality of slaves 12 perform data interaction through the SPMI bus. The master 11 and the slaves 12 can preempt the bus by arbitration to resolve the collision problem. When the bus is in an idle state, a plurality of hosts 11 or slaves 12 can access the bus through bus arbitration requests, and a host 11 of the bus monitors the bus arbitration requests and grants the bus to a requester. In general, the SPMI bus may include a clock signal line for transmitting the clock signal SCLK (Serial Clock) and a data signal line for transmitting the data signal SDATA (Serial Data). The SPMI bus is capable of supporting the simultaneous connection of 4 masters 11 and the access of 16 slaves 12. For example, the SPMI bus may be connected to one or more hosts 11 on a System-on-a-Chip (SOC) or to one or more slaves 12 on a Power Management Chip (PMIC).

The architecture shown in fig. 1 is only schematically illustrated, and is not limited to this in practical applications.

Referring to FIG. 2, a schematic diagram of an instruction cycle of an SPMI bus according to an embodiment of the present application is shown. In one embodiment of the application, the SPMI bus instruction cycle includes the following phases: bus arbitration, sequence start, frame sequence, bus stop cycle. In the bus arbitration phase, the host 11 having the SPMI bus releases the clock signal SCLK through the clock signal line when the data signal line of the SPMI bus is pulled high. The master 11 or the slave 12 connected to the SPMI bus pulls up the data signal line under the corresponding clock signal SCLK to assert its own priority. If there is a higher priority device, the host 11 currently owning the SPMI bus releases the bus to the higher priority device according to the priority. After the device such as the master 11 or the slave 12 seizes the SPMI bus and becomes a controller of the SPMI bus, the device obtains the control right of the clock signal SCLK of the SPMI bus and provides the clock signal SCLK of the SPMI bus. After bus arbitration is completed, the SPMI bus enters the sequence startup phase. The sequence initiation phase may be a bus buffering phase. In the start-up phase of the sequence, the device winning bus preemption pulls down the clock signal SCLK while the control data signal line pulls up the data signal SDATA first and then pulls down the data signal SDATA, generating a start sequence (sequence start condition, SSC). After the receiving end device, such as a power management chip, on the SPMI bus detects the start timing, it is ready to receive a subsequent sequence of frames.

In one embodiment of the present application, a sequence of frames is used to execute data transfer instructions. The data transmission instruction includes information such as a transmission command, a transmission address, transmission data, and the like. In one embodiment of the application, the types of transfer commands include, but are not limited to: the host 11 reads the register of the slave 12, the host 11 writes the register of the slave 12, and the slave 12 writes the register of the host 11. In one embodiment of the application, the transfer address includes the address of the slave 12, the address of the register of the slave 12. For example, a specific data transfer instruction may be a command for a master to write 01 data to the slave's 0110 register at address 1111. After the data transfer instruction is completed in the frame sequence, the SPMI bus enters a bus stop period.

In one embodiment of the present application, the bus stop cycle phase of the SPMI bus is the process of bus stop, when the SPMI bus is in an idle state. When the SPMI bus is in the bus stop period phase, the clock signal SCLK and the transfer data signal SDATA of the SPMI bus are both pulled low, e.g., the clock signal SCLK and the transfer data signal SDATA of the SPMI bus are pulled low.

In the related art, based on the SPMI bus as shown in fig. 1, a host and a slave belonging to the same vendor cannot interact with each other, and the hosts and the slaves of different vendors cannot interact with each other. Thus, communication between the master and the slave of different vendors is impaired. In addition, in the related art, the SPMI bus supports connection of at most 4 hosts and access of 16 slaves, so that the number of hosts and slaves connected on the SPMI bus is limited. In addition, when the SPMI bus is routed on the printed circuit board (Printed Circuit Board, PCB), if the SPMI bus is longer, the driving capability of the PCB to signals is weaker, and in order to enable the signals on the SPMI bus to be normally transmitted on the PCB, the length of the SPMI bus needs to be limited, so that the layout of the host or the slave that uses the SPMI bus for communication is limited.

In order to solve the above-mentioned problem of the SPMI bus, another architecture of the SPMI bus is provided in an embodiment of the present application. Referring to fig. 3, an architecture diagram of an SPMI bus according to an embodiment of the application is shown. In an embodiment of the present application, a plurality of hosts 11 are connected to an integrated circuit device 13 through an SPMI bus, a plurality of slaves 12 are connected to the integrated circuit device 13 through the SPMI bus, and thus the plurality of hosts 11 perform data interaction with the plurality of slaves 12 through the integrated circuit device 13. In one embodiment of the present application, the integrated circuit device 13 may be at least one of a field programmable gate array (Field Programmable Gate Array, FPGA) chip, a micro control unit (Microcontroller Unit, MCU), an active device circuit, and an application specific integrated circuit (Application Specific Integrated Circuit, ASIC) chip.

In an embodiment of the present application, the integrated circuit device 13 includes at least a first upper port 131, a second upper port 132, a first lower port 133 and a second lower port 134, which is not limited in practical application. The first upper port 131 and the second upper port 132 are used for connecting with the host 11. In the embodiment of the present application, the first upper port 131 and the second upper port 132 are connected to the host 11 through the clock signal line and the data signal line of the SPMI bus. In this embodiment, the first upper port 131 is used to connect to the non-expanded host 11, where the non-expanded host 11 may be a host 11 to which the SPMI bus is connected in a native state. The primordial state means that the number of the masters 11 connected to the SPMI bus is not more than 4 and the number of the slaves 12 connected to the SPMI bus is not more than 16. The second upper port 132 is used to connect with the expanded hosts 11, and in this embodiment, the expanded hosts mounted on the SPMI bus can make the number of hosts 11 connected on the SPMI bus exceed the maximum number (e.g., 4) that the original ecology can connect.

In other embodiments, the first upper port 131 may be connected to the extended host 11, and the second upper port 132 may be connected to the non-extended host 11, which is not limited in practical application. In other embodiments, the number of upper ports of the integrated circuit device 13 may also be increased as needed to extend the number of hosts 11 more.

In one embodiment of the present application, the first lower port 133 is connected to the slave 12 with the second lower port 134. The first lower port 133 and the second lower port 134 are connected to the slave 12 through the clock signal line and the data signal line of the SPMI bus. In this embodiment, the first lower port 133 connects to the non-extended slave 12, where the non-extended slave 12 refers to the slave 12 to which the SPMI bus is connected in the original state. The second lower port 134 connects the extended slaves 12, in this embodiment, the extended slaves 12 mounted on the SPMI bus can enable the number of slaves 12 connected on the SPMI bus to exceed the maximum number that the original ecology can connect. In other embodiments, the extended slave 12 may be connected by the first lower port 133, and the non-extended slave 11 may be connected by the second lower port 134, which is not limited in practical application. In other embodiments, the number of lower ports of the integrated circuit device 13 may also be increased as needed to extend the number of more slaves 12.

In an embodiment of the present application, after the integrated circuit device 13 detects that the host 11 is connected to the integrated circuit device 13, it detects whether the slave 12 is connected to the integrated circuit device 13, and after detecting that the slave 12 is connected to the integrated circuit device 13, the integrated circuit device 13 obtains communication data sent from the host 11 to the slave 12, determines a sending manner of the communication data according to preset configuration information, and broadcasts the communication data to all the slaves 12 or sends the communication data to a designated slave according to the determined sending manner, so that interaction between the host 11 and the slaves 12 of different manufacturers through the SPMI bus is realized, and the expansion of the host 11 and the slaves 12 in number on the SPMI bus is realized.

Referring to fig. 4, a flowchart of a bus interface extension method according to an embodiment of the present application is shown. The bus interface expansion method is applied to the integrated circuit device 13, and specifically comprises the following procedures.

In step S401, it is detected whether the host is connected to the SPMI bus.

The following describes the specific flow of the method for expanding a mid-bus interface in the present application, taking the host 11 of vendor a as an example. In one embodiment of the application, the integrated circuit device 13 sends a first in-place instruction over the SPMI bus to the A vendor's host 11 that is mounted on the SPMI bus. The host 11 of vendor a sends a first reply signal to the integrated circuit device 13 in response to the received first bit instruction. If the integrated circuit device 13 receives the first reply signal, it is determined that the host 11 of vendor a is connected to the SPMI bus. If the integrated circuit device 13 does not receive the first reply signal, it is determined that the host 11 of vendor a is not connected to the SPMI bus. In an embodiment of the application, the first reply signal includes a first fixed value. That is, the integrated circuit device 13 determines that the host 11 of vendor a is connected to the SPMI bus when receiving the first reply signal including the first fixed value. The first fixed value may be any preset value, by which it can be determined that the host 11 of vendor a is connected to the SPMI bus.

If the host 11 of the vendor a is connected to the SPMI bus, step S402 is executed, otherwise, if the host 11 of the vendor a is not connected to the SPMI bus, the flow returns to step S401, and whether any host is connected to the SPMI bus is continuously detected.

In step S402, a slave connected to the SPMI bus is detected.

In one embodiment of the application, the integrated circuit device 13 sends a second in-place instruction over the SPMI bus to all of the slaves 12 that are mounted on the SPMI bus. Each slave 12 sends a second reply signal to the integrated circuit device 13 in response to the received second bit instruction. In an embodiment of the application, the second reply signal includes a second fixed value. The integrated circuit device 13 determines all the slaves 12 connected to the integrated circuit device 13 based on the second reply signal returned from each of the slaves 12. In one embodiment of the application, all of the slaves 12 mounted on the SPMI bus include a vendor A slave 12, and other non-A slaves (e.g., a vendor B or a vendor C slave). In one embodiment of the application, all of the slaves 12 on the SPMI bus include an extended or non-extended slave 12 connected to the SPMI bus through either the first lower port 133 or the second lower port 134 of the integrated circuit device 13.

Step S403, acquire communication data sent by the host.

In one embodiment of the application, the integrated circuit device 13 obtains the communication data sent by the a vendor's host 11 to the target slave via the SPMI bus. In one embodiment of the present application, the target slave may be any one of all slaves 12 connected to the SPMI bus. The communication data includes at least setting the operation mode of the slave 12, setting the output voltage of the slave 12.

In step S404, the communication data is broadcast to all the slaves or transmitted to the designated slaves.

In an embodiment of the present application, the configuration information is used to indicate a transmission mode of the communication data. In one embodiment of the present application, the configuration information includes a broadcast mode and a mode of transmitting to the designated slave. The integrated circuit device 13 may set configuration information in the integrated circuit device 13 in advance according to an input operation by a user. For example, the integrated circuit device 13 receives configuration information input by a user through a user interface, and sets the configuration information in the integrated circuit device 13. In one embodiment of the application, the configuration information may be modified based on user input information. For example, at least one of the transmission method of the communication data and the address of the command slave can be modified according to the input information of the user.

In one embodiment of the application, broadcasting communication data to all slaves or transmitting communication data to a designated slave includes: determining a transmission mode of communication data according to the configuration information; if the transmission mode of the communication data is determined to be the broadcasting mode, broadcasting the communication data to all the slaves 12; when it is determined that the transmission scheme of the communication data is a scheme for transmitting to the specified slave 12, the communication data is transmitted to the specified slave 12. Specifically, the integrated circuit device 13 acquires the preset configuration information, determines that the transmission mode of the communication data is the broadcast transmission mode to all the slaves 12 if the analysis of the configuration information includes the broadcast transmission mode to all the slaves 12, and then the integrated circuit device 13 broadcasts the communication data to all the slaves 12. When the configuration information is analyzed to include the transmission scheme to the designated slave 12, the integrated circuit device 13 determines that the transmission scheme of the communication data is the transmission scheme to the designated slave 12, and transmits the communication data to the designated slave 12. In one embodiment of the present application, the slave 12 is designated as at least one slave 12 of all slaves 12. In one embodiment of the application, the designated slave 12 may be a non-A vendor and an extended slave 12.

In an embodiment of the present application, the method further includes, after step S403: the communication data is parsed to identify the communication data. In one embodiment of the application, parsing the communication data to identify the communication data includes, but is not limited to: the address of the host 11, the address of the target slave, the address of the register of the target slave, the read/write command, and the read/write data are analyzed from the communication data. In one embodiment of the present application, the read/write command includes a host-to-slave command and a host-to-slave command.

In an embodiment of the present application, the read/write data may be written or read into or from the operation mode of the target slave, and the output voltage value of the target slave. The target slave machine working modes comprise a low-power-consumption working mode and a high-load working mode.

In one embodiment of the application, the slave 12 may be configured according to the communication data. For example, taking the slave 12 as a power supply device, the communication data received from the integrated circuit device 13 by the slave 12 includes at least one of an operation mode and an output voltage value. The configuration of the slave 12 according to the communication data includes: configuring an operation mode of the slave 12 according to the operation mode of the communication data; or the output voltage value of the slave 12 is configured according to the output voltage value of the communication data. In the embodiment of the present application, the slave 12 can configure itself according to the communication data, thereby implementing the function of customizing the characteristics of the slave.

In an embodiment of the present application, the integrated circuit device 13 may also receive communication data transmitted from the slave 12 connected to the integrated circuit device 13 and transmit the communication data transmitted from the slave 12 to the host 11.

In the embodiment of the present application, all the slaves 12 collecting communication data or the designated slaves 12 include the slaves 12 of non-a manufacturer, so that the present embodiment can implement interaction between the master 11 and the slaves 12 of different manufacturers on the SPMI bus. In addition, since all of the slaves 12 or designated slaves 12 that receive the communication data also include an extended slave, the extension of the slaves 12 in number is implemented on the SPMI bus. In addition, in the embodiment of the present application, the integrated circuit device 13 sends the communication data acquired from the host 11 to all the slaves 12 or designates the slaves 12, and since the integrated circuit device 13 can increase the driving capability of the signals of the SPMI bus, the layout of the host 11 and the slaves 12 can be performed on the PCB using a longer SPMI bus, and the problem of limitation when the host 11 and the slaves 12 are laid out on the PCB is solved.

Referring to fig. 5, a flowchart of a bus interface expansion method according to another embodiment of the application is shown. The bus interface extension method is applied to the integrated circuit device 13. The method shown in fig. 5 specifically includes the following steps.

In step S501, it is detected whether a host connected to the SPMI bus is present at the first upper port of the integrated circuit device.

In one embodiment of the present application, integrated circuit device 13 is coupled to host 11 through first upper port 131. The integrated circuit device 13 sends a first on-bit command to the host 11 on the first upper port 131, and if a first reply signal that the host 11 on the first upper port 131 replies in response to the first on-bit command is received, it is determined that the host 11 connected to the SPMI bus exists on the first upper port 131 of the integrated circuit device 13. If the first reply signal, which is replied by the host 11 on the first upper port 131 in response to the first bit instruction, is not received, it is determined that the host 11 connected to the SPMI bus does not exist on the first upper port 131 of the integrated circuit device 13. In one embodiment of the present application, if there is a host 11 connected to the SPMI bus, step S502 is executed, otherwise, if there is no host 11 connected to the SPMI bus, step S501 is executed repeatedly.

In step S502, it is detected whether a slave connected to the SPMI bus is present at the first lower port of the integrated circuit device.

In one embodiment of the application, the integrated circuit device 13 is connected to the slave 12 through a first lower port 133. Wherein the slave 12 connected to the first lower port 133 is an unexpanded slave. The integrated circuit device 13 sends a second in-place instruction to the slave 12 on the first lower port 133, and if receiving the second reply signal sent by the slave 12 on the first lower port 133, it is determined that the slave 12 connected to the SPMI bus exists on the first lower port 133 of the integrated circuit device 13, and step S503 is performed. If the second reply signal sent by the slave 12 on the first lower port 133 is not received, it is determined that the slave 12 connected to the SPMI bus does not exist on the first lower port 133 of the integrated circuit device 13, and the flow goes to step S504.

In step S503, the slave connected to the first lower port is recorded.

In step S504, it is detected whether a slave is connected to the SPMI bus at the second lower port of the integrated circuit device.

In one embodiment of the application, the integrated circuit device 13 is connected to the slave 12 through the second lower port 134. Wherein the slave 12 connected to the second lower port 134 is an extended slave 12. The integrated circuit device 13 sends a second in-place instruction to the slave 12 on the second lower port 134, and if receiving the second reply signal sent by the slave 12 on the second lower port 134, it is determined that the slave 12 is connected to the SPMI bus on the second lower port 134 of the integrated circuit device 13, and step S505 is performed. If the second reply signal sent by the slave 12 on the second lower port 134 is not received, it is determined that the slave 12 is not connected to the SPMI bus on the second lower port 134 of the integrated circuit device 13, and step S507 is performed.

In step S505, the slave connected to the second lower port is recorded.

Step S506, obtaining communication data sent by the host.

In one embodiment of the present application, the integrated circuit device 13 obtains communication data sent to the target slave by the connection master 11 with the first upper port 131 through the SPMI bus. In an embodiment of the present application, the target slave may be any one of the slaves 12 on the first lower port 133 and the slaves 12 on the second lower port 134. In another embodiment of the application, the integrated circuit device 13 may send the recorded address of the slave 12 to the master 11. The host 11 determines a target host based on the received address of the slave 12.

Step S507, whether to broadcast communication data is determined according to the configuration information.

In an embodiment of the present application, if the integrated circuit device 13 determines that the transmission mode of the communication data is a broadcast mode according to the configuration information, determines to broadcast the communication data, and performs step S508. If it is determined that the transmission mode of the communication data is the mode of transmission to the specified slave according to the configuration information, the flow proceeds to step S509.

Step S508, broadcasting communication data to the recorded slaves.

In an embodiment of the present application, broadcasting communication data to the slave machine recorded according to the above steps S503 and S505 includes: the communication data is broadcast to all the slaves 12 connected to the first lower port 133 and the second lower port 134. All of the slaves 12 include non-extended slaves 12 and extended slaves 12.

Step S509, the communication data is transmitted to the designated slave among the recorded slaves.

In an embodiment of the present application, the designated slave may be the slave 12 connected to the first lower port 133 or the slave 12 connected to the second lower port 134. In one embodiment of the application, the designated slave 12 includes a non-extended slave 12 and an extended slave 12.

In the embodiment of the present application, since the integrated circuit device 13 can send the communication data sent by the host of a specific manufacturer on the first upper port 131 to all the slaves or the designated slaves on the first lower port 133 and the second lower port 134, the present application can implement interaction between the hosts 11 and the slaves 12 of different manufacturers on the SPMI bus, reduce the dependency on suppliers, and improve the self-grinding capability. In addition, since all or a designated slave that receives the set communication data also includes an extended slave on the second lower port 134, an extension in number to the slave 12 is implemented on the SPMI bus. In addition, in the embodiment of the present application, the integrated circuit device 13 sends the communication data acquired from the host 11 to all the slaves or the designated slaves, and because the integrated circuit device 13 can increase the driving capability of the signals of the SPMI bus, the layout of the host 11 and the slaves 12 can be performed on the PCB using a longer SPMI bus, which solves the problem that the layout of the host 11 and the slaves 12 is limited when they are on the PCB, and realizes the HUB (HUB) function of the SPMI bus.

Referring to fig. 6, a flowchart of a bus interface extension method according to an embodiment of the application is shown. The bus interface extension method is applied to the integrated circuit device 13. The method specifically comprises the following steps.

In step S601, it is detected whether a non-expanded host is connected to the SPMI bus.

In one embodiment of the present application, the non-expanding host 11 is connected to the first upper port 131 of the integrated circuit device 13. Detecting whether the non-expanded host 11 is connected to the SPMI bus includes: detecting whether the first upper port 131 of the integrated circuit device has the host 11 connected to the SPMI bus, and if the first upper port 131 has the host 11 connected to the SPMI bus, determining that there is a non-expanded host 11 connected to the SPMI bus. If there is no host 11 connected to the SPMI bus on the first upper port 131, it is determined that the non-expanded host 11 is not connected to the SPMI bus. In one embodiment of the present application, if the non-expanded host 11 is connected to the SPMI bus, step S602 is performed; if the non-expanded host 11 is not connected to the SPMI bus, step S603 is performed.

Step S602, acquiring first communication data sent by a non-extended host.

In one embodiment of the application, the integrated circuit device 13 obtains the first communication data sent by the non-expanded host 11 to the target slave via the SPMI bus. The target slave may be any slave 12 connected to the integrated circuit device 13. In one embodiment of the present application, the integrated circuit device 13 is connected to the slave 12 through either the first lower port 133 or the second lower port 133.

In step S603, it is determined whether the SPMI bus is in an idle state.

In one embodiment of the present application, if it is determined that the clock signal line and the data signal line of the SPMI bus are both at low level, it is determined that the SPMI bus is in an idle state. If the SPMI bus is in the idle state, step S604 is performed, and if the SPMI bus is not in the idle state, step S606 is performed.

Step S604, detecting that the extended host is connected to the SPMI bus, and acquiring second communication data sent by the extended host.

In one embodiment of the application, the extended host 11 is connected to the second upper port 132 of the integrated circuit device 13. If it is detected that the second upper port 132 of the integrated circuit device has the host 11 connected to the SPMI bus, it is determined that there is an extended host 11 connected to the SPMI bus, and second communication data transmitted from the extended host to the target slave is acquired.

Step S605 broadcasts the second communication data to all slaves on the SPMI bus or transmits the second communication data to a designated slave on the SPMI bus.

In one embodiment of the present application, broadcasting the second communication data to all slaves or transmitting the second communication data to a designated slave includes: determining a sending mode of the communication data according to the configuration information; if the sending mode of the second communication data is determined to be a broadcasting mode, broadcasting the second communication data to all the slaves; and if the transmission mode of the second communication data is determined to be the mode of transmitting to the appointed slave, transmitting the second communication data to the appointed slave.

In step S606, the first communication data is broadcast to all slaves on the SPMI bus or sent to a designated slave on the SPMI bus.

In one embodiment of the present application, broadcasting the first communication data to all slaves or transmitting the first communication data to a designated slave includes: determining a sending mode of the first communication data according to the configuration information; if the sending mode of the first communication data is determined to be a broadcasting mode, broadcasting the first communication data to all the slaves; if the transmission mode of the first communication data is determined to be a mode of transmitting to the designated slave, the first communication data is transmitted to the designated slave.

In the embodiment of the present application, since the integrated circuit device 13 can broadcast the communication data sent by the host 11 of a specific manufacturer to all the slaves 12 or send the communication data to the designated slaves 12, the embodiment of the present application can implement interaction between the hosts 11 and the slaves 12 of different manufacturers on the SPMI bus. In addition, since the extended host 12 is also capable of broadcasting communication data to all the slaves 12 or transmitting communication data to a specified slave 12 through the integrated circuit device 13, the extension of the host 11 in number and the customized characteristic function of the host 11 are realized on the SPMI bus. In addition, in the embodiment of the present application, the integrated circuit device 13 sends the communication data acquired from the host 11 to all the slaves or the designated slaves 12, and because the integrated circuit device 13 can increase the driving capability of the signals of the SPMI bus, the layout of the host 11 and the slaves 12 can be performed on the PCB using a longer SPMI bus, which solves the problem that the layout of the host 11 and the slaves 12 is limited when they are on the PCB, and realizes the HUB (HUB) function of the SPMI bus.

In an embodiment of the present application, after step S605, the method further includes: the slave 12 is configured according to the first communication data or the second communication data. In an embodiment of the present application, taking the slave 12 as a power supply device as an example, configuring the slave 12 according to the first communication data or the second communication data includes: the operation mode of the slave 12 is configured according to the operation mode of the first communication data or the second communication data, or the output voltage value of the slave 12 is configured according to the output voltage value of the first communication data or the second communication data.

Referring to fig. 7, a hardware structure of an electronic device 100 according to an embodiment of the application is shown. The electronic device 100 may include a processor 110, an integrated circuit device 13, an external memory interface 120, an internal memory 121, a universal serial bus (universal serial bus, USB) interface 130, a charge management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, keys 190, a motor 191, an indicator 192, a camera 193, a display 194, and a subscriber identity module (subscriber identification module, SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyro sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, and the like.

It should be understood that the illustrated structure of the embodiment of the present application does not constitute a specific limitation on the electronic device 100. In other embodiments of the application, electronic device 100 may include more or fewer components than shown, or certain components may be combined, or certain components may be split, or different arrangements of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

The processor 110 may include one or more processing units, such as: the processor 110 may include an application processor (application processor, AP), a modem processor, a graphics processor (graphics processing unit, GPU), an image signal processor (image signal processor, ISP), a controller, a video codec, a digital signal processor (digital signal processor, DSP), a baseband processor, and/or a neural network processor (neural-network processing unit, NPU), etc. Wherein the different processing units may be separate devices or may be integrated in one or more processors.

The controller can generate operation control signals according to the instruction operation codes and the time sequence signals to finish the control of instruction fetching and instruction execution.

A memory may also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may hold instructions or data that the processor 110 has just used or recycled. If the processor 110 needs to reuse the instruction or data, it can be called directly from the memory. Repeated accesses are avoided and the latency of the processor 110 is reduced, thereby improving the efficiency of the system.

In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an integrated circuit (inter-integrated circuit, I2C) interface, an integrated circuit built-in audio (inter-integrated circuit sound, I2S) interface, a pulse code modulation (pulse code modulation, PCM) interface, a universal asynchronous receiver transmitter (universal asynchronous receiver/transmitter, UART) interface, a mobile industry processor interface (mobile industry processor interface, MIPI), a general-purpose input/output (GPIO) interface, a subscriber identity module (subscriber identity module, SIM) interface, and/or a universal serial bus (universal serial bus, USB) interface, among others.

The I2C interface is a bi-directional synchronous serial bus comprising a serial data line (SDA) and a serial clock line (derail clock line, SCL). In some embodiments, the processor 110 may contain multiple sets of I2C buses. The processor 110 may be coupled to the touch sensor 180K, charger, flash, camera 193, etc., respectively, through different I2C bus interfaces. For example: the processor 110 may be coupled to the touch sensor 180K through an I2C interface, such that the processor 110 communicates with the touch sensor 180K through an I2C bus interface to implement a touch function of the electronic device 100.

The I2S interface may be used for audio communication. In some embodiments, the processor 110 may contain multiple sets of I2S buses. The processor 110 may be coupled to the audio module 170 via an I2S bus to enable communication between the processor 110 and the audio module 170. In some embodiments, the audio module 170 may transmit an audio signal to the wireless communication module 160 through the I2S interface, to implement a function of answering a call through the bluetooth headset.

PCM interfaces may also be used for audio communication to sample, quantize and encode analog signals. In some embodiments, the audio module 170 and the wireless communication module 160 may be coupled through a PCM bus interface. In some embodiments, the audio module 170 may also transmit audio signals to the wireless communication module 160 through the PCM interface to implement a function of answering a call through the bluetooth headset. Both the I2S interface and the PCM interface may be used for audio communication.

The UART interface is a universal serial data bus for asynchronous communications. The bus may be a bi-directional communication bus. It converts the data to be transmitted between serial communication and parallel communication. In some embodiments, a UART interface is typically used to connect the processor 110 with the wireless communication module 160. For example: the processor 110 communicates with a bluetooth module in the wireless communication module 160 through a UART interface to implement a bluetooth function. In some embodiments, the audio module 170 may transmit an audio signal to the wireless communication module 160 through a UART interface, to implement a function of playing music through a bluetooth headset.

The MIPI interface may be used to connect the processor 110 to peripheral devices such as a display 194, a camera 193, and the like. The MIPI interfaces include camera serial interfaces (camera serial interface, CSI), display serial interfaces (display serial interface, DSI), and the like. In some embodiments, processor 110 and camera 193 communicate through a CSI interface to implement the photographing functions of electronic device 100. The processor 110 and the display 194 communicate via a DSI interface to implement the display functionality of the electronic device 100.

The GPIO interface may be configured by software. The GPIO interface may be configured as a control signal or as a data signal. In some embodiments, a GPIO interface may be used to connect the processor 110 with the camera 193, the display 194, the wireless communication module 160, the audio module 170, the sensor module 180, and the like. The GPIO interface may also be configured as an I2C interface, an I2S interface, a UART interface, an MIPI interface, etc.

The USB interface 130 is an interface conforming to the USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, or the like. The USB interface 130 may be used to connect a charger to charge the electronic device 100, and may also be used to transfer data between the electronic device 100 and a peripheral device. And can also be used for connecting with a headset, and playing audio through the headset. The interface may also be used to connect other electronic devices 100, such as AR devices, etc.

It should be understood that the interfacing relationship between the modules illustrated in the embodiments of the present application is only illustrative, and is not meant to limit the structure of the electronic device 100. In other embodiments of the present application, the electronic device 100 may also employ different interfacing manners in the above embodiments, or a combination of multiple interfacing manners.

The charge management module 140 is configured to receive a charge input from a charger. The charger can be a wireless charger or a wired charger. In some wired charging embodiments, the charge management module 140 may receive a charging input of a wired charger through the USB interface 130. In some wireless charging embodiments, the charge management module 140 may receive wireless charging input through a wireless charging coil of the electronic device 100. The charging management module 140 may also supply power to the electronic device 100 through the power management module 141 while charging the battery 142.

The power management module 141 is used for connecting the battery 142, and the charge management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and/or the charge management module 140 to power the processor 110, the internal memory 121, the display 194, the camera 193, the wireless communication module 160, and the like. The power management module 141 may also be configured to monitor battery capacity, battery cycle number, battery health (leakage, impedance) and other parameters. In other embodiments, the power management module 141 may also be provided in the processor 110. In other embodiments, the power management module 141 and the charge management module 140 may be disposed in the same device.

The wireless communication function of the electronic device 100 may be implemented by the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, a modem processor, a baseband processor, and the like.

The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. Each antenna in the electronic device 100 may be used to cover a single or multiple communication bands. Different antennas may also be multiplexed to improve the utilization of the antennas. For example: the antenna 1 may be multiplexed into a diversity antenna of a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.

The mobile communication module 150 may provide a solution for wireless communication including 2G/3G/4G/5G, etc., applied to the electronic device 100. The mobile communication module 150 may include at least one filter, switch, power amplifier, low noise amplifier (low noise amplifier, LNA), etc. The mobile communication module 150 may receive electromagnetic waves from the antenna 1, perform processes such as filtering, amplifying, and the like on the received electromagnetic waves, and transmit the processed electromagnetic waves to the modem processor for demodulation. The mobile communication module 150 can amplify the signal modulated by the modem processor, and convert the signal into electromagnetic waves through the antenna 1 to radiate. In some embodiments, at least some of the functional modules of the mobile communication module 150 may be disposed in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 may be provided in the same device as at least some of the modules of the processor 110.

The modem processor may include a modulator and a demodulator. The modulator is used for modulating the low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used for demodulating the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low frequency baseband signal to the baseband processor for processing. The low frequency baseband signal is processed by the baseband processor and then transferred to the application processor. The application processor outputs sound signals through an audio device (not limited to the speaker 170A, the receiver 170B, etc.), or displays images or video through the display screen 194. In some embodiments, the modem processor may be a stand-alone device. In other embodiments, the modem processor may be provided in the same device as the mobile communication module 150 or other functional module, independent of the processor 110.

The wireless communication module 160 may provide solutions for wireless communication including wireless local area network (wireless local area networks, WLAN) (e.g., wireless fidelity (wireless fidelity, wi-Fi) network), bluetooth (BT), global navigation satellite system (global navigation satellite system, GNSS), frequency modulation (frequency modulation, FM), near field wireless communication technology (near field communication, NFC), infrared technology (IR), etc., as applied to the electronic device 100. The wireless communication module 160 may be one or more devices that integrate at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, modulates the electromagnetic wave signals, filters the electromagnetic wave signals, and transmits the processed signals to the processor 110. The wireless communication module 160 may also receive a signal to be transmitted from the processor 110, frequency modulate it, amplify it, and convert it to electromagnetic waves for radiation via the antenna 2.

In some embodiments, antenna 1 and mobile communication module 150 of electronic device 100 are coupled, and antenna 2 and wireless communication module 160 are coupled, such that electronic device 100 may communicate with a network and other devices through wireless communication techniques. The wireless communication techniques may include the Global System for Mobile communications (global system for mobile communications, GSM), general packet radio service (general packet radio service, GPRS), code division multiple access (code division multiple access, CDMA), wideband code division multiple access (wideband code division multiple access, WCDMA), time division code division multiple access (time-division code division multiple access, TD-SCDMA), long term evolution (long term evolution, LTE), BT, GNSS, WLAN, NFC, FM, and/or IR techniques, among others. The GNSS may include a global satellite positioning system (global positioning system, GPS), a global navigation satellite system (global navigation satellite system, GLONASS), a beidou satellite navigation system (beidou navigation satellite system, BDS), a quasi zenith satellite system (quasi-zenith satellite system, QZSS) and/or a satellite based augmentation system (satellite based augmentation systems, SBAS).

The electronic device 100 implements display functions through a GPU, a display screen 194, an application processor, and the like. The GPU is a microprocessor for image processing, and is connected to the display 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 110 may include one or more GPUs that execute program instructions to generate or change display information.

The display screen 194 is used to display images, videos, and the like. The display 194 includes a display panel. The display panel may employ a liquid crystal display (liquid crystal display, LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED) or an active-matrix organic light-emitting diode (matrix organic light emitting diode), a flexible light-emitting diode (FLED), a mini, a Micro led, a Micro-OLED, a quantum dot light-emitting diode (quantum dot light emitting diodes, QLED), or the like. In some embodiments, the electronic device 100 may include 1 or N display screens 194, N being a positive integer greater than 1.

The electronic device 100 may implement photographing functions through an ISP, a camera 193, a video codec, a GPU, a display screen 194, an application processor, and the like.

The ISP is used to process data fed back by the camera 193. For example, when photographing, the shutter is opened, light is transmitted to the camera photosensitive element through the lens, the optical signal is converted into an electric signal, and the camera photosensitive element transmits the electric signal to the ISP for processing and is converted into an image visible to naked eyes. ISP can also optimize the noise, brightness and skin color of the image. The ISP can also optimize parameters such as exposure, color temperature and the like of a shooting scene. In some embodiments, the ISP may be provided in the camera 193.

The camera 193 is used to capture still images or video. The object generates an optical image through the lens and projects the optical image onto the photosensitive element. The photosensitive element may be a charge coupled device (charge coupled device, CCD) or a Complementary Metal Oxide Semiconductor (CMOS) phototransistor. The photosensitive element converts the optical signal into an electrical signal, which is then transferred to the ISP to be converted into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard RGB, YUV, or the like format. In some embodiments, electronic device 100 may include 1 or N cameras 193, N being a positive integer greater than 1.

The digital signal processor is used for processing digital signals, and can process other digital signals besides digital image signals. For example, when the electronic device 100 selects a frequency bin, the digital signal processor is used to fourier transform the frequency bin energy, or the like.

Video codecs are used to compress or decompress digital video. The electronic device 100 may support one or more video codecs. In this way, the electronic device 100 may play or record video in a variety of encoding formats, such as: dynamic picture experts group (moving picture experts group, MPEG) 1, MPEG2, MPEG3, MPEG4, etc.

The NPU is a neural-network (NN) computing processor, and can rapidly process input information by referencing a biological neural network structure, for example, referencing a transmission mode between human brain neurons, and can also continuously perform self-learning. Applications such as intelligent awareness of the electronic device 100 may be implemented through the NPU, for example: image recognition, face recognition, speech recognition, text understanding, etc.

The internal memory 121 may include one or more random access memories (random access memory, RAM) and one or more non-volatile memories (NVM).

The random access memory may include a static random-access memory (SRAM), a dynamic random-access memory (dynamic random access memory, DRAM), a synchronous dynamic random-access memory (synchronous dynamic random access memory, SDRAM), a double data rate synchronous dynamic random-access memory (double data rate synchronous dynamic random access memory, DDR SDRAM, such as fifth generation DDR SDRAM is commonly referred to as DDR5 SDRAM), etc.;

the nonvolatile memory may include a disk storage device, a flash memory (flash memory).

The FLASH memory may include NOR FLASH, NAND FLASH, 3D NAND FLASH, etc. divided according to an operation principle, may include single-level memory cells (SLC), multi-level memory cells (MLC), triple-level memory cells (TLC), quad-level memory cells (QLC), etc. divided according to a storage specification, may include universal FLASH memory (english: universal FLASH storage, UFS), embedded multimedia memory cards (embedded multi media Card, eMMC), etc. divided according to a storage specification.

The random access memory may be read directly from and written to by the processor 110, may be used to store executable programs (e.g., machine instructions) for an operating system or other on-the-fly programs, may also be used to store data for users and applications, and the like.

The nonvolatile memory may store executable programs, store data of users and applications, and the like, and may be loaded into the random access memory in advance for the processor 110 to directly read and write.

The external memory interface 120 may be used to connect external non-volatile memory to enable expansion of the memory capabilities of the electronic device 100. The external nonvolatile memory communicates with the processor 110 through the external memory interface 120 to implement a data storage function. For example, files such as music and video are stored in an external nonvolatile memory.

The internal memory 121 or the external memory interface 120 is used to store one or more computer programs. One or more computer programs are configured to be executed by the processor 110. The one or more computer programs include a plurality of instructions that when executed by the processor 110 implement the bus interface extension method performed on the electronic device 100 in the above embodiments to implement the bus interface extension function of the electronic device 100.

The electronic device 100 may implement audio functions through an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, an application processor, and the like. Such as music playing, recording, etc.

The audio module 170 is used to convert digital audio information into an analog audio signal output and also to convert an analog audio input into a digital audio signal. The audio module 170 may also be used to encode and decode audio signals. In some embodiments, the audio module 170 may be disposed in the processor 110, or a portion of the functional modules of the audio module 170 may be disposed in the processor 110.

The speaker 170A, also referred to as a "horn," is used to convert audio electrical signals into sound signals. The electronic device 100 may listen to music, or to hands-free conversations, through the speaker 170A.

A receiver 170B, also referred to as a "earpiece", is used to convert the audio electrical signal into a sound signal. When electronic device 100 is answering a telephone call or voice message, voice may be received by placing receiver 170B in close proximity to the human ear.

Microphone 170C, also referred to as a "microphone" or "microphone", is used to convert sound signals into electrical signals. When making a call or transmitting voice information, the user can sound near the microphone 170C through the mouth, inputting a sound signal to the microphone 170C. The electronic device 100 may be provided with at least one microphone 170C. In other embodiments, the electronic device 100 may be provided with two microphones 170C, and may implement a noise reduction function in addition to collecting sound signals. In other embodiments, the electronic device 100 may also be provided with three, four, or more microphones 170C to enable collection of sound signals, noise reduction, identification of sound sources, directional recording functions, etc.

The earphone interface 170D is used to connect a wired earphone. The headset interface 170D may be a USB interface 130 or a 3.5mm open mobile electronic device 100 platform (open mobile terminal platform, OMTP) standard interface, a american cellular telecommunications industry association (cellular telecommunications industry association of the USA, CTIA) standard interface.

The pressure sensor 180A is used to sense a pressure signal, and may convert the pressure signal into an electrical signal. In some embodiments, the pressure sensor 180A may be disposed on the display screen 194. The pressure sensor 180A is of various types, such as a resistive pressure sensor, an inductive pressure sensor, a capacitive pressure sensor, and the like. The capacitive pressure sensor may be a capacitive pressure sensor comprising at least two parallel plates with conductive material. The capacitance between the electrodes changes when a force is applied to the pressure sensor 180A. The electronic device 100 determines the strength of the pressure from the change in capacitance. When a touch operation is applied to the display screen 194, the electronic apparatus 100 detects the touch operation intensity according to the pressure sensor 180A. The electronic device 100 may also calculate the location of the touch based on the detection signal of the pressure sensor 180A. In some embodiments, touch operations that act on the same touch location, but at different touch operation strengths, may correspond to different operation instructions. For example: and executing an instruction for checking the short message when the touch operation with the touch operation intensity smaller than the first pressure threshold acts on the short message application icon. And executing an instruction for newly creating the short message when the touch operation with the touch operation intensity being greater than or equal to the first pressure threshold acts on the short message application icon.

The gyro sensor 180B may be used to determine a motion gesture of the electronic device 100. In some embodiments, the angular velocity of electronic device 100 about three axes (i.e., x, y, and z axes) may be determined by gyro sensor 180B. The gyro sensor 180B may be used for photographing anti-shake. For example, when the shutter is pressed, the gyro sensor 180B detects the shake angle of the electronic device 100, calculates the distance to be compensated by the lens module according to the angle, and makes the lens counteract the shake of the electronic device 100 through the reverse motion, so as to realize anti-shake. The gyro sensor 180B may also be used for navigating, somatosensory game scenes.

The air pressure sensor 180C is used to measure air pressure. In some embodiments, electronic device 100 calculates altitude from barometric pressure values measured by barometric pressure sensor 180C, aiding in positioning and navigation. The magnetic sensor 180D includes a hall sensor. The electronic device 100 may detect the opening and closing of the flip cover using the magnetic sensor 180D. In some embodiments, when the electronic device 100 is a flip machine, the electronic device 100 may detect the opening and closing of the flip according to the magnetic sensor 180D. And then according to the detected opening and closing state of the leather sheath or the opening and closing state of the flip, the characteristics of automatic unlocking of the flip and the like are set. The acceleration sensor 180E may detect the magnitude of acceleration of the electronic device 100 in various directions (typically three axes). The magnitude and direction of gravity may be detected when the electronic device 100 is stationary. The method can also be used for identifying the gesture of the electronic equipment 100, and can be applied to applications such as horizontal and vertical screen switching, pedometers and the like. A distance sensor 180F for measuring a distance. The electronic device 100 may measure the distance by infrared or laser. In some embodiments, the electronic device 100 may range using the distance sensor 180F to achieve quick focus.

The proximity light sensor 180G may include, for example, a Light Emitting Diode (LED) and a light detector, such as a photodiode. The light emitting diode may be an infrared light emitting diode. The electronic device 100 emits infrared light outward through the light emitting diode. The electronic device 100 detects infrared reflected light from nearby objects using a photodiode. When sufficient reflected light is detected, it may be determined that there is an object in the vicinity of the electronic device 100. When insufficient reflected light is detected, the electronic device 100 may determine that there is no object in the vicinity of the electronic device 100. The electronic device 100 can detect that the user holds the electronic device 100 close to the ear by using the proximity light sensor 180G, so as to automatically extinguish the screen for the purpose of saving power. The proximity light sensor 180G may also be used in holster mode, pocket mode to automatically unlock and lock the screen.

The ambient light sensor 180L is used to sense ambient light level. The electronic device 100 may adaptively adjust the brightness of the display 194 based on the perceived ambient light level. The ambient light sensor 180L may also be used to automatically adjust white balance when taking a photograph. Ambient light sensor 180L may also cooperate with proximity light sensor 180G to detect whether electronic device 100 is in a pocket to prevent false touches.

The fingerprint sensor 180H is used to collect a fingerprint. The electronic device 100 may utilize the collected fingerprint feature to unlock the fingerprint, access the application lock, photograph the fingerprint, answer the incoming call, etc.

The temperature sensor 180J is for detecting temperature. In some embodiments, the electronic device 100 performs a temperature processing strategy using the temperature detected by the temperature sensor 180J. For example, when the temperature reported by temperature sensor 180J exceeds a threshold, electronic device 100 performs a reduction in the performance of a processor located in the vicinity of temperature sensor 180J in order to reduce power consumption to implement thermal protection. In other embodiments, when the temperature is below another threshold, the electronic device 100 heats the battery 142 to avoid the low temperature causing the electronic device 100 to be abnormally shut down. In other embodiments, when the temperature is below a further threshold, the electronic device 100 performs boosting of the output voltage of the battery 142 to avoid abnormal shutdown caused by low temperatures.

The touch sensor 180K, also referred to as a "touch device". The touch sensor 180K may be disposed on the display screen 194, and the touch sensor 180K and the display screen 194 form a touch screen, which is also called a "touch screen". The touch sensor 180K is for detecting a touch operation acting thereon or thereabout. The touch sensor may communicate the detected touch operation to the application processor to determine the touch event type. Visual output related to touch operations may be provided through the display 194. In other embodiments, the touch sensor 180K may also be disposed on the surface of the electronic device 100 at a different location than the display 194.

The bone conduction sensor 180M may acquire a vibration signal. In some embodiments, bone conduction sensor 180M may acquire a vibration signal of a human vocal tract vibrating bone pieces. The bone conduction sensor 180M may also contact the pulse of the human body to receive the blood pressure pulsation signal. In some embodiments, bone conduction sensor 180M may also be provided in a headset, in combination with an osteoinductive headset. The audio module 170 may analyze the voice signal based on the vibration signal of the sound portion vibration bone block obtained by the bone conduction sensor 180M, so as to implement a voice function. The application processor may analyze the heart rate information based on the blood pressure beat signal acquired by the bone conduction sensor 180M, so as to implement a heart rate detection function.

The keys 190 include a power-on key, a volume key, etc. The keys 190 may be mechanical keys. Or may be a touch key. The electronic device 100 may receive key inputs, generating key signal inputs related to user settings and function controls of the electronic device 100.

The motor 191 may generate a vibration cue. The motor 191 may be used for incoming call vibration alerting as well as for touch vibration feedback. For example, touch operations acting on different applications (e.g., photographing, audio playing, etc.) may correspond to different vibration feedback effects. The motor 191 may also correspond to different vibration feedback effects by touching different areas of the display screen 194. Different application scenarios (such as time reminding, receiving information, alarm clock, game, etc.) can also correspond to different vibration feedback effects. The touch vibration feedback effect may also support customization.

The indicator 192 may be an indicator light, may be used to indicate a state of charge, a change in charge, a message indicating a missed call, a notification, etc.

The SIM card interface 195 is used to connect a SIM card. The SIM card may be inserted into the SIM card interface 195, or removed from the SIM card interface 195 to enable contact and separation with the electronic device 100. The electronic device 100 may support 1 or N SIM card interfaces, N being a positive integer greater than 1. The SIM card interface 195 may support Nano SIM cards, micro SIM cards, and the like. The same SIM card interface 195 may be used to insert multiple cards simultaneously. The types of the plurality of cards may be the same or different. The SIM card interface 195 may also be compatible with different types of SIM cards. The SIM card interface 195 may also be compatible with external memory cards. The electronic device 100 interacts with the network through the SIM card to realize functions such as communication and data communication. In some embodiments, the electronic device 100 employs esims, i.e.: an embedded SIM card. eSIM cards can be embedded in the electronic device 100.

The present embodiment also provides a computer program product which, when run on a computer, causes the computer to perform the above-described relevant steps to implement the bus interface extension method in the above-described embodiments.

In addition, some embodiments of the present application provide an apparatus, which may be embodied as a chip, component or module, which may include a processor and a memory coupled to each other; the memory is used for storing computer-executable instructions, and when the device is running, the processor can execute the computer-executable instructions stored in the memory, so that the chip executes the bus interface expansion method in each method embodiment.

The electronic device, the computer storage medium, the computer program product, or the chip provided in this embodiment are used to execute the corresponding methods provided above, so that the beneficial effects thereof can be referred to the beneficial effects in the corresponding methods provided above, and will not be described herein.

From the foregoing description of the embodiments, it will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of functional modules is illustrated, and in practical application, the above-described functional allocation may be implemented by different functional modules according to needs, i.e. the internal structure of the apparatus is divided into different functional modules to implement all or part of the functions described above.

In the several embodiments provided by the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the modules or units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another apparatus, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and the parts displayed as units may be one physical unit or a plurality of physical units, may be located in one place, or may be distributed in a plurality of different places. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment. In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.

The integrated unit may be stored in a readable storage medium if implemented in the form of a software functional unit and sold or used as a stand-alone product. Based on such understanding, the technical solutions of some embodiments of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solutions in the form of a software product stored in a storage medium, including several instructions to cause a device (which may be a single-chip microcomputer, a chip or the like) or a processor (processor) to perform all or part of the steps of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

Finally, it should be noted that the above-mentioned embodiments are merely for illustrating the technical solutions of some embodiments of the present application, and not for limiting, and although some embodiments of the present application have been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions can be made to the technical solutions of some embodiments of the present application without departing from the spirit and scope of the technical solutions of some embodiments of the present application.

Claims

1. A bus interface extension method for use in an integrated circuit device, the method comprising:

when detecting that a host is connected with an SPMI bus, detecting a slave connected with the SPMI bus;

acquiring communication data sent by the host;

broadcasting the communication data to all the slaves or transmitting the communication data to the appointed slaves.

2. The bus interface extension method as set forth in claim 1, wherein the broadcasting the communication data to all slaves or transmitting the communication data to a designated slave comprises:

if the sending mode of the communication data is determined to be a broadcasting mode according to the configuration information, broadcasting the communication data to all the slaves;

and if the transmission mode of the communication data is determined to be a mode of transmitting to a designated slave according to the configuration information, transmitting the communication data to the designated slave.

3. The bus interface extension method of claim 2, wherein the configuration information is preset in the integrated circuit device.

4. The bus interface extension method as set forth in claim 3, wherein the configuration information is preset in the integrated circuit device comprising:

And receiving the configuration information input by a user through a user interface, and setting the configuration information in the integrated circuit device.

5. The bus interface extension method as set forth in claim 1, wherein after the acquiring the communication data sent by the host, the method further comprises:

identifying one or more of the following of the communication data by parsing the communication data: the address of the host, the address of the slave, the address of the register of the slave, the read-write instruction and the read-write data.

6. The bus interface extension method as set forth in claim 1, wherein the detecting that the host is connected to the SPMI bus comprises:

transmitting a first in-place instruction to a host mounted on the SPMI bus through the SPMI bus;

if a first reply signal responding to a first bit instruction is received, the connection of the host computer and the SPMI bus is detected.

7. The bus interface extension method as set forth in claim 1, wherein the detecting the slave connected to the SPMI bus comprises:

transmitting a second in-place instruction to all slaves mounted on the SPMI bus through the SPMI bus;

And determining all slaves connected with the integrated circuit device according to the second reply signals of all responses.

8. The bus interface expansion method of claim 1, wherein the slaves connected to the SPMI bus comprise a non-expanded slave and an expanded slave, the non-expanded slave being connected to the integrated circuit device through a first lower port and the expanded slave being connected to the integrated circuit device through a second lower port.

9. The bus interface extension method of claim 1, wherein the integrated circuit device comprises at least one of a field programmable gate array chip, a micro control unit, an active device circuit, and an application specific integrated circuit chip.

10. A bus interface extension method for use in an integrated circuit device, the method comprising:

if the SPMI bus is determined to be in an idle state, detecting whether an extended host is connected with the SPMI bus;

if the extended host is connected with the SPMI bus, acquiring first communication data sent by the extended host;

broadcasting the first communication data to all slaves on the SPMI bus or sending the first communication data to a designated slave on the SPMI bus.

11. The bus interface extension method as set forth in claim 10, wherein before said determining that the SPMI bus is in the idle state, the method further comprises:

if the connection of the non-expanded host computer and the SPMI bus is detected, acquiring second communication data sent by the non-expanded host computer.

12. The bus interface extension method of claim 11, wherein the method further comprises:

and if the SPMI bus is determined not to be in the idle state, broadcasting the second communication data to all slaves on the SPMI bus or sending the second communication data to a designated slave on the SPMI bus.

13. The bus interface expansion method of claim 11, wherein the non-expanded host is coupled to a first upper port of the integrated circuit device and the expanded host is coupled to a second upper port of the integrated circuit device.

14. The bus interface extension method as set forth in claim 10, wherein the broadcasting the first communication data to all slaves on the SPMI bus or transmitting the first communication data to a designated slave on the SPMI bus comprises:

if the sending mode of the first communication data is determined to be a broadcasting mode according to the configuration information, broadcasting the communication data to all the slaves;

And if the transmission mode of the first communication data is determined to be the mode of transmitting to the appointed slave machine according to the configuration information, transmitting the first communication data to the appointed slave machine.

15. The bus interface extension method of claim 14, wherein the configuration information is pre-set in the integrated circuit device.

16. An integrated circuit device comprising a chip, the integrated circuit device coupled to a memory in an electronic device:

the memory is used for storing program instructions;

the chip for controlling the integrated circuit device to perform the bus interface extension method of any one of claims 1 to 15.

17. An electronic device comprising an integrated circuit device and a memory:

the memory is used for storing program instructions;

the integrated circuit device configured to read and execute the program instructions stored in the memory, which when executed by the integrated circuit device, cause the integrated circuit device to perform the bus interface extension method of any one of claims 1 to 15.

18. A computer storage medium storing program instructions which, when run on an integrated circuit device, cause the integrated circuit device to perform the bus interface extension method of any one of claims 1 to 15.