CN117129748A - Zero crossing monitoring circuit and method based on CRM boost PFC converter - Google Patents
Zero crossing monitoring circuit and method based on CRM boost PFC converter Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/175—Indicating the instants of passage of current or voltage through a given value, e.g. passage through zero
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/30—Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
- H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
- H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The application discloses a zero-crossing monitoring circuit and a zero-crossing monitoring method based on a CRM boost PFC converter, which are characterized in that firstly, a conduction control signal and a lower clamping inductance current output by a clamping circuit in an inductance current zero-crossing detection circuit of the CRM boost PFC converter are obtained, and the lower clamping inductance current is mirrored; carrying out time-sharing sampling on the image current signals acquired by the images in a time-sharing manner to acquire a first image sampling electric signal and a second image sampling electric signal which are spaced by a preset unit interval time; and finally, comparing the first image sampling electric signal with the second image sampling electric signal, and outputting a zero crossing point conduction signal according to a comparison result so as to control the conduction of the power switch tube. The zero voltage monitoring in ZVS is realized due to the discharge characteristic of parasitic capacitance between the drain electrode and the source electrode of the power switch tube, so that the monitoring precision of zero voltage on is greatly improved, the switching loss of the power switch tube is reduced, and the switching efficiency is improved.
Description
Technical Field
The application relates to the technical field of power electronic converters, in particular to a zero crossing monitoring circuit and method based on a CRM boost PFC converter.
Background
With the development of power electronics technology, high-power converters are increasingly used, and the power density and efficiency requirements of the converters are also increasingly high. In order to improve the working efficiency of the converter, a power factor correction technique is generally adopted. PFC (Power Factor Correction) converter is a power conversion device for improving the power factor of a power system. Whereas CRM boost PFC converters combine CRM boost converters and power factor correction techniques. CRM (CriticalConduction Mode) critical conduction mode refers to the boost converter inductor operating in current critical mode. Opposite to this are CCM (Continuous Current Mode) continuous current mode and DCM (DiscontinuousCurrent Mode) discontinuous current mode. PFC technology aims to eliminate the problem of power factor degradation of the power system caused by nonlinear loads, so as to improve the efficiency and stability of the power system. To improve the converter operating efficiency, a switching tube "soft switching" technique is generally used, and one of the most important soft switching techniques is the zero voltage on (ZVS) technique. When the voltage of the drain and source ends of the switching tube is zero, the switching tube is turned on, so that the switching loss of the switching tube can be greatly reduced, and the switching tube is particularly suitable for the current situation that the frequency of the switching tube of the current converter is higher and higher.
Disclosure of Invention
The application mainly solves the problem of improving the performance of the zero-voltage switching-on technology.
According to a first aspect, in one embodiment, a zero-crossing monitoring circuit based on a CRM boost PFC converter is provided, including a sampling current mirror circuit, a sampling switching circuit, a sampling comparison circuit, a sampling frequency control circuit, and a conduction control circuit;
the sampling current mirror circuit is connected with the sampling switching circuit and is used for mirroring the lower clamping inductance current and outputting a mirror current signal obtained by mirroring to the sampling switching circuit;
the sampling frequency control circuit is connected with the clamping circuit, the sampling comparison circuit and the sampling switching circuit and is used for sending a sampling control signal to the sampling switching circuit when receiving a first enabling signal output by the clamping circuit and a second enabling signal; the first enabling signal is a conduction control signal output by the clamping circuit;
the sampling switching circuit is connected with the sampling comparison circuit and is used for responding to the sampling control signal to sample the image current signal at a preset unit interval time so as to obtain a first image sampling electric signal and a second image sampling electric signal, and sending the first image sampling electric signal and the second image sampling electric signal which are spaced at the preset unit interval time to the sampling comparison circuit;
the sampling comparison circuit is connected with the conduction control circuit and is used for sending the second enabling signal to the sampling frequency control circuit when the first image sampling electric signal and the second image sampling electric signal are different, and sending a zero crossing point confirmation electric signal to the conduction control circuit when the first image sampling electric signal and the second image sampling electric signal are the same;
the conduction control circuit is connected with the clamping circuit and is used for outputting a zero crossing point conduction signal when receiving the zero confirmation electric signal and the conduction control signal, and the zero crossing point conduction signal is used for controlling the conduction of the power switch tube.
In one embodiment, the mirrored current signal includes a mirrored first current signal and a mirrored second current signal; the sampling current mirror circuit comprises a current mirror circuit, the current mirror circuit comprises a first connecting end, a second connecting end and a third connecting end, the first connecting end of the current mirror circuit is used for inputting lower clamping inductance current, the second connecting end of the current mirror circuit is used for outputting a mirror image first current signal, the third connecting end of the current mirror circuit is used for outputting a mirror image second current signal, and electric parameters of the mirror image first current signal and the mirror image second current signal are identical to those of the lower clamping inductance current.
In an embodiment, the sampling control signal includes a sampling first control signal and a sampling second control signal, and the sampling frequency control circuit sends the sampling first control signal and the sampling second control signal to the sampling switching circuit according to a preset switch clock control logic respectively;
the sampling switching circuit comprises a first switching circuit, a second switching circuit and a first operational amplifier;
the first switching circuit comprises a first connecting end, a second connecting end and a third connecting end, the first connecting end of the first switching circuit is connected with the second connecting end of the current mirror circuit, the second connecting end of the first switching circuit is connected with the positive input end of the first operational amplifier, and the third connecting end of the first switching circuit is connected with the sampling frequency control circuit; the third connection end of the first switch circuit is used for inputting the sampling first control signal, and the first switch circuit is used for responding to the sampling first control signal to be conducted;
the second switching circuit comprises a first connecting end, a second connecting end and a third connecting end, the first connecting end of the second switching circuit is connected with the third connecting end of the current mirror circuit, the second connecting end of the second switching circuit is connected with the negative input end of the first operational amplifier, and the third connecting end of the second switching circuit is connected with the sampling frequency control circuit; the third connection end of the second switching circuit is used for inputting the sampling second control signal, and the second switching circuit is used for responding to the sampling second control signal to be conducted;
and the output end of the first operational amplifier is connected with the sampling comparison circuit.
In one embodiment, the switching clock control logic comprises:
the sampling frequency control circuit only sends the sampling first control signal to the first switch circuit for a first preset time period, and is used for conducting the first preset time period by the first switch circuit so as to sample and hold the mirror image first current signal for the first preset time period;
the sampling frequency control circuit stops sending the sampling first control signal to the first switch circuit, and only sends the sampling second control signal to the second switch circuit for a second preset time period after the preset unit interval time is set, and the second switch circuit is used for conducting the second preset time period so as to sample and hold the mirror image second current signal for the second preset time period;
the sampling frequency control circuit stops the output of the sampling first control signal and the sampling second control signal.
In an embodiment, the duration of the preset unit interval time, the first preset time period and the second preset time period is related to the value of the lower clamp inductor current.
In one embodiment, the duration of the preset unit interval is proportional to the value of the lower clamp inductor current.
In an embodiment, the first preset time period and the duration of the first preset time period are the same and inversely proportional to the value of the lower clamp inductor current.
In an embodiment, the sampling comparison circuit includes a first comparator, a positive input end of the first comparator is connected with a preset reference voltage source, and a negative input end of the first comparator is connected with the sampling switching circuit; the positive output end of the first comparator is connected with the sampling frequency control circuit and is used for sending the second enabling signal to the sampling frequency control circuit; and the reverse output end of the first comparator is connected with the conduction control circuit and is used for sending a zero crossing point confirmation electric signal to the conduction control circuit.
In one embodiment, the on control circuit includes a logic AND gate circuit;
one input end of the logic AND gate circuit is connected with the clamping circuit and is used for receiving the conduction control signal, and the other input end of the logic AND gate circuit is connected with the sampling comparison circuit and is used for receiving the zero confirmation electric signal;
and the output end of the logic AND gate circuit is used for outputting the zero crossing point conduction signal.
According to a second aspect, in one embodiment, there is provided a zero crossing monitoring method based on a CRM boost PFC converter, for application to the zero crossing monitoring circuit of the first aspect, the zero crossing monitoring method including:
receiving a conduction control signal output by the clamping circuit;
mirroring the lower clamping inductance current to obtain a mirror current signal;
sampling the image current signal in a time-sharing manner to obtain a first image sampling electric signal and a second image sampling electric signal which are spaced by a preset unit interval time;
and comparing the first image sampling electric signal with the second image sampling electric signal, and outputting a zero crossing conduction signal according to a comparison result, wherein the zero crossing conduction signal is used for controlling the conduction of the power switch tube.
According to the zero-crossing detection method, due to the fact that the discharge characteristic of the parasitic capacitance between the drain electrode and the source electrode of the power switch tube is used, zero voltage monitoring in ZVS is achieved, and therefore monitoring accuracy of zero voltage switching-on is greatly improved, switching loss of the power switch tube is reduced, and switching efficiency is improved.
Drawings
Fig. 1 is a schematic diagram of a circuit connection of a CRM boost PFC converter in one embodiment;
fig. 2 is a schematic diagram of an electrical parameter waveform of a CRM boost PFC converter according to one embodiment;
FIG. 3 is a schematic diagram illustrating the operation of a clamp circuit of an inductor current zero crossing detection circuit according to an embodiment;
FIG. 4 is a schematic diagram of an electrical parameter waveform of the clamping circuit according to one embodiment;
FIG. 5 is a schematic diagram of the structural connection of a zero crossing monitor circuit in one embodiment;
FIG. 6 is a schematic diagram of the circuit connections of the zero crossing monitor circuit in one embodiment;
fig. 7 is a schematic flow chart of a zero crossing monitoring method in an embodiment.
Detailed Description
The application will be described in further detail below with reference to the drawings by means of specific embodiments. Wherein like elements in different embodiments are numbered alike in association. In the following embodiments, numerous specific details are set forth in order to provide a better understanding of the present application. However, one skilled in the art will readily recognize that some of the features may be omitted, or replaced by other elements, materials, or methods in different situations. In some instances, related operations of the present application have not been shown or described in the specification in order to avoid obscuring the core portions of the present application, and may be unnecessary to persons skilled in the art from a detailed description of the related operations, which may be presented in the description and general knowledge of one skilled in the art.
Furthermore, the described features, operations, or characteristics of the description may be combined in any suitable manner in various embodiments. Also, various steps or acts in the method descriptions may be interchanged or modified in a manner apparent to those of ordinary skill in the art. Thus, the various orders in the description and drawings are for clarity of description of only certain embodiments, and are not meant to be required orders unless otherwise indicated.
The numbering of the components itself, e.g. "first", "second", etc., is used herein merely to distinguish between the described objects and does not have any sequential or technical meaning. The term "coupled" as used herein includes both direct and indirect coupling (coupling), unless otherwise indicated.
In the prior art, the method of implementing the inductance CRM by the CRM boost PFC converter is to add an auxiliary winding to the inductance L,the method is used for detecting the change of the voltage of the auxiliary winding so as to determine that the inductance current returns to zero, and thus the moment when the switching tube is turned on is determined. Please refer to fig. 1 and fig. 2, which are a schematic circuit diagram of a CRM boost PFC converter and a schematic waveform diagram of an electrical parameter of a corresponding CRM boost PFC converter in an embodiment, respectively, a switching tube controller detects a voltage signal V of an access terminal ZCD according to a zero point ZCD Is to judge V by the change of (1) G At what time to high, e.g. when detecting voltage signal V ZCD When the voltage rises to 2.1V and then falls to 1.4V, the inductance current is considered to return to zero, and the switching tube is turned on, and the switching tube cannot be accurately enabled to realize ZVS though the working mode can judge the zero crossing of the inductance current, as shown in the electric parameter waveform in figure 2, V DS After only a part is lowered, V G The switching tube is conducted when the voltage is high, so that the loss of the switch is greatly increased, and the efficiency is further reduced. Based on the technical drawbacks mentioned above, an inductor current zero-crossing detection circuit of CRM mode PFC is disclosed in chinese patent document with publication number CN114527316B, but this solution has the following drawbacks:
1. the circuit is complex and the cost is high; the Vin voltage and the Vout voltage need to be sampled, and signal processing of the Vin voltage and the Vout voltage needs to be performed, and formula calculation is performed, so that complexity and cost of the system are greatly increased.
2. This technique results in poor efficiency, particularly in a significant increase in standby power consumption, due to the use of voltage dividing resistors for V DS Sampling, the voltage dividing resistor can continuously generate loss at any time, and the loss of the system is increased.
In the embodiment of the application, the CRM boost PFC converter in the prior art is improved and upgraded without a high-voltage detection circuit for detecting V DS The accurate control of the switching tube ZVS can be realized through a simple circuit without complex sampling and formula calculation. Referring to fig. 3, a schematic diagram of a clamp circuit of an inductor current zero-crossing detection circuit according to an embodiment is shown, the inductor current zero-crossing detection circuit generally includes a detection circuit, a disable circuit, and a clamp circuit 100, the clamp circuit 100 includes an inductor current suppressing circuitThe switching tube switching device comprises a circuit 1, a switching tube closing control circuit 2 and a switching tube conduction control circuit 3. The inductor current suppression circuit 1 is used for clamping an inductor current I H And lower clamp inductor current I L The switching tube closing control circuit 2 is used for outputting a closing control signal Disable to control the closing of the power switching tube, and the switching tube conduction control circuit 3 is used for outputting a conduction control signal ZCDH to control the conduction of the power switching tube. The zero detection access terminal ZCD needs to be connected with the auxiliary winding, and the voltage change range of the auxiliary winding is large, so that it is important to control an internal clamping circuit, and when detecting the voltage signal V ZCD When the voltage value is lower than the lower clamping value, the comparator controls the controlled lower clamping inductance current I L Outward current is discharged, thereby resisting the detection voltage signal V ZCD The voltage value continues to drop. When detecting voltage signal V ZCD When the voltage value is higher than the upper clamping value, the comparator controls the controlled upper clamping inductance current I H The current is pulled inwards, so that the voltage resistance value of the zero detection access terminal ZCD is lowered, and the voltage signal V is detected ZCD The voltage value continues to rise. Based on the characteristics of the clamp circuit 100, it can be observed that the clamp circuit 100 operates in a manner when the system is in ZVS operation, please refer to fig. 4, which is a schematic diagram of the electrical parameter waveform of the clamp circuit in one embodiment, when V DS When beginning to fall, lower clamp inductance current I L Has been 0, with V DS Is continued to drop down, lower clamp inductor current I L The detection voltage signal V of the zero detection access terminal ZCD can be seen after the device continues to walk in the negative direction ZCD The voltage value also starts to drop until the voltage signal V is detected ZCD When the voltage value drops to the lower clamping voltage value, the lower clamping current I L Start to rise until V DS When the voltage drops to the minimum or zero voltage, the lower clamp inductance current I L And does not continue to rise significantly. The principle is also well understood from the physical level, when the inductor current I is clamped L V of parasitic capacitance between drain and source of MOS switch tube falling to zero current DS Resonance with the inductor starts, MOS switch tube V DS The capacitive energy continues to discharge into the inductor until V DS Capacitor energy is exhausted, stopThe stopping of the inductive discharge can thus be used to achieve a more accurate ZVS control.
Example 1
Referring to fig. 5, a schematic diagram of structural connection of a zero-crossing monitoring circuit based on an inductor current zero-crossing detection circuit of a CRM boost PFC converter according to an embodiment is shown, in which the inductor current zero-crossing detection circuit is used to clamp a lower clamp inductor current I of a clamp circuit 100 L And (5) monitoring return-to-zero. The zero-crossing monitoring circuit 10 includes a sampling current mirror circuit 11, a sampling switching circuit 12, a sampling comparison circuit 13, a sampling frequency control circuit 14, and a conduction control circuit 15. The sampling current mirror circuit 11 is connected with the sampling switching circuit 12 for clamping the inductor current I L Mirror image is made and the mirror image current signal obtained by the mirror image is output to the sampling switching circuit 12. The sampling frequency control circuit 14 is connected to the clamp circuit 100, the sampling comparison circuit 13, and the sampling switching circuit 12, and is configured to send a sampling control signal to the sampling switching circuit 12 when receiving both a first enable signal output by the clamp circuit 100 and a second enable signal, where the first enable signal is a turn-on control signal ZCDH output by the clamp circuit 100. The sampling switching circuit 12 is connected to the sampling comparing circuit 13, and is configured to sample the image current signal at a preset unit interval time in response to the sampling control signal, so as to obtain a first image sampling electrical signal and a second image sampling electrical signal, and send the first image sampling electrical signal and the second image sampling electrical signal at the preset unit interval time to the sampling comparing circuit 13. The sampling comparison circuit 13 is connected to the on control circuit 15, and is configured to send a second enable signal to the sampling frequency control circuit 14 when the first image sampling electrical signal and the second image sampling electrical signal are different, and to send a zero-crossing confirmation electrical signal to the on control circuit 15 when the first image sampling electrical signal and the second image sampling electrical signal are the same. The conduction control circuit 15 is connected with the clamping circuit, and is used for outputting a zero crossing point conduction signal when receiving the zero confirmation signal and the conduction control signal, and the zero crossing point conduction signal is used for controlling the conduction of the power switching tube.
Please refer to fig. 6, which is a kind ofIn an embodiment, the mirror current signal includes a mirror first current signal I L-m1 And mirror the second current signal I L-m2 . The sampling current mirror circuit 11 comprises a current mirror circuit including a first connection terminal for clamping the inductor current I L A second connection terminal of the current mirror circuit is used for outputting a mirror image first current signal I L-m1 The third connection terminal of the current mirror circuit is used for outputting a mirror image second current signal I L-m2 Mirror the first current signal I L-m1 And mirror the second current signal I L-m2 Electrical parameters of (2) and lower clamp inductor current I L The electrical parameters of (a) are the same. In one embodiment, the sampling control signals include a sampling first control signal and a sampling second control signal, and the sampling frequency control circuit 14 sends the sampling first control signal and the sampling second control signal to the sampling switching circuit 12 according to a preset switch clock control logic. The sampling switching circuit 12 includes a first switching circuit S 1 Second switch circuit S 2 And a first operational amplifier. First switch circuit S 1 Comprises a first connecting end, a second connecting end and a third connecting end, a first switch circuit S 1 A first switch circuit S connected with the second connection terminal of the current mirror circuit 1 A first switching circuit S connected with the positive input end of the first operational amplifier 1 Is connected to the sampling frequency control circuit 14. First switch circuit S 1 The first switch circuit is used for responding to the sampling of the first control signal to conduct so as to connect the second connection end of the current mirror circuit and the positive input end of the first operational amplifier. Second switch circuit S 2 Comprises a first connecting end, a second connecting end and a third connecting end, a second switch circuit S 2 A second switch circuit S connected with the third connection terminal of the current mirror circuit 2 A second connection terminal of the first operational amplifier is connected with the negative input terminal of the first operational amplifier, a second switching circuit S 2 Third connection terminal and sampling frequency controlThe circuit 14 is connected. Second switch circuit S 2 A second switch circuit S for sampling the input of a second control signal 2 For switching on in response to the sampled second control signal to connect the third connection of the current mirror circuit with the negative input of the first operational amplifier. The output of the first operational amplifier is connected to a sampling comparator circuit 13.
It should be noted that the two mirror channels are used to respectively clamp the inductor current I L The mirror image is carried out, and the time-sharing sampling is carried out on the two channels respectively, so that the interference of the too short set time interval of the preset unit interval on sampling signals can be reduced to the minimum.
In one embodiment, the switching clock control logic of sampling frequency control circuit 14 includes:
first, the sampling frequency control circuit 14 outputs the signal to only the first switching circuit S 1 Transmitting a sampled first control signal for a first preset period of time for the first switching circuit S 1 Conducting for a first preset period of time T 1 To mirror the first current signal I L-m1 Sample and hold a first preset time period T 1 To obtain a first mirrored sampled electrical signal.
Then, the sampling frequency control circuit 14 stops the supply to the first switching circuit S 1 After the first control signal is sent and the preset unit interval time delta T is set, the first control signal is sent to the second switch circuit S 2 Transmitting the sampled second control signal for a second preset period of time T 2 For the second switching circuit S 2 Conducting for a second preset period of time T 2 To mirror the second current signal I L-m2 Sample and hold for a second preset period of time T 2 To obtain a second mirrored sampled electrical signal.
Finally, the sampling frequency control circuit 14 stops sampling the output of the first control signal and sampling the output of the second control signal so that the first switch circuit S 1 And a second switching circuit S 2 Are not conductive and sampling is stopped.
The above process calculates a sampling cycle, and when the acquired first image sampling electric signal and the acquired second image sampling electric signal are different, the above sampling process is repeatedly circulated until the acquired first image sampling electric signal and the acquired second image sampling electric signal are the same, and the circulation is stopped.
In one embodiment, the duration of the predetermined unit interval time Δt is decremented or incremented by a predetermined step size for each sample cycle. In one embodiment, the first preset time period T is decremented or incremented by a preset step size every time a sampling cycle is completed 1 And a second preset time period T 2 Is a time period of (2).
In one embodiment, the predetermined unit interval time DeltaT and the first predetermined time period T 1 And a second preset time period T 2 Duration of (h) and lower clamp inductor current I L Is related to the value of (a). In one embodiment, the duration of the unit interval time and the lower clamp inductor current I are preset L Is proportional to the value of (c). In one embodiment, each sampling cycle, a first predetermined period of time T 1 And a first preset time period T 2 Is the same as the duration of the lower clamp inductor current I L Is inversely proportional to the value of (c). It should be emphasized that, because the discharging process of the parasitic capacitance between the drain and the source of the power switch tube can be considered as linear in practical application, the preset unit interval time Δt and the first preset time period T can be dynamically adjusted according to the linear characteristic 1 And a second preset time period T 2 Is a time period of (2).
In one embodiment, the sampling comparison circuit 13 includes a first comparator, a positive input terminal of the first comparator is connected to a preset reference voltage source Vref1, and a negative input terminal of the first comparator is connected to the sampling switching circuit 12. The positive output of the first comparator is connected to the sampling frequency control circuit 14 for sending a second enable signal to the sampling frequency control circuit 14. The reverse output terminal of the first comparator is connected to the conduction control circuit 15, and is used for sending a zero crossing confirmation electrical signal to the conduction control circuit 15. In one embodiment, the on control circuit 15 includes a logic and circuit, one input terminal of the logic and circuit is connected to the clamping circuit 100 for receiving the on control signal, and the other input terminal of the logic and circuit is connected to the sampling comparison circuit 13 for receiving the zero-point confirmation electrical signal. The output end of the logic AND gate circuit is used for outputting a zero crossing conduction signal.
In an embodiment, the application also discloses a zero-crossing monitoring method based on the CRM boost PFC converter, which is applied to the zero-crossing monitoring circuit described above, please refer to fig. 7, which is a schematic flow chart of the zero-crossing monitoring method in an embodiment, and the zero-crossing monitoring method includes:
step 101, acquiring a conduction control signal.
And receiving a conduction control signal output by the clamping circuit.
Step 102, obtaining an image current signal.
And mirroring the lower clamping inductance current to obtain a mirror current signal.
Step 103, time-sharing sampling.
And the image current signal is sampled in a time-sharing manner to obtain a first image sampling electric signal and a second image sampling electric signal which are spaced by a preset unit interval time.
And 104, outputting a zero crossing point conduction signal.
And comparing the first image sampling electric signal with the second image sampling electric signal, and outputting a zero crossing conduction signal according to a comparison result, wherein the zero crossing conduction signal is used for controlling the conduction of the power switch tube.
The following describes an application manner of the zero crossing monitoring method disclosed by the application through a specific embodiment.
As shown in fig. 6, the clamp circuit 100 detects the voltage signal V of the access terminal ZCD for zero point detection ZCD Detecting when detecting the voltage signal V ZCD Higher than V ZCDA And then below V ZCDT The clamp circuit 100 outputs a high on control signal, and the sampling frequency control circuit 14 sends a first sampling control signal and a second sampling control signal to the sampling switch circuit 12 according to a preset switch clock control logic to control the first switch circuit S 1 And a second switching circuit S 2 Is sampled to obtain mirror image first current signal I L-m1 And mirror the second current signal I L-m2 The purpose is to make I of the last time point L With the current point in time I L Into a first operational amplifierAnd (5) line differential sampling. The differential sampling information is sent to the first comparator and compared with a preset reference voltage source Vref1, if the first comparator outputs a high level (second enabling signal) and the reverse output end outputs a low level, the sampling frequency control circuit 14 continues to circularly sample according to a preset switch clock control logic. If the first comparator outputs a low level, the inverting output terminal outputs a high level (zero crossing on signal), and the sampling frequency control circuit 14 stops the cyclic sampling. The logic AND circuit carries out logic AND computation on the zero crossing point conduction signal and the conduction control signal, and finally outputs a zero crossing point conduction signal ZVS_out which can directly control the switching-on logic of the power switch tube so as to realize the switching-on of the power switch tube ZVS, and finally the ZVS detection circuit is ended.
According to the zero crossing monitoring circuit disclosed by the embodiment of the application, the switching tube ZVS of the CRM boost PFC converter is realized through a simple circuit, the complexity and cost of the ZVS detection circuit are reduced, the ZVS can be realized on the basis of the prior art scheme on the premise of not increasing extra large power consumption, and the efficiency of the system is improved.
The application discloses a zero-crossing monitoring method based on a CRM boost PFC converter, which comprises the steps of firstly obtaining a conduction control signal and a lower clamping inductance current output by a clamping circuit in an inductance current zero-crossing detection circuit of the CRM boost PFC converter, and mirroring the lower clamping inductance current; carrying out time-sharing sampling on the image current signals acquired by the images in a time-sharing manner to acquire a first image sampling electric signal and a second image sampling electric signal which are spaced by a preset unit interval time; and finally, comparing the first image sampling electric signal with the second image sampling electric signal, and outputting a zero crossing point conduction signal according to a comparison result so as to control the conduction of the power switch tube. The zero voltage monitoring in ZVS is realized due to the discharge characteristic of parasitic capacitance between the drain electrode and the source electrode of the power switch tube, so that the monitoring precision of zero voltage on is greatly improved, the switching loss of the power switch tube is reduced, and the switching efficiency is improved.
The foregoing description of the application has been presented for purposes of illustration and description, and is not intended to be limiting. Several simple deductions, modifications or substitutions may also be made by a person skilled in the art to which the application pertains, based on the idea of the application.
Claims (10)
1. The zero-crossing monitoring circuit based on the CRM boost PFC converter is characterized by being used for zero-resetting monitoring of lower clamping inductance current of a clamping circuit in an inductance current zero-crossing detection circuit of the CRM boost PFC converter; the zero-crossing monitoring circuit comprises a sampling current mirror circuit, a sampling switching circuit, a sampling comparison circuit, a sampling frequency control circuit and a conduction control circuit;
the sampling current mirror circuit is connected with the sampling switching circuit and is used for mirroring the lower clamping inductance current and outputting a mirror current signal obtained by mirroring to the sampling switching circuit;
the sampling frequency control circuit is connected with the clamping circuit, the sampling comparison circuit and the sampling switching circuit and is used for sending a sampling control signal to the sampling switching circuit when receiving a first enabling signal output by the clamping circuit and a second enabling signal; the first enabling signal is a conduction control signal output by the clamping circuit;
the sampling switching circuit is connected with the sampling comparison circuit and is used for responding to the sampling control signal to sample the image current signal at a preset unit interval time so as to obtain a first image sampling electric signal and a second image sampling electric signal, and sending the first image sampling electric signal and the second image sampling electric signal which are spaced at the preset unit interval time to the sampling comparison circuit;
the sampling comparison circuit is connected with the conduction control circuit and is used for sending the second enabling signal to the sampling frequency control circuit when the first image sampling electric signal and the second image sampling electric signal are different, and sending a zero crossing point confirmation electric signal to the conduction control circuit when the first image sampling electric signal and the second image sampling electric signal are the same;
the conduction control circuit is connected with the clamping circuit and is used for outputting a zero crossing point conduction signal when receiving the zero confirmation electric signal and the conduction control signal, and the zero crossing point conduction signal is used for controlling the conduction of the power switch tube.
2. The zero crossing monitoring circuit of claim 1, wherein the mirrored current signal comprises a mirrored first current signal and a mirrored second current signal; the sampling current mirror circuit comprises a current mirror circuit, the current mirror circuit comprises a first connecting end, a second connecting end and a third connecting end, the first connecting end of the current mirror circuit is used for inputting lower clamping inductance current, the second connecting end of the current mirror circuit is used for outputting a mirror image first current signal, the third connecting end of the current mirror circuit is used for outputting a mirror image second current signal, and electric parameters of the mirror image first current signal and the mirror image second current signal are identical to those of the lower clamping inductance current.
3. The zero crossing monitoring circuit of claim 2, wherein the sampling control signal comprises a sampling first control signal and a sampling second control signal, the sampling frequency control circuit sending the sampling first control signal and the sampling second control signal to the sampling switching circuit, respectively, according to a preset switching clock control logic;
the sampling switching circuit comprises a first switching circuit, a second switching circuit and a first operational amplifier;
the first switching circuit comprises a first connecting end, a second connecting end and a third connecting end, the first connecting end of the first switching circuit is connected with the second connecting end of the current mirror circuit, the second connecting end of the first switching circuit is connected with the positive input end of the first operational amplifier, and the third connecting end of the first switching circuit is connected with the sampling frequency control circuit; the third connection end of the first switch circuit is used for inputting the sampling first control signal, and the first switch circuit is used for responding to the sampling first control signal to be conducted;
the second switching circuit comprises a first connecting end, a second connecting end and a third connecting end, the first connecting end of the second switching circuit is connected with the third connecting end of the current mirror circuit, the second connecting end of the second switching circuit is connected with the negative input end of the first operational amplifier, and the third connecting end of the second switching circuit is connected with the sampling frequency control circuit; the third connection end of the second switching circuit is used for inputting the sampling second control signal, and the second switching circuit is used for responding to the sampling second control signal to be conducted;
and the output end of the first operational amplifier is connected with the sampling comparison circuit.
4. A zero crossing monitor circuit as claimed in claim 3, wherein the switching clock control logic comprises:
the sampling frequency control circuit only sends the sampling first control signal to the first switch circuit for a first preset time period, and is used for conducting the first preset time period by the first switch circuit so as to sample and hold the mirror image first current signal for the first preset time period;
the sampling frequency control circuit stops sending the sampling first control signal to the first switch circuit, and only sends the sampling second control signal to the second switch circuit for a second preset time period after the preset unit interval time is set, and the second switch circuit is used for conducting the second preset time period so as to sample and hold the mirror image second current signal for the second preset time period;
the sampling frequency control circuit stops the output of the sampling first control signal and the sampling second control signal.
5. The zero crossing monitor circuit of claim 4, wherein the duration of the preset unit interval time, the first preset time period, and the second preset time period is related to the value of the lower clamp inductor current.
6. The zero crossing monitor circuit of claim 5, wherein a duration of the predetermined unit interval is proportional to a value of the lower clamp inductor current.
7. The zero crossing monitor circuit of claim 5, wherein the first preset time period and the first preset time period are the same in duration and inversely proportional to the value of the lower clamp inductor current.
8. A zero crossing monitoring circuit as claimed in claim 3, wherein the sampling comparison circuit comprises a first comparator, the positive input of the first comparator being connected to a predetermined reference voltage source, the negative input of the first comparator being connected to the sampling switching circuit; the positive output end of the first comparator is connected with the sampling frequency control circuit and is used for sending the second enabling signal to the sampling frequency control circuit; and the reverse output end of the first comparator is connected with the conduction control circuit and is used for sending a zero crossing point confirmation electric signal to the conduction control circuit.
9. The zero crossing monitor circuit of claim 8, wherein the turn-on control circuit comprises a logic and gate circuit;
one input end of the logic AND gate circuit is connected with the clamping circuit and is used for receiving the conduction control signal, and the other input end of the logic AND gate circuit is connected with the sampling comparison circuit and is used for receiving the zero confirmation electric signal;
and the output end of the logic AND gate circuit is used for outputting the zero crossing point conduction signal.
10. A zero crossing monitoring method based on a CRM boost PFC converter, for application to a zero crossing monitoring circuit as claimed in any one of claims 1 to 9, the zero crossing monitoring method comprising:
receiving a conduction control signal output by the clamping circuit;
mirroring the lower clamping inductance current to obtain a mirror current signal;
sampling the image current signal in a time-sharing manner to obtain a first image sampling electric signal and a second image sampling electric signal which are spaced by a preset unit interval time;
and comparing the first image sampling electric signal with the second image sampling electric signal, and outputting a zero crossing conduction signal according to a comparison result, wherein the zero crossing conduction signal is used for controlling the conduction of the power switch tube.
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| CN202311409398.XA CN117129748B (en) | 2023-10-27 | 2023-10-27 | Zero crossing monitoring circuit and method based on CRM boost PFC converter |
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| CN205720408U (en) * | 2016-04-27 | 2016-11-23 | 深圳大学 | The circuit of a kind of no-voltage measure loop reliability improving CRM PFC and electronic equipment |
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