CN117097133A - Power supply device for inhibiting magnetic saturation - Google Patents

Abstract

A power supply that suppresses magnetic saturation, comprising: the power supply comprises a bridge rectifier, a boost inductor, a power switcher, a first pulse width modulation integrated circuit, a first output stage circuit, an input switching circuit, a transformer, a first capacitor, a second output stage circuit and a detection and control circuit. The transformer may have a leakage inductor and an excitation inductor built in. The detection and control circuit includes a negative temperature coefficient resistor adjacent to the transformer. The detection and control circuit may detect a first voltage slope with respect to the power switch and may detect a second voltage slope with respect to the first output stage circuit. The detection and control circuit further limits an inductor current flowing through the excitation inductor according to the first voltage slope, the second voltage slope and a feedback potential from the negative temperature coefficient resistor.

Description

Power supply device for inhibiting magnetic saturation

Technical Field

The present invention relates to a power supply, and more particularly to a power supply capable of suppressing magnetic saturation.

Background

In conventional power supplies, the excitation inductor is built into its transformer. However, each magnetic element has a range of hysteresis curves for its normal use. When the temperature of the transformer is too high and the inductance current of the excitation inductor is too large, the excitation inductor may enter a state of magnetic saturation, which may cause the magnetization characteristic thereof to disappear and cause a problem of safety. In view of this, a completely new solution has to be proposed to overcome the dilemma faced by the prior art.

Disclosure of Invention

In a preferred embodiment, the present invention provides a power supply for suppressing magnetic saturation, comprising: a bridge rectifier for generating a rectified potential according to a first input potential and a second input potential; a boost inductor receiving the rectified potential; a power switch selectively coupling the boost inductor to a ground potential according to a first pwm potential; a first pwm ic for generating the first pwm potential; a first output stage coupled to the boost inductor for generating an intermediate potential; an input switching circuit for generating a switching potential according to the intermediate potential; the transformer comprises a main coil, a first secondary coil and a second secondary coil, wherein a leakage inductor and an excitation inductor are built in the transformer, and the main coil receives the switching potential through the leakage inductor; a first capacitor coupled to the main coil; a second output stage circuit coupled to the first secondary winding and the second secondary winding for generating an output potential; and a detection and control circuit including a negative temperature coefficient resistor adjacent to the transformer, wherein the detection and control circuit is configured to detect a first voltage slope associated with the power switch and to detect a second voltage slope associated with the first output stage circuit; the detection and control circuit further limits an inductance current flowing through the excitation inductor according to the first voltage slope, the second voltage slope and a feedback potential from the negative temperature coefficient resistor.

Drawings

Fig. 1 is a schematic diagram of a power supply according to an embodiment of the invention.

Fig. 2 is a circuit diagram of a power supply according to an embodiment of the invention.

Fig. 3 is a potential waveform diagram of a power supply according to an embodiment of the invention.

Fig. 4 is a diagram illustrating an operational characteristic of a negative temperature coefficient resistor according to an embodiment of the present invention.

FIG. 5 is a waveform diagram of a specific potential difference according to an embodiment of the present invention.

Fig. 6 is a current waveform diagram of a conventional power supply.

Fig. 7 is a current waveform diagram of a power supply according to an embodiment of the invention.

The reference numerals are as follows:

100,200 power supply

110,210 bridge rectifier

120,220:

130,230 first pulse width modulation integrated circuit

140,240 first output stage circuit

150,250 input switching circuit

160,260 transformer

161,261 main coil

162,262 first secondary winding

163,263 the second auxiliary winding

170,270, second output stage circuit

180,280 detection and control circuit

255 second pulse width modulation integrated circuit

282 first slope detector

284 second slope detector

286 microcontroller

590 possible range

C1 first capacitor

C2 second capacitor

C3 third capacitor

D1 first diode

D2 second diode

D3 third diode

D4 fourth diode

D5 fifth diode

D6 sixth diode

D7 seventh diode

I1 first current

I2 second current

IF: fixed current

IIN input current

ILM: inductor current

LM-excitation inductor

LR leakage inductor

LU boost inductor

M1 first transistor

M2:

m3 third transistor

N1 first node

N2 second node

N3 third node

N4-fourth node

N5 fifth node

N6 sixth node

N7 seventh node

N8 eighth node

N9 ninth node

N10 tenth node

N11:eleventh node

NCM common node

NF feedback node

NIN1 first input node

NIN2 second input node

NOUT: output node

R1 first resistor

R2:second resistor

R3 third resistor

RL lower limit value of resistance

RN negative temperature coefficient resistor

RU resistance upper limit

SP1 first voltage slope

SP2 second voltage slope

T1 first temperature

T2 second temperature

VE intermediate potential

VF feedback potential

VIN1 first input potential

VIN2 second input potential

VLB lower limit value of potential difference

VM1 first pulse Width modulation potential

VM2 second pulse Width modulation potential

VM3 third pulse Width modulation potential

VOUT: output potential

VR rectifying potential

VSS ground potential

VUB, upper limit value of potential difference

VW is the switching potential

DeltaV1, first potential difference

DeltaV2, second potential difference

DeltaVS, a specific potential difference

Detailed Description

The following detailed description of the invention refers to the accompanying drawings, which illustrate specific embodiments of the invention.

Certain terms are used throughout the description and claims to refer to particular components. Those skilled in the art will appreciate that a hardware manufacturer may refer to the same element by different names. The description and claims do not take the form of an element differentiated by name, but rather by functional differences. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. The term "substantially" means that within an acceptable error range, a person skilled in the art can solve the technical problem within a certain error range, and achieve the basic technical effect. In addition, the term "coupled" as used herein includes any direct or indirect electrical connection. Accordingly, if a first device couples to a second device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.

Fig. 1 is a schematic diagram of a power supply 100 according to an embodiment of the invention. For example, the power supply 100 can be applied to a desktop computer, a notebook computer, or an integrally formed computer. As shown in fig. 1, the power supply 100 includes: a bridge rectifier 110, a boost inductor LU, a power switch 120, a first pulse width modulation integrated circuit (Pulse Width Modulation Integrated Circuit, PWM IC) 130, a first output stage 140, an input switching circuit 150, a transformer 160, a first capacitor C1, a second output stage 170, and a detection and control circuit 180. It should be noted that although not shown in fig. 1, the power supply 100 may further include other elements, such as: a voltage stabilizer or (and) a negative feedback circuit.

The bridge rectifier 110 generates a rectified voltage VR according to a first input voltage VIN1 and a second input voltage VIN2, wherein an ac voltage with an arbitrary frequency and an arbitrary amplitude can be formed between the first input voltage VIN1 and the second input voltage VIN 2. For example, the frequency of the ac voltage may be about 50Hz or 60Hz, and the square root of the ac voltage may be about 90V to 264V, but is not limited thereto. The boost inductor LU may receive the rectified potential VR. The power switch 120 can selectively couple the boost inductor LU to a ground potential VSS (e.g., 0V) according to a first pwm potential VM1. For example, if the first pwm potential VM1 is at a high logic level, the power switch 120 may couple the boost inductor LU to the ground potential VSS (i.e., the power switch 120 may approximate a short circuit path); conversely, if the first pwm level VM1 is at a low logic level, the power switch 120 does not couple the boost inductor LU to the ground potential VSS (i.e., the power switch 120 may approximate a circuit-breaking path). The first pwm integrated circuit 130 may be configured to generate the first pwm potential VM1. The first output stage 140 is coupled to the boost inductor LU and is operable to generate an intermediate potential VE. The input switching circuit 150 may generate a switching potential VW according to the intermediate potential VE. The transformer 160 includes a primary winding 161, a first secondary winding 162, and a second secondary winding 163, wherein the transformer 160 further includes a leakage inductor LR and an excitation inductor LM. The main winding 161, the leakage inductor LR, and the excitation inductor LM may be located on the same side of the transformer 160, and the first sub-winding 162 and the second sub-winding 163 may be located on opposite sides of the transformer 160. The main coil 161 may receive the switching potential VW via the leakage inductor LR, and both the first sub-coil 162 and the second sub-coil 163 may operate in response to the switching potential VW. The first capacitor C1 is coupled to the main coil 161. For example, the leakage inductor LR, the excitation inductor LM, and the first capacitor C1 may together form a Resonant Tank (Resonant Tank). The second output stage 170 is coupled to the first secondary winding 162 and the second secondary winding 163, and can be used to generate an output voltage VOUT, for example, the output voltage VOUT can be a dc voltage, which can be between 18V and 20V, but is not limited thereto. The detection and control circuit 180 includes a negative temperature coefficient (Negative Temperature Coefficient, NTC) resistor RN adjacent to the transformer 160, wherein the detection and control circuit 180 is operable to detect a first voltage slope SP1 with respect to the power switch 120 and is operable to detect a second voltage slope SP2 with respect to the first output stage 140. It should be noted that the term "adjacent" or "adjacent" in the present specification may refer to that the distance between the corresponding elements is smaller than a predetermined distance (e.g. 5mm or less), and may also include the case that the corresponding elements are in direct contact with each other (i.e. the distance is shortened to 0). Then, the detecting and controlling circuit 180 further limits an inductance current ILM flowing through the excitation inductor LM according to the first voltage slope SP1, the second voltage slope SP2, and a feedback potential VF from the negative temperature coefficient resistor RN. With this design, even if the temperature of the transformer 160 becomes high, the inductance current ILM through the excitation inductor LM is still properly controlled, so that the excitation inductor LM is effectively prevented from being accidentally brought into a magnetically saturated state. Therefore, the safety and reliability of the power supply 100 can be improved.

The following embodiments describe the detailed structure and operation of the power supply 100. It is to be understood that the drawings and descriptions are proffered by way of example only and are not intended to limit the scope of the invention.

Fig. 2 is a circuit diagram of a power supply 200 according to an embodiment of the invention. In the embodiment of fig. 2, the power supply 200 has a first input node NIN1, a second input node NIN2, and an output node NOUT, and includes: a bridge rectifier 210, a boost inductor LU, a power switch 220, a first pwm integrated circuit 230, a first output stage 240, an input switching circuit 250, a transformer 260, a first capacitor C1, a second output stage 270, and a detection and control circuit 280. The first input node NIN1 and the second output node NIN2 of the power supply 200 can receive a first input voltage VIN1 and a second input voltage VIN2 from an external input power source, respectively, and the output node NOUT of the power supply 200 can be used for outputting an output voltage VOUT to an electronic device (not shown). In addition, an input current IIN may enter the power supply 200 through the first input node NIN1.

The bridge rectifier 210 includes a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4. The first diode D1 has an anode and a cathode, wherein the anode of the first diode D1 is coupled to the first input node NIN1, and the cathode of the first diode D1 is coupled to a first node N1 to output a rectifying potential VR. The second diode D2 has an anode and a cathode, wherein the anode of the second diode D2 is coupled to the second input node NIN2, and the cathode of the second diode D2 is coupled to the first node N1. The third diode D3 has an anode and a cathode, wherein the anode of the third diode D3 is coupled to a ground potential VSS, and the cathode of the third diode D3 is coupled to the first input node NIN1. The fourth diode D4 has an anode and a cathode, wherein the anode of the fourth diode D4 is coupled to the ground potential VSS, and the cathode of the fourth diode D4 is coupled to the second input node NIN2.

The boost inductor LU has a first end and a second end, wherein the first end of the boost inductor LU is coupled to the first node N1 to receive the rectifying potential VR, and the second end of the boost inductor LU is coupled to a second node N2.

The power switch 220 includes a first transistor M1. For example, the first transistor M1 may be an N-type Metal-Oxide-Semiconductor Field-Effect Transistor (NMOSFET). The first transistor M1 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the first transistor M1 is configured to receive a first pwm potential VM1, the first terminal of the first transistor M1 is coupled to a third node N3, and the second terminal of the first transistor M1 is coupled to a second node N2.

The first pwm integrated circuit 230 may be configured to generate the first pwm potential VM1. For example, the first pwm level VM1 can be maintained at a constant level when the power supply 200 is initialized, and can provide a periodic clock waveform after the power supply 200 enters a normal use phase.

The first output stage circuit 240 includes a fifth diode D5 and a second capacitor C2. The fifth diode D5 has an anode and a cathode, wherein the anode of the fifth diode D5 is coupled to the second node N2, and the cathode of the fifth diode D5 is coupled to a fourth node N4. The second capacitor C2 has a first end and a second end, wherein the first end of the second capacitor C2 is coupled to a fifth node N5 to output an intermediate potential VE, and the second end of the second capacitor C2 is coupled to the ground potential VSS.

The input switching circuit 250 includes a second pulse modulation integrated circuit 255, a second transistor M2, and a third transistor M3. The second pwm integrated circuit 255 may generate the second pwm potential VM2 and the third pwm potential VM3. For example, the second pwm level VM2 and the third pwm level VM3 can be maintained at a constant level when the power supply 200 is initialized, and can provide a periodic clock waveform after the power supply 200 enters the normal use phase. In some embodiments, the second pwm potential VM2 and the third pwm potential VM3 may have Complementary (Complementary) logic levels. In other embodiments, the second pwm potential VM2 and the third pwm potential VM3 may have the same waveform but have a phase difference therebetween, so that they are not at the same time at the high logic level. The second transistor M2 and the third transistor M3 may each be an N-type mosfet. The second transistor M2 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the second transistor M2 is configured to receive the second pwm potential VM2, the first terminal of the second transistor M2 is coupled to a sixth node N6 to output a switching potential VW, and the second terminal of the second transistor M2 is coupled to a fifth node N5 to receive the intermediate potential VE. The third transistor M3 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the third transistor M3 is configured to receive the third pwm potential VM3, the first terminal of the third transistor M3 is coupled to the ground potential VSS, and the second terminal of the third transistor M3 is coupled to the sixth node N6.

The transformer 260 includes a main winding 261, a first sub-winding 262, and a second sub-winding 263, wherein the transformer 260 further includes a leakage inductor LR and an excitation inductor LM. Both leakage inductor LR and excitation inductor LM may be intrinsic components that are created by the manufacturing of transformer 260 and are not external stand-alone components. The leakage inductor LR, the main winding 261, and the excitation inductor LM may be disposed on the same side of the transformer 260 (e.g., the primary side), while the first secondary winding 262 and the second secondary winding 263 may be disposed on opposite sides of the transformer 260 (e.g., the secondary side, which may be isolated from the primary side). The leakage inductor LR has a first end and a second end, wherein the first end of the leakage inductor LR is coupled to the sixth node N6 to receive the switching potential VW, and the second end of the leakage inductor LR is coupled to a seventh node N7. The main coil 261 has a first end and a second end, wherein the first end of the main coil 261 is coupled to the seventh node N7, and the second end of the main coil 261 is coupled to an eighth node N8. The excitation inductor LM has a first end and a second end, wherein the first end of the excitation inductor LM is coupled to the seventh node N7, and the second end of the excitation inductor LM is coupled to a ninth node N9. The first capacitor C1 has a first end and a second end, wherein the first end of the first capacitor C1 is coupled to the eighth node N8, and the second end of the first capacitor C1 is coupled to the ground potential VSS. In some embodiments, the leakage inductor LR, the excitation inductor LM, and the first capacitor C1 may together form a resonant tank. The first secondary winding 262 has a first end and a second end, wherein the first end of the first secondary winding 262 is coupled to a tenth node N10, and the second end of the first secondary winding 262 is coupled to a common node NCM. For example, the common node NCM may be considered another ground potential, which may be the same or different from the aforementioned ground potential VSS. The second secondary winding 263 has a first end and a second end, wherein the first end of the second secondary winding 263 is coupled to the common node NCM, and the second end of the second secondary winding 263 is coupled to an eleventh node N11.

The second output stage 270 includes a sixth diode D6, a seventh diode D7, and a third capacitor C3. The sixth diode D6 has an anode and a cathode, wherein the anode of the sixth diode D6 is coupled to the tenth node N10, and the cathode of the sixth diode D6 is coupled to the output node NOUT. The seventh diode D7 has an anode and a cathode, wherein the anode of the seventh diode D7 is coupled to the eleventh node N11, and the cathode of the seventh diode D7 is coupled to the output node NOUT. The third capacitor C3 has a first end and a second end, wherein the first end of the third capacitor C3 is coupled to the output node NOUT, and the second end of the third capacitor C3 is coupled to the common node NCM.

The detection and control circuit 280 includes a first slope detector 282, a second slope detector 284, a microcontroller 286, a first resistor R1, a second resistor R2, a third resistor R3, and a negative temperature coefficient resistor RN.

The first resistor R1 has a first end and a second end, wherein the first end of the first resistor R1 is coupled to the third node N3, and the second end of the first resistor R1 is coupled to the ground potential VSS. That is, the first resistor R1 is coupled in series with the first transistor M1. The first slope detector 282 is coupled to the third node N3 and the ground potential VSS, respectively, for monitoring a first potential difference Δv1 across the first resistor R1. Then, the first slope detector 282 can calculate a first voltage slope SP1 according to the first potential difference Δv1. The second resistor R2 has a first end and a second end, wherein the first end of the second resistor R2 is coupled to the fourth node N4, and the second end of the second resistor R2 is coupled to the fifth node N5. That is, the second resistor R2 is coupled in series with the fifth diode D5. The second slope detector 284 is coupled to the fourth node N4 and the fifth node N5, respectively, for monitoring a second potential difference Δv2 across the second resistor R2. Then, the second slope detector 284 can calculate a second voltage slope SP2 according to the second potential difference Δv2.

Fig. 3 is a diagram illustrating a voltage waveform of the power supply 200 according to an embodiment of the invention. It should be understood that when the first pwm potential VM1 is at the high logic level, a first current I1 flowing through the first transistor M1 and the first resistor R1 gradually increases, and a second current I2 flowing through the fifth diode D5 and the second resistor R2 is maintained at 0; conversely, when the first pwm level VM1 is at a low logic level, the first current I1 is maintained at 0, and the second current I2 is gradually decreased. The first resistor R1 may be a sensing resistor with a very low resistance value, wherein the first potential difference Δv1 of the first resistor R1 may correspond to the aforementioned first current I1. The second resistor R2 may be another sensing resistor with an extremely low resistance value, wherein the second potential difference Δv2 of the second resistor R2 may correspond to the aforementioned second current I2. According to the measurement result of fig. 3, the first slope detector 282 may obtain the related information of the first voltage slope SP1 and the first current I1 by analyzing the first potential difference Δv1. In addition, the second slope detector 284 can obtain the related information of the second voltage slope SP2 and the second current I2 by analyzing the second potential difference Δv2.

The microcontroller 286 may receive the first and second voltage slopes SP1 and SP2 at the first and second slope detectors 282 and 284, respectively. In addition, the microcontroller 286 can output a fixed current IF to a feedback node NF. The negative temperature coefficient resistor RN is adjacent to the transformer 260. The negative temperature coefficient resistor RN has a first end and a second end, wherein the first end of the negative temperature coefficient resistor RN is coupled to the feedback node NF, and the second end of the negative temperature coefficient resistor RN is coupled to the common node NCM. For example, if the temperature of the transformer 260 increases, the resistance value of the negative temperature coefficient resistor RN will become smaller; conversely, if the temperature of the transformer 260 decreases, the resistance of the negative temperature coefficient resistor RN will become larger. The microcontroller 286 can then determine an upper voltage difference VUB and a lower voltage difference VLB based on a feedback voltage VF at the feedback node NF.

Fig. 4 is a diagram illustrating an operation characteristic of the negative temperature coefficient resistor RN according to an embodiment of the present invention. In the embodiment of fig. 4, the temperature of the transformer 260 may be between a first temperature T1 and a second temperature T2, wherein the negative temperature coefficient resistor RN and the transformer 260 may have substantially equal temperatures. The negative temperature coefficient resistor RN may provide an upper resistance value RU when the temperature of the transformer 260 is reduced to the first temperature T1, and a lower resistance value RL when the temperature of the transformer 260 is increased to the second temperature T2. In some embodiments, the microcontroller 286 can calculate the aforementioned potential difference upper limit VUB and potential difference lower limit VLB according to the following equations (1), (2):

VUB＝IF·RU·K……………………………………(1)

VLB＝IF·RL·K……………………………………(2)

where "VUB" represents the potential difference upper limit value, "VLB" represents the potential difference lower limit value, "RU" represents the resistance upper limit value, "RL" represents the resistance lower limit value, "IF" represents the current value of the fixed current IF, and "K" represents any amplification factor (which may be adjusted according to different requirements).

The third resistor R3 has a first end and a second end, wherein the first end of the third resistor R3 is coupled to the ninth node N9, and the second end of the third resistor R3 is coupled to the eighth node N8. That is, the third resistor R3 is coupled in series with the excitation inductor LM of the transformer 260. The third resistor R3 may be a further sense resistor having an extremely low resistance value. A particular potential difference Δvs across the third resistor R3 may correspond to an inductance current ILM flowing through the excitation inductor LM according to ohm's law. In general, the microcontroller 286 limits the inductor current ILM by controlling the specific potential difference Δvs, thereby avoiding the excitation inductor LM from being accidentally saturated.

Fig. 5 is a waveform diagram of a specific potential difference Δvs according to an embodiment of the present invention. In the embodiment of fig. 5, a possible range 590 of the specific potential difference Δvs is determined by the first voltage slope SP1, the second voltage slope SP2, the potential difference upper limit VUB, and the potential difference lower limit VLB. According to the actual measurement result, as long as the specific potential difference Δvs falls within the aforementioned possible range 590, it can be ensured that the excitation inductor LM can operate normally and does not enter into a non-ideal magnetic saturation state.

Fig. 6 is a current waveform diagram of a conventional power supply. As shown in fig. 6, when the transformer temperature of the conventional power supply is too high, the input current IIN and the inductor current ILM generate a lot of abnormal up-down oscillations due to magnetic saturation.

Fig. 7 is a current waveform diagram of the power supply 200 according to an embodiment of the invention. According to the measurement result of fig. 7, under the current limiting condition of the present invention, the excitation inductor LM can operate normally, and even if the temperature of the transformer 260 is high, the excitation inductor LM will not be magnetically saturated. In addition, the abnormal oscillations of the input current IIN and the inductor current ILM can be completely eliminated.

The invention provides a novel power supply which can effectively inhibit the non-ideal magnetic saturation phenomenon. According to the practical measurement result, the safety of the power supply using the design can be greatly improved, so that the power supply is very suitable for being applied to various devices.

It should be noted that the above-mentioned potential, current, resistance, inductance, capacitance, and other parameters are not limitations of the present invention. The designer can adjust these settings according to different needs. The power supply of the present invention is not limited to the states illustrated in fig. 1-7. The present invention may include only any one or more of the features of any one or more of the embodiments of fig. 1-7. In other words, not all of the illustrated features need be implemented in the power supply of the present invention at the same time. Although the embodiments of the present invention use mosfet as an example, the present invention is not limited thereto, and those skilled in the art can use other kinds of transistors, such as: junction field effect transistors, or fin field effect transistors, and the like, without affecting the effect of the present invention.

Ordinal numbers such as "first," "second," "third," and the like in the description and in the claims are used for distinguishing between two different elements having the same name and not necessarily for describing a sequential order.

While the invention has been described with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (10)

1. A power supply that suppresses magnetic saturation, comprising:

a bridge rectifier for generating a rectified potential according to a first input potential and a second input potential;

a boost inductor receiving the rectified potential;

a power switch selectively coupling the boost inductor to a ground potential according to a first pwm potential;

a first pwm ic for generating the first pwm potential;

a first output stage coupled to the boost inductor for generating an intermediate potential;

an input switching circuit for generating a switching potential according to the intermediate potential;

the transformer comprises a main coil, a first secondary coil and a second secondary coil, wherein a leakage inductor and an excitation inductor are built in the transformer, and the main coil receives the switching potential through the leakage inductor;

a first capacitor coupled to the main coil;

a second output stage circuit coupled to the first secondary winding and the second secondary winding for generating an output potential; and

a detection and control circuit including a negative temperature coefficient resistor adjacent to the transformer, wherein the detection and control circuit is used for detecting a first voltage slope related to the power switch and is used for detecting a second voltage slope related to the first output stage circuit;

the detection and control circuit further limits an inductance current flowing through the excitation inductor according to the first voltage slope, the second voltage slope and a feedback potential from the negative temperature coefficient resistor.

2. The power supply of claim 1, wherein the bridge rectifier comprises:

a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to a first input node to receive the first input potential, and the cathode of the first diode is coupled to a first node to output the rectified potential;

a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to a second input node to receive the second input potential, and the cathode of the second diode is coupled to the first node;

a third diode having an anode and a cathode, wherein the anode of the third diode is coupled to the ground potential and the cathode of the third diode is coupled to the first input node; and

a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the ground potential and the cathode of the fourth diode is coupled to the second input node;

the boost inductor has a first end and a second end, the first end of the boost inductor is coupled to the first node to receive the rectifying potential, and the second end of the boost inductor is coupled to a second node.

3. The power supply of claim 2, wherein the power switch comprises:

the first transistor has a control terminal, a first terminal and a second terminal, wherein the control terminal of the first transistor is used for receiving the first pulse width modulation potential, the first terminal of the first transistor is coupled to a third node, and the second terminal of the first transistor is coupled to the second node.

4. The power supply of claim 3, wherein the first output stage circuit comprises:

a fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the second node and the cathode of the fifth diode is coupled to a fourth node; and

a second capacitor having a first end and a second end, wherein the first end of the second capacitor is coupled to a fifth node to output the intermediate potential, and the second end of the second capacitor is coupled to the ground potential.

5. The power supply of claim 4, wherein the detection and control circuit further comprises:

a first resistor having a first end and a second end, wherein the first end of the first resistor is coupled to the third node and the second end of the first resistor is coupled to the ground potential;

a first slope detector for monitoring the first resistor to obtain the first voltage slope;

a second resistor having a first end and a second end, wherein the first end of the second resistor is coupled to the fourth node, and the second end of the second resistor is coupled to the fifth node; and

a second slope detector monitors the second resistor to obtain the second voltage slope.

6. The power supply of claim 4, wherein the input switching circuit comprises:

a second pwm ic for generating a second pwm potential and a third pwm potential;

a second transistor having a control terminal, a first terminal and a second terminal, wherein the control terminal of the second transistor is used for receiving the second pwm potential, the first terminal of the second transistor is coupled to a sixth node for outputting the switching potential, and the second terminal of the second transistor is coupled to the fifth node for receiving the intermediate potential; and

the third transistor has a control end, a first end and a second end, wherein the control end of the third transistor is used for receiving the third pulse width modulation potential, the first end of the third transistor is coupled to the ground potential, and the second end of the third transistor is coupled to the sixth node.

7. The power supply of claim 6, wherein the leakage inductor has a first end and a second end, the first end of the leakage inductor is coupled to the sixth node to receive the switching potential, the second end of the leakage inductor is coupled to a seventh node, the main winding has a first end and a second end, the first end of the main winding is coupled to the seventh node, the second end of the main winding is coupled to an eighth node, the excitation inductor has a first end and a second end, the first end of the excitation inductor is coupled to the seventh node, the second end of the excitation inductor is coupled to a ninth node, the first capacitor has a first end and a second end, the second end of the first capacitor is coupled to the eighth node, the second end of the first capacitor is coupled to the connection potential, the first secondary winding has a first end and a second end, the first end of the first secondary winding is coupled to the eighth node, the first secondary winding is coupled to the first end, the first secondary winding is coupled to the first node, and the second secondary winding is coupled to the first node.

8. The power supply of claim 7, wherein the second output stage circuit comprises:

a sixth diode having an anode and a cathode, wherein the anode of the sixth diode is coupled to the tenth node, and the cathode of the sixth diode is coupled to an output node to output the output potential;

a seventh diode having an anode and a cathode, wherein the anode of the seventh diode is coupled to the eleventh node and the cathode of the seventh diode is coupled to the output node; and

a third capacitor having a first end and a second end, wherein the first end of the third capacitor is coupled to the output node and the second end of the third capacitor is coupled to the common node.

9. The power supply of claim 7, wherein the detection and control circuit further comprises:

a microcontroller outputting a fixed current to a feedback node, wherein the negative temperature coefficient resistor has a first end and a second end, the first end of the negative temperature coefficient resistor is coupled to the feedback node, and the second end of the negative temperature coefficient resistor is coupled to the common node;

wherein the microcontroller further determines an upper potential difference value and a lower potential difference value according to the feedback potential at the feedback node.

10. The power supply of claim 9, wherein the detection and control circuit further comprises:

a third resistor having a first end and a second end, wherein the first end of the third resistor is coupled to the ninth node and the second end of the third resistor is coupled to the eighth node;

wherein the microcontroller limits the inductor current flowing through the excitation inductor by controlling a specific potential difference of the third resistor;

wherein a possible range of the specific potential difference is determined according to the first voltage slope, the second voltage slope, the potential difference upper limit value, and the potential difference lower limit value.