CN117075673B - Nested loop low-dropout linear voltage regulator - Google Patents

Nested loop low-dropout linear voltage regulator Download PDF

Info

Publication number
CN117075673B
CN117075673B CN202311334768.8A CN202311334768A CN117075673B CN 117075673 B CN117075673 B CN 117075673B CN 202311334768 A CN202311334768 A CN 202311334768A CN 117075673 B CN117075673 B CN 117075673B
Authority
CN
China
Prior art keywords
output
amplifier
closed
voltage
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202311334768.8A
Other languages
Chinese (zh)
Other versions
CN117075673A (en
Inventor
兰金保
肖勇
宋志勋
陈建威
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Qianhai Shenlei Semiconductor Co ltd
Original Assignee
Shenzhen Qianhai Shenlei Semiconductor Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Qianhai Shenlei Semiconductor Co ltd filed Critical Shenzhen Qianhai Shenlei Semiconductor Co ltd
Priority to CN202311334768.8A priority Critical patent/CN117075673B/en
Publication of CN117075673A publication Critical patent/CN117075673A/en
Application granted granted Critical
Publication of CN117075673B publication Critical patent/CN117075673B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)

Abstract

The invention relates to the technical field of integrated circuits and discloses a nested loop low-dropout linear voltage regulator, which is used for improving the stability of the low-dropout linear voltage regulator under different loads. Comprising the following steps: the closed-loop negative feedback subsystem and the closed-loop negative feedback parent system; the closed loop negative feedback subsystem includes: the device comprises an operational transconductance amplifier, a transimpedance amplifier, a super source follower, a power tube and an off-chip capacitor; the operational transconductance amplifier, the transimpedance amplifier, the super source follower, the power tube and the off-chip capacitor are sequentially connected to form a closed-loop negative feedback subsystem, and the closed-loop negative feedback subsystem is used as an output buffer; the closed-loop negative feedback master system comprises: the error amplifier, the output pole trace compensation resistor, the compensation capacitor, the output buffer and the feedback voltage dividing resistor; and sequentially performing closed-loop connection on the error amplifier, the output pole tracking compensation resistor, the compensation capacitor, the output buffer and the feedback divider resistor to generate a closed-loop negative feedback parent system.

Description

Nested loop low-dropout linear voltage regulator
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a nested loop low-dropout linear voltage regulator.
Background
The low-dropout linear voltage regulator is a power management chip which is widely used at present, converts the input power voltage into a clean and stable lower power voltage and outputs the lower power voltage so as to meet the different voltage, quality and isolation requirements of different chips or functional modules on an electronic system on a power supply.
The circuit structure of the conventional low dropout linear regulator is schematically shown in fig. 1, and the circuit structure is a closed-loop negative feedback system formed by an error amplifier 101, a super source follower 102, a power tube MP, an off-chip capacitor Co, and feedback voltage dividing resistors Rf1 and Rf2, so as to convert an input power voltage Vi into a lower output power voltage Vo, and clamp the output voltage. The conventional low dropout linear regulator needs to use a large off-chip capacitor Co (generally in uF level) at an output node to design a main pole p1 at a very low frequency, and then uses a super source follower 102 with very low output impedance to drive a power tube MP with a large parasitic capacitance, and simultaneously designs an input capacitance of the super source follower 102 to be as small as possible, so that parasitic poles p2 and p3 in a loop are at a sufficiently high frequency, so that the stability of a negative feedback loop can be ensured. In addition, under the light load condition, the loop amplitude-frequency characteristic diagram of the traditional low dropout linear voltage regulator is shown as a light load curve in fig. 3 (a), and the frequency of the dominant pole p1 is low enough because the impedance of the output node is large at the moment, so that the unit gain bandwidth of the loop is limited within parasitic poles p2 and p3, and the stability of the loop is ensured. However, as shown in the heavy load curve in fig. 3 (a), under the heavy load condition, the impedance of the output node becomes very small, which leads to a decrease in the gain of the loop on the one hand and an upward shift of the dominant pole to the high frequency p1' on the other hand, so that the unit gain bandwidth of the loop may be shifted up to the outside of the parasitic pole p2 or p3, the stability of the loop is not guaranteed any more, and the output voltage Vo may be caused to continuously oscillate under the heavy load, so that the whole electronic system cannot work normally.
Disclosure of Invention
The invention provides a nested loop low-dropout linear voltage regulator, which is used for improving the stability of the low-dropout linear voltage regulator under different loads.
The first aspect of the present invention provides a nested loop low dropout linear regulator, comprising: the closed-loop negative feedback subsystem and the closed-loop negative feedback parent system;
the closed loop negative feedback subsystem includes: the device comprises an operational transconductance amplifier, a transimpedance amplifier, a super source follower, a power tube and an off-chip capacitor; the operational transconductance amplifier, the transimpedance amplifier, the super source follower, the power tube and the off-chip capacitor are connected in sequence to form the closed-loop negative feedback subsystem, and the closed-loop negative feedback subsystem is used as an output buffer;
the closed-loop negative feedback master system comprises: the error amplifier, the output pole trace compensation resistor, the compensation capacitor, the output buffer and the feedback voltage dividing resistor; and sequentially performing closed-loop connection on the error amplifier, the output pole tracking compensation resistor, the compensation capacitor, the output buffer and the feedback divider resistor to generate the closed-loop negative feedback mother system.
With reference to the first aspect, in a first implementation manner of the first aspect of the present invention, the closed-loop negative feedback subsystem further includes: the operational transconductance amplifier is used for: amplifying an input current signal and converting the amplified current signal into a corresponding voltage signal; the transimpedance amplifier is used for: amplifying the voltage signal; the super source follower is used for: the input voltage is followed by the output voltage; the power tube is used for: outputting current and power; the off-chip capacitor is for: and adjusting the circuit frequency response and stability of the closed-loop negative feedback subsystem.
With reference to the first aspect, in a second implementation manner of the first aspect of the present invention, the closed-loop negative feedback mother system further includes: the error amplifier is used for: comparing the input voltage with the output voltage and generating an error signal; the feedback voltage dividing resistor is used for: calculating a feedback voltage according to the error signal; the compensation capacitor is used for: compensating the frequency response of the closed-loop negative feedback parent system; the output pole tracking compensation resistor is used for: tracking load changes and adjusting output poles; the output buffer is used for: amplifying the output current and voltage.
With reference to the first aspect, in a third implementation manner of the first aspect of the present invention, the output pole tracking compensation resistor is configured to:
automatically tracking the load current change of the closed-loop negative feedback mother system, and calculating a compensation zero point;
wherein, the calculation function of the compensation zero point is as follows:
wherein the saidTo supplement zero point (I)>Tracking the resistance of the compensation resistor for the output pole, +.>To compensate the capacitance of the capacitor->Which is the output pole.
With reference to the first aspect, in a fourth implementation manner of the first aspect of the present invention, the calculation function of the output pole is:
wherein the saidFor outputting poles +.>Transconductance of operational transconductance amplifier, +.>For the resistance of the transimpedance amplifier, +.>Is the transconductance of the power tube->Is the capacitance of the off-chip capacitor.
With reference to the first aspect, in a fifth implementation manner of the first aspect of the present invention, the feedback voltage dividing resistor further includes: a first voltage dividing resistor and a second voltage dividing resistor;
the feedback voltage dividing resistor is used for: calculating the clamping output voltage of the closed-loop negative feedback mother system according to the first voltage dividing resistor and the second voltage dividing resistor;
wherein, the calculation function of the clamp output voltage is:
wherein,representing the clamped output voltage, ">Represents a first voltage dividing resistance, ">The second voltage-dividing resistor is indicated,representing the reference voltage.
With reference to the first aspect, in a sixth implementation manner of the first aspect of the present invention, the operational transconductance amplifier includes a first transconductance input end, a second transconductance input end, and a transconductance output end, where the first transconductance input end is connected to the output end of the error amplifier, the second transconductance input end is connected to the output end of the power tube, the transconductance output end is connected to the input end of the transimpedance amplifier, the output end of the transimpedance amplifier is connected to the input end of the super source follower, and the output end of the super source follower is connected to the input end of the power tube.
With reference to the first aspect, in a seventh implementation manner of the first aspect of the present invention, the error amplifier includes a first amplifier input end, a second amplifier input end, and an amplifier output end, where the first amplifier input end is used to receive a reference voltage, the second amplifier input end is connected to an output end of the feedback voltage dividing resistor, the amplifier output end is connected to an input end of the output buffer and an output end of the compensation capacitor, the input end of the compensation capacitor is connected to the output pole tracking compensation resistor, and the output end of the output buffer is connected to an input end of the off-chip capacitor and the feedback voltage dividing resistor, respectively.
According to the technical scheme, the nested loop low-dropout linear voltage regulator capable of automatically tracking and compensating the output pole is constructed by combining the advantages of the traditional low-dropout linear voltage regulator and the low-gain high-bandwidth low-dropout linear voltage regulator and adding a new technology capable of automatically tracking and compensating the output pole. The invention adds a new technology capable of automatically tracking and compensating the output pole into the nested loop by utilizing the inherent controllable and trackable characteristic of the loop unit gain bandwidth of the low-gain high-bandwidth low-dropout linear voltage stabilizer, thereby ensuring the stability of the whole nested loop under various loads, further ensuring that the nested loop low-dropout linear voltage stabilizer does not need to specially increase the off-chip capacitance of an output node for ensuring the stability, thereby saving the system cost and improving the stability of the low-dropout linear voltage stabilizer under different loads.
Drawings
FIG. 1 is a schematic diagram of a conventional LDO according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a low-gain high-bandwidth LDO according to an embodiment of the present invention;
FIG. 3 (a) is a schematic diagram showing the amplitude-frequency characteristics of a loop of a conventional LDO according to an embodiment of the present invention;
FIG. 3 (b) is a graph showing the loop amplitude-frequency characteristics of a low-gain high-bandwidth low-dropout linear regulator according to an embodiment of the present invention;
FIG. 3 (c) is a schematic diagram showing the amplitude-frequency characteristics of a loop of a low dropout linear regulator according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a circuit architecture of a nested loop LDO with automatic tracking and compensation of output poles in an embodiment of the present invention;
FIG. 5 is a schematic diagram of one circuit embodiment of a nested loop low dropout linear regulator that automatically tracks the compensated output pole in an embodiment of the present invention.
Detailed Description
The embodiment of the invention provides a nested loop low-dropout linear voltage regulator, which is used for improving the stability of the low-dropout linear voltage regulator under different loads. The terms "first," "second," "third," "fourth" and the like in the description and in the claims and in the above drawings, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments described herein may be implemented in other sequences than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed or inherent to such process, method, article, or apparatus.
For ease of understanding, a specific flow of an embodiment of the present invention is described below with reference to fig. 4, where one embodiment of a nested loop low dropout linear regulator of the present invention includes:
the nested loop low dropout linear regulator comprises: the closed-loop negative feedback subsystem and the closed-loop negative feedback parent system;
the closed loop negative feedback subsystem includes: the device comprises an operational transconductance amplifier, a transimpedance amplifier, a super source follower, a power tube and an off-chip capacitor; the operational transconductance amplifier, the transimpedance amplifier, the super source follower, the power tube and the off-chip capacitor are sequentially connected to form a closed-loop negative feedback subsystem, and the closed-loop negative feedback subsystem is used as an output buffer;
the closed-loop negative feedback master system comprises: the error amplifier, the output pole trace compensation resistor, the compensation capacitor, the output buffer and the feedback voltage dividing resistor; and sequentially performing closed-loop connection on the error amplifier, the output pole tracking compensation resistor, the compensation capacitor, the output buffer and the feedback divider resistor to generate a closed-loop negative feedback parent system.
The closed loop negative feedback subsystem further comprises: the operational transconductance amplifier is used for: amplifying an input current signal and converting the amplified current signal into a corresponding voltage signal; the transimpedance amplifier is used for: amplifying the voltage signal; the super source follower is used for: the input voltage is followed by the output voltage; the power tube is used for: outputting current and power; the off-chip capacitor is used to: the circuit frequency response and stability of the closed loop negative feedback subsystem are adjusted.
The operational transconductance amplifier comprises a first transconductance input end, a second transconductance input end and a transconductance output end, wherein the first transconductance input end is connected with the output end of the error amplifier, the second transconductance input end is connected with the output end of the power tube, the transconductance output end is connected with the input end of the transimpedance amplifier, the output end of the transimpedance amplifier is connected with the input end of the super source follower, and the output end of the super source follower is connected with the input end of the power tube.
The error amplifier comprises a first amplifier input end, a second amplifier input end and an amplifier output end, wherein the first amplifier input end is used for receiving reference voltage, the second amplifier input end is connected with the output end of the feedback voltage dividing resistor, the amplifier output end is respectively connected with the input end of the output buffer and the output end of the compensation capacitor, the input end of the compensation capacitor is connected with the output pole tracking compensation resistor, and the output end of the output buffer is respectively connected with the off-chip capacitor and the input end of the feedback voltage dividing resistor.
In order to improve the stability of the traditional low dropout linear voltage regulator under heavy load, the embodiment of the invention further increases the off-chip capacitance Co at the output node, and further reduces the frequency of the main pole p1 to compress the unit gain bandwidth of the loop into parasitic poles p2 and p3 under heavy load, but in doing so, on one hand, the larger off-chip capacitance Co increases the system cost, and on the other hand, the smaller unit gain bandwidth of the loop limits the load transient response speed of the whole low dropout linear voltage regulator. In order to improve the stability of the LDO under heavy load and compress the unit gain bandwidth of the loop by reducing the gain of the whole loop while keeping the off-chip capacitor Co at the output node unchanged, the circuit structure of the LDO in the embodiment of the invention is schematically shown in FIG. 2, which comprises an operational transconductance amplifier 201, a transimpedance amplifier 203, a super source follower 202, a power tube MP, off-chip capacitor Co, feedback voltage dividing resistors Rf1 and Rf2 to form a closed-loop negative feedback system to convert the input power supply voltage Vi into a lower output source voltage Vo and clamp the output voltage. Control of the loop gain of such a low dropout linear regulator by controlling the transconductance Gm of the operational transconductance amplifier 201 and the transimpedance RTIA of the transimpedance amplifier 203>And unity gain bandwidth->Thereby securing its ringThe circuit is stable under heavy load, and it should be noted that, in the embodiment of the present invention, GMp is used to represent the transconductance of the power tube MP, and Ro is used to represent the impedance of the output node of the low dropout linear regulator.
Under different loads, as shown in the graph in fig. 3 (b), fig. 3 (b) shows that under the light load and heavy load conditions, the stability of the loop can be ensured without excessively compressing the unit gain bandwidth of the loop to low frequency, so that on the one hand, the system cost is saved without increasing the off-chip capacitor Co, and on the other hand, the fast transient response speed of the load is maintained by reserving the higher loop bandwidth. However, compared with the traditional low dropout linear voltage regulator, the low-gain high-bandwidth low dropout linear voltage regulator has the cost that the direct current gain of the loop is also greatly reduced, so that a larger error exists between the direct current measured value and the expected value of the output voltage Vo, and the error is further increased under heavy load, because the direct current gain of the loop is further reduced along with the reduction of the output impedance.
Wherein, the female system of closed loop negative feedback still includes: the error amplifier is used for: comparing the input voltage with the output voltage and generating an error signal; the feedback voltage dividing resistor is used for: calculating a feedback voltage according to the error signal; the compensation capacitor is used for: compensating the frequency response of the closed-loop negative feedback mother system; the output pole tracking compensation resistor is used for: tracking load changes and adjusting output poles; the output buffer is used for: amplifying the output current and voltage.
The output pole tracking compensation resistor is used for:
automatically tracking the load current change of the closed-loop negative feedback mother system, and calculating a compensation zero point;
wherein, the calculation function of the compensation zero point is:
wherein the saidTo supplement zero point (I)>Tracking the resistance of the compensation resistor for the output pole, +.>To compensate the capacitance of the capacitor->Which is the output pole.
The output pole calculation function is:
wherein the saidFor outputting poles +.>Transconductance of operational transconductance amplifier, +.>For the resistance of the transimpedance amplifier, +.>Is the transconductance of the power tube->Is the capacitance of the off-chip capacitor.
The feedback voltage dividing resistor further includes: a first voltage dividing resistor and a second voltage dividing resistor;
the input end of the first voltage dividing resistor is connected with the output end of the output buffer, and the output end of the first voltage dividing resistor is respectively connected with the second voltage dividing resistor and the second amplifier input end of the error amplifier.
The feedback voltage dividing resistor is used for: calculating the clamping output voltage of the closed-loop negative feedback mother system according to the first voltage dividing resistor and the second voltage dividing resistor;
wherein, the calculation function of the clamp output voltage is:
wherein,representing the clamped output voltage, ">Represents a first voltage dividing resistance, ">The second voltage-dividing resistor is indicated,representing the reference voltage.
It should be noted that, the circuit architecture scheme of the nested loop low dropout linear regulator for automatically tracking and compensating the output pole provided by the invention is shown in fig. 4. In this scheme, the closed-loop negative feedback subsystem consisting of operational transconductance amplifier 4021, transimpedance amplifier 4023, super source follower 4022, power tube MP and off-chip capacitor Co is used as a unity gain output buffer Obuf402, and further forms a larger closed-loop negative feedback parent system together with error amplifier 401, output pole tracking compensation resistor Rz and compensation capacitor Cz, and feedback voltage dividing resistors Rf1 and Rf2, namely the nested loop low-dropout linear voltage regulator for automatically tracking and compensating output poles, which also converts the input power supply voltage Vi into a lower output power supply voltage Vo and clamps the output voltage
Since the output buffer Obuf402 has a low-gain high-bandwidth loop architecture similar to a low-gain high-bandwidth low-dropout linear voltage regulator, the low-gain high-bandwidth loop architecture can respond to load transient changes alone quickly, and the low-dropout linear voltage regulator provided by the invention has the capability of responding to load transient changes quickly. On the other hand, the dc value of the output voltage Vo of the low dropout linear regulator provided by the present invention is regulated by the upper closed loop negative feedback system, and since the dc gain of the error amplifier 401 is generally higher and is independent of the load current, the error between the dc measured value and the expected value of the output voltage Vo of the low dropout linear regulator provided by the present invention can be very small under various load conditions, similar to the conventional low dropout linear regulator.
However, the limited closed loop bandwidth of the output buffer Obuf402 itself, which varies with load current, introduces an output pole to the entire nested loop of the low dropout linear regulator of the present invention. If tracking compensation is not performed on the output pole, the amplitude-frequency characteristic of the whole nested loop of the low dropout linear voltage regulator provided by the invention is shown as a dotted line in fig. 3 (c), two poles exist in the unit gain bandwidth of the whole nested loop, and the stability of the loop is not ensured. The invention therefore further proposes to have the compensation resistor Rz automatically track the variation of the load current to obtain the compensation zero by means of a suitable circuit design techniqueTherefore, automatic tracking, offset and compensation of the output pole are realized, and the amplitude-frequency characteristic of the whole nested loop shown by a solid line in the figure 3 (c) is finally obtained, so that the stability of the low-dropout linear voltage stabilizer provided by the invention under various loads is ensured.
It should be noted that, one specific circuit embodiment of the nested loop low dropout linear regulator of the present invention for automatically tracking and compensating the output pole is shown in fig. 5. In this specific circuit embodiment, vbn, vbn_cas and vbp_cas are bias voltage signals sent from a bias generation circuit, ibAMP, ibSSF and IbTIA are bias current signals mirror-image-generated from the bias generation circuit, and their generation circuits are not essential to the present invention and are not described herein. In this particular circuit embodiment, the bias current IbAMP, the PMOS tubes MP0-MP5, and the NMOS tubes MN1-NM4 together form a Folded-Cascode error amplifier 501 having a high DC gain independent of the load current. In this specific circuit embodiment, the bias current IbSSF, the PMOS transistor MPSSF, the NMOS transistor MNSSF, and the resistor RSSF together form a super source follower 5022, which has the characteristics of extremely low output impedance and very small input parasitic capacitance. In this specific circuit embodiment, the source electrode of the PMOS transistor MPGm is used to quickly detect the transient voltage change of the output voltage Vo, and after the transient voltage change is converted into a small signal current by the MPGm, the small signal current is folded and guided by the NMOS transistor MNTIA, and then flows through the resistor RTIA, and finally amplified by gm·rtia, and then sent to the super source follower 5022. Therefore, the combination module 5021 formed by the PMOS tube MPGm, the bias current IbTIA, the NMOS tube MNTIA and the resistor RTIA is equivalent to the operational transconductance amplifier+transimpedance amplifier. In this particular circuit embodiment, the PMOS transistor Mz is used as a compensation resistor Rz that automatically tracks load current variations. Its gate is connected to the gate of the power tube MP, its source is connected to the input power supply voltage Vi as is the source of the power tube MP, and its drain is connected to one end of the compensation capacitor Cz, so that vgs_mz=vgs_mp and vds_mz=0 are present. The PMOS transistors Mz are also designed to be PMOS transistors of the same type as the power transistors MP, so they can be considered approximately the same threshold voltage VTHP. Since the PMOS tube Mz operates in the deep linear region, its on-resistance is:
the expression for the compensation zero Zc is thus obtained as:
in this specific circuit embodiment, a closed-loop negative feedback subsystem, which is equivalent to a combination module 5021 of an operational transconductance amplifier and a transimpedance amplifier, a super source follower 5022, a power tube MP and an off-chip capacitor Co together, is used as a unity gain output buffer Obuf502, and the closed-loop bandwidth thereof is as follows:
the error amplifier 501, the output buffer Obuf502, the PMOS transistor Mz and the compensation capacitor Cz used as the compensation resistor, and the feedback voltage dividing resistors Rf1 and Rf2 together form a larger closed-loop negative feedback mother system, that is, a specific circuit embodiment of the nested loop low-dropout linear voltage regulator for automatically tracking and compensating the output pole. The output buffer Obuf502 is known to introduce an output pole to the entire nested loopThe circuit design is such thatTo ensure that the output pole is effectively offset, the circuit design requirements at this time are as follows:
in the embodiment of the invention, the nested loop low-dropout linear voltage regulator of the automatic tracking compensation output pole is constructed by combining the respective advantages of the traditional low-dropout linear voltage regulator and the low-gain high-bandwidth low-dropout linear voltage regulator and adding a new technology capable of automatically tracking and compensating the output pole. The invention adds a new technology capable of automatically tracking and compensating the output pole into the nested loop by utilizing the inherent controllable and trackable characteristic of the loop unit gain bandwidth of the low-gain high-bandwidth low-dropout linear voltage stabilizer, thereby ensuring the stability of the whole nested loop under various loads, further ensuring that the nested loop low-dropout linear voltage stabilizer does not need to specially increase the off-chip capacitance of an output node for ensuring the stability, thereby saving the system cost and improving the stability of the low-dropout linear voltage stabilizer under different loads.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, which are not repeated herein.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied essentially or in part or all of the technical solution or in part in the form of a software product stored in a storage medium, including instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a read-only memory (ROM), a random access memory (random acceS memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims (4)

1. A nested loop low dropout linear regulator, the nested loop low dropout linear regulator comprising: the closed-loop negative feedback subsystem and the closed-loop negative feedback parent system;
the closed loop negative feedback subsystem includes: the device comprises an operational transconductance amplifier, a transimpedance amplifier, a super source follower, a power tube and an off-chip capacitor; the operational transconductance amplifier, the transimpedance amplifier, the super source follower, the power tube and the off-chip capacitor are connected in sequence to form the closed-loop negative feedback subsystem, and the closed-loop negative feedback subsystem is used as an output buffer; the closed-loop negative feedback master system comprises: the error amplifier, the output pole trace compensation resistor, the compensation capacitor, the output buffer and the feedback voltage dividing resistor; sequentially performing closed-loop connection on the error amplifier, the output pole tracking compensation resistor, the compensation capacitor, the output buffer and the feedback divider resistor to generate the closed-loop negative feedback mother system; the operational transconductance amplifier comprises a first transconductance input end, a second transconductance input end and a transconductance output end, wherein the first transconductance input end is connected with the output end of the error amplifier, the second transconductance input end is connected with the output end of the power tube, the transconductance output end is connected with the input end of the transimpedance amplifier, the output end of the transimpedance amplifier is connected with the input end of the super source follower, and the output end of the super source follower is connected with the input end of the power tube; the operational transconductance amplifier is used for: amplifying an input current signal and converting the amplified current signal into a corresponding voltage signal; the transimpedance amplifier is used for: amplifying the voltage signal; the super source follower is used for: the input voltage is followed by the output voltage; the power tube is used for: outputting current and power; the off-chip capacitor is for: adjusting the circuit frequency response and stability of the closed loop negative feedback subsystem; the error amplifier comprises a first amplifier input end, a second amplifier input end and an amplifier output end, wherein the first amplifier input end is used for receiving reference voltage, the second amplifier input end is connected with the output end of the feedback voltage dividing resistor, the amplifier output end is respectively connected with the input end of the output buffer and the output end of the compensation capacitor, the input end of the compensation capacitor is connected with the output pole tracking compensation resistor, the other end of the output pole tracking compensation resistor is grounded, the output end of the output buffer is respectively connected with the off-chip capacitor and the input end of the feedback voltage dividing resistor, and the other end of the off-chip capacitor is grounded; the error amplifier is used for: comparing the input voltage with the output voltage and generating an error signal; the feedback voltage dividing resistor is used for: calculating a feedback voltage according to the error signal; the compensation capacitor is used for: compensating the frequency response of the closed-loop negative feedback parent system; the output pole tracking compensation resistor is used for: tracking load changes and adjusting output poles; the output buffer is used for: amplifying the output current and voltage.
2. The nested loop low dropout linear regulator according to claim 1, wherein said output pole tracking compensation resistor is configured to:
automatically tracking the load current change of the closed-loop negative feedback mother system, and calculating a compensation zero point;
wherein, the calculation function of the compensation zero point is as follows:
wherein the saidTo supplement zero point (I)>Tracking the resistance of the compensation resistor for the output pole, +.>To compensate the capacitance of the capacitor->Which is the output pole.
3. The nested loop low dropout linear regulator according to claim 2, wherein the output pole calculation function is:
wherein the saidFor outputting poles +.>Transconductance of operational transconductance amplifier, +.>For the resistance of the transimpedance amplifier, +.>Is the transconductance of the power tube->Is the capacitance of the off-chip capacitor.
4. The nested loop low dropout linear regulator according to claim 1, wherein said feedback divider resistor further comprises: a first voltage dividing resistor and a second voltage dividing resistor;
the feedback voltage dividing resistor is used for: calculating the clamping output voltage of the closed-loop negative feedback mother system according to the first voltage dividing resistor and the second voltage dividing resistor;
wherein, the calculation function of the clamp output voltage is:
wherein,representing the clamped output voltage, ">Represents a first voltage dividing resistance, ">Representing a second voltage divider resistor +.>Representing the reference voltage.
CN202311334768.8A 2023-10-16 2023-10-16 Nested loop low-dropout linear voltage regulator Active CN117075673B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311334768.8A CN117075673B (en) 2023-10-16 2023-10-16 Nested loop low-dropout linear voltage regulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311334768.8A CN117075673B (en) 2023-10-16 2023-10-16 Nested loop low-dropout linear voltage regulator

Publications (2)

Publication Number Publication Date
CN117075673A CN117075673A (en) 2023-11-17
CN117075673B true CN117075673B (en) 2024-01-05

Family

ID=88704627

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311334768.8A Active CN117075673B (en) 2023-10-16 2023-10-16 Nested loop low-dropout linear voltage regulator

Country Status (1)

Country Link
CN (1) CN117075673B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117389371B (en) * 2023-12-12 2024-02-23 江苏帝奥微电子股份有限公司 Dual-loop frequency compensation circuit suitable for LDO and compensation method thereof

Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10249162A1 (en) * 2002-10-22 2004-05-13 Texas Instruments Deutschland Gmbh Voltage regulator has transistor with main current path between input voltage connection and regulator output, amplifier, transconductance amplifier and resistance between amplifier inputs
EP1635239A1 (en) * 2004-09-14 2006-03-15 Dialog Semiconductor GmbH Adaptive biasing concept for current mode voltage regulators
EP1806640A2 (en) * 2005-12-30 2007-07-11 STMicroelectronics Pvt. Ltd. A low dropout regulator (LDO)
CN101339443A (en) * 2008-08-08 2009-01-07 武汉大学 Broad output current scope low pressure difference linear manostat
WO2013106960A1 (en) * 2012-01-19 2013-07-25 Zou Gaozhi High-precision cross-core open-loop electronic circuit for hall current sensor
CN103838287A (en) * 2013-12-10 2014-06-04 珠海全志科技股份有限公司 Linear voltage regulator for compensation zero point dynamic adjustment
EP2887175A1 (en) * 2013-12-19 2015-06-24 Dialog Semiconductor GmbH Method and system for gain boosting in linear regulators
WO2016082420A1 (en) * 2014-11-24 2016-06-02 深圳市中兴微电子技术有限公司 Low dropout linear voltage regulator
CN206235910U (en) * 2016-10-08 2017-06-09 成都方程式电子有限公司 A kind of low pressure difference linear voltage regulator of wide scope load capacitance
CN107918433A (en) * 2016-10-08 2018-04-17 深圳指瑞威科技有限公司 The low pressure difference linear voltage regulator of wide scope load capacitance
CN108241396A (en) * 2016-12-23 2018-07-03 北京同方微电子有限公司 A kind of low pressure difference linear voltage regulator for improving transient response speed
CN213069627U (en) * 2020-11-24 2021-04-27 成都明夷电子科技有限公司 Low quiescent current LDO circuit based on buffer impedance attenuation
CN113064464A (en) * 2021-03-31 2021-07-02 电子科技大学 High-precision low-dropout linear regulator with quick transient response
CN115097895A (en) * 2022-08-04 2022-09-23 广东鸿翼芯汽车电子科技有限公司 LDO circuit, electronic system and electronic equipment
CN115328255A (en) * 2022-09-11 2022-11-11 北京工业大学 Low-power-consumption light-heavy load conversion LDO circuit based on voltage comparator
CN115328254A (en) * 2022-09-11 2022-11-11 北京工业大学 High transient response LDO circuit based on multiple frequency compensation modes
CN115373456A (en) * 2022-09-20 2022-11-22 中国电子科技集团公司第二十四研究所 Output pole dynamic tracking compensation parallel modulation low dropout linear regulator
CN116155294A (en) * 2023-04-17 2023-05-23 深圳前海深蕾半导体有限公司 Audio digital-to-analog converter, device, digital-to-analog conversion method of audio signal and medium
CN116225120A (en) * 2023-01-30 2023-06-06 华中科技大学 Low dropout linear voltage regulator with high-speed PWM output function and control method

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI664798B (en) * 2017-11-20 2019-07-01 國立成功大學 Power supply system
US10775819B2 (en) * 2019-01-16 2020-09-15 Avago Technologies International Sales Pte. Limited Multi-loop voltage regulator with load tracking compensation

Patent Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10249162A1 (en) * 2002-10-22 2004-05-13 Texas Instruments Deutschland Gmbh Voltage regulator has transistor with main current path between input voltage connection and regulator output, amplifier, transconductance amplifier and resistance between amplifier inputs
EP1635239A1 (en) * 2004-09-14 2006-03-15 Dialog Semiconductor GmbH Adaptive biasing concept for current mode voltage regulators
EP1806640A2 (en) * 2005-12-30 2007-07-11 STMicroelectronics Pvt. Ltd. A low dropout regulator (LDO)
CN101339443A (en) * 2008-08-08 2009-01-07 武汉大学 Broad output current scope low pressure difference linear manostat
WO2013106960A1 (en) * 2012-01-19 2013-07-25 Zou Gaozhi High-precision cross-core open-loop electronic circuit for hall current sensor
CN103838287A (en) * 2013-12-10 2014-06-04 珠海全志科技股份有限公司 Linear voltage regulator for compensation zero point dynamic adjustment
EP2887175A1 (en) * 2013-12-19 2015-06-24 Dialog Semiconductor GmbH Method and system for gain boosting in linear regulators
WO2016082420A1 (en) * 2014-11-24 2016-06-02 深圳市中兴微电子技术有限公司 Low dropout linear voltage regulator
CN206235910U (en) * 2016-10-08 2017-06-09 成都方程式电子有限公司 A kind of low pressure difference linear voltage regulator of wide scope load capacitance
CN107918433A (en) * 2016-10-08 2018-04-17 深圳指瑞威科技有限公司 The low pressure difference linear voltage regulator of wide scope load capacitance
CN108241396A (en) * 2016-12-23 2018-07-03 北京同方微电子有限公司 A kind of low pressure difference linear voltage regulator for improving transient response speed
CN213069627U (en) * 2020-11-24 2021-04-27 成都明夷电子科技有限公司 Low quiescent current LDO circuit based on buffer impedance attenuation
CN113064464A (en) * 2021-03-31 2021-07-02 电子科技大学 High-precision low-dropout linear regulator with quick transient response
CN115097895A (en) * 2022-08-04 2022-09-23 广东鸿翼芯汽车电子科技有限公司 LDO circuit, electronic system and electronic equipment
CN115328255A (en) * 2022-09-11 2022-11-11 北京工业大学 Low-power-consumption light-heavy load conversion LDO circuit based on voltage comparator
CN115328254A (en) * 2022-09-11 2022-11-11 北京工业大学 High transient response LDO circuit based on multiple frequency compensation modes
CN115373456A (en) * 2022-09-20 2022-11-22 中国电子科技集团公司第二十四研究所 Output pole dynamic tracking compensation parallel modulation low dropout linear regulator
CN116225120A (en) * 2023-01-30 2023-06-06 华中科技大学 Low dropout linear voltage regulator with high-speed PWM output function and control method
CN116155294A (en) * 2023-04-17 2023-05-23 深圳前海深蕾半导体有限公司 Audio digital-to-analog converter, device, digital-to-analog conversion method of audio signal and medium

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
A Low-Power, Fast-Transient FVF-Based Output-Capacitorless LDO with Push–Pull Buffer and Adaptive Resistance Unit;Li Yuanzhe等;《Electronics》;第12卷(第6期);1285-1285 *
基于有源反馈补偿的快速瞬态响应LDO设计;陈昶等;《电子元件与材料》;第41卷(第11期);1222-1227,1250 *

Also Published As

Publication number Publication date
CN117075673A (en) 2023-11-17

Similar Documents

Publication Publication Date Title
US10019023B2 (en) Low-dropout linear regulator with super transconductance structure
CN117075673B (en) Nested loop low-dropout linear voltage regulator
US7502719B2 (en) Method and apparatus for overshoot and undershoot errors correction in analog low dropout regulators
CN114253330A (en) Quick transient response's no off-chip capacitance low dropout linear voltage regulator
US7768351B2 (en) Variable gain current input amplifier and method
CN1832338B (en) Transimpedance amplifier with signal amplification circuit that performs power signal regulation
US6842068B2 (en) Power management method and structure
CN101853040A (en) High mains rejection ratio low dropout voltage linear voltage regulator with feedforward transconductance
CN100549898C (en) Utilize two-way asymmetric buffer structure to improve the LDO circuit of performance
CN106155162B (en) A kind of low pressure difference linear voltage regulator
CN101727119B (en) Low-dropout linear voltage source with effective compensation
CN115328254B (en) High transient response LDO circuit based on multiple frequency compensation modes
US8896378B2 (en) Differential amplifier circuit with ultralow power consumption provided with adaptive bias current generator circuit
US9785164B2 (en) Power supply rejection for voltage regulators using a passive feed-forward network
CN113342110B (en) Error amplifier circuit with dynamic zero compensation
WO2021035707A1 (en) Low-dropout regulator
CN111414039B (en) Linear voltage regulator circuit adopting on-chip compensation technology
CN106484020A (en) Low-dropout linear voltage-regulating circuit
KR102138770B1 (en) Buffer circuit, amplifier and regulator with high stability and fast response
US5315264A (en) Rail-to-rail opamp with large sourcing current and small quiescent current
US8400214B2 (en) Class AB output stage
CN112468104A (en) Operational amplifier
CN110058633B (en) High-precision low-differential-pressure linear constant current source circuit and feedforward frequency compensation method
CN116225118A (en) LDO circuit based on PN complementary current compensation power supply ripple feedforward
CN114253340B (en) Zero-point dynamic-adjustment frequency compensation linear voltage stabilizing circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant