CN117061009B - Optical modulation amplitude control method and framework of optical communication transmitter laser driver - Google Patents
Optical modulation amplitude control method and framework of optical communication transmitter laser driver Download PDFInfo
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Abstract
The invention discloses a light modulation amplitude control method and a framework of a laser driver of an optical communication transmitter, wherein the control method is a scheme that parasitic capacitance of a monitoring photodiode MPD is used as an integrator, and the difference value between a reference current and a monitoring signal current is integrated within the positive pulse time of a clock and then compared; the specific architecture of the scheme implementation comprises: the device comprises a laser driver, a laser diode LD, a monitoring photodiode MPD, a comparator, a digital controller, a bias current DAC, a modulation current DAC, a clock signal and a switching tube. The invention can realize the automatic control of the key performance index of the optical communication transmitter, namely the optical modulation amplitude OMA, can solve the problem that the changes of the electro-optical conversion characteristic of the laser diode along with the temperature, the service life, the production consistency and other factors influence the OMA index, and can avoid the problem that the typical laser driver control scheme is influenced by the parasitic capacitance of MPD and can not be applied to the high-speed optical transmitter.
Description
Technical Field
The invention belongs to the technical field of optical communication, and particularly relates to an optical modulation amplitude control method and an optical modulation amplitude control framework of a laser driver of an optical communication transmitter.
Background
The system block diagram of the optical communication transmitter system, as shown in fig. 1, mainly includes a multiplexer, a laser driver, and a laser diode LD (Laser Diode). In an optical transmitter, a parallel data input signal is first converted into a serial data signal by a synchronous clock signal and a multiplexer, and then output to a laser driver of a subsequent stage; the laser driver amplifies the pre-stage voltage signal, shapes the pre-stage voltage signal, drives the bias current and the modulation current to flow through the laser diode LD, and converts the electrical signal into an optical signal to be input into the optical fiber.
The laser diode LD, which is the last stage of the optical transmitter, is a key element of the optical transmitter, and its performance directly affects the main performance index of the optical transmitter. Since the laser diode is a semiconductor device (mostly using compounds composed of iii and v elements, and the common material is AlGaAs/InGaAs/InP), the electro-optical conversion characteristics thereof are affected by temperature, lifetime, and production uniformity, as shown in fig. 2, the threshold current Ith and the luminous efficiency of the laser diode are changed with temperature, lifetime, or production uniformity, the obtained light modulation amplitudes (OMA, optical Modulation Magnitude) are different under the same driving current (same bias current IBias and modulation current IMod), the threshold current Ith1 and the threshold current Ith2 are different, as shown in fig. 2, P1 represents a high energy level, P0 represents a low energy level, and OMA is defined as the difference between the high energy level P1 and the low energy level P0; in the figure, OMA1 is the difference between P1 and P0; OMA2 is the difference between P1 'and P0'.
In order to obtain better and more stable transmitter system performance, the optical modulation amplitude is expected to be stable in the working temperature range, the service life and the mass production, so that a control circuit needs to be added in a laser driver circuit to compensate the degradation of the optical modulation amplitude OMA of the laser diode caused by aging, temperature and other factors, and the quality of the transmitted optical signal is ensured.
In order to solve the problem of performance degradation of an optical transmitter caused by degradation of an optical modulation amplitude OMA due to factors such as temperature, lifetime and consistency of a laser diode, a typical laser driver technology scheme is currently adopted as a control scheme shown in fig. 3.
The control scheme in fig. 3 includes an automatic average optical power control APC (Automatic Mean Power Control) loop and an automatic extinction ratio control ERC (Extinction Ration Control) loop. The APC loop refers to a loop from the laser diode light emission LD- > the monitor photodiode MPD- > the transimpedance amplifier- > the low-pass filter- > the amplifier- > the bias current control laser driver- > the laser diode LD. The AER loop is a loop from the slave laser diode light emission LD- > the monitor photodiode MPD- > the transimpedance amplifier- > the peak detector- > the amplifier- > the modulation current control laser driver- > the laser diode LD.
The principle of APC loop is: the laser driver drives the laser diode to emit light, the MPD converts the monitored optical signal into a current signal, the transimpedance amplifier converts the flowing current signal into a voltage signal, the direct current component (average value) in the voltage signal is extracted to the negative input end of the amplifier through the low-pass filter, and then the voltage signal is compared with the reference voltage VAVG value (voltage proportional to average optical power) set at the positive end of the amplifier, and the comparison result is sent into the bias current for controlling the laser driver. The APC loop is a negative feedback loop, and when it stabilizes, the average voltage generated by the MPD photocurrent is equal to the set VAVG voltage, i.e. the average optical power is equal to the set target value.
The principle of the ERC loop is: the peak value of the electric signal is detected by a peak value detection circuit and is input to the negative end of the amplifier, and is compared with a reference voltage VPEAK value (voltage proportional to extinction ratio) set at the positive end of the amplifier, and the comparison result is sent to a modulation current for controlling the laser driver. The ERC loop is also a negative feedback loop, and after the loop is stabilized, the peak voltage generated by the MPD photocurrent is equal to the set VPEAK voltage, that is, the extinction ratio is equal to the set target value.
When the average optical power and the extinction ratio are equal to the set values, the control of the output average optical power and the peak power is realized, that is, the OMA modulation of the emitted optical power is realized.
The control scheme has the advantages that: the emitting light modulation amplitude OMA can be automatically controlled, the temperature characteristic of the electro-optic conversion of the laser diode device is not required to be concerned, and the service life of the device can be also solved. However, with the rapid development of optical communication, the signal code rate has been developed from early several tens of Mbps to Gbps, 10Gbps and above, and the deficiency of this scheme has also been shown: firstly, a monitoring photodiode MPD capable of working at a Bit rate (Bit rate) is needed, but the parasitic capacitance of the currently mainstream monitoring photodiode MPD is large and is generally a few pF to a few tens of pF, the RC bandwidth formed by the monitoring photodiode MPD and a post-stage transimpedance amplifier is very low and is generally a few to a few tens of megabytes, and the signal working rate is low; secondly, the transimpedance amplifier TIA and the peak detector also need to work at a bit rate, which can lead to very large power consumption and area in high-speed application, and the application rate of gigabit cannot be achieved even if the power consumption and area are sacrificed due to large MPD parasitic capacitance value; furthermore, the analog peak detector has a limited hold time, which may result in incorrect peak levels being monitored during burst mode applications. For the above reasons, the method is only suitable for the OMA automatic control of the emitted light with very low speed, and cannot meet the development demands of the current optical communication gigabits, terahertz and above.
Disclosure of Invention
The invention aims to provide a light modulation amplitude control method and a light modulation amplitude control framework of a laser driver of an optical communication transmitter, which mainly solve the problem that the prior art cannot meet the development requirements of the current optical communication kilomega, gigahertz and above.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
an optical modulation amplitude control method of an optical communication transmitter laser driver comprises the following steps:
s1, expressed byIt is known that optical modulation amplitude OMA two independent optical power levels P of an optical signal emitted by an optical transmitter 1 、P 0 Determining; wherein P is 1 Representing a high energy level, P 0 Represents a low energy level;
s2, according to the average optical power expressionAnd extinction ratio expression->Setting average light power P avg And extinction ratio ER, solving to obtain P 0 And P 1 ；
S3, according to the photoelectric response expression of the monitoring photodiode MPDCarry over P 0 And P 1 Deriving a reference current I 0 And reference current I 1 Is a value of (2); wherein (1)>Responsivity is given in w/A; p is the optical power level;
s4, obtaining the required reference current I through a reference current generation module 0 And reference current I 1-0 ；
S5, inputting a transmitter input electric signal Data and a transmitter burst enabling signal Ben to a laser driver to generate a current signal;
s6, the current signal flows through the laser diode LD to generate an optical signal, and the optical signal is converted into a photoinduction current signal by the monitoring photodiode MPD;
s7, the photoinduction current signal and the reference current I 0 And reference current I 1-0 Subtracting the sum and integrating the obtained difference;
s8, inputting the integrated current signal into a comparator to be compared with a set bias voltage, and sampling the output of the comparator;
s9, transmitting the digital signal output by the comparator to a digital controller for processing, and controlling BIAS DAC BIAS current and MOD DAC modulation current by the output result;
s10, inputting BIAS DAC BIAS current and MOD DAC modulation current into a laser driver, and regulating the driving capability of the laser driver to form a negative feedback loop;
s11, when the stable state is finally reached, the photo-induced current signal converted by the photodiode MPD and the reference current I are monitored 0 And reference current I 1 And the optical modulation amplitude is automatically controlled.
Based on the method, the invention also provides an optical modulation amplitude control framework of the optical communication transmitter laser driver, which comprises the laser driver, an optical emission component connected with the output end of the laser driver, a reference current generation module connected with the optical emission component through two switches, a positive end connected with the optical emission component and the reference current generation module, and a negative end connected with V ref A digital controller connected with the output end of the comparator, and a first digital-to-analog converter connected with the digital controller through a control bus and used for generating bias current to the laser driver and a second digital-to-analog converter used for generating modulation current to the laser driver, respectively; the reference current generation module and the comparator are controlled by a switch control signal output by the same switch control module; the switch control module is formed by a burst enable signal Ben,The transmitter inputs an electrical signal Data, a clock signal Dclk and a Flag bit Flag generated by the digital controller.
Further, in the present invention, the switch control module includes a buffer having an input terminal for inputting a burst enable signal Ben and an output terminal for outputting a Sw1 signal, a nand gate having two input terminals for inputting the Sw1 signal and a Dclk signal to generate a Reset signal, and an and gate having 3 input terminals for inputting Flag bit Flag, the Sw1 signal, and a transmitter for inputting an electrical signal Data and outputting a Sw2 signal, respectively; the Sw1 signal and the Sw2 signal are used for controlling the reference current generation module, and the Reset signal is used for controlling the comparator.
Further, in the present invention, the reference current generation module is formed by a control bus APC_SET<7:0>And a control bus erc_set<7:0>Controlling together; control bus apc_set<7:0>Setting an 8-bit APC_DAC output current of 2×Iavg, wherein the 2×Iavg current is divided into 8 branches, and the split ratio of each branch is respectively 1:2:4:8:16:32:64:128, each branch is selected to be communicated with a circuit through a switch tube; wherein the switching tube passes through a control bus ERC_SET<7:0>Controlling; the 8 branches are selected by a switching tube to form left-path output and right-path output; the current 2 Iavg is divided into two parts, one part flows into the left path through the output of the left path and is output as I through mirror image 0 A portion flows into the right path through the right path output and is subtracted by I 0 Output as I by mirroring 1-0 。
Further, in the present invention, the digital controller includes 3 counters, 1 frequency divider, 1 internal register, and 1 state controller; the input signal of the digital controller comprises a main clock signal Mclk, and a comparator output signal V cmp A transmitter burst enable signal Ben, a reset signal Rst, and IIC digital communication interface signals SDA and SCL; wherein,
the frequency divider is used for dividing the main clock signal Mclk to generate a clock signal Dclk;
the 3 counters are recorded as a first counter, a second counter and a third counter, the first counter has the functions of judging the value of the output signal Vcmp of the comparator at the moment of the falling edge of the clock signal Dclk, when the output signal Vcmp is in a high level, the counter is decremented by one, when the output signal Vcmp is in a low level, the counter is incremented, and then the result of the counter is output to a control bus of the first digital-analog converter;
similarly, the function of the second counter is to output the result of the counter to the control bus of the second digital-to-analog converter;
the third counter is used for distributing the adjustment proportion of the first digital-to-analog converter and the second digital-to-analog converter after the digital controller enters a steady state;
the internal register is used for storing parameters of the internal state controller;
the state controller is used for adjusting the working states of the first digital-to-analog converter and the second digital-to-analog converter according to the combination of the input and output signals.
Further, in the present invention, the light emitting component is composed of a laser diode LD, a monitor photodiode MPD and a parasitic capacitance C MPD Composition; the cathode of the laser diode LD is connected with the output end of the laser driver, the anode of the laser diode LD is connected with the VDD, the cathode of the monitoring photodiode MPD is connected with the VDD, and the anode of the monitoring photodiode MPD outputs a photoinduction current signal to the reference current generating module; parasitic capacitance C MPD And the two ends of the monitoring photodiode MPD are connected in parallel.
Compared with the prior art, the invention has the following beneficial effects:
the invention can realize the automatic control of the key performance index, namely the optical modulation amplitude OMA, of the optical communication transmitter by setting the average optical power and the extinction ratio index, can solve the problem that the changes of the electro-optical conversion characteristic of the laser diode along with the factors such as temperature, service life, production consistency and the like affect the OMA index, and can avoid the problem that the typical laser driver control scheme cannot be applied to a high-speed optical transmitter due to the influence of MPD parasitic capacitance; the high-speed simulation module is not needed, and the power consumption is low; the method is applicable to the application of burst mode high-speed signals and meets the requirements of the currently mainstream gigahertz optical communication transmitting end.
Drawings
Fig. 1 is a block diagram of an optical communication transmitter system in the prior art.
Fig. 2 is a graph showing the relationship between the output optical power and the driving current of a laser diode according to the prior art.
Fig. 3 is a block diagram of a typical laser driver control scheme of the prior art.
Fig. 4 is a flow chart of a control method of the present invention.
Fig. 5 is a diagram of a control architecture of the present invention.
Fig. 6 is a typical structural diagram of the switch control module in the present invention.
Fig. 7 is a typical structure diagram of the reference current generating module in the present invention.
Fig. 8 is a typical structural diagram of a digital controller in the present invention.
Detailed Description
The invention will be further illustrated by the following description and examples, which include but are not limited to the following examples.
As known from the background art, the parasitic capacitance value of the monitor photodiode MPD of the TOSA is large, typically from several pF to several tens of pF, and the bandwidth formed by the monitor photodiode MPD and the trans-impedance amplifier at the subsequent stage is only tens of mhz, which limits the high-speed application of the typical optical transmitter.
As shown in fig. 4, the flow chart of the optical modulation amplitude control method of the optical communication transmitter laser driver provided by the invention comprises two branches, wherein one branch is a reference current I 0 And I 1 One of the branches is an optical modulation amplitude control loop of the laser driver.
For an optical transmitter that emits an optical signal that is a binary non-return-to-zero (NRZ) code, the signal has only two independent optical power levels, as previously shown in fig. 2, P 1 Representing a high energy level, P 0 OMA is defined as the difference between the high and low energy levels, representing the low energy level, expressed as:
as can be seen from the above formula, as long as P is determined 0 And P 1 OMA is determined. In optical transmitter applications, average optical power and extinction ratio are typically used, both of which are used to determine P 0 And P 1 。
The expression of the average optical power is:
the extinction ratio is expressed as:
the two formulas can form a binary one-time equation, and the average light power and extinction ratio index are set to obtain P 0 And P 1 And then monitoring the photo-response expression of the photodiode according to the MPD as follows:
wherein the method comprises the steps ofρIs responsivity w/A; thereby obtaining the response current I 0 And I 1 Is a value of (2).
By using the principle and the circuit, the required reference current I is generated 0 And I 1-0 。
In another loop, the transmitter input signal Data and the transmitter burst enable signal Ben are input to the laser driver to generate a current signal, the current signal flows through the laser diode LD to generate an optical signal, the optical signal is reconverted into an optical induced current signal by the monitor photodiode MPD, and the generated optical induced current signal is used for generating a reference current signal I 0 And I 1-0 Subtracting, integrating in the positive pulse time range of the clock signal Dclk clock, comparing with the set BIAS voltage, sampling the output of the comparator at the falling edge of the Dclk clock, transmitting the digital signal output by the comparator to the digital controller for processing, and controlling BIAS current and MOD of the BIAS DAC as the output resultThe DAC modulates the current. Finally, the bias current and the modulation current are input to the laser driver again to regulate the driving capability of the laser driver, so as to form a negative feedback loop. When the stable state is finally reached, the photo-induced current signal converted by the photodiode MPD and the set reference current I are monitored 0 And I 1 And the optical modulation amplitude is automatically controlled.
Based on the above principle, the present invention further provides an architecture for controlling the optical modulation amplitude of a laser driver of an optical communication transmitter, as shown in fig. 5, which includes a laser driver, an optical emission component connected to an output end of the laser driver, a reference current generating module connected to the optical emission component through two switches, a comparator having a positive end connected to the optical emission component and the reference current generating module and a negative end connected to Vref, a digital controller connected to an output end of the comparator, and a first digital-to-analog converter having an input end connected to the digital controller through a control bus, respectively, for generating a bias current to the laser driver and a second digital-to-analog converter for generating a modulation current to the laser driver; the reference current generation module and the comparator are controlled by a switch control signal output by the same switch control module; the switch control module is controlled by a burst enabling signal Ben, a transmitter input electric signal Data, a clock signal Dclk and a Flag bit Flag generated by the digital controller.
In this embodiment, since there is only one comparator, it consumes much less power; the problem of limited holding time of an analog peak detector in the traditional method is also eliminated by a sample hold technology; the overall circuit operates on a Dclk clock rather than a bit-by-bit basis, thus eliminating the need for fast and power-hungry circuits; and parasitic photodiode capacitance C mpd This is a nuisance in conventional approaches (limiting the rate at which the transmitter signal is applied), but is used here as an integrator and does not limit the signal bandwidth.
In this example, the light emitting assembly TOSA is formed by a laser diode LD and a monitor photodiode MPD and its parasitic capacitance C MPD Composition is prepared. The laser diode LD converts the current signal generated by the laser driver into an optical signal, and transmits a part of the optical signal to the lightA part of the fiber is transmitted to the monitoring photodiode and converted into a response current I again mpd . Reference current I controlled by Sw1 and Sw2 switches, respectively 0 And I 1-0 All are connected to the anode terminal of the monitoring photodiode MPD, and the anode terminal of the monitoring photodiode MPD is also connected to the positive terminal of the comparator.
Monitoring parasitic capacitance C of photodiode MPD mpd Without input to the transimpedance amplifier TIA as described earlier, this time being used as integrating capacitor C MPD Without limiting the bandwidth of the signal, the voltage integral expression is:
integrating capacitor C MPD At the positive pulse time T of the clock signal Dclk clock Dclk Response current to MPD and reference current I 0 And I 1-0 Is integrated to generate a voltage V mpd 。V mpd Is compared with a reference voltage Vref input by the negative terminal of the comparator and then at D clk The falling edge of the clock samples the output of the comparator, expressed as:
as can be seen from the above two formulas, the parasitic photodiode capacitance C MPD The value of (2) has no effect on the comparator result and is therefore not important. I between photodiode and reference current pulse 0 And I 1-0 Delays, such as those caused by on delay compensation, also have no effect on comparator decisions.
The voltage signal Vcmp is input to the digital controller; meanwhile, the control switch Reset connects the positive and negative terminals of the comparator when the negative pulse time of the Dclk clock or the transmitter burst enable signal Ben is low.
The comparator output Vcmp is transmitted to a digital controller for processing. Based on Vcmp results, the counter controlling the laser output power is incremented or decremented, e.g. Vcmp is high indicating I MPD Is greater than the reference current and therefore the counter inside the digital controller is stepped down. The output result of the counter controls BIAS DAC BIAS current and MOD DAC modulation current through the digital bus.
Finally, the bias current and the modulation current are input to the laser driver, and the driving current of the laser driver is regulated to form a negative feedback loop. When the steady state is finally reached, the current signal converted by the photodiode MPD and the set reference current I are monitored 0 And I 1 And the optical modulation amplitude is automatically controlled.
As shown in fig. 6, the exemplary structure of the switch control module adopted in this embodiment includes a buffer with an input terminal for inputting a burst enable signal Ben, an output terminal for outputting a Sw1 signal, a nand gate with two input terminals for inputting a Sw1 signal and a Dclk signal to generate a Reset signal, and an and gate with 3 input terminals for inputting Flag bits Flag, a Sw1 signal and a transmitter for inputting an electrical signal Data and outputting a Sw2 signal, respectively; the Sw1 signal and the Sw2 signal are used for controlling the reference current generation module, and the Reset signal is used for controlling the comparator.
As shown in FIG. 7, a typical structure of a reference current generation module used in the present embodiment is shown, which is composed of a control bus APC_SET<7:0>And a control bus erc_set<7:0>Controlling together; control bus apc_set<7:0>Setting an 8-bit APC_DAC output current of 2×Iavg, wherein the 2×Iavg current is divided into 8 branches, and the split ratio of each branch is respectively 1:2:4:8:16:32:64:128, each branch is selected to be communicated with a circuit through a switch tube; then, through the control bus ERC_SET<7:0>Selection switch tube ERC_SET for controlling 8 branches<0>~ERC_SET<7>For example, a high level selects a left path and a low level selects a right path; namely, the 8 branches form left-path output and right-path output after being selected by a switching tube; the current 2 Iavg is divided into two parts, one part flows into the left path through the output of the left path and is output as I through mirror image 0 A portion flows into the right path through the right path output and is subtracted by I 0 Output as I by mirroring 1-0 。
As shown in fig. 8, a typical structure of a digital controller used in the present embodiment is shown, and the digital controller includes 3 counters, 1 frequency divider, 1 internal register, and 1 state controller; the input signals of the digital controller comprise a main clock signal Mclk, a comparator output signal Vcmp, a transmitter burst enable signal Ben, a reset signal Rst and IIC digital communication interface signals SDA and SCL; the frequency divider is used for dividing the main clock signal Mclk to generate a clock signal Dclk.
The 3 counters are respectively marked as a counter 1, a counter 2 and a counter 3. The function of the counter 1 is to determine the value of the comparator output signal Vcmp at the falling edge time of the clock signal Dclk (Ben is high level), to decrement the counter 1 when the output signal Vcmp is high level, to increment the counter when the output signal Vcmp is low level, and to output the result of the counter 1 to the control bus of the first digital-to-analog converter. Similarly, the function of the counter 2 is to output the result of the counter to the control bus of the second digital-to-analog converter; the counter 3 is used for distributing the adjustment proportion of the first digital-to-analog converter and the second digital-to-analog converter after the digital controller enters a steady state; for example, 56 Dclk period adjustment BIAS DACs (first digital-to-analog converters) are allocated every 64 Dclk periods, and 8 Dclk period adjustment MOD DACs (second digital-to-analog converters).
The internal register function is to store parameters of the internal state controller such as the frequency division ratio of the frequency divider, initial values and step values in the counter 1 and the counter 2, setting ratios in the counter 3, and the like.
The main function of the state controller is to adjust the working states of the BIAS DAC and MOD DAC according to various combinations of input and output signals, and there are mainly 4 working states: when the reset Rst signal is in a low level, all output signals of the digital controller are reset to be in a low level; second, adjust I 0 In a state, when the Rst signal is in a high level and the input Ben is in a high level, the MOD DAC control bus is set to 0, and the BIAS DAC control bus is only regulated until the step of the BIAS DAC is 1Lsb, and the Flag output is in a high level; thirdly, adjust I 1 In the state, when Rst signal is high and input Ben is high, BI is appliedThe AS DAC control bus is kept unchanged, only the MOD DAC control bus is adjusted until the step of the MOD DAC is 1Lsb, and the Flag2 output is high level; and fourthly, in a stable state, after the Flag and the Flag2 are both in a high level, the BIAS DAC control bus and the MOD DAC control bus are adjusted in a time-sharing mode through the configuration of the counter 3, and the adjusted steps are 1Lsb.
When Rst reset signal is changed from low level to high level, the timing of the embodiment first enters to adjust I 0 A state; at this time, the BIAS DAC outputs an initial value of bias_dac [0 ]]The MOD DAC output value is 0, the switch tube Sw1 is always turned on when Ben is high level, and the comparator is turned on when Dclk clock is high level, the output value of the comparator is equal to I mpd And I 0 The integration of the difference value of (2) is compared, sampling is carried out on the falling edge of Dclk and the sampling is output to a digital controller, and the digital controller adjusts the BIAS DAC when the Dclk is at a low level; initially Vcmp is low all the time, biadac adjusts to linear step mode bias_dac n]= bias_dac[n-1]+ bias_dac[n-1]K, wherein bias_dac [ n ]]Representing the current nth time adjustment data, bias_dac [ n-1 ]]The previous adjustment data is represented, K is a constant of 2 integer times, and represents the ratio of steps. With the gradual increase of the BIAS DAC, when the Vcmp is changed to the high level for the first time, the BIAS DAC is adjusted to enter the binary step mode, i.e. when the high level and the low level of the Vcmp are switched, the BIAS DAC is adjusted to step by one half of the last step. When the binary step adjustment is changed to the minimum step 1Lsb of the BIAS DAC, the BIASDAC is adjusted to enter the steady step mode, the steps thereafter are all 1Lsb adjustment, and the digital controller outputs Flag bit Flag to high level, indicating adjustment I 0 Ending the state, entering into adjustment I 1 A state.
When the control sequence enters adjustment I 1 A state; at this time the BIAS DAC output value remains in adjustment I 1 The value before state is unchanged, and the MOD DAC output value is an initial value mod_dac [0 ]]The switching tube Sw1 is always turned on when Ben is high, and the switching tube Sw2 is turned on when Ben and Data are high. Similarly, the comparator outputs a signal corresponding to I when the Dclk clock is high mpd And I 0 ，I 1-0 Is compared with the integral of the difference value of the two voltage values, is sampled at the falling edge of Dclk and is output to a digital controller, and the digital controller is powered down at the falling edge of DclkAt ordinary times, the MOD DAC is adjusted; initially Vcmp is low all the time, MOD DAC is adjusted to linear step mode mod_dac n]=mod_dac[n-1]+ mod_dac[n-1]K, wherein mod_dac [ n ]]Representing the current nth time adjustment data mod_dac [ n-1 ]]The previous adjustment data is represented, K is a constant of 2 integer times, and represents the ratio of steps. With the gradual increase of the MOD DAC, after the Vcmp changes to the high level for the first time, the MOD DAC is adjusted to enter a binary step mode, i.e. when the high level and the low level of the Vcmp are switched, the MOD DAC is adjusted to step by one half of the last step. When the binary step adjustment is to be the minimum step 1Lsb for the MOD DAC, the MOD DAC is adjusted to enter the steady step mode, the steps thereafter are all 1Lsb adjustments, and the digital controller outputs Flag bit Flag2 high to indicate adjustment I 1 And (5) ending the state and entering a stable state.
When the control time sequence enters a stable state; at this time, the BIAS DAC output value is adjusted by 1Lsb based on the previous state according to the sampling value of Vcmp, and the MOD DAC output keeps the previous state output value unchanged; then after several sampling periods, the MOD DAC output value is adjusted by 1Lsb based on the sampled value of Vcmp on the basis of the previous state, while the BIAS DAC output keeps the output value of the previous state unchanged, i.e. after entering the steady state, the BIAS DAC and MOD DAC are time-division adjusted, and the time-division ratio can be set by the counter 3. When Rst is low from the high side, the digital controller is output reset to low.
The exemplary diagram of the present invention is a simplified block diagram. As long as the main scheme is consistent with the invention, the modules with no influence on the functions are added, and the protection of the invention is not influenced. For example, the integrator, the comparator and the reference current generating circuit in the architecture of the present invention are main functional modules, and non-logic modules such as a delay device or a driver can be introduced.
The exemplary drawings of the present invention are all typical structural diagrams. Changing the connection mode of the interface does not affect the protection of the invention. For example, MPD adopts a connection mode of a current source, and refers to current I 1-0 And I 0 The connection mode of current sinking is adopted, and the connection can be actually reversed.
The control of the logic signal of the invention is enabled according to the typical high level, and the low level is not enabled; positive pulse integration and negative pulse sampling. The control polarity of the logic signal is changed, so that the protection of the invention is not affected.
The functional modules mentioned in the present invention are described in a most simplified form. The detailed description of these modules is added without affecting the protection of the present invention. For example, the mode of operation of the integrator, comparator and digital controller during the upper and lower half cycles of the clock may be reversed or different clock phases may be generated by dedicated sequential logic circuits.
The transmitter of the invention operates in burst mode but can in practice also be applied in continuous mode, i.e. Ben remains high all the time without affecting the protection of the invention.
Through the design, the invention can realize the automatic control of the key performance index of the optical communication transmitter, namely the optical modulation amplitude OMA, can solve the problem that the changes of the electro-optical conversion characteristic of the laser diode along with the factors such as temperature, service life, production consistency and the like affect the OMA index, and can avoid the problem that the typical laser driver control scheme is affected by the parasitic capacitance of MPD and can not be applied to a high-speed optical transmitter; the high-speed simulation module is not needed, and the power consumption is low; the method is applicable to the application of burst mode high-speed signals and meets the requirements of the currently mainstream gigahertz optical communication transmitting end.
The above embodiment is only one of the preferred embodiments of the present invention, and should not be used to limit the scope of the present invention, but all the insubstantial modifications or color changes made in the main design concept and spirit of the present invention are still consistent with the present invention, and all the technical problems to be solved are included in the scope of the present invention.
Claims (6)
1. An optical modulation amplitude control method of a laser driver of an optical communication transmitter is characterized by comprising the following steps:
s1, expressed byIt can be seen that the light is modulatedAmplitude of the preparation->Two independent optical power levels P of an optical signal emitted by an optical transmitter 1 、P 0 Determining; wherein P is 1 Representing a high energy level, P 0 Represents a low energy level;
s2, according to the average optical power expressionAnd extinction ratio expression->Setting an average optical powerAnd extinction ratio ER, solving to obtain P 0 And P 1 ；
S3, according to the photoelectric response expression of the monitoring photodiode MPDCarry over P 0 And P 1 Deriving a reference current I 0 And reference current I 1 Is a value of (2); wherein (1)>Responsivity is given in w/A; p is the optical power level;
s4, obtaining the required reference current I through a reference current generation module 0 And reference current I 1-0 The method comprises the steps of carrying out a first treatment on the surface of the Wherein I is 1-0 = I 1 - I 0 ；
S5, inputting a transmitter input electric signal Data and a transmitter burst enabling signal Ben to a laser driver to generate a current signal;
s6, the current signal flows through the laser diode LD to generate an optical signal, and the optical signal is converted into a photoinduction current signal by the monitoring photodiode MPD;
s7, the photoinduction current signal and the reference current I 0 And reference current I 1-0 Sum ofSubtracting and integrating the obtained difference value;
s8, inputting the integrated current signal into a comparator to be compared with a set bias voltage, and sampling the output of the comparator;
s9, transmitting the digital signal output by the comparator to a digital controller for processing, and controlling BIAS DAC BIAS current and MOD DAC modulation current by the output result;
s10, inputting BIAS DAC BIAS current and MOD DAC modulation current into a laser driver, and regulating the driving capability of the laser driver to form a negative feedback loop;
s11, when the stable state is finally reached, the photo-induced current signal converted by the photodiode MPD and the reference current I are monitored 0 And reference current I 1 And the optical modulation amplitude is automatically controlled.
2. A system for implementing the optical modulation amplitude control method of the optical communication transmitter laser driver as claimed in claim 1, comprising the laser driver, and further comprising an optical emission component connected to an output end of the laser driver, a reference current generating module connected to the optical emission component through two switches, a comparator having a positive end connected to the optical emission component and the reference current generating module and a negative end connected to Vref, a digital controller connected to an output end of the comparator, and a first digital-to-analog converter having an input end connected to the digital controller through a control bus, respectively, for generating a bias current to the laser driver and a second digital-to-analog converter for generating a modulation current to the laser driver; the reference current generation module and the comparator are controlled by a switch control signal output by the same switch control module; the switch control module is controlled by a burst enabling signal Ben, a transmitter input electric signal Data, a clock signal Dclk and a Flag bit Flag generated by the digital controller.
3. The system for implementing the optical modulation amplitude control method of the optical communication transmitter laser driver according to claim 2, wherein the switch control module comprises a buffer with an input end inputting a burst enable signal Ben, an output end outputting a Sw1 signal, a nand gate with two input ends inputting the Sw1 signal and the Dclk signal to generate a Reset signal, and an and gate with 3 input ends inputting Flag bit Flag, sw1 signal and transmitter input electric signal Data and outputting a Sw2 signal, respectively; the Sw1 signal and the Sw2 signal are used for controlling the reference current generation module, and the Reset signal is used for controlling the comparator.
4. A system for implementing a method for optical modulation amplitude control of an optical communication transmitter laser driver as claimed in claim 3, wherein said reference current generation module is defined by a control bus apc_set<7:0>And a control bus erc_set<7:0>Controlling together; control bus apc_set<7:0>Setting an 8-bit APC_DAC output current of 2×Iavg, wherein the 2×Iavg current is divided into 8 branches, and the split ratio of each branch is respectively 1:2:4:8:16:32:64:128, each branch is selected to be communicated with a circuit through a switch tube; wherein the switching tube passes through a control bus ERC_SET<7:0>Controlling; the 8 branches are selected by a switching tube to form left-path output and right-path output; the current 2 Iavg is divided into two parts, one part flows into the left path through the output of the left path and is output as I through mirror image 0 A portion flows into the right path through the right path output and is subtracted by I 0 Output as I by mirroring 1-0 。
5. A system for implementing a method of optical modulation amplitude control for an optical communication transmitter laser driver as recited in claim 4, wherein said digital controller comprises 3 counters, 1 divider, 1 internal register, and 1 state controller; the input signals of the digital controller comprise a main clock signal Mclk, a comparator output signal Vcmp, a transmitter burst enable signal Ben, a reset signal Rst and IIC digital communication interface signals SDA and SCL; wherein,
the frequency divider is used for dividing the main clock signal Mclk to generate a clock signal Dclk;
the 3 counters are recorded as a first counter, a second counter and a third counter, the first counter has the functions of judging the value of the output signal Vcmp of the comparator at the moment of the falling edge of the clock signal Dclk, when the output signal Vcmp is in a high level, the counter is decremented by one, when the output signal Vcmp is in a low level, the counter is incremented, and then the result of the counter is output to a control bus of the first digital-analog converter;
similarly, the function of the second counter is to output the result of the counter to the control bus of the second digital-to-analog converter;
the third counter is used for distributing the adjustment proportion of the first digital-to-analog converter and the second digital-to-analog converter after the digital controller enters a steady state;
the internal register is used for storing parameters of the internal state controller;
the state controller is used for adjusting the working states of the first digital-to-analog converter and the second digital-to-analog converter according to the combination of the input and output signals.
6. The system for implementing a method for optical modulation amplitude control of an optical communication transmitter laser driver as recited in claim 5, wherein said optical transmitting component is composed of a laser diode LD, a monitor photodiode MPD, and a parasitic capacitance C MPD Composition; the cathode of the laser diode LD is connected with the output end of the laser driver, the anode of the laser diode LD is connected with the VDD, the cathode of the monitoring photodiode MPD is connected with the VDD, and the anode of the monitoring photodiode MPD outputs a photoinduction current signal to the reference current generating module; parasitic capacitance C MPD And the two ends of the monitoring photodiode MPD are connected in parallel.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102291174A (en) * | 2011-08-01 | 2011-12-21 | 成都优博创技术有限公司 | Method for debugging optical power and extinction ratio of transmitter of optical module in closed loop way |
| CN109830887A (en) * | 2019-01-08 | 2019-05-31 | 淮阴工学院 | Semiconductor laser average power control loop and extinction ratio control loop |
| US10559940B1 (en) * | 2019-04-01 | 2020-02-11 | Rafael Microelectronics, Inc. | Laser power control system for laser diode using dual close loops |
| CN113098616A (en) * | 2021-03-30 | 2021-07-09 | 杭州太明科技有限公司 | Control apparatus for light source driver in optical communication transmitter and control method thereof |
| CN113917622A (en) * | 2020-07-09 | 2022-01-11 | 青岛海信宽带多媒体技术有限公司 | Optical module |
| CN115832866A (en) * | 2023-02-23 | 2023-03-21 | 成都明夷电子科技有限公司 | Laser drive control circuit, chip and control method |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6909731B2 (en) * | 2003-01-23 | 2005-06-21 | Cheng Youn Lu | Statistic parameterized control loop for compensating power and extinction ratio of a laser diode |
-
2023
- 2023-10-11 CN CN202311308638.7A patent/CN117061009B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102291174A (en) * | 2011-08-01 | 2011-12-21 | 成都优博创技术有限公司 | Method for debugging optical power and extinction ratio of transmitter of optical module in closed loop way |
| CN109830887A (en) * | 2019-01-08 | 2019-05-31 | 淮阴工学院 | Semiconductor laser average power control loop and extinction ratio control loop |
| US10559940B1 (en) * | 2019-04-01 | 2020-02-11 | Rafael Microelectronics, Inc. | Laser power control system for laser diode using dual close loops |
| CN113917622A (en) * | 2020-07-09 | 2022-01-11 | 青岛海信宽带多媒体技术有限公司 | Optical module |
| CN113098616A (en) * | 2021-03-30 | 2021-07-09 | 杭州太明科技有限公司 | Control apparatus for light source driver in optical communication transmitter and control method thereof |
| CN115832866A (en) * | 2023-02-23 | 2023-03-21 | 成都明夷电子科技有限公司 | Laser drive control circuit, chip and control method |
Non-Patent Citations (1)
| Title |
|---|
| 双环功率控制的突发模式激光驱动器;朱铁柱;莫太山;叶甜春;;红外与激光工程(第02期);全文 * |
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