JP3024398B2 - LD drive circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LD for driving a laser diode (LD) used in a light transmitting section in optical communication.
It relates to a drive circuit.

[0002]

2. Description of the Related Art FIG. 2 is a circuit block diagram showing an example of a conventional LD drive circuit. In the figure, reference numeral 1 denotes a data input terminal (hereinafter referred to as DT), reference numeral 3 denotes an LD driving bias current control input terminal (hereinafter referred to as BS), and reference numeral 5 denotes L.
D drive pulse current generation circuit (hereinafter DPG), reference numeral 6 is a laser diode (hereinafter LD), reference numeral 8 is LD
A drive bias current generation circuit (hereinafter BGN), and reference numeral 16 denotes an LD drive pulse current control input terminal (hereinafter C)
T), reference numeral 17 is a power supply terminal (hereinafter, PW).

DT1 is connected to the data input of DPG5, CT16 is connected to the LD drive pulse current control voltage input of DPG5, BS3 is connected to the LD drive bias current control voltage input of BGN8, and the output of DPG5 and B
The output of GN8 is connected to the cathode terminal of LD6,
The anode terminal of D6 is connected to PW17.

When the input data from the DT 1 is at a low level, the bias current of the LD 6 is set to a threshold current I _Bth at which the LD 6 starts outputting laser light in order to increase the electrical / optical conversion speed of the LD 6.

In the present embodiment, CT1 is set so that the optical output of LD6 becomes a specified value while data is input to DT1.
By setting the voltage of 6, the electrical high level / low level of the input data of DT1 can be converted into the high level / low level of light by the LD 6, and the light output can be set to the specified value.

[0006]

Since this conventional LD drive circuit does not have a circuit for detecting and correcting fluctuations in the light emission power of the LD, the characteristics of the drive current and the light emission power of the LD vary with temperature. , The light emission start threshold current _{IBth of} the LD also changes, and the bias current of the LD deviates from the optimum value. Therefore, there is a problem that the electric / optical conversion speed of the LD is reduced.

Another problem is that the extinction ratio, which is the high-to-low power ratio of light, deteriorates.

[0008]

According to the present invention , an LD driving pulse current generating circuit for outputting an LD driving pulse current corresponding to an LD driving pulse current control voltage in accordance with a data input, and an LD driving bias current An LD driving bias current generating circuit for generating an LD driving bias current corresponding to the control voltage, wherein an output of the LD driving pulse current generating circuit and an output of the LD driving bias current generating circuit are connected to an LD cathode. in the LD driving circuit connected to the negative terminal Ru is constructed by connecting anode <br/> over de terminal of the LD to a power source, photo monitoring an optical output of the LD diode
And the output current of this photodiode to a voltage.
Current-voltage conversion circuit, and the output of the current-voltage conversion circuit.
A low-pass filter for removing an AC component;
Filter output and bias current control for LD drive from outside
The LD drive bias current which is a difference voltage from an input voltage.
LD drive bias current control circuit that outputs control voltage
And the output of the LD drive bias current control circuit
And holds the input voltage at the transition point of the external clock input
Input voltage holding circuit and the LD drive bias current
Subtraction between the output of the control circuit and the output of the input voltage holding circuit
And a subtraction circuit that outputs the absolute value of the difference
A comparator that compares the output of the
And the output of this comparator
Integrates a constant voltage depending on whether it is high or low at the transition point
LD driving circuit is obtained, characterized in that it comprises a <br/> an integrating circuit for outputting a pulse current control voltage LD driving Te.

Further, to connect the cathode side <br/> terminal of the photodiode to the power supply, connecting the anode terminal of the photodiode to the current-voltage conversion circuit, the LD
An LD drive bias current control voltage output from a drive bias current control circuit is input to the LD drive bias current generation circuit, and the LD drive pulse current control voltage output from the integration circuit is output to the LD drive pulse current generation circuit. LD driving circuit is obtained, characterized in that the input to the.

[0010]

Next, the present invention will be described with reference to the drawings. FIG. 1 is a circuit block diagram showing one embodiment of the LD drive circuit of the present invention.

The LD driving circuit of the present embodiment shown in FIG.
A DPG 5 for outputting an LD drive pulse current corresponding to an LD drive pulse current control voltage for driving D6 in accordance with data input; a BGN 8 for generating an LD drive bias current corresponding to the LD drive bias current control voltage;
6. Photodiode (hereinafter referred to as PD) for monitoring optical output
7, a current-voltage conversion circuit (hereinafter referred to as CNV) 10 for converting an output current of the PD 7 into a voltage, a low-pass filter (hereinafter referred to as LPF) 11 for removing an AC component of the output of the CNV 10,
An LD drive bias current control circuit (hereinafter, BCT) 9 for outputting a difference voltage between the output of the PF 11 and the LD drive bias current control input voltage from the BS 3, and a clock input terminal (hereinafter, CK) 4 which receives the output of the BCT 9 as an input. An input voltage holding circuit (hereinafter, HLD) 12 for holding an input voltage at a change point of a clock input from the input terminal, a subtraction circuit (hereinafter, SUB) 13 for subtracting an output of the BCT 9 and an output of the HLD 12 and outputting an absolute difference value. , A comparator (hereinafter referred to as CMP) 14 for comparing the output of the SUB 13 with an input threshold voltage from a threshold voltage input terminal (hereinafter referred to as VT) 2, and a constant voltage depending on whether the output of the CMP 14 is at a high level or a low level at a change point of the clock input. And an integration circuit (hereinafter referred to as INT) 15 for integrating the above and outputting an LD driving pulse current control voltage.

DT1 is connected to the data input of DPG5, the output of DPG5 and the output of BGN8 are connected to the cathode side terminal of LD6, and PDT for monitoring the optical output of LD6.
The anode side terminal of D7 is connected to the input of CNV10,
The output of CNV10 is connected to the input of LPF11,
The first input of T9 is connected to the output of LPF11, the second input is connected to the bias current control input for LD driving from BS3, and the output of BCT9 is BGN8, HLD12 and SU.
The second input of SUB13 is connected to the output of HLD12, and the output of SUB13 is input to CMP14 and compared with the threshold voltage input from VT2. The output of CMP14 is provided to INT15,
The output of NT15 is connected to the LD drive pulse current control voltage input of DPG5. The clock signal from CK4 is H
Input to LD12 and INT15, PW17 to LD6
And the cathode side terminal of PD7.

Next, the operation of this embodiment will be described.
When the input data of DT1 is at a low level, the DPG 5 does not flow a current, and when the input data is at a high level, the DPG 5 is driven with a current value corresponding to the LD drive pulse current control voltage input. Therefore, when the input data of DT1 is at a low level, only the current of BGN8 flows through LD6 , and LD6 outputs laser light. This output is monitored by the PD 7 and converted into a current value proportional to the output of the laser beam. This current is converted into a voltage by the CNV 10, an AC component is removed by the LPF 11, and is input to the BCT 9. BCT
Reference numeral 9 controls the BGN 8 based on a difference voltage between the driving bias current control voltage input from the BS 3 and the input terminal. By controlling the LD driving bias current in this way, feedback is applied so that the output voltage of the LPF 11 becomes equal to the voltage of the BS 3.

In this state, after adjusting the input voltage of BS3, D
When high-level and low-level data pulses are input to T1, the pulse current of DPG5 is added to the output current of BGN8 to drive LD6. Therefore, the monitor current of the PD 7 includes a current corresponding to the pulse current of the DPG 5 as a ripple component. Since the ripple component includes the DC component, the input voltage of BCT9 input via CNV10 and LPF11 becomes higher than the input voltage of BS3, and the output voltage of BCT9 controls BGN8 to control the bias for LD driving. Feedback is performed so that the current is reduced and the light emission power of the LD 6 becomes a specified value.

The HLD 12 holds and outputs the output voltage of the BCT 9 at the changing point of the clock signal input from CK4,
The SUB 13 subtracts the output voltage of the BCT 9 connected to the first input from the output voltage of the HLD 12 connected to the second input, and outputs the absolute value of the difference voltage to the CMP 14.

The CMP 14 calculates the absolute value of the difference voltage and VT2
When the voltage value of the absolute value of the difference voltage is high by comparing with the threshold voltage input from, a low level is output, and when it is low, a high level is output. If the output of CMP14 is at a high level at the transition point of the clock signal input to CK4, INT15 raises the output voltage by a certain level, and if the output of CMP14 is low, INT15 lowers the output voltage by a certain level and DPG5 Of the LD driving pulse current control voltage.

The AC component of the data input to DT1 is LP
By choosing a frequency that will be sufficiently attenuated to a clock frequency of CK4 of DPG5 by F11 pulse current value I _P
Is changed by ± ΔI _P under the control of INT15
The absolute value of the fluctuation amount of the output voltage at T9 can be compared with the input threshold voltage from VT2 for each cycle of the clock frequency.

The bias current I, which is the output current of the BGN 8,
_B If is greater than the threshold current I _Bth is, LD6 immediately after the output pulse current is from I _P to I _P + [Delta] I _P is I _P
+ I _B + ΔI _P, is driven at a current of I _B (emits light when being driven by I _B), the light power corresponding to [Delta] I _P / 2 is increased, acts feedback to BGN8, bias current is stabilized to the value of I _B -ΔI _P / 2.

The bias current I which is the output current of the BGN 8
_B when the threshold current I _Bth smaller than, LD6 immediately after the output pulse current is from I _P to I _P + [Delta] I _P is I _P
It is driven by a current value of + I _B + ΔI _P , I _B (it does not emit light when driven by I _B ), and the optical power corresponding to ΔI _P / 2 increases, but the feedback to the BGN 8 works.
Bias current is stabilized to the value of I _B -.DELTA.I _P.

Therefore, the output current of BGN8 is set to ΔI _P /
2. The amount of output voltage fluctuation of the BCT 9 that fluctuates ΔI _P is ΔV
_BP / 2, ΔV _BP , the input threshold voltage V from VT2
_th the ΔV _BP / 2 <V _th <bias current I _B is the threshold current by setting [Delta] V _BP I _Bth If greater than BC
Since the voltage variation amount of T9 output is [Delta] V _BP / 2, the bias current I _B is closer to the threshold current I _Bth decreases, the output pulse current I _P increases so that the optical power does not vary.

Further, the bias currents I _B is the threshold current I _Bth
Since the voltage variation amount of BCT9 output is [Delta] V _BP if smaller, the bias current I _B is the threshold current I _Bth increased
It approaches, the output pulse current I _P is decreased so that the optical power does not vary. The bias current I _B is always equal to the threshold current I _B
L so that it becomes a value close to _Bth and the optical power also becomes a specified value.
D6 can be driven.

[0022]

As described above, the present invention provides an LD driving pulse current generating circuit for outputting an LD driving pulse current corresponding to an LD driving pulse current control voltage in accordance with a data input, and an LD driving bias current control circuit. An LD driving bias current generating circuit for generating an LD driving bias current corresponding to the voltage, wherein the output of the LD driving pulse current generating circuit and the output of the LD driving bias current generating circuit are set to L
Connected to the cathode terminal of the D anode terminal of the LD
In LD driving circuit of Ru formed by connecting to a power source, L
A photodiode for monitoring the optical output of D and this photodiode
Current-to-voltage conversion that converts the output current of a photodiode to a voltage
Circuit and the AC component of the output of this current-to-voltage conversion circuit.
Low-pass filter, the output of the low-pass filter and the external
Difference voltage from LD drive bias current control input voltage
That outputs a bias current control voltage for driving an LD
Drive bias current control circuit and LD drive via
Input from the external current control circuit
An input voltage holding circuit for holding an input voltage at a point of change in force;
LD drive bias current control circuit output and input voltage holding
Subtraction circuit that subtracts from the output of the circuit and outputs the absolute value of the difference
Path, the output of this subtraction circuit, the external input threshold voltage,
And the output of this comparator
Depending on whether the clock input transition point is high or low,
Integrates constant voltage and outputs LD drive pulse current control voltage
By including an integration circuit for, also the photo
Connect the cathode terminal of the diode to the power supply and
Connect the anode side terminal of the electrode to the current-voltage conversion circuit
LD drive bias current control circuit output LD drive
The bias current control voltage is used to generate the LD drive bias current.
Current control for LD drive input to the circuit and output of the integration circuit
Inputting the voltage to the LD drive pulse current generation circuit
Therefore, when the characteristics of the drive current and the light emission power change due to the temperature fluctuation and the threshold current value of the LD changes, even when the characteristics of the LD drive current and the LD light emission power change in a region where the drive current is larger than the threshold current. , The emission power is constant,
Since the bias current value of the LD can be made to follow a value very close to the threshold current value, the LD can always be driven at a high speed, the extinction ratio hardly deteriorates, and the number of adjustment points is small. Have.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram showing one embodiment of an LD drive circuit of the present invention.

FIG. 2 is a circuit block diagram illustrating an example of a conventional LD drive circuit.

[Explanation of symbols]

 Reference Signs List 1 data input terminal (DT) 2 threshold voltage input terminal (VT) 3 LD drive bias current control input terminal (BS) 4 clock input terminal (CK) 5 LD drive pulse current generation circuit (DPG) 6 laser diode (LD) 7) Photodiode (PD) 8 LD drive bias current generation circuit (BGN) 9 LD drive bias current control circuit (BCT) 10 Current-voltage conversion circuit (CNV) 11 Low-pass filter (LPF) 12 Input voltage holding circuit (HLD) 13) Subtraction circuit (SUB) 14 Comparator (CMP) 15 Integrator circuit (INT) 16 LD drive pulse current control input terminal (CT) 17 Power supply terminal (PW)

Claims (2)

(57) [Claims] An LD driving pulse current generating circuit for outputting an LD driving pulse current corresponding to a laser diode (LD) driving pulse current control voltage in accordance with a data input, and an LD corresponding to the LD driving bias current control voltage. An LD driving bias current generating circuit for generating a driving bias current, wherein an output of the LD driving pulse current generating circuit and an output of the LD driving bias current generating circuit are connected to a cathode terminal of the LD. in LD driving circuit on the anode side end <br/> element Ru is configured by connecting to a power source LD,
A photodiode for monitoring the optical output of the LD ;
Current that converts the output current of
Voltage conversion circuit and the AC component of the output of this current-voltage conversion circuit.
A low-pass filter to be removed;
Output and LD drive bias current control input voltage from outside
The bias current control voltage for driving the LD,
And an LD driving bias current control circuit that outputs
The output of the D drive bias current control circuit is input and external
The input voltage that holds the input voltage at the transition point of these clock inputs
Pressure holding circuit and the LD driving bias current control circuit.
The output is subtracted from the output of the input voltage holding circuit to obtain a difference.
A subtraction circuit that outputs an absolute value;
A comparator for comparing the input threshold voltage from the
Output of the comparator is high at the transition point of the clock input.
LD drive by integrating a constant voltage depending on the level or low level
An LD drive circuit comprising: an integration circuit that outputs a pulse current control voltage for use . 2. A cathode terminal of the photodiode.
Connected to the power supply, and the anode of the photodiode
Side terminal is connected to the current-voltage conversion circuit, and the LD drive
Current for LD drive of bias current control circuit output
Input control voltage to the LD drive bias current generation circuit
And controlling the LD driving pulse current of the integration circuit output.
LD driving circuit according to claim 1, wherein that you apply voltage to the LD driving pulse current generating circuit.