CN117033193A - Verification method, system and storage medium of bus synchronous bridge - Google Patents
Verification method, system and storage medium of bus synchronous bridge Download PDFInfo
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Abstract
The application provides a verification method, a system and a storage medium of a bus synchronous bridge, which are characterized in that configuration parameters of a target file for compiling a test platform are obtained, the test platform is compiled according to the configuration parameters, meanwhile, in the process of compiling the test platform, configuration items corresponding to the test cases are obtained, then simulation results of the test cases are generated according to the configuration items, simulation parameters of the test platform are obtained, finally, the simulation parameters and the simulation results are input into an asynchronous bridge module, and the asynchronous bridge module is verified to obtain verification results. According to the application, the asynchronous bridge module of the chip is tested through the simulation result corresponding to the test case, so that the use scene of the asynchronous bridge is verified, the occurrence probability of potential factors is reduced, the use area of the chip is increased, and the use flexibility of the chip is improved.
Description
Technical Field
The present application relates to the field of chip verification, and in particular, to a method, a system, and a storage medium for verifying a bus synchronous bridge.
Background
An asynchronous bridge is a technique for data transmission that may be implemented by a special protocol. In the field of Chip simulation, in particular SOC (System on Chip) simulation, a large number of asynchronous bridges are used to transfer data. Integrated circuits with dedicated targets are integrated on the chip, containing the complete system and having the entire contents of the embedded software.
In the process of transmitting data by the asynchronous bridge, due to different use scenes of the asynchronous bridge, certain potential factors can be generated by using the asynchronous bridge in some specific scenes, so that data transmission fails or is damaged. To this end, on a system-on-chip, buffers may be deployed to overcome these potential factors and allow for normal data transfer.
However, deploying buffers on a system-on-chip occupies a large amount of chip area, and therefore deploying too many buffers can affect the utilization of the chip area, reducing the processing flexibility of the chip.
Disclosure of Invention
In order to solve the problem that the deployment buffer occupies the area of a chip, which results in reduced processing flexibility of the chip, in a first aspect, some embodiments of the present application provide a method for verifying a bus synchronous bridge, where the method includes:
acquiring configuration parameters of a target file, wherein the target file is used for compiling a test platform;
compiling a test platform according to the configuration parameters, and acquiring configuration items corresponding to test cases in the process of compiling the test platform, wherein the test platform comprises an asynchronous bridge module;
generating a simulation result of the test case according to the configuration item;
and acquiring simulation parameters of the test platform, and inputting the simulation parameters and the simulation results into the asynchronous bridge module to acquire verification results of the asynchronous bridge module.
In some embodiments, the asynchronous bridge module is connected with a plurality of static memories, compiles a test platform according to the configuration parameters, and comprises:
acquiring compiling parameters of the static memory;
configuring depth parameters of the static memory according to the compiling parameters;
compiling the asynchronous bridge module according to the configuration parameters, and constructing a depth scene according to the depth parameters.
In some embodiments, the asynchronous bridge module is connected with a first amount of the static memory, constructs a depth scene according to the depth parameter, and includes:
configuring depth parameters of a second number of static memories according to the compiling parameters, wherein the second number is smaller than or equal to the first number;
and constructing different depth scenes according to the depth parameters of the static memory.
In some embodiments, the method further comprises:
acquiring logic functions executed by the asynchronous bridge module and the static memory for the depth scene;
according to the logic function, compiling the asynchronous bridge module in the depth scene and compiling the static memory in the depth scene.
In some embodiments, inputting the simulation parameters and the simulation results into the asynchronous bridge module includes:
the simulation data generated when the test platform tests the simulation result are obtained, wherein the simulation data comprise first simulation data and second simulation data, the first simulation data are test data of an asynchronous bridge module, and the second simulation data are test data of a static memory;
calculating a first difference value between the first simulation data and the reference data of the test platform, and calculating a second difference value between the second simulation data and the reference data of the test platform;
and if the first difference value is smaller than or equal to a difference value threshold value and the second difference value is smaller than or equal to the difference value threshold value, generating a verification result of successful verification.
In some embodiments, the method further comprises:
generating a test case set according to the test cases, wherein the test case set comprises tested test cases and untested test cases;
if the first difference value is larger than a difference value threshold value or the second difference value is larger than a difference value threshold value, generating a verification result of verification failure;
and according to the verification result, inputting the simulation result of the test case which is not tested into the asynchronous bridge module.
In some embodiments, in the compiling process of the test platform, obtaining a configuration item corresponding to the test case includes:
traversing registers in the asynchronous bridge module to obtain application parameters of each register;
matching a sub-configuration item to the application parameters of the register in the compiling process;
and summarizing the sub configuration items to obtain configuration items.
In some embodiments, generating the simulation result of the test case according to the configuration item includes:
acquiring a protocol scene of the configuration item, wherein the protocol scene comprises a first protocol scene and a second protocol scene;
classifying the test cases according to the protocol scene to obtain a first class test case and a second class test case;
generating a first-class simulation result by the first-class test case according to the first protocol scene, and generating a second-class simulation result by the second-class test case according to the second protocol scene.
In some embodiments, inputting the simulation parameters and the simulation results into the asynchronous bridge module includes:
setting the test quantity of input simulation results;
and inputting the first type simulation results of the test quantity into the asynchronous bridge module, or inputting the second type simulation results of the test quantity into the asynchronous bridge module, and further or inputting the first type simulation results and the second type simulation results of the test quantity into the asynchronous bridge module.
In a second aspect, some embodiments of the present application also provide a verification system of a bus bridge, the system comprising a verification module configured to:
acquiring configuration parameters of a target file, wherein the target file is used for compiling a test platform;
compiling a test platform according to the configuration parameters, and acquiring configuration items corresponding to test cases in the process of compiling the test platform, wherein the test platform comprises an asynchronous bridge module;
generating a simulation result of the test case according to the configuration item;
and acquiring simulation parameters of the test platform, and inputting the simulation parameters and the simulation results into the asynchronous bridge module to acquire verification results of the asynchronous bridge module.
In a third aspect, some embodiments of the present application further provide a computer readable storage medium, where the computer readable storage medium includes computer instructions for instructing the computer to execute the method for verifying the bus bridge according to the first aspect.
According to the technical scheme, the verification method, the system and the storage medium for the bus synchronous bridge are provided, the configuration parameters of the target file for compiling the test platform are obtained, the test platform is compiled according to the configuration parameters, meanwhile, in the process of compiling the test platform, the configuration items corresponding to the test cases are obtained, then the simulation results of the test cases are generated according to the configuration items, the simulation parameters of the test platform are obtained, finally the simulation parameters and the simulation results are input into the asynchronous bridge module, and the asynchronous bridge module is verified to obtain the verification results. According to the application, the asynchronous bridge module of the chip is tested through the simulation result corresponding to the test case, so that the use scene of the asynchronous bridge is verified, the occurrence probability of potential factors is reduced, the use area of the chip is increased, and the use flexibility of the chip is improved.
Drawings
In order to more clearly illustrate the technical solution of the present application, the drawings that are needed in the embodiments will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.
FIG. 1 is a flowchart of a method for verifying a bus bridge according to an embodiment of the present application;
FIG. 2 is a schematic diagram of generating configuration items according to sub-configuration items according to an embodiment of the present application;
FIG. 3 is a flow chart of a test platform according to an embodiment of the application;
fig. 4 is a flowchart of determining a verification result according to different protocol scenarios in an embodiment of the present application.
Detailed Description
For the purposes of making the objects and embodiments of the present application more apparent, an exemplary embodiment of the present application will be described in detail below with reference to the accompanying drawings in which exemplary embodiments of the present application are illustrated, it being apparent that the exemplary embodiments described are only some, but not all, of the embodiments of the present application.
It should be noted that the brief description of the terminology in the present application is for the purpose of facilitating understanding of the embodiments described below only and is not intended to limit the embodiments of the present application. Unless otherwise indicated, these terms should be construed in their ordinary and customary meaning.
The terms first, second, third and the like in the description and in the claims and in the above-described figures are used for distinguishing between similar or similar objects or entities and not necessarily for describing a particular sequential or chronological order, unless otherwise indicated. It is to be understood that the terms so used are interchangeable under appropriate circumstances.
The terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a product or apparatus that comprises a list of elements is not necessarily limited to all elements explicitly listed, but may include other elements not expressly listed or inherent to such product or apparatus.
The electronic equipment can realize multiple functions, such as a smart phone, and people can realize the functions of internet shopping, running and body building, writing files, social communication and the like through the smart phone. The more functions an electronic device is capable of achieving, the higher the chip requirements for the electronic device. The Chip is a processor of the electronic device, which is equivalent to the "brain" of the electronic device, and the electronic device may use an SOC Chip (System on Chip) as the processor, and the SOC Chip may integrate the microprocessor, the analog IP core, the digital IP core, and the memory on one Chip. The SOC chip may be customized by a user or may be customized according to a specific application.
In order to ensure the practicability of the SOC chip, the quality of the SOC chip needs to be checked through the SOC chip simulation, so that the SOC chip is ensured to meet the factory requirements. The SOC chip simulation needs to use an asynchronous bridge to transmit data, so that quality inspection of the SOC chip is completed.
An asynchronous bridge is a technique for data transmission that may be implemented by a special protocol. In the process of transmitting data by the asynchronous bridge, due to different use scenes of the asynchronous bridge, certain potential factors can be generated by using the asynchronous bridge in some specific scenes, so that data transmission fails or is damaged. To this end, on a system-on-chip, buffers may be deployed to overcome these potential factors and allow for normal data transfer.
However, deploying buffers on a system-on-chip occupies a large amount of chip area, and therefore deploying too many buffers can affect the utilization of the chip area, reducing the processing flexibility of the chip.
In order to solve the problem that the deployment buffer occupies the area of the chip, which results in reduced processing flexibility of the chip, some embodiments of the present application provide a method for verifying a bus synchronous bridge, as shown in fig. 1, where the method includes:
s100: and acquiring configuration parameters of the target file.
The target file may be a compiling script file, where the compiling script file is used for compiling the test platform. The configuration parameters are various parameters of the test platform to be compiled, including address bit width, data bit width, ID bit width, pulse length and the like of the test platform applicable synchronous bridge.
The target file can be stored in the SOC simulation program, and the SOC simulation program needs to be started before the configuration parameters of the target file are acquired, so that the simulation top-layer script file can be used for starting the SOC simulation program, and a compiling environment is provided for the target file.
S200: compiling a test platform according to the configuration parameters, and acquiring configuration items corresponding to the test cases in the process of compiling the test platform.
After the compiling parameters are obtained, the test platform can be compiled according to the compiling parameters, and because the SOC chip needs to use an asynchronous bridge in the simulation process, an asynchronous bridge module can be compiled in the test platform, the asynchronous bridge module can be connected with a plurality of Static Random-Access memories (SRAMs), and the Static memories can store data required by the asynchronous bridge module for reading by the asynchronous bridge module.
In order to verify the asynchronous bridge module subsequently, in the embodiment, test cases can be generated, and in the process of compiling the test platform, configuration items of the test cases can be obtained according to different test protocols and test environments, so that a large number of different types of test cases can be generated conveniently, and the verification range of the test platform is improved.
In some embodiments, the compiling parameters of the static memory may also be obtained, and because the static memory and the asynchronous bridge module are both in the test platform, when compiling the test platform, the asynchronous bridge module and the static memory connected with the asynchronous bridge module need to be compiled. For this purpose, among the configuration parameters, the compiling parameters of the static memory may also be included.
In the compiling process, the depth parameters of the static memory can be configured according to the compiling parameters, in some embodiments, the asynchronous bridge module can be compiled according to the configuration parameters, different depth scenes are constructed according to the depth parameters, so that the test platform is verified in the different depth scenes, the configuration parameters are adjusted according to verification results, and the occurrence probability of potential factors is reduced.
Because the asynchronous bridge module can be connected with a plurality of static memories which are all mutually independent, the depth parameters of one or a plurality of static memories can be configured, so that different depth scenes can be acquired.
In some embodiments, the asynchronous bridge module may be connected with a first number of static memories, for example, the asynchronous bridge module may be connected with a static memory for reading addresses, a static memory for reading data, a static memory for writing addresses, a static memory for writing data, and a static memory for responding, and for convenience of the following description, the static memory for reading addresses is defined as a first static memory, the static memory for reading data is defined as a second static memory, the static memory for writing addresses is defined as a third static memory, and the static memory for writing data is defined as a fourth static memory, wherein the static memory for responding is irrelevant to a verification process of the test platform, and thus, only depth parameters of the static memory with a read-write function need to be configured.
In order to construct multiple depth scenes, the depth parameters of the second number of static memories may be configured according to the compiling parameters, where the second number may be less than or equal to the first number, for example, only one static memory may be configured, for example, a first static memory may be configured, two static memories may be configured, for example, a first static memory and a third static memory may be configured, or a second static memory and a third static memory may be configured, three static memories may be configured, for example, a first static memory, a second static memory and a fourth static memory may be configured, and all static memories may be configured, so that multiple different depth scenes may be constructed through the depth parameter configuration of the different static memories, and accuracy of a verification result may be improved.
In some embodiments, the asynchronous bridge module and static memory may perform different logic functions depending on configuration parameters due to the existence of different depth scenarios. Therefore, the logic functions executed by the asynchronous bridge module and the static memory for different depth scenes can be obtained, and the asynchronous bridge module is compiled in the corresponding depth scene and the static memory is compiled in the depth scene according to the logic functions.
In some embodiments, as shown in fig. 2, in the process of compiling the test platform, the configuration item corresponding to the test case is obtained, and the register in the asynchronous bridge module may also be traversed to obtain the application parameter of each register. In the compiling process, the sub-configuration items can be configured according to the application parameters of the register, so that the sub-configuration items are summarized to obtain the configuration items.
S300: and generating a simulation result of the test case according to the configuration item.
In order to improve the accuracy of verification, hundreds or thousands of test cases can be generated, so that after configuration items of the test cases are obtained, the test cases can be generated according to the configuration items, and the generated test cases are different due to the fact that the configuration items are different.
When the test platform is tested, a simulation result is generated according to the test case and the configuration item corresponding to the test case so as to facilitate the subsequent test.
S400: and acquiring simulation parameters of the test platform, and inputting the simulation parameters and the simulation results into the asynchronous bridge module to acquire verification results of the asynchronous bridge module.
In the process of testing, a simulation result generated according to the test case needs to be input into the test platform, so that the test platform operates according to the simulation result, and therefore, simulation parameters of the test platform can be obtained, and the simulation parameters are parameters of various registers of the test platform when the test platform operates after inputting the simulation result.
After the simulation parameters are obtained, the simulation parameters and the simulation results can be input into the asynchronous bridge module, so that the synchronous bridge and other registers in the test platform operate according to the simulation parameters and the simulation results, and verification results are obtained. And when the verification result is passing verification, obtaining verification data of the current verification result, wherein the verification data comprises a test protocol, a test environment and the like, and marking the asynchronous bridge module according to the verification data.
In some embodiments, after the simulation parameters and the simulation results are input to the test platform, the test platform tests the simulation results based on the simulation parameters and generates simulation data corresponding to the simulation results. Therefore, the generated simulation data can be obtained as a test simulation result of the test platform, and in the test process, the asynchronous bridge module and the static memory are both involved in the test, so that the simulation data can comprise first simulation data and second simulation data, wherein the first simulation data is the test data of the asynchronous bridge module, and the second simulation data is the test data of the static memory.
In order to verify the simulation data, reference data of the test platform may be further set, for this purpose, as shown in fig. 3, a first difference value between the first simulation data and the reference data of the test platform may be calculated, and a difference threshold may be set to verify the first difference value, and if the first difference value is less than or equal to the difference threshold, it is indicated that the verification of the first simulation data of the synchronous bridge module is successful.
Correspondingly, after the first simulation data of the asynchronous bridge module is successfully verified, the second simulation data of the static memory can be verified, therefore, a second difference value between the second simulation data and the reference data of the test platform can be calculated, and if the second difference value is smaller than or equal to a difference value threshold value, the second simulation data of the static memory is successfully verified. And when the first simulation data and the second simulation data are successfully verified, generating a verification result of successful verification. And if the first difference value is larger than the difference value threshold value or the second difference value is larger than the difference value threshold value, generating a verification result of verification failure.
In some embodiments, test cases may be generated according to the test cases, where the test case set includes a tested test case and an untested test case, where the tested test case is a test case that has been input into the asynchronous bridge module, and a verification result generated by the asynchronous bridge module for the test case is obtained. After the verification result of the verification failure is obtained, the current asynchronous bridge module or the static memory is verified to be unsuccessful, and then the simulation result of the untested test case can be input into the asynchronous bridge module, so that the verification of the test platform is continued.
In some embodiments, as shown in fig. 4, the test platform may be verified according to different protocol scenarios, and for this purpose, the configuration items may include different protocol scenarios, where the protocol scenarios may include a first protocol scenario and a second protocol scenario, for example, the first protocol scenario is an AXI3 protocol scenario, and the second protocol scenario is an AXI4 protocol scenario. Because the protocol scenes are different, the test cases can be classified according to the protocol scenes, so that a first class of test cases and a second class of test cases are obtained, wherein the first class of test cases are the test cases of the first protocol scene, and the second class of test cases are the test cases of the second protocol scene.
After the first class test case and the second class test case are obtained, the first class test case can be generated into a first class simulation result according to a first protocol scene, and the second class test case can be generated into a second class simulation result according to a second protocol scene.
In some embodiments, in order to improve the verification efficiency of the test platform, the test platform may further support verification of multiple simulation results at the same time, for this purpose, the number of tests for inputting the simulation results may be set, and when the number of tests is one, the test platform may perform an operation test on one simulation result input. When the number of the tests is two, the test platform can run two simulation results at the same time, and output corresponding verification results according to each simulation result.
Corresponding to the two protocol scenarios, only simulation results of the same category may be tested, for example, a first category simulation result of the test number is input into the asynchronous bridge module, so as to verify the first category simulation result. Or inputting the second-class simulation results of the test quantity into the asynchronous bridge module, and inputting the second-class simulation results into the asynchronous bridge module to verify the second-class simulation results.
In some embodiments, two kinds of simulation results may be mixed and then input to the asynchronous bridge module, for example, when the number of tests is two, a first kind of simulation result and a second kind of simulation result may be input at the same time, so that the asynchronous bridge module verifies the two kinds of simulation results at the same time, to increase the verification range and improve the verification accuracy.
In order to facilitate execution of the above-described method for verifying a bus bridge, some embodiments of the present application further provide a system for verifying a bus bridge, where the system includes a verification module configured to execute the method for verifying a bus bridge:
s100: and acquiring configuration parameters of the target file.
The target file is used for compiling a test platform.
S200: compiling a test platform according to the configuration parameters, and acquiring configuration items corresponding to the test cases in the process of compiling the test platform.
The test platform comprises an asynchronous bridge module.
S300: and generating a simulation result of the test case according to the configuration item.
S400: and acquiring simulation parameters of the test platform, and inputting the simulation parameters and the simulation results into the asynchronous bridge module to acquire verification results of the asynchronous bridge module.
Therefore, the system provided by the application can test the asynchronous bridge module of the chip through the simulation result corresponding to the test case, thereby verifying the use scene of the asynchronous bridge, reducing the occurrence probability of potential factors, improving the use area of the chip and improving the use flexibility of the chip.
Some embodiments of the present application also provide a computer readable storage medium including computer instructions for instructing the computer to perform the above-described method of verifying a bus bridge.
Therefore, the computer readable storage medium provided by the application can test the asynchronous bridge module of the chip through the simulation result corresponding to the test case, so that the use scene of the asynchronous bridge is verified, the occurrence probability of potential factors is reduced, the use area of the chip is increased, and the use flexibility of the chip is improved.
According to the technical scheme, the verification method, the system and the storage medium for the bus synchronous bridge are provided, the configuration parameters of the target file for compiling the test platform are obtained, the test platform is compiled according to the configuration parameters, meanwhile, in the process of compiling the test platform, the configuration items corresponding to the test cases are obtained, then the simulation results of the test cases are generated according to the configuration items, the simulation parameters of the test platform are obtained, finally the simulation parameters and the simulation results are input into the asynchronous bridge module, and the asynchronous bridge module is verified to obtain the verification results. According to the application, the asynchronous bridge module of the chip is tested through the simulation result corresponding to the test case, so that the use scene of the asynchronous bridge is verified, the occurrence probability of potential factors is reduced, the use area of the chip is increased, and the use flexibility of the chip is improved.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.
The foregoing description, for purposes of explanation, has been presented in conjunction with specific embodiments. However, the illustrative discussions above are not intended to be exhaustive or to limit the embodiments to the precise forms disclosed above. Many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the present disclosure and to enable others skilled in the art to best utilize the embodiments.
Claims (11)
1. A method of verifying a bus bridge, the method comprising:
acquiring configuration parameters of a target file, wherein the target file is used for compiling a test platform;
compiling a test platform according to the configuration parameters, and acquiring configuration items corresponding to test cases in the process of compiling the test platform, wherein the test platform comprises an asynchronous bridge module;
generating a simulation result of the test case according to the configuration item;
and acquiring simulation parameters of the test platform, and inputting the simulation parameters and the simulation results into the asynchronous bridge module to acquire verification results of the asynchronous bridge module.
2. The method for verifying a bus synchronous bridge according to claim 1, wherein the asynchronous bridge module is connected with a plurality of static memories, and compiles a test platform according to the configuration parameters, and comprises:
acquiring compiling parameters of the static memory;
configuring depth parameters of the static memory according to the compiling parameters;
compiling the asynchronous bridge module according to the configuration parameters, and constructing a depth scene according to the depth parameters.
3. The method for verifying a bus bridge according to claim 2, wherein the asynchronous bridge module is connected to a first number of the static memories, and wherein constructing a depth scene according to the depth parameter comprises:
configuring depth parameters of a second number of static memories according to the compiling parameters, wherein the second number is smaller than or equal to the first number;
and constructing different depth scenes according to the depth parameters of the static memory.
4. A method of validating a bus bridge as defined in claim 3, further comprising:
acquiring logic functions executed by the asynchronous bridge module and the static memory for the depth scene;
according to the logic function, compiling the asynchronous bridge module in the depth scene and compiling the static memory in the depth scene.
5. The method for verifying a bus synchronous bridge according to claim 2, wherein inputting the simulation parameters and the simulation results into the asynchronous bridge module comprises:
the simulation data generated when the test platform tests the simulation result are obtained, wherein the simulation data comprise first simulation data and second simulation data, the first simulation data are test data of an asynchronous bridge module, and the second simulation data are test data of a static memory;
calculating a first difference value between the first simulation data and the reference data of the test platform, and calculating a second difference value between the second simulation data and the reference data of the test platform;
and if the first difference value is smaller than or equal to a difference value threshold value and the second difference value is smaller than or equal to the difference value threshold value, generating a verification result of successful verification.
6. The method of claim 5, further comprising:
generating a test case set according to the test cases, wherein the test case set comprises tested test cases and untested test cases;
if the first difference value is larger than a difference value threshold value or the second difference value is larger than a difference value threshold value, generating a verification result of verification failure;
and according to the verification result, inputting the simulation result of the test case which is not tested into the asynchronous bridge module.
7. The method for verifying a bus synchronous bridge according to claim 1, wherein the step of obtaining the configuration item corresponding to the test case during compiling the test platform comprises:
traversing registers in the asynchronous bridge module to obtain application parameters of each register;
matching a sub-configuration item to the application parameters of the register in the compiling process;
and summarizing the sub configuration items to obtain configuration items.
8. The method for verifying a bus bridge according to claim 7, wherein generating the simulation result of the test case according to the configuration item comprises:
acquiring a protocol scene of the configuration item, wherein the protocol scene comprises a first protocol scene and a second protocol scene;
classifying the test cases according to the protocol scene to obtain a first class test case and a second class test case;
generating a first-class simulation result by the first-class test case according to the first protocol scene, and generating a second-class simulation result by the second-class test case according to the second protocol scene.
9. The method for verifying a bus bridge according to claim 8, wherein inputting the simulation parameters and the simulation results into the asynchronous bridge module comprises:
setting the test quantity of input simulation results;
and inputting the first type simulation results of the test quantity into the asynchronous bridge module, or inputting the second type simulation results of the test quantity into the asynchronous bridge module, and further or inputting the first type simulation results and the second type simulation results of the test quantity into the asynchronous bridge module.
10. A verification system for a bus bridge, the system comprising a verification module configured to:
acquiring configuration parameters of a target file, wherein the target file is used for compiling a test platform;
compiling a test platform according to the configuration parameters, and acquiring configuration items corresponding to test cases in the process of compiling the test platform, wherein the test platform comprises an asynchronous bridge module;
generating a simulation result of the test case according to the configuration item;
and acquiring simulation parameters of the test platform, and inputting the simulation parameters and the simulation results into the asynchronous bridge module to acquire verification results of the asynchronous bridge module.
11. A computer readable storage medium, comprising computer instructions for instructing the computer to perform the method of verifying a bus bridge according to any one of claims 1-9.
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| CN202310984231.XA CN117033193A (en) | 2023-08-07 | 2023-08-07 | Verification method, system and storage medium of bus synchronous bridge |
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