CN117008688A - Chip back power supply equipment and method - Google Patents

Chip back power supply equipment and method Download PDF

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Publication number
CN117008688A
CN117008688A CN202210471293.6A CN202210471293A CN117008688A CN 117008688 A CN117008688 A CN 117008688A CN 202210471293 A CN202210471293 A CN 202210471293A CN 117008688 A CN117008688 A CN 117008688A
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China
Prior art keywords
pcb
power
connector
board
signal
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CN202210471293.6A
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Chinese (zh)
Inventor
廖栽宜
胡东东
杨沛杭
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Ruijie Networks Co Ltd
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Ruijie Networks Co Ltd
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Application filed by Ruijie Networks Co Ltd filed Critical Ruijie Networks Co Ltd
Priority to CN202210471293.6A priority Critical patent/CN117008688A/en
Publication of CN117008688A publication Critical patent/CN117008688A/en
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G06F1/189—Power distribution
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/70—Coupling devices
    • H01R12/71—Coupling devices for rigid printing circuits or like structures
    • H01R12/712—Coupling devices for rigid printing circuits or like structures co-operating with the surface of the printed circuit or with a coupling device exclusively provided on the surface of the printed circuit
    • H01R12/716—Coupling device provided on the PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)

Abstract

The disclosure relates to a chip back-to-back power supply device and method, the device comprising: the power supply distribution module is used for being connected with the PCB carrier plate in a welding mode or a crimping mode; the PCB is used for being connected with the power distribution module and the connector respectively and transmitting power signals of the power distribution module to the connector through power leads of the PCB; the connector is connected between the top of the PCB carrier board and the bottom of the PCB sub-board and transmits the power supply signal to the PCB sub-board; and the PCB daughter board is connected with the chip through the top, is connected with a signal line in the signal layer and is connected to a signal pin of the chip, and vertically transmits the power signal transmitted by the connector to the power pin of the chip. The power supply layer of the PCB is not used for supplying power to the central power supply of the chip, so that the layer of the PCB is reduced, and the complexity of the PCB is reduced.

Description

Chip back power supply equipment and method
Technical Field
The disclosure relates to the technical field of communication, and in particular relates to a device and a method for supplying power to a chip in a back direction.
Background
A common PCB (Print Circle Board, printed circuit board) carries the signal and power fanout of the chip. Large chips typically have thousands of pins, separated into signal, power and ground signals, which all require fanning out of the chip area to interconnect with other components. The PCB is a multi-layer board, a plurality of layers are required to fan out the signals, and a signal plane bears a large number of signal wires; the part of the layers are power layers, and the whole plane of the power layers bears large current for power supply.
The signal of the chip is generally located in the peripheral area, and the main power source is located in the central area of the chip. The main power supply requires a large amount of decoupling filter capacitance on the back side of the PCB due to power integrity. In the existing scheme, power is supplied to a power network in the center of a chip through a power layer of the PCB, more power layers are needed by the PCB, and the complexity of the PCB is increased.
Disclosure of Invention
The utility model provides a chip back power supply equipment and method to do not supply power for the central power supply of chip through the power layer of PCB daughter board, reduce the aspect of PCB daughter board, reduce the complexity of PCB daughter board.
According to a first aspect of an embodiment of the present disclosure, there is provided a chip back-to-power supply apparatus, as shown in fig. 2, including:
the power distribution module is used for being connected with the PCB of the printed circuit board in a welding mode or a crimping mode;
the PCB is used for being connected with the power distribution module and the connector respectively and transmitting power signals of the power distribution module to the connector through power leads of the PCB;
the connector is connected between the top of the PCB carrier board and the bottom of the PCB sub-board and transmits the power supply signal to the PCB sub-board;
and the PCB daughter board is connected with the chip through the top, is connected with a signal line in the signal layer and is connected to a signal pin of the chip, and vertically transmits the power signal transmitted by the connector to the power pin of the chip.
In one possible implementation, the connector employs a buried capacitor patch panel, which is connected to the top of the PCB carrier board and the bottom of the PCB sub-board, respectively.
In one possible implementation, the connector adopts a connector with a capacitor in an inner layer, and is respectively connected with the top of the PCB carrier board and the bottom of the PCB sub-board.
In one possible implementation, the connector is embedded in the top of the PCB carrier plate in the form of a buried capacitor and is connected to the bottom of the PCB sub-plate; or alternatively
The connector is embedded into the bottom of the PCB sub-board in a buried capacitor mode and is connected with the top of the PCB carrier board.
In one possible implementation, the connector is connected between the top of the PCB carrier plate and the bottom of the PCB sub-plate by soldering or crimping.
In one possible implementation manner, the connector adopts a buried capacitor adapter plate, is connected with the top of the PCB carrier plate in a welding manner or a crimping manner, and is connected with the bottom of the PCB sub-plate in a welding manner or a crimping manner; or alternatively
The connector adopts a connector with a capacitor at the inner layer, is connected with the top of the PCB carrier board in a welding mode or a crimping mode, and is connected with the bottom of the PCB sub board in a welding mode or a crimping mode; or alternatively
The connector is embedded into the top of the PCB carrier board in a buried capacitor mode and is connected with the bottom of the PCB sub-board in a welding mode or a crimping mode; or alternatively
The connector is embedded into the bottom of the PCB sub-board in a buried capacitor mode and is connected with the top of the PCB carrier board in a welding mode or a crimping mode.
In one possible implementation manner, the number of the power distribution modules is one, the number of the PCB carriers is a plurality of the PCB carriers, and the plurality of the PCB carriers are connected together in a welding manner or a crimping manner and are connected with the PCB sub-boards through one or more connectors;
the number of the power distribution modules is multiple, the number of the PCB carrier boards is one, and the PCB carrier boards are connected with the PCB sub-boards through one or more connectors;
the number of the power distribution modules is multiple, the number of the PCB carriers is multiple, and the PCB carriers are connected together in a welding mode or a crimping mode and are connected with the PCB sub-boards through one or more connectors.
In one possible implementation, the device is applied to low beam packaged NPO hardware.
According to a second aspect of the embodiments of the present disclosure, there is provided a method for supplying power to a chip, the method including:
the output power supply signal is sent to a power supply lead wire passing through the PCB through the power supply distribution module;
transmitting the power signal to a connector by a power lead of the PCB, and transmitting the power signal to a vertical power lead of a PCB through the connector;
the vertical power supply lead of the PCB daughter board vertically transmits the power supply signal to a power supply pin of a chip for supplying power;
and transmitting the control signal accessed in the signal layer to a signal pin of the chip through the PCB.
In one possible implementation, the power signal is transmitted by a power lead of the PCB carrier board to a connector, and the power signal is transmitted via the connector to a vertical power lead of the PCB sub-board, including:
transmitting the power signal to a buried capacitor adapter plate which is respectively connected with the top of the PCB carrier plate and the bottom of the PCB sub-plate by a power lead of the PCB carrier plate, and transmitting the power signal to a vertical power lead of the PCB sub-plate by the buried capacitor adapter plate; or alternatively
Transmitting the power signal to connectors with capacitors at inner layers, wherein the connectors are respectively connected with the top of the PCB carrier board and the bottom of the PCB sub-board, and transmitting the power signal to vertical power leads passing through the PCB sub-board through the connectors with the capacitors at the inner layers; or alternatively
Transmitting the power signal to a connector which is embedded in the top of the PCB by adopting a buried capacitor and is connected with the bottom of the PCB by a power lead of the PCB, and transmitting the power signal to a vertical power lead of the PCB by the connector; or alternatively
The power supply signal is transmitted to the power supply lead of the PCB, the power supply signal is embedded into the bottom of the PCB by adopting a buried capacitor, and the power supply signal is transmitted to the vertical power supply lead of the PCB by the connector connected with the top of the PCB.
The technical scheme provided by the embodiment of the disclosure at least brings the following beneficial effects:
the power supply signal firstly passes through the PCB carrier plate and then supplies power to the central power supply of the chip through the chip power supply area on the back of the PCB sub-plate, so that the layer surface of the PCB sub-plate can be reduced, and the plate surface space is released; the central power supply of the chip does not supply power through the power supply layer of the PCB and does not pass through the signal area, so that signal noise can be reduced, and the high-density distribution difficulty of the PCB is greatly reduced; the power distribution module is arranged on the PCB, and the advantage point of enough space of the PCB is fully utilized.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings that are needed in the description of the embodiments will be briefly described below, it will be apparent that the drawings in the following description are only some embodiments of the present disclosure, and that other drawings may be obtained according to these drawings without inventive effort to a person of ordinary skill in the art.
FIG. 1 is a schematic diagram of an existing chip powered device shown according to an exemplary embodiment;
FIG. 2 is a schematic diagram of a chip back to power supply device, according to an example embodiment;
FIG. 3 is a schematic diagram of a chip with a connector as a buried capacitive patch panel facing away from a power supply device in accordance with an exemplary embodiment;
FIG. 4 is a schematic diagram of a connector with a chip with a connector having a capacitor on an inner layer facing away from a power supply device according to an example embodiment;
FIG. 5 is a schematic diagram of a chip with a connector having a capacitor in an inner layer facing away from a power supply device for another connector according to an example embodiment;
FIG. 6 is a schematic diagram of a chip with a connector being a buried capacitor facing away from a power supply device, according to an example embodiment;
FIG. 7 is a schematic diagram of a chip with a buried capacitor facing away from a power supply, with another connector shown according to an example embodiment;
FIG. 8 is a schematic diagram of a chip back-to-power device having multiple connectors and chips, according to an example embodiment;
FIG. 9 is a schematic diagram of a chip back-to-power device with multiple connectors, a PCB sub-board, and chips, according to an example embodiment;
FIG. 10 is a schematic diagram of a chip back side power supply having multiple PCB carriers, connectors, PCB sub-boards and chips, according to an example embodiment;
FIG. 11 is a schematic diagram of a chip back-to-power device having multiple power distribution modules, according to an example embodiment;
FIG. 12 is a schematic diagram of a chip back side power supply having multiple power distribution modules, a PCB carrier, connectors, PCB sub-boards, and chips, according to an example embodiment;
FIG. 13 is a schematic diagram illustrating a top-down structure of NPO hardware, according to an example embodiment;
FIG. 14 is a schematic diagram illustrating the architecture of an NPO hardware, according to an example embodiment;
fig. 15 is a flowchart illustrating a method for chip back-powering, according to an example embodiment.
Detailed Description
For the purpose of promoting an understanding of the principles and advantages of the disclosure, reference will now be made in detail to the drawings, in which it is apparent that the embodiments described are only some, but not all embodiments of the disclosure. Based on the embodiments in this disclosure, all other embodiments that a person of ordinary skill in the art would obtain without making any inventive effort are within the scope of protection of this disclosure.
Some words appearing hereinafter are explained:
the term "and/or" in the embodiments of the present disclosure describes an association relationship of association objects, which indicates that three relationships may exist, for example, a and/or B may indicate: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.
The application scenario described in the embodiments of the present disclosure is for more clearly describing the technical solution of the embodiments of the present disclosure, and does not constitute a limitation on the technical solution provided by the embodiments of the present disclosure, and as a person of ordinary skill in the art can know that, with the appearance of a new application scenario, the technical solution provided by the embodiments of the present disclosure is equally applicable to similar technical problems. In the description of the present disclosure, unless otherwise indicated, the meaning of "a plurality" is two or more.
Common PCBs carry signal and power fanout of the chip, as shown in fig. 1, large chips typically have thousands of pins, divided into signal, power and ground signals, all of which need to be fanned out of the chip area to interconnect with other components. The PCB is a multi-layer board, a plurality of layers are required to fan out the signals, and a signal plane bears a large number of signal wires; the part of the layers are power layers, and the whole plane of the power layers bears large current for power supply. The signal of general chip is located peripheral region, and main power supply is located chip central region, and the power plane through the PCB supplies power for the central power supply of chip, needs more power planes, increases the complexity of PCB to the central power supply of chip passes through the power plane power supply of PCB, and signal noise is thereby produced.
Therefore, in order to solve the above-mentioned problem, the present disclosure provides a device and a method for supplying power to a central power supply of a chip without passing through a power layer of a PCB sub-board, thereby reducing the level of the PCB sub-board and reducing the complexity of the PCB sub-board.
In view of this, the proposed chip power supply apparatus of the present disclosure includes: the power distribution module is used for being connected with the PCB of the printed circuit board in a welding mode or a crimping mode; the PCB is used for being connected with the power distribution module and the connector respectively, and is used for connecting a power signal of the power distribution module to the connector through a power lead of the PCB; the connector is connected between the top of the PCB carrier board and the bottom of the PCB sub-board and transmits the power supply signal to the PCB sub-board; and the PCB daughter board is connected with the chip through the top, is connected with a signal line in the signal layer and is connected to a signal pin of the chip, and vertically transmits the power signal transmitted by the connector to the power pin of the chip.
In an embodiment of the present disclosure, a chip back-to-back power supply device is provided, and the present disclosure is based on the same concept, and also provides a chip back-to-back power supply method.
Example 1
The following describes, by way of specific embodiments, a chip back-to-back power supply device provided in the present disclosure, as shown in fig. 2, including:
the power distribution module 201 is used for being connected with the PCB of the printed circuit board in a welding mode or a crimping mode;
the pressure welding mode can be Socket pressure welding mode or other pressure welding modes.
A PCB carrier 202 for connecting the power distribution module and the connector, respectively, for transmitting a power signal of the power distribution module to the connector through a power lead of the PCB carrier;
the connector 203 is connected between the top of the PCB carrier board and the bottom of the PCB sub-board and transmits the power signal to the PCB sub-board;
the connector is connected between the top of the PCB carrier board and the bottom of the PCB sub-board in a welding mode or a crimping mode.
The PCB daughter board 204 is connected to the chip through the top, and is connected to the signal line in the signal layer and connected to the signal pin of the chip, so that the power signal transmitted by the connector is vertically transmitted to the power pin of the chip.
The chip may be connected to the PCB by soldering or pressing, for example, the chip may be a BGA (Ball Grid Array) chip connected to the PCB by soldering, an LGA (Land Grid Array) chip connected to the PCB by soldering, or other types of chips.
The power supply signal firstly passes through the PCB carrier plate and then supplies power to the central power supply of the chip through the chip power supply area on the back of the PCB sub-plate, so that the layer of the PCB sub-plate can be reduced, and the plate surface space is released; the central power supply of the chip does not supply power through the power supply layer of the PCB and does not pass through the signal area, so that signal noise can be reduced, and the high-density distribution difficulty of the PCB is greatly reduced; the power distribution module is arranged on the PCB, and the advantage point of enough space of the PCB is fully utilized.
The connector may employ any of the following:
first, the connector adopts the buried capacitor keysets, respectively with the top of PCB carrier plate and the bottom of PCB daughter board are connected.
The embedded capacitor adapter plate is a PCB board with the inner layer containing a capacitor made of special materials, and the embedded capacitor has the advantage of better electrical performance and can provide more layout space for mounting.
The connector adopts a buried capacitor adapter plate and is connected between the top of the PCB carrier plate and the bottom of the PCB daughter board in a welding mode or a crimping mode, and specifically comprises any one of the following components:
the connector adopts a buried capacitor adapter plate, is connected with the top of the PCB carrier plate in a welding mode, and is connected with the bottom of the PCB sub-plate in a crimping mode, as shown in fig. 3;
the connector adopts a buried capacitor adapter plate, is connected with the top of the PCB carrier plate in a welding mode, and is connected with the bottom of the PCB sub-plate in a welding mode;
the connector adopts a buried capacitor adapter plate, is connected with the top of the PCB carrier plate in a crimping manner, and is connected with the bottom of the PCB sub-plate in a welding manner;
the connector adopts a buried capacitor adapter plate, is connected with the top of the PCB carrier plate in a crimping manner, and is connected with the bottom of the PCB sub-plate in a crimping manner.
The second type of connector adopts a connector with a capacitor at the inner layer, and is respectively connected with the top of the PCB carrier board and the bottom of the PCB sub-board;
the connector adopts a connector with a capacitor at the inner layer, and is connected between the top of the PCB carrier plate and the bottom of the PCB daughter board in a welding mode or a crimping mode, specifically any one of the following:
the connector adopts a connector with a capacitor at the inner layer, is connected with the top of the PCB carrier board in a welding mode, and is connected with the bottom of the PCB sub board in a crimping mode, as shown in fig. 4;
the connector adopts a connector with a capacitor at the inner layer, is connected with the top of the PCB carrier board in a welding mode, and is connected with the bottom of the PCB sub board in a welding mode, as shown in figure 5;
the connector adopts a connector with a capacitor at the inner layer, is connected with the top of the PCB carrier board in a crimping manner, and is connected with the bottom of the PCB sub board in a welding manner;
the connector adopts a connector with a capacitor at the inner layer, is connected with the top of the PCB carrier plate in a crimping manner, and is connected with the bottom of the PCB sub-plate in a crimping manner.
Thirdly, the connector is embedded into the top of the PCB carrier board in a buried capacitor mode and is connected with the bottom of the PCB sub-board, and specifically any one of the following components is adopted:
the connector is embedded into the top of the PCB carrier board in a buried capacitor mode and is connected with the bottom of the PCB sub-board in a welding mode, as shown in fig. 6;
the connector is embedded into the top of the PCB carrier board in a buried capacitor mode and is connected with the bottom of the PCB sub-board in a crimping mode.
Fourth, the connector is embedded in the bottom of the PCB daughter board in the form of embedded capacitor and is connected to the top of the PCB carrier board, specifically any one of the following:
the connector is embedded into the bottom of the PCB sub-board in a buried capacitor mode and is connected with the top of the PCB carrier board in a welding mode, as shown in fig. 7;
the connector is embedded into the bottom of the PCB sub-board in a buried capacitor mode and is connected with the top of the PCB carrier board in a crimping mode.
The number of the power distribution modules, the PCB carrier boards and the connectors is specifically any one of the following:
the number of the power distribution modules is one, the number of the PCB carrier boards is one, and the PCB carrier boards are connected with the PCB sub-boards through one or more connectors.
In this device, the number of the PCB sub-boards may be one or more, or the number of the chips may be one or more, that is, the connector may be connected to one or more PCB sub-boards, and the PCB sub-boards may be connected to one or more chips.
As shown in fig. 8, the number of connectors and chips is multiple, the power distribution module is connected with the PCB carrier board, the PCB carrier board is connected with the PCB sub-board through the connector 1, the PCB carrier board is connected with the PCB sub-board through the connector 2, the PCB carrier board is connected with the PCB sub-board through the connector 3, and the PCB sub-board is connected with the chip 1, the chip 2 and the chip 3 respectively, so that one power distribution module can supply power to multiple chips.
As shown in fig. 9, the number of connectors, PCB sub-boards and chips is plural, the power distribution module is connected with the PCB carrier board, the PCB carrier board is connected with the PCB sub-board 1 through the connector 1, and the PCB sub-board 1 is connected with the chip 1; the PCB carrier board is connected with the PCB sub-board 2 through the connector 2, and the PCB sub-board 2 is connected with the chip 2; the PCB carrier board is connected with the PCB sub-board 3 through the connector 3, and the PCB sub-board 3 is connected with the chip 3, so that one power distribution module is used for supplying power to a plurality of chips.
The number of the power distribution modules is one, the number of the PCB carrier plates is multiple, and the PCB carrier plates are connected together in a welding mode or a crimping mode and are connected with the PCB sub-plates through one or more connectors.
In this device, the number of the PCB sub-boards may be one or more, or the number of the chips may be one or more.
As shown in fig. 10, the number of the PCB carrier boards, the connectors, the PCB sub boards and the chips is plural, the power distribution module is connected with the PCB carrier board 1, and the PCB carrier board 1 is connected with the PCB carrier board 2, and the PCB carrier board 2 is connected with the PCB carrier board 3; the PCB carrier board 1 is connected with the PCB sub board 1 through the connector 1, and the PCB sub board 1 is connected with the chip 1; the PCB carrier board 1 is connected with the PCB sub board 2 through the connector 2, and the PCB sub board 2 is connected with the chip 2; the PCB carrier board 1 is connected with the PCB sub board 3 through the connector 3, and the PCB sub board 3 is connected with the chip 3.
The number of the power distribution modules is multiple, the number of the PCB carrier boards is one, and the PCB carrier boards are connected with the PCB sub-boards through one or more connectors.
In this device, the number of the PCB sub-boards may be one or more, or the number of the chips may be one or more.
As shown in fig. 11, the number of the power distribution modules is plural, the power distribution modules 1, 2 and 3 are connected with a PCB board, the PCB board is connected with a PCB sub-board through a connector, and the PCB sub-board is connected with a chip.
The number of the power distribution modules is multiple, the number of the PCB carriers is multiple, and the PCB carriers are connected together in a welding or crimping mode and are connected with the PCB sub-boards through one or more connectors.
In this device, the number of the PCB sub-boards may be one or more, or the number of the chips may be one or more.
As shown in fig. 12, the number of the power distribution modules, the PCB carrier, the connectors, the PCB sub-boards and the chips is plural, the power distribution modules 1, the power distribution modules 2 and the power respective modules 3 are respectively connected with the PCB carrier 1, and the PCB carrier 1 is connected with the PCB carrier 2, and the PCB carrier 2 is connected with the PCB carrier 3; the PCB carrier board 1 is connected with the PCB sub board 1 through the connector 1, and the PCB sub board 1 is connected with the chip 1; the PCB carrier board 1 is connected with the PCB sub board 2 through the connector 2, and the PCB sub board 2 is connected with the chip 2; the PCB carrier board 1 is connected with the PCB sub board 3 through the connector 3, and the PCB sub board 3 is connected with the chip 3.
The chip back-to-power device can be applied to low beam packaging (Near Package Optics, NPO) hardware.
The NPO signal rate range is a high-speed signal with a signal rate of 100 gigabits per second (Gbps) or more. The NPO structure defines a channel distance of 3 inches (inch) or less for high-speed signals to be transmitted from the chip to the optical module.
The top view of the NPO hardware is shown in fig. 13, where the optical module and the chip are on the PCB daughter board.
The NPO hardware has a structure as shown in fig. 14, and specifically includes:
the power distribution module 141 is used for being connected with the PCB carrier board in a welding mode or a crimping mode;
the PCB carrier 142 is configured to connect the power distribution module and the connector, respectively, and transmit a power signal of the power distribution module to the connector through a power lead of the PCB carrier;
a connector 143 connected between the top of the PCB carrier board and the bottom of the PCB sub-board, to which the power signal is transmitted;
the PCB sub-board 144 is connected to the chip through the top, and is connected to the signal line in the signal layer and connected to the signal pin of the chip, so that the power signal transmitted by the connector is vertically transmitted to the power pin of the chip.
The optical module 145 is used for being connected with the PCB daughter board in a welding mode or a pressing mode.
After a base is welded on a PCB (printed Circuit Board) sub-board, an optical module is inserted into the base to be connected with the PCB sub-board; or after the base is pressed on the PCB sub-board, the optical module is inserted into the base to be connected with the PCB sub-board.
Example 2
The following describes a method for supplying power to a chip back side provided in the present disclosure through a specific embodiment, as shown in fig. 15, including:
step 151, the output power signal is sent to a power lead wire of the PCB through a power distribution module;
step 152, transmitting the power signal to a connector by a power lead of the PCB board, and transmitting the power signal to a vertical power lead of the PCB board via the connector;
step 153, transmitting the power signal to a power pin of a chip by a vertical power lead of the PCB sub-board for power supply;
and 154, transmitting the control signal accessed in the signal layer to the signal pins of the chip through the PCB daughter board.
Taking a chip as a BGA chip as an example, the power supply signal in the center of the BGA chip is not supplied through the power supply layer of the PCB, so that the level of the PCB is reduced; meanwhile, the power supply direction of the BGA chip is at the back of the BGA chip, so that the requirement of the power supply integrity of the BGA power supply network is met, namely, the capacitor can still have the decoupling filtering effect, wherein the filtering means that the high-frequency signal is passed and the low-frequency signal is blocked. Decoupling refers to preventing the instantaneous change of the current before and after the capacitor, thereby achieving the purpose of reducing signal noise.
Therefore, the power supply signal firstly passes through the PCB carrier plate and then is supplied through the chip power supply area on the back of the PCB sub-plate, so that the layer of the PCB sub-plate can be reduced, and the plate surface space is released; the power supply of the chip central power supply does not pass through the power supply layer of the PCB, does not pass through the signal area, can reduce signal noise, and greatly reduces the high-density distribution difficulty of the PCB.
As an alternative embodiment, the power signal is transmitted by a power lead of a PCB carrier board to a connector, and the power signal is transmitted by the connector to a vertical power lead of a PCB sub board, comprising:
transmitting the power signal to a buried capacitor adapter plate which is respectively connected with the top of the PCB carrier plate and the bottom of the PCB sub-plate by a power lead of the PCB carrier plate, and transmitting the power signal to a vertical power lead of the PCB sub-plate by the buried capacitor adapter plate; or alternatively
Transmitting the power signal to connectors with capacitors at inner layers, wherein the connectors are respectively connected with the top of the PCB carrier board and the bottom of the PCB sub-board, and transmitting the power signal to vertical power leads passing through the PCB sub-board through the connectors with the capacitors at the inner layers; or alternatively
Transmitting the power signal to a connector which is embedded in the top of the PCB by adopting a buried capacitor and is connected with the bottom of the PCB by a power lead of the PCB, and transmitting the power signal to a vertical power lead of the PCB by the connector; or alternatively
The power supply signal is transmitted to the vertical power supply lead of the PCB by the power supply lead of the PCB, the connector is embedded into the bottom of the PCB by adopting a buried capacitor and connected with the top of the PCB, and the power supply signal is transmitted to the vertical power supply lead of the PCB by the connector.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims (10)

1. A chip back-to-power device, the device comprising:
the power distribution module is used for being connected with the PCB of the printed circuit board in a welding mode or a crimping mode;
the PCB is used for being connected with the power distribution module and the connector respectively and transmitting power signals of the power distribution module to the connector through power leads of the PCB;
the connector is connected between the top of the PCB carrier board and the bottom of the PCB sub-board and transmits the power supply signal to the PCB sub-board;
and the PCB daughter board is connected with the chip through the top, is connected with a signal line in the signal layer and is connected to a signal pin of the chip, and vertically transmits the power signal transmitted by the connector to the power pin of the chip.
2. The apparatus of claim 1, wherein the device comprises a plurality of sensors,
the connector adopts a buried capacitor adapter plate which is respectively connected with the top of the PCB carrier plate and the bottom of the PCB sub-plate.
3. The apparatus of claim 1, wherein the device comprises a plurality of sensors,
the connector adopts a connector with a capacitor at the inner layer, and is respectively connected with the top of the PCB carrier plate and the bottom of the PCB sub-plate.
4. The apparatus of claim 1, wherein the device comprises a plurality of sensors,
the connector is embedded into the top of the PCB carrier board in a buried capacitor mode and is connected with the bottom of the PCB sub-board; or alternatively
The connector is embedded into the bottom of the PCB sub-board in a buried capacitor mode and is connected with the top of the PCB carrier board.
5. The apparatus according to any one of claims 1 to 4, wherein,
the connector is connected between the top of the PCB carrier board and the bottom of the PCB sub-board in a welding mode or a crimping mode.
6. The apparatus of claim 5, wherein the device comprises a plurality of sensors,
the connector adopts a buried capacitor adapter plate, is connected with the top of the PCB carrier plate in a welding mode or a crimping mode, and is connected with the bottom of the PCB sub-plate in a welding mode or a crimping mode; or alternatively
The connector adopts a connector with a capacitor at the inner layer, is connected with the top of the PCB carrier board in a welding mode or a crimping mode, and is connected with the bottom of the PCB sub board in a welding mode or a crimping mode; or alternatively
The connector is embedded into the top of the PCB carrier board in a buried capacitor mode and is connected with the bottom of the PCB sub-board in a welding mode or a crimping mode; or alternatively
The connector is embedded into the bottom of the PCB sub-board in a buried capacitor mode and is connected with the top of the PCB carrier board in a welding mode or a crimping mode.
7. The apparatus of claim 1, wherein the device comprises a plurality of sensors,
the number of the power distribution modules is one, the number of the PCB carriers is multiple, and the PCB carriers are connected together in a welding mode or a crimping mode and are connected with the PCB sub-boards through one or more connectors;
the number of the power distribution modules is multiple, the number of the PCB carrier boards is one, and the PCB carrier boards are connected with the PCB sub-boards through one or more connectors;
the number of the power distribution modules is multiple, the number of the PCB carriers is multiple, and the PCB carriers are connected together in a welding mode or a crimping mode and are connected with the PCB sub-boards through one or more connectors.
8. The apparatus of claim 1, wherein the apparatus is applied to low beam packaging NPO hardware.
9. A method for supplying power to a chip in a back direction, the method comprising:
the output power supply signal is sent to a power supply lead wire passing through the PCB through the power supply distribution module;
transmitting the power signal to a connector by a power lead of the PCB, and transmitting the power signal to a vertical power lead of a PCB through the connector;
transmitting the power signal to a power pin of a chip by a vertical power lead of the PCB sub-board for power supply;
and transmitting the control signal accessed in the signal layer to a signal pin of the chip through the PCB.
10. The method of claim 9, wherein transmitting the power signal by the power leads of the PCB carrier board to a connector, transmitting the power signal via the connector to the vertical power leads via the PCB daughter board, comprises:
transmitting the power signal to a buried capacitor adapter plate which is respectively connected with the top of the PCB carrier plate and the bottom of the PCB sub-plate by a power lead of the PCB carrier plate, and transmitting the power signal to a vertical power lead of the PCB sub-plate by the buried capacitor adapter plate; or alternatively
Transmitting the power signal to connectors with capacitors at inner layers, wherein the connectors are respectively connected with the top of the PCB carrier board and the bottom of the PCB sub-board, and transmitting the power signal to vertical power leads passing through the PCB sub-board through the connectors with the capacitors at the inner layers; or alternatively
Transmitting the power signal to a connector which is embedded in the top of the PCB by adopting a buried capacitor and is connected with the bottom of the PCB by a power lead of the PCB, and transmitting the power signal to a vertical power lead of the PCB by the connector; or alternatively
The power supply signal is transmitted to the vertical power supply lead of the PCB by the power supply lead of the PCB, the connector is embedded into the bottom of the PCB by adopting a buried capacitor and connected with the top of the PCB, and the power supply signal is transmitted to the vertical power supply lead of the PCB by the connector.
CN202210471293.6A 2022-04-28 2022-04-28 Chip back power supply equipment and method Pending CN117008688A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210471293.6A CN117008688A (en) 2022-04-28 2022-04-28 Chip back power supply equipment and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210471293.6A CN117008688A (en) 2022-04-28 2022-04-28 Chip back power supply equipment and method

Publications (1)

Publication Number Publication Date
CN117008688A true CN117008688A (en) 2023-11-07

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210471293.6A Pending CN117008688A (en) 2022-04-28 2022-04-28 Chip back power supply equipment and method

Country Status (1)

Country Link
CN (1) CN117008688A (en)

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