CN117002424A - Power supply method, device, equipment and storage medium for cabin domain controller - Google Patents
Power supply method, device, equipment and storage medium for cabin domain controller Download PDFInfo
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Abstract
The embodiment of the disclosure provides a power supply method, a device, equipment and a storage medium of a cabin domain controller. The method comprises the following steps: grouping the chips in the cabin domain controller according to multiple dimensions to obtain multiple power supply areas; a group of chips corresponds to a power supply area; and powering the chips in the plurality of power supply areas based on the plurality of dimensions. According to the embodiment of the disclosure, the power supply mode of the chips in the power supply areas can reduce energy resource consumption.
Description
Technical Field
The embodiment of the disclosure relates to the technical field of automobiles, in particular to a power supply method, a device, equipment and a storage medium of a cabin domain controller.
Background
The current Power supply scheme for intelligent cabin controllers is mainly focused on the fact that the timing control of Power-on of the controllers is achieved through communication interaction between an enabling signal and a Power Good signal of a Power chip and a micro-control unit (MicrocontrollerUnit, MCU) chip. The existing power supply method of the intelligent cabin domain controller has the problems of functional redundancy (rising of design cost), low efficiency of an ascending current path (time redundancy exists, and optimal performance cannot be achieved), and the like.
Disclosure of Invention
The embodiment of the disclosure provides a power supply method, a device, equipment and a storage medium for a cabin domain controller, which can reduce energy resource consumption.
In a first aspect, an embodiment of the present disclosure provides a power supply method for a cabin domain controller, where chips in the cabin domain controller are grouped according to multiple dimensions, so as to obtain multiple power supply areas; a group of chips corresponds to a power supply area; and powering the chips in the plurality of power supply areas based on the plurality of dimensions.
In a second aspect, an embodiment of the present disclosure further provides a power supply device of a cabin domain controller, and a grouping module, configured to group chips in the cabin domain controller according to multiple dimensions, to obtain multiple power supply areas; wherein, a group of chips corresponds to a power supply area; and the power supply module is used for supplying power to the chips in the power supply areas based on the dimensions.
In a third aspect, embodiments of the present disclosure further provide an electronic device, including:
one or more processors;
storage means for storing one or more programs,
the one or more programs, when executed by the one or more processors, cause the one or more processors to implement a method of powering a cabin domain controller as described in embodiments of the present disclosure.
In a fourth aspect, the disclosed embodiments also provide a storage medium containing computer executable instructions, which when executed by a computer processor, are for performing a method of powering a cabin domain controller as described in the disclosed embodiments.
According to the technical scheme, the chips in the cabin domain controller are grouped according to multiple dimensions to obtain multiple power supply areas; a group of chips corresponds to a power supply area; and powering the chips in the plurality of power supply areas based on the plurality of dimensions. According to the embodiment of the disclosure, the power supply mode of the chips in the power supply areas can reduce energy resource consumption.
Drawings
The above and other features, advantages, and aspects of embodiments of the present disclosure will become more apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings. The same or similar reference numbers will be used throughout the drawings to refer to the same or like elements. It should be understood that the figures are schematic and that elements and components are not necessarily drawn to scale.
Fig. 1 is a flowchart of a power supply method of a cabin domain controller according to an embodiment of the disclosure;
fig. 2 is a schematic structural diagram of a power supply device of a cabin domain controller according to an embodiment of the disclosure;
fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present disclosure have been shown in the accompanying drawings, it is to be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustration purposes only and are not intended to limit the scope of the present disclosure.
It should be understood that the various steps recited in the method embodiments of the present disclosure may be performed in a different order and/or performed in parallel. Furthermore, method embodiments may include additional steps and/or omit performing the illustrated steps. The scope of the present disclosure is not limited in this respect.
The term "including" and variations thereof as used herein are intended to be open-ended, i.e., including, but not limited to. The term "based on" is based at least in part on. The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments. Related definitions of other terms will be given in the description below.
It should be noted that the terms "first," "second," and the like in this disclosure are merely used to distinguish between different devices, modules, or units and are not used to define an order or interdependence of functions performed by the devices, modules, or units.
It should be noted that references to "one", "a plurality" and "a plurality" in this disclosure are intended to be illustrative rather than limiting, and those of ordinary skill in the art will appreciate that "one or more" is intended to be understood as "one or more" unless the context clearly indicates otherwise.
It will be appreciated that the data (including but not limited to the data itself, the acquisition or use of the data) involved in the present technical solution should comply with the corresponding legal regulations and the requirements of the relevant regulations.
Fig. 1 is a schematic flow chart of a power supply method of a cabin domain controller provided by an embodiment of the present disclosure, where the embodiment of the present disclosure is applicable to a case of supplying power to a cabin domain controller, the method may be performed by a power supply device of the cabin domain controller, where the device may be implemented in a form of software and/or hardware, and optionally, may be implemented by an electronic device, where the electronic device may be a mobile terminal, a PC side, a server, or the like. As shown in fig. 1, the method includes:
s110, grouping the chips in the cabin area controller according to multiple dimensions to obtain multiple power supply areas.
Wherein a group of chips corresponds to a power supply area. The plurality of dimensions may include a chip category dimension, a chip function dimension, and a controlled body dimension. The Chip class dimension may be divided into a computation class, a control class, a communication class, an analog class, etc., which is not limited in this embodiment, and the Chip function dimension may include functions of computing and processing data of the entire domain controller, controlling an instruction sequence of a power supply Chip, processing signals of a detection class, wireless transmission, video playing, and audio power amplifying, etc., which is not limited in this embodiment, and the controlled body dimension may be divided into a System on Chip (SoC) and/or an MCU Chip. The plurality of dimensions may also include a security requirement dimension, a constant electricity requirement dimension, an instruction sequence dimension, and the like. The domain controller includes a computation processing module (SoC chip), a control processing module (MCU chip), a communication module (ETH Switch chip, BT-WiFi chip, etc.), a peripheral module (camera, audio input/output, video output, etc.), and a power supply system (DCDC chip, LDO chip, etc.). In this embodiment, different from the statistics of load electricity demand in the past, the present embodiment classifies and divides each electricity unit in the form of a power supply area, that is, groups according to multiple dimensions, so as to obtain multiple power supply areas, so that subsequent power supply based on the power supply areas is facilitated.
Optionally, grouping the chips in the cabin domain controller according to multiple dimensions to obtain multiple power supply areas includes: grouping the chips in the cabin domain controller according to the chip category dimension to obtain an initial plurality of power supply areas; and adjusting the initial multiple power supply areas based on the chip function dimension and/or the controlled main body dimension to obtain multiple adjusted power supply areas.
The power supply area comprises a calculation processing module power supply area, a calculation processing module peripheral power supply area, a control module power supply area and an external interaction module power supply area.
The SoC chip belongs to a computing class, can compute and process data in the whole domain controller, can belong to a power supply area of a computing processing module, the peripheral power supply area of the computing processing module can comprise a chip with a controlled main body being the SoC chip, the data of the chip is derived from the SoC chip, the MCU chip belongs to a control class, can control an instruction sequence of the power supply chip, process signals of a detection class and the like, the MCU chip can belong to a power supply area of a control module, and non-SoC chips and other chips with which the non-MCU chip interact with the outside belong to a power supply area of an external interaction module, for example, the power supply area of the external interaction module can comprise chips such as a wireless transmission chip, a video playing chip and the like. It should be noted that, each power supply area has a corresponding power supply chip, and the power supply chip is used for supplying power to the chips in the corresponding power supply area. The power supply chip is used for converting the voltage output by the storage battery into the voltage required by the power supply area of the power supply chip.
And S120, supplying power to the chips in the power supply areas based on the dimensions.
Wherein the dimensions further comprise instruction sequence dimensions. Instruction sequence dimensions may be understood as dimensions of a timing action instruction. In this embodiment, the chips in the multiple power supply areas may be powered according to multiple dimensions such as the instruction sequence dimension.
Optionally, powering the chips in the plurality of power supply areas based on the plurality of dimensions includes: determining energy resources of the power supply areas according to the chip function dimensions; and sequentially supplying power to the chips in the power supply areas according to the sequence corresponding to the energy resource and the instruction sequence dimension.
The energy resource is understood to be energy resources such as voltage, current, etc. According to the embodiment, energy resources such as voltage and current required by the chip in the power supply area can be determined from the chip function dimension, namely, the energy resources such as voltage and current required by different chip functions are distributed, and the chips in each power supply area can be sequentially powered according to the sequence corresponding to the energy resources and the instruction sequence dimension, so that the consumption of the energy resources can be reduced, and the electric energy is saved. In other words, in this embodiment, the efficiency and the utilization rate of the power supply chip and the peripheral device selection and design thereof can be improved from the dimensions of the power supply chip model selection, the rated output capability confirmation, the output flow distribution and the like.
According to the technical scheme, the chips in the cabin domain controller are grouped according to multiple dimensions to obtain multiple power supply areas; a group of chips corresponds to a power supply area; and powering the chips in the plurality of power supply areas based on the plurality of dimensions. According to the embodiment of the disclosure, the power supply mode of the chips in the power supply areas can reduce energy resource consumption.
In the development process of the prior cabin domain controller, the power supply capacity of a power supply system in the domain controller is remained too much due to the fact that power supply demand statistics is carried out by taking a single power load as a unit. In the embodiment, the chips in the domain controller are grouped according to each dimension, the power supply resources are distributed according to the actual power supply requirements and the energy efficiency ratio of different groups, the introduction of redundant power supply modules (power supply chips, peripheral discrete devices and the like) is reduced, and the effects of reducing the cost control in the development and design process and completely utilizing the whole output function of the power supply system are realized; the interaction efficiency of the power supply system and the control unit is improved, and the current-up process efficiency is improved.
Optionally, after powering the chips in the plurality of power supply areas based on the plurality of dimensions, the method further includes: the power supply working state of each power supply area is monitored to ensure the safe power supply of the cabin controller.
In this embodiment, after energy resource allocation and power supply chip selection are completed according to the power supply areas, safety and monitoring of the power supply system can be deployed, that is, monitoring of power supply working states such as voltage, current, chip action time and running conditions of each power supply area is achieved.
Optionally, monitoring the power supply working state of each power supply area includes: the control system basic chip executes self-checking operation; if the self-checking operation is successfully executed, the control system basic chip supplies power to the MCU chip to execute the power-on operation; the MCU chip is controlled to execute power-on operation on the power supply chip in the power supply area of the computing processing module, the power supply chip in the power supply area of the peripheral computing processing module and the power supply chip in the power supply area of the external interaction module according to the sequence corresponding to the time sequence instruction; if the power supply areas are electrified successfully, monitoring the power supply working state of the MCU chip; and monitoring the power supply working states of all the other power supply areas.
The control module power supply area comprises an MCU chip. The embodiment also completes the power supply to the MCU chip and the monitoring of the power supply working state by introducing a system base chip. I.e. the control module power supply area also comprises a system base chip.
In this embodiment, the control system base chip performs a self-checking operation to ensure that the control module will not have problems such as timing confusion or malfunction during the power-up process. If the self-checking operation is successfully executed, the control system basic chip supplies power to the MCU chip to execute the power-on operation; the MCU chip is controlled to execute power-on operation on the power supply chip in the power supply area of the computing processing module, the power supply chip in the power supply area of the peripheral computing processing module and the power supply chip in the power supply area of the external interaction module according to the sequence corresponding to the time sequence instruction; if the power supply areas are electrified successfully, monitoring the power supply working state of the MCU chip; if the power supply working state of the MCU chip is normal, the power supply working state of each other power supply area is monitored.
The timing instruction is attached to the auxiliary processing unit, and the auxiliary processing unit defines the timing instruction and corresponding specific actions. Also instant instructions may be available from the auxiliary processing unit.
Optionally, the controlling the MCU chip performs a power-on operation on the power supply chip in the power supply area of the computing processing module, the power supply chip in the peripheral power supply area of the computing processing module, and the power supply chip in the power supply area of the external interaction module according to an order corresponding to the time sequence instruction, including: in the process of controlling power supply chips of all power supply areas to perform power-on operation according to a time sequence instruction, detecting whether power good signals of the power supply chips are normal or not in a set period; if the power good signals in the set period are all high level, the power good signals of the power supply chip are normal; and controlling a power supply chip of the next power supply area to execute power-on operation according to the sequence corresponding to the time sequence instruction; if the power good signals in the set period are all low level, the power good signals of the power supply chips are abnormal, and a restarting instruction is sent to the power supply chips in the corresponding power supply areas so as to reset.
The set period may be 3 periods, one period being 1 millisecond. In the embodiment, in the process of controlling the power supply chip of each power supply area to execute the power-on operation according to the time sequence instruction, controlling the MCU chip to detect whether the powergood signal of the power supply chip is normal or not in a continuous set period; if the power good signals in the set period are all high level, the power good signals of the power supply chip are normal; and controlling the power chips of the next power supply area to execute power-on operation according to the sequence corresponding to the time sequence instruction, judging whether the power good signal of the power chips of the next power supply area is normal, and the like until the power-on processes of the power chips in all the power supply areas are finished. If the power good signals in the set period are all low level, the power good signals of the power supply chips are abnormal, and a restarting instruction is sent to the power supply chips in the corresponding power supply areas so as to reset.
In the Power-on process, unlike the previous single monitoring of the feedback signal of the Power chip, the Power Good signal of the Power chip is input to the IO pin of the MCU, the debounce processing is performed in the MCU chip, namely whether the Power Good signal of the Power chip is normal or not is detected in a continuous set period, if the Power Good signal of the Power chip is normal, the Power-on process can be continued, and the problems of Power-on action and timing disorder caused by misjudgment caused by voltage overshoot or current rush in the traditional detection mode are avoided.
Optionally, monitoring the power supply working state of the MCU chip includes: controlling the MCU chip to send a dog feeding signal to the system base chip at intervals of a first set time length; if the system basic chip receives the dog feeding signal, the power supply working state of the MCU chip is normal; and if the system base chip does not receive the dog feeding signal, resetting the MCU chip.
The first set duration may be 10 ms, 6 ms, or the like, which is not limited in this embodiment. In this embodiment, after the current-up process is completed, the security of the MCU chip may be monitored by using a watchdog function inside the system base chip. Specifically, the MCU chip is controlled to send a dog feeding signal to the system base chip through a serial peripheral interface (Serial Peripheral Interface, spi interface) at intervals of a first set time length; if the system basic chip receives the dog feeding signal, the power supply working state of the MCU chip is normal; and if the system base chip does not receive the dog feeding signal, resetting the MCU chip.
Optionally, monitoring the power supply working state of each of the remaining power supply areas includes: controlling power supply chips in other power supply areas to send power good signals to the MCU chip; if the MCU chip continuously sets times to detect that the power good signal is of low level, the power supply working state of the corresponding power supply chip is abnormal, and restarting the corresponding power supply chip; if the MCU chip continuously sets times to detect that the power good signal is at a high level, the power supply working state of the corresponding power supply chip is normal.
Wherein the remaining individual power supply areas, i.e. the power supply areas other than the control module power supply area. The set number of times may be 3. In this embodiment, the power supply working state of each of the remaining power supply areas may be monitored by the MCU chip. Specifically, the power supply chips in the rest power supply areas are controlled to send power good signals to the MCU chip; if the MCU chip continuously sets times to detect that the power good signal is at a low level, detecting whether a power signal (power good signal) of the power supply chip is normal or not in a set period, if the power good signal is at a high level in the set period, the power good signal of the power supply chip is normal, and if the power good signal is at a low level in the set period, restarting the corresponding power supply chip; if the MCU chip continuously sets times to detect that the power good signal is at a high level, the power supply working state of the corresponding power supply chip is normal.
Optionally, the power supply area of the computing processing module includes an SoC chip; monitoring a power supply working state of a power supply area of a computing processing module, including: the SoC chip is controlled to send heartbeat signals to the MCU chip at intervals of a second set time length; if the MCU chip detects a heartbeat signal, the power supply working state of the SoC chip is normal; if the MCU chip does not detect the heartbeat signal, the power supply working state of the SoC chip is abnormal, and the SoC chip is restarted
The second set period may be several millimeters, several hundred milliseconds, or the like, which is not limited in this embodiment. In this embodiment, the SoC chip may also be monitored by a heartbeat signal. Specifically, the SoC chip is controlled to send a heartbeat signal (high level) to the MCU chip at intervals of a second set time length; if the MCU chip detects a heartbeat signal (high level), the MCU chip indicates that the power supply working state in the SoC chip is normal; and if the MCU chip does not detect the heartbeat signal, the MCU chip indicates that the power supply working state in the SoC chip is abnormal, and the SoC chip is restarted.
According to the embodiment, after the power-on is completed and the normal working state is entered, the power supply working state of each power supply area is monitored, meanwhile, if the power supply working state is abnormal, the domain controller can judge and record an event, and the abnormal self-powered unit is restarted independently, so that the safety monitoring of a core module (SoC chip or MCU chip) in the domain controller is realized by the technical means, the isolation among the power supply areas is realized, and the reliability of a power supply system of the domain controller is greatly improved.
In the existing domain controller power supply system, the control on the aspect of power supply safety adopts the signal transmission of an enabling pin and a feedback output pin of a power supply chip and an MCU chip or other control units, and the control units are informed to operate through feedback signals when the power supply voltage is lower than or higher than a set value, and the technical means can not finish the operations such as error recording, jitter removal processing, energy resource calculation judgment and the like when the power supply problem such as the like occurs. According to the embodiment, the problems of safety monitoring, analysis and processing of the power supply problem can be solved, and performances of judging precision, feedback information effectiveness degree and the like when the controller deals with faults beyond theoretical design expectations are improved.
When designing a power supply system, the existing domain controller usually takes hardware as a dominant mode, and needs to analyze the action time of each power supply chip, detection signals and other control signals in the system to perform the tasks of pin allocation, action time definition and the like when advancing to a software development link of a control unit. In the embodiment, by introducing the auxiliary processing unit, the operation such as defining the time sequence and the pin actions of the control unit is completed in the system design process, and the software and hardware development efficiency is greatly improved.
The auxiliary processing unit is introduced to complete definition and control of the electric time sequence on the power supply system, so that the action of each power supply chip or the on-off control circuit can be defined into a specific pin of the control module (MCU chip) in the process of designing the power supply scheme, and the purpose of improving the development efficiency of software and hardware is achieved by generating a software instruction according to the processing result.
Illustratively, the content output by the auxiliary processing unit is as shown in table 1:
table 1 content output by auxiliary processing unit
The first column of table 1 is the network name of the pin of the power supply chip, the first column of table 1 is the time sequence of the time sequence command, and the first english name appearing first in all the second columns of table 1 is the name of the pin of the mcu chip, such as GPIO xo. The power supply chip pins and the mcu chip pins are connected through network paths corresponding to network names, and the states of the networks are controlled by the pins of the mcu chip. For example, the mcu chip pin outputs a high level, the network path connected to the mcu chip pin also goes high, and the power supply chip pin connected to the network path also goes high.
It should be noted that, regarding the regional grouping mechanism to which the chip belongs, the mechanism may be attached to an electronic processing device or software, and the required imported information is: all chips at the load end comprise non-terminal power-consumption chips such as level conversion, the type of the chip, the working content of the chip in the system, whether the chip is related to safety, whether the chip needs to act when the system is dormant, which core module (SoC chip or MCU chip) is controlled or served, and the time sequence of the chip needs to act or is forbidden to act. The required setting rules are: the weight of the judgment item and the power supply area to which the weighted result is directed.
It should be noted that, regarding the action sequence auxiliary processing unit, it may be an electronic processing device or software, and the required imported information is: the name and serial number of the pin used by the MCU chip, the name of the signal needing to be actuated, the power supply area to which the actuating signal belongs, the actuating time range of the actuating signal in the area and the signal post-processing form. The required setting rules are: the MCU IO configuration rule, the action time (including time interval, time sequence and the like) of each power supply area, the reminding of batch actions of action signals at the same time and the like.
Fig. 2 is a schematic structural diagram of a power supply device of a cabin domain controller according to an embodiment of the disclosure. The device comprises: grouping module 210 and power module 220.
A grouping module 210, configured to group the chips in the cabin domain controller according to multiple dimensions, so as to obtain multiple power supply areas; wherein, a group of chips corresponds to a power supply area;
and the power supply module 220 is configured to supply power to the chips in the multiple power supply areas based on the multiple dimensions.
According to the technical scheme, the chips in the cabin domain controller are grouped according to multiple dimensions through the grouping module, and multiple power supply areas are obtained; a group of chips corresponds to a power supply area; and supplying power to the chips in the power supply areas based on the dimensions through a power supply module. According to the embodiment of the disclosure, the power supply mode of the chips in the power supply areas can reduce energy resource consumption.
Wherein the plurality of dimensions includes a chip category dimension, a chip function dimension, and a controlled body dimension; optionally, the grouping module is specifically configured to: grouping the chips in the cabin domain controller according to the chip category dimension to obtain an initial plurality of power supply areas; and adjusting the initial multiple power supply areas based on the chip function dimension and/or the controlled main body dimension to obtain multiple adjusted power supply areas.
Wherein the dimensions further comprise instruction sequence dimensions; optionally, the power supply module is specifically configured to: determining energy resources of the power supply areas according to the chip function dimensions; and sequentially supplying power to the chips in the power supply areas according to the sequence corresponding to the energy resource and the instruction sequence dimension.
The device further comprises a monitoring module, wherein the monitoring module is specifically used for: the power supply working state of each power supply area is monitored to ensure the safe power supply of the cabin controller.
The power supply area comprises a calculation processing module power supply area, a calculation processing module peripheral power supply area, a control module power supply area and an external interaction module power supply area; the control module power supply area comprises an MCU chip and a system base chip; each power supply area comprises a power supply chip; optionally, the monitoring module is specifically configured to: the control system basic chip executes self-checking operation; if the self-checking operation is successfully executed, the control system basic chip supplies power to the MCU chip to execute the power-on operation; the MCU chip is controlled to execute power-on operation on the power supply chip in the power supply area of the computing processing module, the power supply chip in the power supply area of the peripheral computing processing module and the power supply chip in the power supply area of the external interaction module according to the sequence corresponding to the time sequence instruction; if the power supply areas are electrified successfully, monitoring the power supply working state of the MCU chip; and monitoring the power supply working states of all the other power supply areas.
Optionally, the monitoring module is further configured to: in the process of controlling power supply chips of all power supply areas to perform power-on operation according to a time sequence instruction, detecting whether power good signals of the power supply chips are normal or not in a set period; if the power good signals in the set period are all high level, the power good signals of the power supply chip are normal; and controlling a power supply chip of the next power supply area to execute power-on operation according to the sequence corresponding to the time sequence instruction; if the power good signals in the set period are all low level, the power good signals of the power supply chips are abnormal, and a restarting instruction is sent to the power supply chips in the corresponding power supply areas so as to reset.
Optionally, the monitoring module is further configured to: controlling the MCU chip to send a dog feeding signal to the system base chip at intervals of a first set time length; if the system basic chip receives the dog feeding signal, the power supply working state of the MCU chip is normal; and if the system base chip does not receive the dog feeding signal, resetting the MCU chip.
Optionally, the monitoring module is further configured to: controlling power supply chips in other power supply areas to send power good signals to the MCU chip; if the MCU chip continuously sets times to detect that the power good signal is of low level, the power supply working state of the corresponding power supply chip is abnormal, and restarting the corresponding power supply chip; if the MCU chip continuously sets times to detect that the power good signal is at a high level, the power supply working state of the corresponding power supply chip is normal.
The power supply area of the computing processing module comprises an SoC chip; optionally, the monitoring module is further configured to: the SoC chip is controlled to send heartbeat signals to the MCU chip at intervals of a second set time length; if the MCU chip detects a heartbeat signal, the power supply working state of the SoC chip is normal; if the MCU chip does not detect the heartbeat signal, the power supply working state of the SoC chip is abnormal, and the SoC chip is restarted.
The power supply device of the cabin area controller provided by the embodiment of the disclosure can execute the power supply method of the cabin area controller provided by any embodiment of the disclosure, and has the corresponding functional modules and beneficial effects of the execution method.
It should be noted that each unit and module included in the above apparatus are only divided according to the functional logic, but not limited to the above division, so long as the corresponding functions can be implemented; in addition, the specific names of the functional units are also only for convenience of distinguishing from each other, and are not used to limit the protection scope of the embodiments of the present disclosure.
Fig. 3 shows a schematic diagram of the structure of an electronic device 10 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 3, the electronic device 10 includes at least one processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, in which the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 may also be stored. The processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
Various components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as the power supply method of the cabin controller.
In some embodiments, the method of powering a cabin domain controller may be implemented as a computer program, which is tangibly embodied in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the above-described method of powering a cabin domain controller may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the method of powering the cabin controller in any other suitable way (e.g. by means of firmware).
Various implementations of the systems and techniques described here above can be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems on chip (socs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.
Claims (12)
1. A power supply method of a cabin controller is characterized in that,
grouping the chips in the cabin domain controller according to multiple dimensions to obtain multiple power supply areas; a group of chips corresponds to a power supply area;
and powering the chips in the plurality of power supply areas based on the plurality of dimensions.
2. The method of claim 1, wherein the plurality of dimensions includes a chip category dimension, a chip function dimension, and a controlled body dimension; grouping the chips in the cabin domain controller according to a plurality of dimensions to obtain a plurality of power supply areas, wherein the method comprises the following steps:
grouping the chips in the cabin domain controller according to the chip category dimension to obtain an initial plurality of power supply areas;
and adjusting the initial multiple power supply areas based on the chip function dimension and/or the controlled main body dimension to obtain multiple adjusted power supply areas.
3. The method of claim 2, wherein the dimensions further comprise instruction sequence dimensions; powering the chips in the plurality of power supply regions based on the plurality of dimensions, including:
determining energy resources of the power supply areas according to the chip function dimensions;
and sequentially supplying power to the chips in the power supply areas according to the sequence corresponding to the energy resource and the instruction sequence dimension.
4. The method of claim 1, further comprising, after powering the chips in the plurality of power supply regions based on the plurality of dimensions:
the power supply working state of each power supply area is monitored to ensure the safe power supply of the cabin controller.
5. The method of claim 4, wherein the power supply area comprises a computing processing module power supply area, a computing processing module peripheral power supply area, a control module power supply area, and an external interactive module power supply area; the control module power supply area comprises an MCU chip and a system base chip; each power supply area comprises a power supply chip; monitoring the power supply working state of each power supply area comprises the following steps:
the control system basic chip executes self-checking operation;
if the self-checking operation is successfully executed, the control system basic chip supplies power to the MCU chip to execute the power-on operation;
the MCU chip is controlled to execute power-on operation on the power supply chip in the power supply area of the computing processing module, the power supply chip in the power supply area of the peripheral computing processing module and the power supply chip in the power supply area of the external interaction module according to the sequence corresponding to the time sequence instruction;
if the power supply areas are electrified successfully, monitoring the power supply working state of the MCU chip;
and monitoring the power supply working states of all the other power supply areas.
6. The method of claim 5, wherein controlling the MCU chip to perform power-up operations on the power chip in the power supply area of the computing processing module, the power chip in the power supply area of the computing processing module peripheral device, and the power chip in the power supply area of the external interaction module in an order corresponding to the timing instructions, comprises:
in the process of controlling power supply chips of all power supply areas to perform power-on operation according to a time sequence instruction, detecting whether power good signals of the power supply chips are normal or not in a set period;
if the power good signals in the set period are all high level, the power good signals of the power supply chip are normal; and controlling a power supply chip of the next power supply area to execute power-on operation according to the sequence corresponding to the time sequence instruction;
if the power good signals in the set period are all low level, the power good signals of the power supply chips are abnormal, and a restarting instruction is sent to the power supply chips in the corresponding power supply areas so as to reset.
7. The method of claim 5, wherein monitoring the power operation state of the MCU chip comprises:
controlling the MCU chip to send a dog feeding signal to the system base chip at intervals of a first set time length;
if the system basic chip receives the dog feeding signal, the power supply working state of the MCU chip is normal;
and if the system base chip does not receive the dog feeding signal, resetting the MCU chip.
8. The method of claim 5, wherein monitoring the power operation status of each remaining power supply area comprises:
controlling power supply chips in other power supply areas to send power good signals to the MCU chip;
if the MCU chip continuously sets times to detect that the power good signal is of low level, the power supply working state of the corresponding power supply chip is abnormal, and restarting the corresponding power supply chip;
if the MCU chip continuously sets times to detect that the power good signal is at a high level, the power supply working state of the corresponding power supply chip is normal.
9. The method of claim 5, wherein the compute processing module power region comprises a SoC chip; monitoring a power supply working state of a power supply area of a computing processing module, including:
the SoC chip is controlled to send heartbeat signals to the MCU chip at intervals of a second set time length;
if the MCU chip detects a heartbeat signal, the power supply working state of the SoC chip is normal;
if the MCU chip does not detect the heartbeat signal, the power supply working state of the SoC chip is abnormal, and the SoC chip is restarted.
10. A power supply device of a cabin controller is characterized in that,
the grouping module is used for grouping the chips in the cabin area controller according to multiple dimensions to obtain multiple power supply areas; wherein, a group of chips corresponds to a power supply area;
and the power supply module is used for supplying power to the chips in the power supply areas based on the dimensions.
11. An electronic device, the electronic device comprising:
one or more processors;
storage means for storing one or more programs,
the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the method of powering a cabin controller as claimed in any one of claims 1-9.
12. A storage medium containing computer executable instructions which when executed by a computer processor are for performing a method of powering a cabin controller according to any one of claims 1 to 9.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311025845.1A CN117002424A (en) | 2023-08-15 | 2023-08-15 | Power supply method, device, equipment and storage medium for cabin domain controller |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311025845.1A CN117002424A (en) | 2023-08-15 | 2023-08-15 | Power supply method, device, equipment and storage medium for cabin domain controller |
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| CN117002424A true CN117002424A (en) | 2023-11-07 |
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| CN202311025845.1A Pending CN117002424A (en) | 2023-08-15 | 2023-08-15 | Power supply method, device, equipment and storage medium for cabin domain controller |
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| Country | Link |
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| CN (1) | CN117002424A (en) |
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