CN115586927A - Off-peak power-on method, device, equipment and storage medium for server - Google Patents

Off-peak power-on method, device, equipment and storage medium for server Download PDF

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Publication number
CN115586927A
CN115586927A CN202211305851.8A CN202211305851A CN115586927A CN 115586927 A CN115586927 A CN 115586927A CN 202211305851 A CN202211305851 A CN 202211305851A CN 115586927 A CN115586927 A CN 115586927A
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power
power supply
signal
supply signal
time delay
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姚志金
曹俊标
聂华
黄建新
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Zhongke Controllable Information Industry Co Ltd
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Zhongke Controllable Information Industry Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/28Supervision thereof, e.g. detecting power-supply failure by out of limits supervision

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  • Theoretical Computer Science (AREA)
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  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

The invention discloses a server off-peak power-on method, device, equipment and storage medium, and relates to the technical field of servers. The method comprises the following steps: monitoring level states of the first power supply signal and the second power supply signal in response to a power-on operation; determining the corresponding starting-up time delay of the current server according to the jump time difference of the level state between the first power supply signal and the second power supply signal; and controlling the off-peak power-up of the current server according to the starting time delay. By adopting the technical scheme, the off-peak power-up of the server can be realized on the basis of controlling the labor cost and the software cost.

Description

Server off-peak power-on method, device, equipment and storage medium
Technical Field
The invention relates to the technical field of servers, in particular to a server off-peak power-on method, device, equipment and storage medium.
Background
With the rapid development of technologies such as cloud computing internet, in order to meet the demand of larger and larger computing amount, internet enterprises need to deploy a large number of high-performance servers in an information service center and a data computing and storing center.
When a large number of servers in a machine room are started simultaneously, the peak value of the generated instantaneous impact current is large, and the pressure on a Power Distribution Unit (PDU for short) and an air switch is large, so that the PDU and the air switch are prone to faults.
In order to solve the above problem, a common manner in the prior art is to perform delayed power-on, for example, performing delayed power-on a server in a computer room in batches or performing server off-peak power-on through a power supply FIRMWARE. The batch time delay power-on mode needs manual batch management, which increases labor cost, and the off-peak power-on through the power supply FIRMWARE needs time delay management according to the power supply FIRMWARE version, which increases software development and maintenance cost.
Disclosure of Invention
The invention provides a method, a device, equipment and a storage medium for off-peak power-up of a server, which can realize off-peak power-up of the server on the basis of controlling the labor cost and the software cost.
According to an aspect of the present invention, there is provided a server off-peak power-up method, including:
monitoring level states of the first power supply signal and the second power supply signal in response to a power-on operation;
determining the starting-up time delay corresponding to the current server according to the jump time difference of the level state between the first power supply signal and the second power supply signal;
and controlling the off-peak power-up of the current server according to the starting time delay.
Optionally, determining a power-on delay corresponding to the current server according to the level states of the first power signal and the second power signal includes:
determining a random value corresponding to the current server according to the jump time difference of the level state between the first power supply signal and the second power supply signal;
and determining the starting time delay corresponding to the current server according to the random numerical value. And generating a random value corresponding to the server according to the jump time difference of the level state between the first power supply signal and the second power supply signal, and further determining the starting time delay according to the random value without additionally configuring hardware equipment such as a random number generator and the like, so that the delayed starting of the server can be realized on the premise of saving the cost.
Optionally, determining a random value corresponding to the current server according to a jump time difference of a level state between the first power signal and the second power signal, including:
at the set moment of each clock period, if the first power supply signal is in a high level state and the second power supply signal is in a low level state, accumulating the count value; the set time is the rising edge or the falling edge of the clock;
and if the first power supply signal and the second power supply signal are both in a high level state, stopping the operation of accumulating the count value, and taking the current count value as a random numerical value corresponding to the current server. Due to slight differences among main board components of different servers, the time difference of signals of all the servers is different, the time difference of a first power supply signal and a second power supply signal is counted through an internal clock period, a random value corresponding to the time difference is obtained to determine the starting time delay of the servers, the random value corresponding to all the servers is generated by utilizing the time difference of the signals of the servers, devices for generating the random value or counting are not required to be specially arranged, and the hardware cost of the servers on the wrong peak is reduced.
Optionally, determining the startup delay corresponding to the current server according to the random value includes:
determining the effective digit of the starting-up time delay according to the allowable starting-up time delay range;
and taking the lowest bit of the random numerical value as a starting point, obtaining target data of the significant digit in the random numerical value in a reverse order, and taking the target data as the starting time delay corresponding to the current server. The effective digit of the startup time delay is determined based on the allowable startup time delay range, the startup time delay adopted during off-peak power-on can be flexibly controlled, and the influence of the overlong startup time delay on the normal work of the server is avoided.
Optionally, the first power signal is a voltage stabilization signal PGD _ P3V3_ STBY, and the second power signal is a standby voltage signal PGD _ P0_ VDDCR _ SOC _ S5. The starting time delay of the current server is determined through the voltage stabilizing signal and the standby voltage signal, and the delayed starting of the server can be realized without changing an original hardware system.
Optionally, controlling the off-peak power-up of the current server according to the startup delay includes:
jumping from a low level state to a high level state in response to a power supply control signal, and controlling the current server to be powered on at an off-peak state according to the starting time delay; the power control signal jumps from a low level state to a high level state in response to a power-on command. After the power supply control signal is received and jumps to a high level signal, the servers are controlled to be started according to the starting time delay, the starting time delay of each server is different, peak staggering power-on is realized, and the stability of the power supply load is ensured.
According to another aspect of the present invention, there is provided a server off-peak power-on device, including:
the power supply control device comprises a level state acquisition module, a power supply control module and a power supply control module, wherein the level state acquisition module is used for responding to power supply connection operation and monitoring the level states of a first power supply signal and a second power supply signal;
the starting-up time delay determining module is used for determining the starting-up time delay corresponding to the current server according to the jump time difference of the level state between the first power supply signal and the second power supply signal;
and the peak shifting power-on module is used for controlling the peak shifting power-on of the current server according to the starting time delay.
Optionally, the startup delay determining module includes:
a random value determining unit, configured to determine a random value corresponding to the current server according to a jump time difference of a level state between the first power signal and the second power signal;
and the starting time delay determining unit is used for determining the starting time delay corresponding to the current server according to the random value.
Optionally, the random number determining unit is specifically configured to:
at the set time of each clock period, if the first power supply signal is in a high level state and the second power supply signal is in a low level state, accumulating the count value; the set time is the rising edge or the falling edge of the clock;
and if the first power supply signal and the second power supply signal are both in a high level state, stopping the operation of accumulating the count value, and taking the current count value as a random numerical value corresponding to the current server.
Optionally, the startup delay determining unit is specifically configured to:
determining the effective digit of the starting-up time delay according to the allowable starting-up time delay range;
and taking the lowest bit of the random number value as a starting point, obtaining target data of the significant digits in the random number value in a reverse order, and taking the target data as the starting time delay corresponding to the current server.
Optionally, the first power signal is a voltage stabilization signal PGD _ P3V3_ STBY, and the second power signal is a standby voltage signal PGD _ P0_ VDDCR _ SOC _ S5.
Optionally, the peak staggering power-on module is specifically configured to:
jumping to a high level state from a low level state in response to a power supply control signal, and controlling the off-peak power-up of the current server according to the starting-up time delay; the power control signal jumps from a low level state to a high level state in response to a power-on command.
According to another aspect of the present invention, there is provided an electronic apparatus including:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,
the memory stores a computer program executable by the at least one processor, the computer program being executable by the at least one processor to enable the at least one processor to perform the server off-peak power-up method according to any of the embodiments of the present invention.
According to another aspect of the present invention, there is provided a computer-readable storage medium storing computer instructions for causing a processor to implement the server off-peak power-up method according to any one of the embodiments of the present invention when executed.
According to the technical scheme of the embodiment of the invention, the level states of the first power supply signal and the second power supply signal are monitored in response to the power-on operation, the corresponding power-on time delay of the current server is determined according to the level states of the first power supply signal and the second power supply signal, the peak-off power-on of the current server is finally controlled according to the power-on time delay, the power-on time delay is determined according to the level states of different power supply signals when the power supply is switched on, the peak-off power-on of the server is realized, no additional hardware equipment is required, and the peak-off power-on of the server with low cost is realized.
It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present invention, nor do they necessarily limit the scope of the invention. Other features of the present invention will become apparent from the following description.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a flowchart of a method for off-peak power-up of a server according to an embodiment of the present invention;
fig. 2 is a flowchart of a method for off-peak power-up of a server according to an embodiment of the present invention;
fig. 3 is a flowchart of a method for powering up a server in a peak-off manner according to an embodiment of the present invention;
fig. 4a is a flowchart of a method for off-peak power-up of a server according to an embodiment of the present invention;
FIG. 4b is a timing diagram of an input signal according to an embodiment of the present invention;
FIG. 4c is a block diagram of a server off-peak power-up hardware according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a server off-peak power-on device according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of an electronic device implementing the off-peak power-up method for the server according to the embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Moreover, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Fig. 1 is a flowchart of a server peak shifting power-on method according to an embodiment of the present invention, which is applicable to performing peak shifting power-on a server according to level states of different power signals when a power supply is powered on. As shown in fig. 1, the method includes:
and S110, responding to the power-on operation, and monitoring the level states of the first power supply signal and the second power supply signal.
The level states of the first and second power signals transition based on a power-on operation, and the level transitions of the first and second power signals have a time difference. The level states of the first power supply signal and the second power supply signal may each include a high level state and a low level state.
For example, after the server is powered on, the first power signal jumps from low level to high level first, and after a period of time, the second power signal jumps from low level to high level. In a specific example, the first power signal is the voltage stabilization signal PGD _ P3V3_ STBY, and the second power signal is the standby voltage signal PGD _ P0_ VDDCR _ SOC _ S5.
In the embodiment of the present invention, after the server is powered on, a Complex Programmable Logic Device (CPLD) starts to continuously monitor the level states of the first power signal and the second power signal. Specifically, the CPLD periodically obtains the level states of the first power supply signal and the second power supply signal according to the internal clock.
In a specific example, where the internal clock frequency of the CPLD is 8M, then 125ns per clock cycle, the CPLD may acquire the level states of the first and second power signals on the rising edge of each clock cycle.
And S120, determining the corresponding starting time delay of the current server according to the jump time difference of the level state between the first power supply signal and the second power supply signal.
The boot time delay is used as a basis for performing delayed boot of the server, for example, if the boot time delay corresponding to a certain server is 5s, the server is booted after delaying for 5s after receiving the boot instruction. The startup time delays corresponding to different servers in the same machine room are different, and the startup of each server is controlled based on the startup time delays, so that peak-staggering power-up can be realized.
In the embodiment of the invention, after the server is powered ON and enters the AC ON state (the state of inserting the 220V power line), the CPLD starts to continuously acquire the level states of the first power signal and the second power signal. The first level signal and the second level signal jump after the server is powered on, and the jump time is different. The starting-up time delay corresponding to the current server can be determined according to the jump time difference of the level state between the first level signal and the second level signal. Specifically, the startup delay may be calculated by a preset linear or nonlinear algorithm according to the jump time difference, the jump time difference between the first level signal and the second level signal may be counted by an internal clock of the CPLD, and the startup delay of the current server may be determined according to a counting result.
Because the mainboard components of different servers have slight differences due to factors such as production process, the jump time difference between the first level signal and the second level signal of each server mainboard is different. Different starting time delays can be determined for different servers according to different jump time differences, and therefore peak staggering power-on of the servers is achieved.
In addition, at present, a way that the server uses the CPLD for timing control is widely used, and the first power signal and the second power signal are both common signals when the server AC is powered on. According to the scheme, the CPLD uses the first power supply signal and the second power supply signal to generate the starting time delay corresponding to each server, and off-peak power-up under the condition that the existing hardware design is not changed is achieved.
In a specific example, the first power signal is a voltage stabilization signal PGD _ P3V3_ STBY, the second power signal is a standby voltage signal PGD _ P0_ VDDCR _ SOC _ S5, the first power signal jumps from a low level state to a high level state after the server is powered on, and the second power signal jumps from the low level state to the high level state after a period of time. After the server is powered on, the CPLD starts monitoring the level states of the first power supply signal and the second power supply signal, and specifically, the CPLD acquires the level states of the first power supply signal and the second power supply signal at each clock rising edge according to the internal clock. And when the first power supply signal jumps to a high level state and the second power supply signal still keeps a low level state before power-on, starting to accumulate the count value until the second power supply signal also jumps to the high level state, stopping accumulation, and taking the current count value as a random value corresponding to the current server. And finally, calculating to obtain the corresponding starting time delay of the current server according to the random numerical value.
And S130, controlling the off-peak power-up of the current server according to the starting time delay.
In the embodiment of the invention, after the startup delay of the current server is determined, the CPLD can control the off-peak power-up of the current server according to the startup delay. Specifically, after the server receives the power-on command, the CPU of the server controls the power control signal CPU1_ SLP _ S5# to jump from the low level to the high level. The CPLD starts timing when monitoring that the Power control signal jumps to high level, and sends a Power supply starting signal to a Power Supply Unit (PSU) after the timing reaches a startup delay corresponding to the current server, so as to realize off-peak Power-up of the server.
The power-on command may be initiated by the user by pressing a power button of the server or sending a power-on command through the remote device, or may be initiated according to a timing power-on command of the user, which is not specifically limited herein.
According to the technical scheme of the embodiment of the invention, the level states of the first power supply signal and the second power supply signal are monitored in response to power-on operation, the starting time delay corresponding to the current server is determined according to the jump time difference of the level states between the first power supply signal and the second power supply signal, the off-peak power-on of the current server is controlled according to the starting time delay, the starting time delay is determined according to the level states of different power supply signals when the power supply is switched on, the off-peak power-on of the server is realized, no additional hardware equipment is needed, and the low-cost off-peak power-on of the server is realized.
Fig. 2 is a flowchart of a peak-staggered power-on method for a server according to an embodiment of the present invention, which is further detailed based on the foregoing embodiment and provides specific steps for determining a power-on delay corresponding to a current server according to level states of a first power signal and a second power signal. As shown in fig. 2, the method includes:
and S210, monitoring the level states of the first power supply signal and the second power supply signal in response to the power-on operation.
And S220, determining a random value corresponding to the current server according to the jump time difference of the level state between the first power supply signal and the second power supply signal.
In the embodiment of the invention, the CPLD can acquire the jump time difference of the level states between the first power supply signal and the second power supply signal by monitoring the level states of the first power supply signal and the second power supply signal, and further determine the random value corresponding to the current server through the jump time difference. Specifically, the CPLD may determine the random value corresponding to the current server according to a correspondence between the jump time difference and the random value. The CPLD can also acquire a first power supply signal and a second power supply signal at the rising edge of each clock cycle, and under the condition that the first power supply signal is monitored to jump and the second power supply signal is not jumped, the CPLD starts to accumulate the count value until the second power supply signal also jumps, stops accumulating and takes the current count value as a random value corresponding to the current server.
In a specific example, after the server is powered on, the CPLD starts to monitor the level states of the first power supply signal and the second power supply signal, and specifically, the CPLD acquires the level states of the first power supply signal and the second power supply signal at each clock rising edge according to the internal clock. And when the first power supply signal jumps to a high level state and the second power supply signal still keeps a low level state before power-on, starting to accumulate the count value until the second power supply signal also jumps to the high level state, stopping accumulation, and taking the current count value as a random value corresponding to the current server. The first level signal and the second level signal jump after the server is powered on, and the jump time is different.
Optionally, determining a random value corresponding to the current server according to a jump time difference of a level state between the first power signal and the second power signal, including:
at the set time of each clock period, if the first power supply signal is in a high level state and the second power supply signal is in a low level state, accumulating the count value; the set time is the rising edge or the falling edge of the clock;
and if the first power supply signal and the second power supply signal are both in a high level state, stopping the operation of accumulating the count value, and taking the current count value as a random numerical value corresponding to the current server.
In this optional embodiment, a specific manner for determining a random number corresponding to a current server according to a transition time difference of a level state between a first power signal and a second power signal is provided: at the set time of each clock cycle, if the first power supply signal jumps to a high level signal and the second power supply signal continues to keep a low level state, the initial count value is accumulated. And repeatedly executing the operation until the second power supply signal is monitored to jump to a high level state, stopping the operation of accumulating the count value, and taking the current count value as a random value corresponding to the current server.
In one specific example, on the rising edge of each clock cycle, if the first power supply signal jumps to a high signal and the second power supply signal continues to remain in a low state, the initial count value is accumulated. And repeatedly executing the operation until the second power supply signal is monitored to jump to a high level state, stopping the operation of accumulating the count value, and taking the current count value as a random numerical value corresponding to the current server. Similarly, the counting operation may be performed at the falling edge of each clock cycle to obtain a random value corresponding to the current server.
And S230, determining the starting time delay corresponding to the current server according to the random numerical value.
In the embodiment of the invention, after the random value corresponding to the current server is determined, the starting time delay corresponding to the current server is determined according to the random value. Specifically, the random values are stored in a binary form, a value with a set bit number can be selected from the random values as a target value, and decimal data obtained by converting the target value is directly used as the starting time delay.
Optionally, determining the startup delay corresponding to the current server according to the random value includes:
determining the effective digit of the starting-up time delay according to the allowable starting-up time delay range;
and taking the lowest bit of the random numerical value as a starting point, obtaining target data of the significant digits in the random numerical value in a reverse order, and taking the target data as the starting time delay corresponding to the current server.
In this optional embodiment, a specific manner for determining the boot time delay corresponding to the current server according to the random value is provided: first, the significant bit number of the boot delay is determined according to the allowed boot delay range, for example, if the allowed boot delay range is 0-127s, the significant bit number of the binary system is 7 bits. Further, the lowest bit of the binary random number value is used as a starting point, the target data of the significant digits are obtained in the random number value in a reverse order, and the target data is used as the starting time delay corresponding to the current server. The starting time delay effective digit can be flexibly controlled according to the allowable starting time delay range, so that the starting time delays of the servers are inconsistent, off-peak power-up is realized, the starting time delay of each server is ensured not to exceed the allowable starting time delay range, and the influence on the normal work of the servers due to overlong starting time delay is avoided.
In a specific example, the calculated random value is represented as 1111001110 in a binary form, and according to the allowable startup delay range of 0-127s, the significant bit of the startup delay is 7 bits, and at this time, the target data of the next 7 bits may be selected from the random values as the startup delay corresponding to the current server, that is, 1001110 is selected as the target data, and the target data is converted into a decimal system, so as to obtain the startup delay of the server.
And S240, controlling the off-peak power-up of the current server according to the starting time delay.
According to the technical scheme of the embodiment of the invention, the level states of the first power supply signal and the second power supply signal are monitored in response to power-on operation, the random value corresponding to the current server is determined according to the jump time difference of the level states between the first power supply signal and the second power supply signal, the starting time delay corresponding to the current server is determined according to the random value, the off-peak power-up of the current server is controlled finally according to the starting time delay, the starting time delay is determined by utilizing the level jump time difference between the original power supply signals, and the off-peak power-up of the low-cost server can be realized without adding other hardware equipment.
Fig. 3 is a flowchart of a server off-peak power-up method according to an embodiment of the present invention, which is further detailed based on the above embodiment, and provides specific steps for controlling the current server off-peak power-up according to the startup delay. As shown in fig. 3, the method includes:
and S310, acquiring the level states of the first power supply signal and the second power supply signal in response to the power-on operation.
Optionally, the first power signal is a voltage stabilization signal PGD _ P3V3_ STBY, and the second power signal is a standby voltage signal PGD _ P0_ VDDCR _ SOC _ S5.
The PGD _ P3V3_ STBY is a Power Good signal of the P3V3_ STBY in the S5 state (the state that the server is powered on and powered off), and the PGD _ P0_ VDDCR _ SOC _ S5 is a Power Good signal of one Power required by the CPU in the S5 state.
And S320, determining a random value corresponding to the current server according to the jump time difference of the level state between the first power supply signal and the second power supply signal.
And S330, determining the starting time delay corresponding to the current server according to the random numerical value.
S340, responding to a power supply control signal, jumping from a low level state to a high level state, and controlling the off-peak power-up of the current server according to the startup time delay; the power control signal jumps from a low state to a high state in response to a power-on command.
The power control signal is a wake-up signal of the S5 state of the server, i.e., the CPU will pull up the power control signal CPU1_ SLP _ S5# of the server after receiving the power-on command.
In the embodiment of the invention, the CPLD starts timing when monitoring that the power supply control signal jumps from a low level state to a high level state, and sends a power supply starting signal PS _ ON to the PSU after the timing reaches the startup delay, so that the off-peak power-up of the server is realized.
According to the technical scheme of the embodiment of the invention, the level states of the first power signal and the second power signal are obtained in response to the power-on operation, the random value corresponding to the current server is determined according to the jump time difference of the level states between the first power signal and the second power signal, the starting time delay corresponding to the current server is determined according to the random value, the power control signal is finally responded to jump from the low level state to the high level state, the off-peak power-on of the current server is controlled according to the starting time delay, and the off-peak power-on effect of the server in the machine room is realized under the condition that other hardware equipment is not added.
Fig. 4a is a flowchart of a server off-peak power-up method according to an embodiment of the present invention, and as shown in fig. 4a, the method includes:
and S410, when the server is powered on, the CPLD acquires the level states of PGD _ P3V3_ STBY and PGD _ P0_ VDDCR _ SOC _ S5 at the rising edge of each clock.
S420, when PGD _ P3V3_ STBY =1 and PGD _ P0_ VDDCR _ SOC _ S5=0, at a rising edge of each clock, for adding 1 to the count value.
And S430, when the PGD _ P3V3_ STBY =1 and the PGD _ P0_ VDDCR _ SOC _ S5=1 are monitored, stopping the accumulation operation of the count value, and taking the current count value as a random value corresponding to the current server.
In the embodiment of the present invention, the signal input timing based on the CPLD is shown in fig. 4b, where CLK is an internal clock signal of the CPLD, PGD _ P3V3_ STBY and PGD _ P0_ VDDCR _ SOC _ S5 are signals that will jump from a low level state to a high level state after the server is powered on, and the jump times of the two are different, and PGD _ P3V3_ STBY jumps to a high level before PGD _ P0_ VDDCR _ SOC _ S5. The CPU1_ SLP _ S5# transitions to the high state after receiving the power-on signal in the S5 state.
The CPLD acquires the level states of PGD _ P3V3_ STBY and PGD _ P0_ VDDCR _ SOC _ S5 at each clock rising edge, and when the PGD _ P3V3_ STBY is detected to jump to a high level state and no jump occurs in the PGD _ P0_ VDDCR _ SOC _ S5, the count values are accumulated until the PGD _ P0_ VDDCR _ SOC _ S5 also jumps to a high level state, accumulation is stopped, and the count values at the moment are used as random values corresponding to the current server.
S440, extracting the value of the set digit from the random value, and taking the extracted value as the boot time delay.
And S450, when the power supply control signal is monitored to jump from the low level state to the high level state, controlling the current server to be powered on in a peak staggering manner according to the starting time delay.
The hardware structure of the server peak staggering power-on method provided by the embodiment of the invention is shown in fig. 4c, wherein a CPLD determines the power-on time delay corresponding to the current server according to the input level states of PGD _ P3V3_ STBY and PGD _ P0_ VDDCR _ SOC _ S5, and then controls the server peak staggering power-on according to the power-on time delay after receiving the level hopping signal of CPU1_ SLP _ S5 #. Specifically, a PS _ ON signal is sent to the PSU to perform server boot operation.
In the embodiment of the invention, when the CPU of the server receives a starting instruction, the CPU1_ SLP _ S5# is pulled to a high level, the CPLD monitors that the CPU1_ SLP _ S5# jumps to a high level state, and after delaying according to the starting time delay, the CPLD sends a PS _ ON signal to the PSU to carry out the starting operation of the server.
According to the technical scheme of the embodiment of the invention, the level states of the first power supply signal and the second power supply signal are monitored in response to power-on operation, the starting time delay corresponding to the current server is determined according to the jump time difference of the level states between the first power supply signal and the second power supply signal, the off-peak power-on of the current server is controlled according to the starting time delay, the starting time delay is determined according to the level states of different power supply signals when the power supply is switched on, the off-peak power-on of the server is realized, no additional hardware equipment is needed, and the low-cost off-peak power-on of the server is realized.
Fig. 5 is a schematic structural diagram of a peak shifting power-on device for a server according to an embodiment of the present invention.
As shown in fig. 5, the apparatus includes:
a level state acquisition module 510, configured to monitor level states of the first power signal and the second power signal in response to a power-on operation;
a power-on delay determining module 520, configured to determine a power-on delay corresponding to the current server according to a jump time difference between the first power signal and the second power signal;
and a peak shifting power-on module 530, configured to control the current server to power on at the peak shifting power-on according to the power-on delay.
According to the technical scheme of the embodiment of the invention, the level states of the first power supply signal and the second power supply signal are monitored in response to the power supply connection operation, the corresponding power-on time delay of the current server is determined according to the jump time difference of the level states between the first power supply signal and the second power supply signal, finally, the power-on time delay is controlled according to the power-on time delay, the power-on time delay is determined according to the level states of different power supply signals when the power supply is connected, the power-on time delay is realized, the power-on off time delay of the server is realized, additional hardware equipment is not required, and the power-on off time delay of the server is realized at low cost.
Optionally, the boot delay determining module 520 includes:
a random value determining unit, configured to determine a random value corresponding to the current server according to a jump time difference of a level state between the first power signal and the second power signal;
and the starting time delay determining unit is used for determining the starting time delay corresponding to the current server according to the random value.
Optionally, the random number determining unit is specifically configured to:
at the set moment of each clock period, if the first power supply signal is in a high level state and the second power supply signal is in a low level state, accumulating the count value; the set time is the rising edge or the falling edge of the clock;
and if the first power supply signal and the second power supply signal are both in a high level state, stopping the operation of accumulating the count value, and taking the current count value as a random numerical value corresponding to the current server.
Optionally, the startup delay determining unit is specifically configured to:
determining the effective digit of the starting-up time delay according to the allowable starting-up time delay range;
and taking the lowest bit of the random number value as a starting point, obtaining target data of the significant digits in the random number value in a reverse order, and taking the target data as the starting time delay corresponding to the current server.
Optionally, the first power signal is a voltage stabilization signal PGD _ P3V3_ STBY, and the second power signal is a standby voltage signal PGD _ P0_ VDDCR _ SOC _ S5.
Optionally, the peak staggering power-up module 530 is specifically configured to:
jumping to a high level state from a low level state in response to a power supply control signal, and controlling the off-peak power-up of the current server according to the starting-up time delay; the power control signal jumps from a low level state to a high level state in response to a power-on command.
The server off-peak power-up device provided by the embodiment of the invention can execute the server off-peak power-up method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
FIG. 6 illustrates a block diagram of an electronic device 10 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smart phones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 6, the electronic device 10 includes at least one processor 11, and a memory communicatively connected to the at least one processor 11, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, and the like, wherein the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various suitable actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data necessary for the operation of the electronic apparatus 10 may also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
A number of components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, or the like; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network such as the internet and/or various telecommunication networks.
Processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, or the like. The processor 11 performs the various methods and processes described above, such as the server off-peak power-up method.
In some embodiments, the server off-peak power-up method may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the server off-peak power-up method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the server off-peak power-up method by any other suitable means (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuitry, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), system on a chip (SOCs), complex Programmable Logic Devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, receiving data and instructions from, and transmitting data and instructions to, a storage system, at least one input device, and at least one output device.
Computer programs for implementing the methods of the present invention can be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be performed. A computer program can execute entirely on a machine, partly on a machine, as a stand-alone software package partly on a machine and partly on a remote machine or entirely on a remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. A computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic, speech, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the Internet.
The computing system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical host and VPS service are overcome.
It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present invention may be executed in parallel, sequentially, or in different orders, and are not limited herein as long as the desired result of the technical solution of the present invention can be achieved.
The above-described embodiments should not be construed as limiting the scope of the invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made, depending on design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (10)

1. A server off-peak power-up method is characterized by comprising the following steps:
monitoring level states of the first power supply signal and the second power supply signal in response to a power-on operation;
determining the starting-up time delay corresponding to the current server according to the jump time difference of the level state between the first power supply signal and the second power supply signal;
and controlling the off-peak power-up of the current server according to the starting time delay.
2. The method of claim 1, wherein determining the power-on delay corresponding to the current server according to the level states of the first power signal and the second power signal comprises:
determining a random value corresponding to the current server according to the jump time difference of the level state between the first power supply signal and the second power supply signal;
and determining the starting time delay corresponding to the current server according to the random numerical value.
3. The method of claim 2, wherein determining the random value corresponding to the current server according to a transition time difference between the level states of the first power signal and the second power signal comprises:
at the set moment of each clock period, if the first power supply signal is in a high level state and the second power supply signal is in a low level state, accumulating the count value; the set time is the rising edge or the falling edge of the clock;
and if the first power supply signal and the second power supply signal are both in a high level state, stopping the operation of accumulating the count value, and taking the current count value as a random numerical value corresponding to the current server.
4. The method of claim 2, wherein determining the boot-up delay corresponding to the current server according to the random number comprises:
determining the effective digit of the starting-up time delay according to the allowable starting-up time delay range;
and taking the lowest bit of the random numerical value as a starting point, obtaining target data of the significant digit in the random numerical value in a reverse order, and taking the target data as the starting time delay corresponding to the current server.
5. The method of claim 1, wherein the first power signal is a voltage stabilization signal PGD _ P3V3_ STBY and the second power signal is a standby voltage signal PGD _ P0_ VDDCR _ SOC _ S5.
6. The method of claim 1, wherein controlling the off-peak power-up of the current server according to the power-on delay comprises:
jumping to a high level state from a low level state in response to a power supply control signal, and controlling the off-peak power-up of the current server according to the starting-up time delay; the power control signal jumps from a low level state to a high level state in response to a power-on command.
7. An off-peak power-up device for a server, comprising:
the level state monitoring module is used for responding to power-on operation and monitoring the level states of the first power supply signal and the second power supply signal;
the starting-up time delay determining module is used for determining the starting-up time delay corresponding to the current server according to the jump time difference of the level state between the first power supply signal and the second power supply signal;
and the peak staggering power-on module is used for controlling the current server to carry out peak staggering power-on according to the starting time delay.
8. The apparatus of claim 7, wherein the boot latency determining module comprises:
a random value determining unit, configured to determine a random value corresponding to the current server according to a jump time difference of a level state between the first power signal and the second power signal;
and the starting time delay determining unit is used for determining the starting time delay corresponding to the current server according to the random value.
9. An electronic device, characterized in that the electronic device comprises:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the server off-peak power-up method of any one of claims 1-6.
10. A computer readable storage medium having stored thereon computer instructions for causing a processor to execute a method for off-peak power-up of a server according to any one of claims 1-6.
CN202211305851.8A 2022-10-24 2022-10-24 Off-peak power-on method, device, equipment and storage medium for server Pending CN115586927A (en)

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