CN116995733A - Multiple buffer system and calculation method of flyback miniature grid-connected inverter - Google Patents
Multiple buffer system and calculation method of flyback miniature grid-connected inverter Download PDFInfo
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- CN116995733A CN116995733A CN202311251358.7A CN202311251358A CN116995733A CN 116995733 A CN116995733 A CN 116995733A CN 202311251358 A CN202311251358 A CN 202311251358A CN 116995733 A CN116995733 A CN 116995733A
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
- H02J3/381—Dispersed generators
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
- H02M1/34—Snubber circuits
- H02M1/346—Passive non-dissipative snubbers
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
- H02M3/33523—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2300/00—Systems for supplying or distributing electric power characterised by decentralized, dispersed, or local generation
- H02J2300/20—The dispersed energy generation being of renewable origin
- H02J2300/22—The renewable source being solar energy
- H02J2300/24—The renewable source being solar energy of photovoltaic origin
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/56—Power conversion systems, e.g. maximum power point trackers
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
- Inverter Devices (AREA)
Abstract
The invention discloses a multiple buffer system of a flyback miniature grid-connected inverter, which comprises a first output node, a second output node, a third output node and a buffer inductor L 0 Buffer capacitor C 0 Buffer diode D 0 M capacitors C x And diode D 1x CD module and m group capacitor D 2x And m groups of capacitances D 3x X=1, 2 … m, can reduce the time of switching between high frequency transformer primary and secondary electric current, reduce the influence to the electric wire netting electric current, reduce harmonic content. Also discloses a device with the saidThe flyback miniature grid-connected inverter topological structure of the multiple buffer system comprises a photovoltaic power supply absorption conversion unit, a multiple buffer system, a direct current-direct current conversion unit, a direct current-alternating current conversion unit and a grid-connected unit, and the energy of leakage inductance of the high-frequency transformer is absorbed to the greatest extent and recovered; the method for calculating the reduction of the harmonic wave is also disclosed, and the cause of the harmonic wave and the reduction method can be deduced by using an accurate mathematical method.
Description
Technical Field
The invention relates to the technical field of solar photovoltaic grid-connected inverters, in particular to a multiple buffer system of a flyback micro grid-connected inverter and a calculation method.
Background
The solar photovoltaic grid-connected inverter is widely used in flyback structure at present and has the advantages of simple structure, stability and reliability. The leakage inductance of the high-frequency transformer of the flyback grid-connected inverter can cause the defects of high voltage stress and low energy loss efficiency of a switching device in actual operation. An LCD buffer absorption circuit is generally used for absorbing and recovering energy, but the conventional LCD buffer circuit can prolong the switching time between the primary current and the secondary current of the high-frequency transformer, increase the effective value of the secondary current of the high-frequency transformer, cause the influence on the current of the power grid, and increase the harmonic content.
Therefore, a multiple buffer structure of a photovoltaic flyback miniature grid-connected inverter needs to be designed, the switching time between primary and secondary currents of a high-frequency transformer is reduced, and meanwhile, a specific calculation method for reducing harmonic waves needs to be provided, so that the reasons for harmonic wave formation can be solved, and a solution is provided.
Disclosure of Invention
The invention aims to solve the technical problem of providing a multiple buffer system and a calculation method of a flyback miniature grid-connected inverter, which ensure that low-content current harmonic waves are output.
In order to solve the technical problems, the first technical scheme adopted by the invention is as follows: the multiple buffer system comprises a first output node, a second output node, a third output node, and a buffer inductance L 0 Buffer capacitor C 0 Buffer diode D 0 ；
Also comprises m capacitors C x (x=1, 2 … m) and diode D 1x (x=1, 2 … m) of CD modules, each CD moduleCapacitor C x One end is an interface, the other end is connected with the cathode of the diode D1x, and the connection point is a node i x (x=1, 2 … m), diode D 1x The positive electrode is another interface, which is node j x (x=1,2…m)；
Also comprises m groups of capacitances D 2x (x=1, 2 … m) and m groups of capacitances D 3x (x=1, 2 … m), m groups of capacitances D 2x The anodes are all connected with the buffer diode D 0 Positive electrode of m groups of capacitors D 2x The negative electrode is connected with the corresponding node j x Applying; m groups of capacitances D 3x The cathodes are connected to the interface 3, and the m groups of capacitors D 3x The positive electrode is connected with the corresponding node i x Applying;
buffer inductance L 0 One end of the buffer diode is connected with the second output node, and the other end of the buffer diode is connected with the buffer diode D 0 Positive electrode, buffer diode D 0 The negative electrode is connected with the first output node, the buffer capacitor C 0 One end is connected with the third output node, and the other end is connected with the node j m And (3) upper part.
In order to solve the technical problems, a second technical scheme adopted by the invention is as follows: the flyback miniature grid-connected inverter topological structure with the multiple buffer system comprises a photovoltaic power supply absorption conversion unit, the multiple buffer system, a direct current-direct current conversion unit, a direct current-alternating current conversion unit and a grid-connected unit which are connected in sequence;
the photovoltaic power source absorption and conversion unit comprises a photovoltaic panel PV and a decoupling capacitor C at the direct current side pv ；
The DC-DC conversion unit comprises a high-frequency transformer T, a switch tube switch Q and an inductor L m 、L k Flyback rectifier diode D and filter capacitor C O Parasitic capacitance C Q The method comprises the steps of carrying out a first treatment on the surface of the Lm is the excitation inductance of the primary winding of the high frequency transformer T, L k Is the leakage inductance of the primary winding of the high-frequency transformer T, and a flyback rectifier diode D is connected in series with the synonym end of the secondary winding of the high-frequency transformer T, C O C is connected in parallel with two ends of the T secondary winding of the high-frequency transformer Q Is the parasitic capacitance of the switching tube Q;
the first output node of the multiple buffer system is connected with the positive electrode of the photovoltaic panel PV and the leakage inductance L k The second output node is connected with the cathode of the photovoltaic panel PV and the source electrode of the switching tube Q, and the third output node is connected with the synonym end of the primary coil of the high-frequency transformer T and the drain electrode of the switching tube Q.
In a preferred embodiment of the present invention, the DC-AC conversion unit includes a power switch S 1 、S 2 、S 3 、S 4 For the transformer secondary winding to be operated by the corresponding switch during the appropriate utility half cycle.
In a preferred embodiment of the present invention, the grid-connected unit includes an output filter inductance L f Output filter capacitor C f Grid G rid The current passes through L f And C f The structured low-pass filter is injected into the power grid.
In order to solve the technical problems, a third technical scheme adopted by the invention is as follows: the method for calculating the reduced harmonic based on the flyback micro grid-connected inverter topological structure with the multiple buffer system comprises the following steps:
firstly, charging energy generated by a PV board to a primary winding of a high-frequency transformer T, exciting an inductor L m And leakage inductance L k The phase at which the current rises linearly until the switching tube Q is turned off is defined as a first phase t 0 ≤t≤t 1 Time T （1） =t 1 -t 0 The method comprises the steps of carrying out a first treatment on the surface of the Excitation inductance Lm energy of high-frequency transformer T starts to transfer to the secondary winding side, buffering inductance L 0 Through diode D 0 The phase of returning to the power supply until the leakage inductance energy of the high-frequency transformer is exhausted is defined as a second phase t 1 ≤t≤t 2 Time T （2） =t 2 -t 1 ；
Then, according to the current variation of the primary winding of the high-frequency transformer T, the current variation is calculated to obtain:
；
then according to the same stage of the traditional LCD buffer circuit topology structure, the method is obtained
；
Finally, the second stage time ratio of the traditional LCD buffer circuit and the multiple buffer circuit under the condition that the switching tube Q has the same on time is calculated as follows
；
Wherein n is the turn ratio of the high-frequency transformer, and the larger the m value of the multiple buffer circuit is, the smaller the buffer time of the second stage is, and the smaller the waveform harmonic wave of the power grid output is.
The beneficial effects of the invention are as follows:
(1) The multiple buffer structure can reduce the switching time between the primary current and the secondary current of the high-frequency transformer, reduce the influence on the power grid current and reduce the harmonic content;
(2) The flyback miniature grid-connected inverter topological structure with the multiple buffer circuits can absorb and recover the energy of leakage inductance of the high-frequency transformer to the greatest extent;
(3) The calculation method for reducing the harmonic wave provided by the invention can deduce the cause of the harmonic wave and the reduction method by using an accurate mathematical method.
Drawings
FIG. 1 is a schematic diagram of the topology of a flyback micro grid-connected inverter with multiple buffer circuits according to the present invention;
FIG. 2 is a topological diagram of the multiple buffer system;
fig. 3 is a topology diagram of a multiple buffer circuit when m=1;
FIG. 4 is a timing diagram of four phases determined according to the switching state of the switching transistor Q and the current level of the snubber inductor;
FIG. 5 is stage t 0 ≤t≤t 1 An operation schematic diagram of the m=1 multiple buffer circuit;
FIG. 6 is stage t 1 ≤t≤t 2 An operation schematic diagram of the m=1 multiple buffer circuit;
FIG. 7 is stage t 2 ≤t≤t 3 An operation schematic diagram of the m=1 multiple buffer circuit;
FIG. 8 is stage t 3 ≤t≤t 4 An operation schematic diagram of the m=1 multiple buffer circuit;
FIG. 9 is a topology diagram of a conventional LCD buffer circuit;
FIG. 10 is a graph of the ratio s with V out /(nV in ) Is a schematic diagram of the variation relationship of (a).
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making clear and defining the scope of the present invention.
Referring to fig. 1 and 2, an embodiment of the present invention includes:
a flyback micro grid-connected inverter topological structure with a multiple buffer system comprises a photovoltaic power supply absorption conversion unit 10, a multiple buffer system 20, a direct current-direct current conversion unit 30, a direct current-alternating current conversion unit 40 and a grid-connected unit 50 which are connected in sequence.
The photovoltaic power absorption and conversion unit 10 comprises a photovoltaic panel PV and a decoupling capacitor C at the direct current side pv 。
The multiple buffer system 20, as shown in fig. 2, includes a first output node 1, a second output node 2, a third output node 3, and a buffer inductance L 0 Buffer capacitor C 0 Buffer diode D 0 . The first output node 1 is connected to the positive pole of the PV panel, the second output node 2 is connected to the negative pole of the PV panel, and the third output node 3 is connected between the high-frequency transformer T and the switching tube Q. Buffer inductance L 0 One end of the buffer diode is connected with the second output node 2, and the other end of the buffer diode is connected with the buffer diode D 0 Positive electrode, buffer diode D 0 The negative electrode is connected with the first output node 1, the buffer capacitor C 0 One end of the first signal is connected to the third output node 3, and the other end is connected to the node j m And (3) upper part.
The multiple buffer circuit link 20 includes m capacitors C simultaneously x (x=1, 2 … m) and diode D 1x (x=1, 2 … m) compositionIs a CD module of (c). Capacitance C in each CD module x One end is an interface and the other end is connected with a diode D 1x Cathode, diode D 1x The positive electrode is another interface; CD module internal capacitance C x And diode D 1x There is a node i between x (x=1, 2 … m) there is also a node j between two CD modules x (x=1,2…m)。
The multiple buffer circuit link 20 also includes m sets of capacitors D 2x (x=1, 2 … m) and m groups of capacitances D 3x (x=1, 2 … m). m groups of capacitances D 2x The anodes are all connected with the buffer diode D 0 Positive electrode of m groups of capacitors D 2x The negative electrode is connected with the corresponding node j x Applying; m groups of capacitances D 3x The cathodes are connected to the interface 3, and the m groups of capacitors D 3x The positive electrode is connected with the corresponding node i x And (3) upper part.
The DC-DC conversion unit 30 comprises a high-frequency transformer T, a switch tube switch Q operating at high frequency, and an inductor L m 、L k Flyback rectifier diode D and filter capacitor C O Parasitic capacitance C Q . A high frequency transformer T capable of providing electrical isolation while converting energy from the photovoltaic panel PV to an AC utility Grid, where Lm is the excitation inductance of the primary winding of the high frequency transformer T, L k Is the leakage inductance of the primary winding of the high-frequency transformer T, and a flyback rectifier diode D is connected in series with the synonym end of the secondary winding of the high-frequency transformer T, C O C is connected in parallel with two ends of the T secondary winding of the high-frequency transformer Q Is the parasitic capacitance of the switching tube Q.
Specifically, the first output node of the multiple buffer system 20 is connected to the positive electrode of the photovoltaic panel PV and the leakage inductance L k The second output node is connected with the cathode of the photovoltaic panel PV and the source electrode of the switching tube Q, and the third output node is connected with the synonym end of the primary coil of the high-frequency transformer T and the drain electrode of the switching tube Q.
The dc-ac conversion unit 40 includes a power switch tube S 1 、S 2 、S 3 、S 4 For the transformer secondary winding to be operated by the corresponding switch during the appropriate utility half cycle.
The grid-connected unit 50 includes an output filter inductance L f Output filter capacitor C f Grid G rid The current passes through L f And C f The structured low-pass filter is injected into the power grid.
The principle of operation of the multiple buffer circuit is analyzed as follows:
in this example, the topology of the multiple buffer circuit with m=1 is taken as an example for calculation and explanation.
As shown in fig. 3, the topology of the multiple buffer circuit with m=1 includes a buffer inductance L 0 Buffer capacitor C 0 Buffer diode D 0 A CD module (including capacitor C 1 And diode D 11 ) Capacitance D 21 And D 31 。
As shown in fig. 4, a first stage t 0 ≤t≤t 1 When t=t 0 The switching tube Q is turned on. Diode D at this time 0 And diode D 11 The voltage is reversely biased to turn off, diode D 21 And diode D 31 Opening. Capacitor C 0 And capacitor C 1 A parallel structure is formed, and the total voltage of the capacitor is Vc. The energy generated by the PV panel starts to charge the primary winding of the high-frequency transformer T, exciting the inductor L m And leakage inductance L k The current on the upper rises linearly. Until the switching tube Q is turned off, the circuit diagram is shown in fig. 5.
The current increasing and changing quantity of the primary winding of the high-frequency transformer T is
Buffer inductance L 0 The current increase variation of (2) is
Second stage t 1 ≤t≤t 2 When t=t 1 The switching tube Q is turned off. Diode D at this time 0 And diode D 11 On, diode D 21 And diode D 31 Reverse voltageBiased to turn off. Capacitor C 0 And capacitor C 1 A series structure is formed, and the total voltage of the capacitor is 2Vc. Exciting inductance L of high-frequency transformer T m Energy starts to transfer to the secondary winding side, the rectifier diode D is conducted, and the leakage inductance L k Upper energy to capacitance C 0 And capacitor C 1 Parasitic capacitance C of switching tube Q Charging, buffer inductance L 0 Through diode D 0 Returning to the power supply. The circuit diagram is shown in fig. 6 until the leakage inductance energy of the high-frequency transformer is exhausted.
The current reduction variation of the primary winding of the high frequency transformer T is
Where n is the turn ratio of the high frequency transformer.
So the time of this stage is
The current increasing variation of the primary winding of the high-frequency transformer T in the first stage is equal to the current decreasing variation in the second stage, namely
Is available in the form of
Third stage t 2 ≤t≤t 3 When t=t 2 The leakage inductance energy of the high-frequency transformer is exhausted. Diode D at this time 0 And diode D 11 The voltage is reversely biased to turn off, diode D 21 And diode D 31 Opening. Capacitor C 0 And capacitor C 1 Form a parallel structure, the total voltage of the capacitor is V c . Capacitor C 0 Capacitance C 1 Parasitic capacitance C of switching tube Q Buffer and bufferPunching inductance L 0 The energy of (2) is input to a power supply through a high-frequency main transformer, and the secondary winding of the high-frequency transformer outputs energy to the power grid side. The circuit diagram is shown in fig. 7 until the high-frequency transformer secondary winding current drops to zero.
At this time, buffer inductance L 0 The voltage is clamped at
Buffer inductance L 0 Upper current at t 2 ≤t≤t 3 The reduction change amount of the period is
The current variation of the primary winding of the high frequency transformer T is
Fourth stage t 3 ≤t≤t 4 When t=t 3 The secondary winding current of the high frequency transformer drops to zero. Diode D at this time 0 And diode D 11 The voltage is reversely biased to turn off, diode D 21 And diode D 31 Opening. Capacitor C 0 And capacitor C 1 Form a parallel structure, the total voltage of the capacitor is V c . The rectifier diode D is turned off. Until the switching tube Q is turned on again, the circuit diagram is shown in fig. 8.
At this time, the voltage on the primary winding of the high-frequency transformer is clamped
Buffer inductance L 0 Upper current at t 3 ≤t≤t 4 The change amount of the period is
The circuit is in steady state from the full period, the inductance L is buffered for one period 0 The current variation is zero, because of the second stage buffer inductance L 0 The amount of current change is small and can be considered zero. Then there is
For high frequency transformers, there is an inductance volt-second balance principle
Calculated to obtain
So there is
Thereby obtaining the buffer inductance L at each stage 0 The current change amount is
The second stage time is
The time of the stage is the time delay caused by LC resonance, so that the secondary side current of the high-frequency transformer forms a current climbing, the harmonic wave of the output current waveform is caused, and the quality of the power grid is influenced. It is apparent that the effective value of the second stage current can be reduced by reducing the time of the second stage, thereby reducing the impact on the current waveform of the existing network.
The topology of the conventional LCD buffer circuit is shown in FIG. 9, which is a common LCD buffer circuit, and only comprisesContaining buffer inductance L 0 Buffer capacitor C 0 Buffer diode D 0 . The operation process also has four identical stages. The second stage time is at this time
Considering that the time of the second stage in the actual running process is not less than zero, there are
It can be seen that
The ratio of the second stage time when the switching tube Q has the same on time is calculated as
FIG. 10 shows the ratio s with V out /(nV in ) The change relation of (2) can be seen with V out /(nV in ) The larger the ratio s, the smaller the second stage time of the m=1 multiple buffer circuit is, i.e. the smaller the effective value of the resonant current is, and the smaller the influence on the power grid is.
According to the principle analysis, the second stage time ratio of the traditional LCD buffer circuit to the multiple buffer circuit can be obtained
The larger the m value of the multi-buffer circuit is, the smaller the second-stage buffer time is, and the smaller the harmonic wave of the power grid output waveform is. The value of m can be actually selected according to the comprehensive consideration of the factors such as input and output voltage, turn ratio n of the high-frequency transformer, hardware cost and the like.
The foregoing description is only illustrative of the present invention and is not intended to limit the scope of the invention, and all equivalent structures or equivalent processes or direct or indirect application in other related technical fields are included in the scope of the present invention.
Claims (5)
1. A multiple buffer system of a flyback micro grid-connected inverter is characterized by comprising a first output node, a second output node, a third output node and a buffer inductor L 0 Buffer capacitor C 0 Buffer diode D 0 ；
Also comprises m capacitors C x (x=1, 2 … m) and diode D 1x (x=1, 2 … m) of CD modules, capacitance C in each CD module x One end is an interface, the other end is connected with the cathode of the diode D1x, and the connection point is a node i x (x=1, 2 … m), diode D 1x The positive electrode is another interface, which is node j x (x=1,2…m)；
Also comprises m groups of capacitances D 2x (x=1, 2 … m) and m groups of capacitances D 3x (x=1, 2 … m), m groups of capacitances D 2x The anodes are all connected with the buffer diode D 0 Positive electrode of m groups of capacitors D 2x The negative electrode is connected with the corresponding node j x Applying; m groups of capacitances D 3x The cathodes are connected to the interface 3, and the m groups of capacitors D 3x The positive electrode is connected with the corresponding node i x Applying;
buffer inductance L 0 One end of the buffer diode is connected with the second output node, and the other end of the buffer diode is connected with the buffer diode D 0 Positive electrode, buffer diode D 0 The negative electrode is connected with the first output node, the buffer capacitor C 0 One end is connected with the third output node, and the other end is connected with the node j m And (3) upper part.
2. The flyback miniature grid-connected inverter topological structure with the multiple buffer system as claimed in claim 1 is characterized by comprising a photovoltaic power absorption conversion unit, a multiple buffer system, a direct current-direct current conversion unit, a direct current-alternating current conversion unit and a grid-connected unit which are connected in sequence;
the photovoltaic power source absorption and conversion unit comprises a photovoltaic panel PV and a decoupling capacitor C at the direct current side pv ；
The DC-DC conversion unit comprises a high-frequency transformer T, a switch tube switch Q and an inductor L m 、L k Flyback rectifier diode D and filter capacitor C O Parasitic capacitance C Q The method comprises the steps of carrying out a first treatment on the surface of the Lm is the excitation inductance of the primary winding of the high frequency transformer T, L k Is the leakage inductance of the primary winding of the high-frequency transformer T, and a flyback rectifier diode D is connected in series with the synonym end of the secondary winding of the high-frequency transformer T, C O C is connected in parallel with two ends of the T secondary winding of the high-frequency transformer Q Is the parasitic capacitance of the switching tube Q;
the first output node of the multiple buffer system is connected with the positive electrode of the photovoltaic panel PV and the leakage inductance L k The second output node is connected with the cathode of the photovoltaic panel PV and the source electrode of the switching tube Q, and the third output node is connected with the synonym end of the primary coil of the high-frequency transformer T and the drain electrode of the switching tube Q.
3. The flyback micro grid-connected inverter topology with multiple buffer system of claim 2, wherein the dc-ac conversion unit comprises a power switch tube S 1 、S 2 、S 3 、S 4 For the transformer secondary winding to be operated by the corresponding switch during the appropriate utility half cycle.
4. The flyback micro grid-connected inverter topology with multiple buffer system of claim 2, wherein the grid-connected unit comprises an output filter inductance L f Output filter capacitor C f Grid G rid The current passes through L f And C f The structured low-pass filter is injected into the power grid.
5. A method of harmonic reduction calculation based on the flyback micro grid-tie inverter topology with multiple buffer system of any of claims 1 to 4, comprising the steps of:
firstly, charging energy generated by a PV board to a primary winding of a high-frequency transformer T, exciting an inductor L m And leakage inductance L k The phase at which the current rises linearly until the switching tube Q is turned off is defined as a first phase t 0 ≤t≤t 1 Time T （1） =t 1 -t 0 The method comprises the steps of carrying out a first treatment on the surface of the Excitation inductance Lm energy of high-frequency transformer T starts to transfer to the secondary winding side, buffering inductance L 0 Through diode D 0 The phase of returning to the power supply until the leakage inductance energy of the high-frequency transformer is exhausted is defined as a second phase t 1 ≤t≤t 2 Time T （2） =t 2 -t 1 ；
Then, according to the current variation of the primary winding of the high-frequency transformer T, the current variation is calculated to obtain:
；
then according to the same stage of the traditional LCD buffer circuit topology structure, the method is obtained
；
Finally, the second stage time ratio of the traditional LCD buffer circuit and the multiple buffer circuit under the condition that the switching tube Q has the same on time is calculated as follows
；
Wherein n is the turn ratio of the high-frequency transformer, and the larger the m value of the multiple buffer circuit is, the smaller the buffer time of the second stage is, and the smaller the waveform harmonic wave of the power grid output is.
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