CN116991055A - High-precision GPS synchronous holding module - Google Patents

High-precision GPS synchronous holding module Download PDF

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Publication number
CN116991055A
CN116991055A CN202310977380.3A CN202310977380A CN116991055A CN 116991055 A CN116991055 A CN 116991055A CN 202310977380 A CN202310977380 A CN 202310977380A CN 116991055 A CN116991055 A CN 116991055A
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CN
China
Prior art keywords
time
circuit
gps
time measuring
measuring instrument
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Pending
Application number
CN202310977380.3A
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Chinese (zh)
Inventor
张启林
彭彬彬
曾艳
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Shenzhen Anzewi Technology Co ltd
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Shenzhen Anzewi Technology Co ltd
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Priority to CN202310977380.3A priority Critical patent/CN116991055A/en
Publication of CN116991055A publication Critical patent/CN116991055A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G04HOROLOGY
    • G04RRADIO-CONTROLLED TIME-PIECES
    • G04R20/00Setting the time according to the time information carried or implied by the radio signal
    • G04R20/02Setting the time according to the time information carried or implied by the radio signal the radio signal being sent by a satellite, e.g. GPS
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • GPHYSICS
    • G04HOROLOGY
    • G04FTIME-INTERVAL MEASURING
    • G04F10/00Apparatus for measuring unknown time intervals by electric means
    • G04F10/04Apparatus for measuring unknown time intervals by electric means by counting pulses or half-cycles of an ac

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  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Electric Clocks (AREA)
  • Position Fixing By Use Of Radio Waves (AREA)
  • Measurement Of Unknown Time Intervals (AREA)

Abstract

The invention provides a high-precision GPS synchronous holding module, which relates to the technical field of GPS positioning and comprises a time measuring instrument and an FPGA chip, wherein the design of an internal logic time setting circuit, a time keeping circuit and a counting circuit of the FPGA chip and the design of a signal isolation interface circuit connected with a interception device are mainly completed by taking the MCU and the FPGA chip as cores, the situation of short-term desynchronization of satellite signals possibly occurring in actual use is considered, a solution is provided, a research method can provide reference for the design of a time synchronous different-place time measuring instrument based on satellite signals such as GPS, BDS and the like, and a clock reference synchronous function can also be directly added for the existing time measuring instrument, so that guarantee is provided for the measurement of the flight speed of the whole trajectory and long interception range of a barrel weapon.

Description

High-precision GPS synchronous holding module
Technical Field
The invention relates to the technical field of GPS positioning, in particular to a high-precision GPS synchronous holding module.
Background
The flying speed of the projectile is an important index for measuring the performance of the barrel weapon and ammunition, and is often measured by a regional speed measuring method, so that the flying speed state parameter of the outgoing projectile is required to be tested, and the measured object has the characteristics of small volume, various materials, high radio frequency, high shooting speed, large scattering and the like. In the existing non-contact measuring equipment, the area intercepting devices such as a sky curtain target and a light curtain target based on the photoelectric detection principle have the advantages of large target surface, quick response frequency, wide speed measuring range, convenient use, low cost and the like, are very suitable for forming interval intercepting speed measurement, are short for area intercepting speed measurement, and are one of the most main equipment for measuring the flying speed of the shot of the current barrel rapid shooting weapon.
The prior art exists when in use, the district section speed measuring device is difficult to access to the same time measuring instrument, and a plurality of time measuring instruments with different time do not have a unified clock reference when in work, so that a large error is introduced to the test.
Disclosure of Invention
Technical problem to be solved
Aiming at the defects of the prior art, the invention provides a high-precision GPS synchronous holding module, which solves the problem that different time measuring instruments have no unified clock reference.
Technical proposal
In order to achieve the above purpose, the invention is realized by the following technical scheme: the high-precision GPS synchronous holding module comprises a time measuring instrument and an FPGA chip, wherein the system structure measuring flow of the time measuring instrument, the interception device and the FPGA chip is as follows:
sp1: the method comprises the steps of installing and equipping measuring instruments, respectively equipping a time measuring instrument for different-place interception devices at a test site, forming the interception devices by a plurality of time measuring instruments, and synchronizing time of all the time measuring instruments in the interception devices through a GPS;
sp2: the method comprises the steps that GPS curtain passing time signals are obtained, a pair of blocking devices formed by the off-site time measuring instrument are distributed in the full trajectory range of the shot flight, and after the shot sequentially passes through each blocking device, a curtain passing time sequence with a GPS clock reference is obtained and converted into two paths of signals of a start pulse and a stop pulse;
sp3: the output of signal time is accessed to an FPGA chip to enable a logic module to start working, a counter in a starting signal starting time measuring instrument starts working, a stop signal stops working of the counter, then a numerical value is latched and output, and finally the time between two paths of signals is obtained;
sp4: in the process of step Sp3, the GPS receiving circuit continuously acquires the GPS related information and PPS second pulse, when PPS comes, the counter is cleared until the starting signal and the stopping signal come, and the time measuring instrument at different places takes a certain determined PPS signal as a reference;
sp5: and (3) transmitting the data in the step (Sp 3) to a nixie tube through a serial port, displaying the data in a display circuit part, transmitting the data to an upper computer through an Ethernet transmission circuit, and storing the data through the upper computer.
Preferably, an FPGA core circuit where the FPGA chip is arranged is connected with a nixie tube display circuit, a serial port communication circuit, a GPS interface circuit, an Ethernet circuit, a configuration circuit and a crystal oscillator circuit.
Preferably, the FGPA core circuit includes a disciplined always circuit and a pulse counting circuit, the pulse counting circuit including a time-setting design, a time-keeping design, and a counting circuit.
Preferably, the time measuring device is connected to a time interval measuring device for introducing start and stop signals of the projectile.
Preferably, at least two curtain passing times are arranged in the GPS curtain passing time signal acquisition time zone cut-off device, and the two curtain passing times correspond to the start pulse and the stop pulse respectively.
Advantageous effects
The invention provides a high-precision GPS synchronous maintaining module. The beneficial effects are as follows:
the invention mainly completes the design of an internal logic time setting circuit, a time keeping circuit and a counting circuit of the FPGA chip and the design of a signal isolation interface circuit connected with a interception device by taking the MCU and the FPGA chip as cores, considers the situation of short-term desynchronization of satellite signals possibly occurring in actual use and provides a solution, and the research method can provide reference for the design of a time synchronization different-place time measuring instrument based on satellite signals such as GPS, BDS and the like, can also directly provide guarantee for the full trajectory and long-area interception range flight speed measurement of the barrel weapon by adding a clock reference synchronization function to the existing time measuring instrument.
Drawings
FIG. 1 is a system flow diagram of the present invention;
FIG. 2 is a system frame diagram of the present invention;
FIG. 3 is a block diagram of a time measurement apparatus according to the present invention;
FIG. 4 is a block diagram of a tamed clock circuit of the present invention;
fig. 5 is a graph showing a time correspondence between PPS signals and UTC according to the present invention;
FIG. 6 is a time-keeping design of the present invention;
FIG. 7 is a flow chart of a software design of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
First embodiment:
1-7, a high-precision GPS synchronous holding module comprises a time measuring instrument and an FPGA chip, wherein the system structure measuring flow of the time measuring instrument, the interception device and the FPGA chip is as follows:
sp1: the installation and the preparation of the measuring instrument, namely, each time measuring instrument is arranged for the off-site interception device at a test site, a plurality of time measuring instruments form the interception device, and all the time measuring instruments in the interception device are time-synchronized through a GPS;
sp2: the method comprises the steps that GPS curtain passing time signals are obtained, a pair of blocking devices formed by the off-site time measuring instrument are distributed in the full trajectory range of the shot flight, and after the shot sequentially passes through each blocking device, a curtain passing time sequence with a GPS clock reference is obtained and converted into two paths of signals of a start pulse and a stop pulse;
sp3: the output of signal time is accessed to an FPGA chip to enable a logic module to start working, a counter in a starting signal starting time measuring instrument starts working, a stop signal stops working of the counter, then a numerical value is latched and output, and finally the time between two paths of signals is obtained;
sp4: in the process of step Sp3, the GPS receiving circuit continuously acquires the GPS related information and PPS second pulse, when PPS comes, the counter is cleared until the starting signal and the stopping signal come, and the time measuring instrument at different places takes a certain determined PPS signal as a reference;
sp5: and (3) transmitting the data in the step (Sp 3) to a nixie tube through a serial port, displaying the data in a display circuit part, transmitting the data to an upper computer through an Ethernet transmission circuit, and storing the data through the upper computer.
The FPGA core circuit where the FPGA chip is arranged is connected with a nixie tube display circuit, a serial port communication circuit, a GPS interface circuit, an Ethernet circuit, a configuration circuit and a crystal oscillator circuit, a time measuring instrument is required to be connected with time interval measuring equipment to introduce starting and stopping signals of a projectile, at least two curtain passing times are arranged in a time interception device for acquiring GPS curtain passing time signals and correspond to starting pulses and stopping pulses respectively, MCU and the FPGA chip are used as cores to mainly finish the design of a logic time setting circuit, a time keeping circuit and a counting circuit in the FPGA chip and the design of a signal isolation interface circuit connected with the interception device, the situation that satellite signals possibly occur in actual use are temporarily out of step is considered, a solution is provided, the studied method can provide reference for the design of the time synchronous different-place time measuring instrument based on satellite signals such as GPS and BDS, the clock reference synchronous function can also be directly added for the existing time measuring instrument, and the full trajectory and long-area interception range flight speed measurement of the weapon is provided.
Specific embodiment II:
as shown in fig. 1-7, the FGPA core circuit includes a disciplined always circuit and a pulse counting circuit, which includes a time-setting design, a time-keeping design, and a counting circuit.
The tame clock circuit can receive GPS signals, directly acquire current PPS pulse signals and obtain UTC corresponding to the PPS signals through decoding, tame the internal OCXO to provide high-stability clock signals synchronized by the GPS, the design adopts a closed-loop control time keeping technology, accurate time synchronization signals can be output within a certain time in consideration of satellite signal interruption or interference faults, high-precision time keeping is realized, UTC is coordinated universal time, the OCXO is an OCXO high-temperature constant-temperature crystal oscillator, as shown in fig. 4, the tame clock board receives external satellite time signals, a current UTC time value is obtained through MCU decoding, and the MCU and the FPGA circuit acquire clock signals of the constant-temperature crystal oscillator OCXO, and the output of the clock signals is stable 10MHz frequency signals, so that a good precision reference is ensured.
The time setting design is that the rising edge of the PPS second pulse signal output by the taming clock circuit is taken to be effective when the PPS second pulse signal is output, the decoded UTC time is taken as a label to realize the correspondence, the corresponding relation between the PPS signal and the UTC time is shown in figure 5, the PPS pulse is used for synchronizing the 10MHz crystal oscillator of the local clock phase lock for stabilizing the frequency, the PPS second pulse signal is connected to the zero clearing end of the local clock counter, and the zero clearing operation is carried out on the local clock counter when the PPS second pulse signal is effective, so that the synchronization of the local clock and the GPS signal is realized.
The time keeping design considers that under the conditions of measuring site topography fluctuation, cloudy weather or electromagnetic interference and the like, the GPS signal of a time service receiving end is possibly lost, the condition that PPS second pulse signal and UTC time are temporarily out of step or unstable can occur, at the moment, a local 10MHz crystal oscillator is taken as a reference, a pseudo PPS signal is generated through counting and recorded as PPS ', after a time measuring instrument acquires a GPS star searching signal through last achievement, PPS' second pulse generated based on local clock counting is always continuous, and the PPS signal is replaced by clearing a local counter when the GPS second pulse signal is lost, so that the second signal generated in the next second in the period of time is ensured to be synchronous with the PPS second pulse signal. When the GPS communication is recovered, the received PPS second pulse signal is taken over for zero clearing operation, as shown in fig. 6, a counter is designed to be 24 bits according to the 10MHz standard of the local crystal oscillator, and when the counter is full of 107 times and is full of 1s, a PPS' signal is generated. The 10MHz clock in fig. 6 is input to the input of the D flip-flop through a not gate delay of half a clock cycle, and the local second counter is reset by the D flip-flop after the PPS' signal is generated.
The counting circuit is realized by a counter in the FPGA, and besides a second pulse signal is generated through a local clock signal, the counter is connected to a signal output end of the interception detector, when a projectile flies through the interception detector, the counter outputs the current recorded pulse number by the detection signal from the interception detector, and the projectile flight time information with higher precision can be obtained under UTC second precision by counting the pulse number and combining the current UTC time, if the OCXO clock frequency adopted by the technology is 10MHz, the projectile flight time information with the precision of 0.1 mu s can be continuously obtained under the current UTC second time under the condition of neglecting OCXO drift. Such time information is acquired by each section detector in combination with a corresponding time measuring instrument, n in total. And they carry on the clock synchronization through GPS clock reference, can obtain the time information between any two and connect the detector through the direct subtraction mode.
Third embodiment:
as shown in fig. 1-7, the main working flow of the time measuring instrument is controlled by the MCU, and the main function is to enter a voltage self-test after the time measuring instrument is powered on, to check whether the voltage required by the whole circuit is normal through internal AD acquisition, to start to receive the current satellite signal and PPS second pulse signal after passing, to detect the current satellite state through serial data analysis, and in general, the satellite signal searches for about 3-5 minutes, and after the satellite signal is normal, to synchronize with the local clock through satellite time, then enter a wireless communication self-test state, all the states are displayed by the front panel display screen, and the time measuring instrument can enter a measurement state, waiting for the trigger signal of the area cutting device. After receiving the trigger signal, the time measuring instrument reads the data, sends the time signal to the upper computer, then receives the upper computer command, and enters the next test or ends.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a reference structure" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.
Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims (5)

1. The utility model provides a high accuracy GPS keeps in step module, includes time measuring apparatu and FPGA chip, its characterized in that: the system structure measurement flow of the time measuring instrument, the interception device and the FPGA chip is as follows:
sp1: the method comprises the steps of installing and equipping measuring instruments, respectively equipping a time measuring instrument for different-place interception devices at a test site, forming the interception devices by a plurality of time measuring instruments, and synchronizing time of all the time measuring instruments in the interception devices through a GPS;
sp2: the method comprises the steps that GPS curtain passing time signals are obtained, a pair of blocking devices formed by the off-site time measuring instrument are distributed in the full trajectory range of the shot flight, and after the shot sequentially passes through each blocking device, a curtain passing time sequence with a GPS clock reference is obtained and converted into two paths of signals of a start pulse and a stop pulse;
sp3: the output of signal time is accessed to an FPGA chip to enable a logic module to start working, a counter in a starting signal starting time measuring instrument starts working, a stop signal stops working of the counter, then a numerical value is latched and output, and finally the time between two paths of signals is obtained;
sp4: in the process of step Sp3, the GPS receiving circuit continuously acquires the GPS related information and PPS second pulse, when PPS comes, the counter is cleared until the starting signal and the stopping signal come, and the time measuring instrument at different places takes a certain determined PPS signal as a reference;
sp5: and (3) transmitting the data in the step (Sp 3) to a nixie tube through a serial port, displaying the data in a display circuit part, transmitting the data to an upper computer through an Ethernet transmission circuit, and storing the data through the upper computer.
2. The high-precision GPS synchronization maintenance module according to claim 1, wherein: and an FPGA core circuit in which the FPGA chip is arranged is connected with a nixie tube display circuit, a serial port communication circuit, a GPS interface circuit, an Ethernet circuit, a configuration circuit and a crystal oscillator circuit.
3. The high-precision GPS synchronization maintenance module according to claim 2, wherein: the FGPA core circuit comprises a tame always circuit and a pulse counting circuit, and the pulse counting circuit comprises a time setting design, a time keeping design and a counting circuit.
4. The high-precision GPS synchronization maintenance module according to claim 1, wherein: the time measuring device needs to be connected with a time interval measuring device to introduce start and stop signals of the projectile.
5. The high-precision GPS synchronization maintenance module according to claim 1, wherein: at least two curtain passing times are arranged in the GPS curtain passing time signal acquisition time zone cut-off device and correspond to the starting pulse and the stopping pulse respectively.
CN202310977380.3A 2023-08-03 2023-08-03 High-precision GPS synchronous holding module Pending CN116991055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310977380.3A CN116991055A (en) 2023-08-03 2023-08-03 High-precision GPS synchronous holding module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310977380.3A CN116991055A (en) 2023-08-03 2023-08-03 High-precision GPS synchronous holding module

Publications (1)

Publication Number Publication Date
CN116991055A true CN116991055A (en) 2023-11-03

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Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
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