CN116936696A - LED epitaxial wafer, preparation method thereof and LED - Google Patents

LED epitaxial wafer, preparation method thereof and LED Download PDF

Info

Publication number
CN116936696A
CN116936696A CN202311029088.5A CN202311029088A CN116936696A CN 116936696 A CN116936696 A CN 116936696A CN 202311029088 A CN202311029088 A CN 202311029088A CN 116936696 A CN116936696 A CN 116936696A
Authority
CN
China
Prior art keywords
layer
doped
substrate
epitaxial wafer
emitting diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311029088.5A
Other languages
Chinese (zh)
Inventor
郑文杰
程龙
高虹
刘春杨
胡加辉
金从龙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangxi Zhao Chi Semiconductor Co Ltd
Original Assignee
Jiangxi Zhao Chi Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangxi Zhao Chi Semiconductor Co Ltd filed Critical Jiangxi Zhao Chi Semiconductor Co Ltd
Priority to CN202311029088.5A priority Critical patent/CN116936696A/en
Publication of CN116936696A publication Critical patent/CN116936696A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention discloses a light-emitting diode epitaxial wafer and a preparation method thereof, and an LED, wherein the light-emitting diode epitaxial wafer comprises a substrate, and a composite layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially arranged on the substrate; the composite layer comprises a SiCN layer, a Mg-doped BGaN layer and a Mg-doped InGaN layer which are sequentially deposited on the substrate. The LED epitaxial wafer provided by the invention can improve the quality of GaN crystals, reduce the generation crack rate and improve the luminous efficiency of the LED.

Description

LED epitaxial wafer, preparation method thereof and LED
Technical Field
The invention relates to the technical field of photoelectricity, in particular to a light-emitting diode epitaxial wafer, a preparation method thereof and an LED.
Background
Currently, silicon substrates have become one of the main choice substrates for epitaxial growth of group III nitrides. The advantages of large size, low cost and mature preparation process of the silicon substrate lead the III-nitride material based on the growth of the silicon substrate to have excellent application prospect, and can be widely applied to application scenes such as power electronics, radio frequency electronics, light-emitting devices and the like. However, both aluminum nitride (AlN) and gallium nitride (GaN) materials have huge lattice mismatch and thermal mismatch with the silicon substrate, and the lattice mismatch causes a large number of threading dislocations in the group III nitride epitaxial layer, and these high-density dislocations may be represented as leakage channels, non-radiative recombination centers and carrier traps in the materials, and may affect the component uniformity of the ternary alloy, and may ultimately have many adverse effects on electronic devices and optoelectronic devices. The thermal mismatch makes the surface of the III-nitride epitaxial layer easily crack in the process of cooling, and the device preparation process cannot be performed. In particular, si and Ga generate a back-melting reaction at high temperature, gaN cannot be grown directly on a Si substrate, and it is currently most widely accepted to use AlN as a transition layer between Si and GaN, so that GaN crystal quality is inevitably affected by crystal quality of underlying AlN. In summary, for the epitaxial group III nitride material on the silicon substrate, both AlN, alGaN and GaN, it is necessary to obtain a high quality silicon substrate AlN film first, resulting in a higher defect density in the GaN epitaxial layer and a poor crystal quality.
In the prior art, there are studies reporting that a layer of alumina is inserted between a silicon substrate and AlN to try to improve the crystal quality of AlN and GaN. However, the method has very limited effect on improving the crystal quality, mainly because the alumina layer is in a polycrystalline or amorphous state, and the crystal lattice structure and the orientation of the surface of different areas of the alumina layer are different, and the differences are transmitted into the nucleation layer, so that the effect of improving the crystal orientation of the nucleation layer by the alumina layer is greatly reduced.
Disclosure of Invention
The invention aims to solve the technical problem of providing a light-emitting diode epitaxial wafer which improves the quality of GaN crystals, reduces the generation crack rate and improves the light-emitting efficiency of a light-emitting diode.
The invention also aims to provide a preparation method of the light-emitting diode epitaxial wafer, which has simple process and can stably prepare the light-emitting diode epitaxial wafer with good luminous efficiency.
In order to solve the technical problems, the invention provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein a composite layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially arranged on the substrate;
the composite layer comprises a SiCN layer, a Mg-doped BGaN layer and a Mg-doped InGaN layer which are sequentially deposited on the substrate.
In one embodiment, the thickness of the composite layer is 1 μm to 5 μm.
In one embodiment, the SiCN layer has a thickness of 50nm to 1500nm.
In one embodiment, the Mg doped BGaN layer has a thickness of 400nm to 1500nm;
the Mg doping concentration of the Mg-doped BGaN layer is 1 multiplied by 10 9 atoms/cm 3 ~1×10 10 atoms/cm 3
In one embodiment, the Mg doped InGaN layer has a thickness of 400nm to 3000nm;
the Mg doping concentration of the Mg-doped InGaN layer is 1 multiplied by 10 7 atoms/cm 3 ~1×10 8 atoms/cm 3
Correspondingly, the invention also provides a preparation method of the light-emitting diode epitaxial wafer, which comprises the following steps:
s1, preparing a substrate;
s2, sequentially depositing a composite layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on the substrate;
the composite layer comprises a SiCN layer, a Mg-doped BGaN layer and a Mg-doped InGaN layer which are sequentially deposited on the substrate.
In one embodiment, the SiCN layer is made using the following method:
in HFCVD system, siH is introduced 4 、H 2 、CH 3 、N 2 And (3) mixing the gases, controlling the reaction pressure to be 1500 Pa-1550 Pa, and the substrate temperature to be 800-850 ℃ to finish the deposition of the SiCN layer.
In one embodiment, the Mg doped BGaN layer is made using the following method:
and controlling the temperature of the reaction chamber at 800-1400 ℃, controlling the temperature of the reaction chamber at 50-500 torr, and introducing a B source, a Mg source, a Ga source and an N source to finish the deposition of the Mg-doped BGaN layer.
In one embodiment, the Mg doped InGaN layer is made using the following method:
and controlling the temperature of the reaction chamber at 800-1400 ℃, controlling the temperature of the reaction chamber at 50-500 torr, and introducing an In source, a Ga source, a Mg source and an N source to finish the deposition of the Mg doped InGaN layer.
Correspondingly, the invention further provides an LED, and the LED comprises the LED epitaxial wafer.
The implementation of the invention has the following beneficial effects:
the light-emitting diode epitaxial wafer provided by the invention is provided with a composite layer with a specific structure on a substrate, wherein the composite layer comprises a SiCN layer, a Mg-doped BGaN layer and a Mg-doped InGaN layer which are sequentially deposited on the substrate.
The lattice constant of the SiCN layer is close to that of the substrate, so that lattice mismatch and thermal mismatch can be reduced, and the crystal quality of the film is improved; the lattice mismatch of the Mg-doped BGaN layer and the SiCN layer is smaller, and the crystal quality of the Mg-doped BGaN layer is improved. The deposition of the Mg doped BGaN layer can divide the surface of the SiCN layer into a plurality of grid positions, and the existence of the B component can fill vacancies in crystal lattices so as to release compressive stress and block the generation of dislocation lines; the Mg doped InGaN layer can be used for effectively shielding dislocation, reducing dislocation density, improving crystal quality of an epitaxial layer, reducing non-radiative recombination of carriers and improving luminous efficiency of a light-emitting diode by introducing In atoms while further reducing existence of electric leakage.
Drawings
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to the present invention;
fig. 2 is a flowchart of a method for preparing an led epitaxial wafer according to the present invention;
fig. 3 is a flowchart of step S2 of the method for manufacturing a light emitting diode epitaxial wafer according to the present invention.
Detailed Description
The present invention will be described in further detail below in order to make the objects, technical solutions and advantages of the present invention more apparent.
Unless otherwise indicated or contradicted, terms or phrases used herein have the following meanings:
in the present invention, "preferred" is merely to describe embodiments or examples that are more effective, and it should be understood that they are not intended to limit the scope of the present invention.
In the invention, the technical characteristics described in an open mode comprise a closed technical scheme composed of the listed characteristics and also comprise an open technical scheme comprising the listed characteristics.
In the present invention, the numerical range is referred to, and both ends of the numerical range are included unless otherwise specified.
In order to solve the above problems, the present invention provides a light emitting diode epitaxial wafer, as shown in fig. 1, comprising a substrate 1, wherein a composite layer 2, an undoped GaN layer 3, an N-type GaN layer 4, a multiple quantum well layer 5, an electron blocking layer 6 and a P-type GaN layer 7 are sequentially disposed on the substrate 1;
the composite layer 2 includes a SiCN layer 21, a Mg doped BGaN layer 22, and a Mg doped InGaN layer 23 sequentially deposited on the substrate 1.
The specific structure of the composite layer 2 is as follows:
in one embodiment, the thickness of the composite layer 2 is 1 μm to 5 μm; the thickness of the exemplary composite layer 2 is 2 μm, 3 μm, 4 μm, but is not limited thereto; the thickness of the SiCN layer 21 is 50 nm-1500 nm; the SiCN layer 21 is exemplified by, but not limited to, 100nm, 200nm, 400nm, 600nm, 800nm, 1000nm, 1200nm, 1400 nm; the thickness of the Mg-doped BGaN layer 22 is 400 nm-1500 nm; exemplary Mg doped BGaN layers 22 have thicknesses of, but not limited to, 500nm, 600nm, 800nm, 1000nm, 1200nm, 1400 nm; the thickness of the Mg-doped InGaN layer 23 is 400 nm-3000 nm; exemplary Mg doped InGaN layers 23 have thicknesses of 500nm, 1000nm, 1500nm, 2000nm, 2500nm, 2800nm, but are not limited thereto.
In one embodiment, the B component of the Mg doped BGaN layer 22 is 0.01 to 0.9, the In component of the Mg doped InGaN layer 23 is 0.01 to 0.1, and the ga component is 0.01 to 0.8. In one embodiment, the Mg doping concentration of the Mg doped BGaN layer is 1×10 9 atoms/cm 3 ~1×10 10 atoms/cm 3 The method comprises the steps of carrying out a first treatment on the surface of the The Mg doping concentration of the Mg-doped InGaN layer is 1 multiplied by 10 7 atoms/cm 3 ~1×10 8 atoms/cm 3 . Preferably, the Mg doping concentration of the Mg doped BGaN layer is 2×10 9 atoms/cm 3 ~9×10 9 atoms/cm 3 The method comprises the steps of carrying out a first treatment on the surface of the The Mg doping concentration of the Mg-doped InGaN layer is 2 multiplied by 10 7 atoms/cm 3 ~9×10 7 atoms/cm 3 . The gradient change of the Mg doping concentration can block the electron migration speed brought by the substrate, reduce electron overflow and leakage channels, and improve the photoelectric performance.
In summary, the light emitting diode epitaxial wafer provided by the invention is provided with the composite layer with a specific structure on the substrate, wherein the composite layer comprises the SiCN layer, the Mg-doped BGaN layer and the Mg-doped InGaN layer which are sequentially deposited on the substrate.
The lattice constant of the SiCN layer is close to that of the substrate, so that lattice mismatch and thermal mismatch can be reduced, and the crystal quality of the film is improved; the lattice mismatch of the Mg-doped BGaN layer and the SiCN layer is smaller, and the crystal quality of the Mg-doped BGaN layer is improved. The deposition of the Mg doped BGaN layer can divide the surface of the SiCN layer into a plurality of grid positions, and the existence of the B component can fill vacancies in crystal lattices so as to release compressive stress and block the generation of dislocation lines; the Mg doped InGaN layer can be used for effectively shielding dislocation, reducing dislocation density, improving crystal quality of an epitaxial layer, reducing non-radiative recombination of carriers and improving luminous efficiency of a light-emitting diode by introducing In atoms while further reducing existence of electric leakage.
Correspondingly, the invention provides a preparation method of the light-emitting diode epitaxial wafer, as shown in fig. 2, comprising the following steps:
s1, preparing a substrate 1;
in one embodiment, the substrate is any one of a sapphire substrate, a silicon carbide substrate and a gallium nitride substrate; preferably, a silicon substrate is used.
Preferably, the grease is removed by ultrasonic cleaning in anhydrous acetone for 8-10 minutes; ultrasonically cleaning in absolute ethyl alcohol for 8-10 minutes to remove organic matters; after being washed by a mixed solution of concentrated sulfuric acid and hydrogen peroxide, the surface oxide is removed by diluted hydrofluoric acid HF.
S2, sequentially depositing a composite layer 2, an undoped GaN layer 3, an N-type GaN layer 4, a multiple quantum well layer 5, an electron blocking layer 6 and a P-type GaN layer 7 on the substrate 1;
as shown in fig. 3, step S2 includes the steps of:
s21, depositing a composite layer 2 on the substrate 1.
In one embodiment, the SiCN layer is made using the following method:
in HFCVD system, siH is introduced 4 、H 2 、CH 3 、N 2 And (3) mixing the gases, controlling the reaction pressure to be 1500 Pa-1550 Pa, and the substrate temperature to be 800-850 ℃ to finish the deposition of the SiCN layer.
In one embodiment, the Mg doped BGaN layer is made using the following method:
and controlling the temperature of the reaction chamber at 800-1400 ℃, controlling the temperature of the reaction chamber at 50-500 torr, and introducing a B source, a Mg source, a Ga source and an N source to finish the deposition of the Mg-doped BGaN layer.
In one embodiment, the Mg doped InGaN layer is made using the following method:
and controlling the temperature of the reaction chamber at 800-1400 ℃, controlling the temperature of the reaction chamber at 50-500 torr, and introducing an In source, a Ga source, a Mg source and an N source to finish the deposition of the Mg doped InGaN layer.
S22, depositing an undoped GaN layer 3 on the composite layer 2.
In one embodiment, the temperature of the reaction chamber is controlled at 1050-1200 ℃, the pressure is controlled at 100-600 torr, an N source and a Ga source are introduced, and an undoped GaN layer with the thickness of 1-5 μm is grown. The undoped GaN layer has higher growth temperature and lower pressure, the prepared GaN-based crystal has better quality, meanwhile, the thickness is increased along with the thickness of the GaN, the compressive stress can be released through stacking faults, the line defects are reduced, the crystal quality is improved, the reverse leakage current is reduced, but the thickness of the GaN layer is increased to consume Ga source materials, and the epitaxial cost of the LED is greatly increased. Preferably, the undoped GaN layer with the thickness of 2-3 μm is grown, so that the production cost is saved, and the GaN material has higher crystal quality.
S23, depositing an N-type GaN layer 4 on the undoped GaN layer 3.
In one embodiment, the temperature of the reaction chamber is controlled at 1050-1200 ℃, the pressure is controlled at 100-600 torr, an N source, a Ga source and a Si source are introduced, and an N-type GaN layer with the thickness of 2-3 μm is grown, wherein the Si doping concentration is 1 multiplied by 10 19 atoms/cm 3 ~5×10 19 atoms/cm 3 . Firstly, the N-type GaN layer provides sufficient electrons for LED luminescence, secondly, the resistivity of the N-type GaN layer is higher than that of the transparent electrode on the P-GaN layer, so that the resistivity of the N-type GaN layer can be effectively reduced due to sufficient Si doping, and finally, the luminous efficiency of the stress LED can be effectively released due to sufficient thickness of the N-type GaN.
And S24, depositing a multi-quantum well layer 5 on the N-type GaN layer 4.
In one embodiment, the multiple quantum well layer is an InGaN quantum well layer and an AlGaN quantum barrier layer which are alternately stacked, and the stacking period is 6-12, wherein the growth temperature of the InGaN quantum well layer is 790-810 ℃, the thickness is 2-5 nm, the growth pressure is 50-300 torr, the growth temperature of the AlGaN quantum barrier layer is 800-900 ℃, the thickness is 5-15 nm, the growth pressure is 50-300 torr, and the Al component is 0.01-0.1.
S25, depositing an electron blocking layer 6 on the active layer 5.
In one embodiment, the electron blocking layer is an AlInGaN layer, which is deposited by a process comprising: the temperature of the reaction chamber is controlled at 900-1000 ℃, the pressure is controlled at 100-300 torr, and an N source, a Ga source, an Al source and an In source are introduced, so that an AlInGaN layer with an Al component of 0.005-0.1 and an In component of 0.01-0.2 is grown, and the thickness of the AlInGaN layer is 10-40 nm. The implementation of the electron blocking layer can not only effectively limit electron overflow, but also reduce blocking of holes, improve injection efficiency of the holes to the quantum well, reduce carrier auger recombination and improve luminous efficiency of the light-emitting diode.
S26, depositing a P-type GaN layer 7 on the electron blocking layer 6.
In one embodiment, the temperature of the reaction chamber is controlled between 900 ℃ and 1050 ℃, the pressure is controlled between 100torr and 600torr, an N source, a Ga source and an Mg source are introduced, and a P-type GaN layer with the thickness of 10nm to 50nm is grown, wherein the Mg doping concentration is 1 multiplied by 10 19 atoms/cm 3 ~1×10 21 atoms/cm 3 . Too high a Mg doping concentration can damage the crystal quality, while a lower doping concentration can affect the hole concentration.
Correspondingly, the invention further provides an LED, and the LED comprises the LED epitaxial wafer. The photoelectric efficiency of the LED is effectively improved, and other items have good electrical properties.
The invention is further illustrated by the following examples:
example 1
The embodiment provides a light-emitting diode epitaxial wafer, wherein a composite layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially arranged on a substrate;
the composite layer comprises a SiCN layer, a Mg-doped BGaN layer and a Mg-doped InGaN layer which are sequentially deposited on the substrate. The thickness of the SiCN layer is 500nm, the thickness of the Mg-doped BGaN layer is 1000nm, and the thickness of the Mg-doped InGaN layer is 2000nm.
Example 2
The embodiment provides a light-emitting diode epitaxial wafer, wherein a composite layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially arranged on a substrate;
the composite layer comprises a SiCN layer, a Mg-doped BGaN layer and a Mg-doped InGaN layer which are sequentially deposited on the substrate. The thickness of the SiCN layer is 1500nm, the thickness of the Mg-doped BGaN layer is 1500nm, and the thickness of the Mg-doped InGaN layer is 3000nm.
Example 3
The embodiment provides a light-emitting diode epitaxial wafer, wherein a composite layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially arranged on a substrate;
the composite layer comprises a SiCN layer, a Mg-doped BGaN layer and a Mg-doped InGaN layer which are sequentially deposited on the substrate. The thickness of the SiCN layer is 200nm, the thickness of the Mg-doped BGaN layer is 400nm, and the thickness of the Mg-doped InGaN layer is 400nm.
Comparative example 1
The comparative example provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially arranged on the substrate.
Comparative example 2
The comparative example provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein a composite layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially arranged on the substrate;
the composite layer comprises an Mg-doped BGaN layer and an Mg-doped InGaN layer which are sequentially deposited on the substrate.
Comparative example 3
The comparative example provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein a composite layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially arranged on the substrate;
the composite layer comprises a SiCN layer and a Mg-doped InGaN layer which are sequentially deposited on the substrate.
Comparative example 4
The comparative example provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein a composite layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially arranged on the substrate;
the composite layer comprises an Mg doped BGaN layer and an SiCN layer which are sequentially deposited on the substrate.
The light emitting diode epitaxial wafers prepared in examples 1 to 3 and comparative examples 1 to 4 were prepared into 10mil x 24mil chips using the same chip process conditions, 300 LED chips were extracted, the photoelectric efficiency and the appearance yield were tested at 120mA/60mA current, the photoelectric efficiency improvement rate and the appearance yield improvement rate of each example and comparative example were calculated based on comparative example 1, and specific test results are shown in table 1.
Table 1 results of Performance test of LEDs prepared in examples 1 to 3 and comparative examples 1 to 4
As can be seen from the above results, the light emitting diode epitaxial wafer provided by the invention has a substrate provided with a composite layer with a specific structure, wherein the composite layer comprises a SiCN layer, a Mg doped BGaN layer and a Mg doped InGaN layer sequentially deposited on the substrate.
The lattice constant of the SiCN layer is close to that of the substrate, so that lattice mismatch and thermal mismatch can be reduced, and the crystal quality of the film is improved; the lattice mismatch of the Mg-doped BGaN layer and the SiCN layer is smaller, and the crystal quality of the Mg-doped BGaN layer is improved. The deposition of the Mg doped BGaN layer can divide the surface of the SiCN layer into a plurality of grid positions, and the existence of the B component can fill vacancies in crystal lattices so as to release compressive stress and block the generation of dislocation lines; the Mg doped InGaN layer can be used for effectively shielding dislocation, reducing dislocation density, improving crystal quality of an epitaxial layer, reducing non-radiative recombination of carriers and improving luminous efficiency of a light-emitting diode by introducing In atoms while further reducing existence of electric leakage.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that changes and modifications may be made without departing from the principles of the invention, such changes and modifications are also intended to be within the scope of the invention.

Claims (10)

1. The light-emitting diode epitaxial wafer is characterized by comprising a substrate, wherein a composite layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially arranged on the substrate;
the composite layer comprises a SiCN layer, a Mg-doped BGaN layer and a Mg-doped InGaN layer which are sequentially deposited on the substrate.
2. The light-emitting diode epitaxial wafer of claim 1, wherein the thickness of the composite layer is 1 μm to 5 μm.
3. The light-emitting diode epitaxial wafer of claim 1, wherein the SiCN layer has a thickness of 50nm to 1500nm.
4. The light-emitting diode epitaxial wafer of claim 1, wherein the Mg doped BGaN layer has a thickness of 400nm to 1500nm;
the Mg doping concentration of the Mg-doped BGaN layer is 1 multiplied by 10 9 atoms/cm 3 ~1×10 10 atoms/cm 3
5. The light emitting diode epitaxial wafer of claim 1, wherein the Mg doped InGaN layer has a thickness of 400nm to 3000nm;
the Mg doping concentration of the Mg-doped InGaN layer is 1 multiplied by 10 7 atoms/cm 3 ~1×10 8 atoms/cm 3
6. A method for manufacturing a light emitting diode epitaxial wafer according to any one of claims 1 to 5, comprising the steps of:
s1, preparing a substrate;
s2, sequentially depositing a composite layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on the substrate;
the composite layer comprises a SiCN layer, a Mg-doped BGaN layer and a Mg-doped InGaN layer which are sequentially deposited on the substrate.
7. The method of manufacturing a light emitting diode epitaxial wafer of claim 6, wherein the SiCN layer is manufactured by:
in HFCVD system, siH is introduced 4 、H 2 、CH 3 、N 2 And (3) mixing the gases, controlling the reaction pressure to be 1500 Pa-1550 Pa, and the substrate temperature to be 800-850 ℃ to finish the deposition of the SiCN layer.
8. The method for preparing a light-emitting diode epitaxial wafer according to claim 6, wherein the Mg doped BGaN layer is prepared by the following method:
and controlling the temperature of the reaction chamber at 800-1400 ℃, controlling the temperature of the reaction chamber at 50-500 torr, and introducing a B source, a Mg source, a Ga source and an N source to finish the deposition of the Mg-doped BGaN layer.
9. The method for preparing a light emitting diode epitaxial wafer of claim 6, wherein the Mg doped InGaN layer is prepared by the following method:
and controlling the temperature of the reaction chamber at 800-1400 ℃, controlling the temperature of the reaction chamber at 50-500 torr, and introducing an In source, a Ga source, a Mg source and an N source to finish the deposition of the Mg doped InGaN layer.
10. An LED comprising the light emitting diode epitaxial wafer according to any one of claims 1 to 5.
CN202311029088.5A 2023-08-16 2023-08-16 LED epitaxial wafer, preparation method thereof and LED Pending CN116936696A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311029088.5A CN116936696A (en) 2023-08-16 2023-08-16 LED epitaxial wafer, preparation method thereof and LED

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311029088.5A CN116936696A (en) 2023-08-16 2023-08-16 LED epitaxial wafer, preparation method thereof and LED

Publications (1)

Publication Number Publication Date
CN116936696A true CN116936696A (en) 2023-10-24

Family

ID=88387927

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311029088.5A Pending CN116936696A (en) 2023-08-16 2023-08-16 LED epitaxial wafer, preparation method thereof and LED

Country Status (1)

Country Link
CN (1) CN116936696A (en)

Similar Documents

Publication Publication Date Title
CN104409587B (en) A kind of InGaN base blue-green light LED epitaxial structure and growing method
CN115458650B (en) Light emitting diode epitaxial wafer, preparation method thereof and light emitting diode
CN116053369B (en) Light-emitting diode epitaxial wafer and preparation method thereof
CN115188863B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN116581214A (en) Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
CN114883460A (en) Light emitting diode epitaxial wafer and preparation method thereof
CN115911201A (en) Light emitting diode epitaxial wafer, preparation method thereof and light emitting diode
CN115911202A (en) Light emitting diode epitaxial wafer, preparation method thereof and light emitting diode
CN115207177A (en) Light emitting diode epitaxial wafer and preparation method thereof
CN103441197B (en) A kind of GaN base LED epitaxial slice and preparation method thereof
CN111725371B (en) LED epitaxial bottom layer structure and growth method thereof
CN117476827B (en) Epitaxial wafer of light-emitting diode with low contact resistance and preparation method thereof
CN117133841B (en) InGaN-based green light emitting diode epitaxial wafer, preparation method thereof and LED
CN103337571A (en) Epitaxial structure for improving wavelength concentration in GaN-based epitaxial wafer and growth method of epitaxial structure
CN116364820B (en) LED epitaxial wafer, preparation method thereof and LED
CN116344684B (en) Light-emitting diode preparation method and diode
CN116978986A (en) Preparation method of light-emitting diode epitaxial wafer
CN117410405A (en) Deep ultraviolet light-emitting diode epitaxial wafer, preparation method thereof and deep ultraviolet light-emitting diode
CN103872204A (en) P (Positive) type insert layer with cycle structure and growing method
CN116565097A (en) Light-emitting diode epitaxial wafer and preparation method thereof
CN116845153A (en) High-light-efficiency light-emitting diode epitaxial wafer, preparation method and LED
CN116598396A (en) LED epitaxial wafer, preparation method thereof and LED
CN114373838B (en) LED epitaxial wafer with quantum barrier layer silicon doping structure, growth method and manufacturing method thereof
CN116936696A (en) LED epitaxial wafer, preparation method thereof and LED
CN117153974B (en) LED epitaxial wafer, preparation method thereof and LED

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination