CN116978986A - Preparation method of light-emitting diode epitaxial wafer - Google Patents

Preparation method of light-emitting diode epitaxial wafer Download PDF

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Publication number
CN116978986A
CN116978986A CN202310952921.7A CN202310952921A CN116978986A CN 116978986 A CN116978986 A CN 116978986A CN 202310952921 A CN202310952921 A CN 202310952921A CN 116978986 A CN116978986 A CN 116978986A
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source
layer
growth
buffer layer
emitting diode
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郑文杰
程龙
高虹
刘春杨
胡加辉
金从龙
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps: providing a Si substrate, and sequentially growing a first buffer layer, a second buffer layer, a 3C-SiC layer, an undoped GaN layer, an n-type GaN layer, a multi-quantum well layer, an electron blocking layer and a p-type GaN layer on the Si substrate. The preparation method can improve the luminous efficiency and the appearance yield of the light-emitting diode.

Description

Preparation method of light-emitting diode epitaxial wafer
Technical Field
The invention relates to the technical field of semiconductors, in particular to a preparation method of a light-emitting diode epitaxial wafer.
Background
Currently, si substrates have become one of the substrates of choice for epitaxial growth of group III nitrides. The advantages of large size, low cost and mature preparation process of the Si substrate lead the III-nitride material based on the growth of the Si substrate to have excellent application prospect, and can be widely applied to application scenes such as power electronics, radio frequency electronics, light-emitting devices and the like. However, there are huge lattice mismatch and thermal mismatch between gallium nitride (GaN) material and Si substrate, and the lattice mismatch causes a large number of threading dislocations in the group III nitride epitaxial layer, and these high density dislocations may be represented as leakage channels, non-radiative recombination centers, carrier traps in the material, and may also affect the component uniformity of the epitaxial structure, and may ultimately have many adverse effects on both electronic devices and optoelectronic devices. The thermal mismatch makes the surface of the III-nitride epitaxial layer easily crack in the process of cooling, and the device preparation process cannot be performed.
The 3C-SiC buffer layer has the advantages of wide band gap, high critical breakdown electric field, high heat conductivity, high saturated electron drift speed and the like, and can be used for preparing high-temperature, high-frequency and high-power semiconductor devices. The 3C-SiC buffer layer is heteroepitaxially grown on the Si substrate, so that the cost can be reduced, and the crystal quality of the GaN epitaxial structure can be improved. However, the preparation of 3C-SiC and Si heteroepitaxial films is very difficult due to the large lattice constant mismatch (20%) and the difference in thermal expansion coefficient (8%) between 3C-SiC and Si.
Disclosure of Invention
The invention aims to solve the technical problem of providing a preparation method of a light-emitting diode epitaxial wafer, and the prepared light-emitting diode epitaxial wafer has high luminous efficiency and epitaxial appearance yield.
In order to achieve the technical effects, the invention provides a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps:
s100, providing a Si substrate;
s201 at H 2 Under a growth atmosphere, introducing an N source, an Si source and a C source, and growing a first buffer layer on the Si substrate;
s202 at H 2 Under the growth atmosphere, introducing an N source, an Si source and a C source, and growing a second buffer layer on the first buffer layer;
s203 at H 2 And under the growth atmosphere, introducing a Si source and a C source, and growing a 3C-SiC layer on the second buffer layer.
The N source access amount of the second buffer layer is larger than that of the first buffer layer; the Si source access amount of the second buffer layer is larger than that of the first buffer layer;
s300, growing an undoped GaN layer on the 3C-SiC layer;
s400, growing an n-type GaN layer on the undoped GaN layer;
s500, growing a multi-quantum well layer on the n-type GaN layer;
s600, growing an electron blocking layer on the multiple quantum well layer;
s700 grows a p-type GaN layer on the electron blocking layer.
As an improvement of the above technical solution, further comprising: s200 at H 2 And under the growth atmosphere, introducing an Al source and an N source, and growing an AlN layer on the Si substrate.
As an improvement of the technical scheme, the first buffer layer is grown by CVD, the growth temperature is 700-900 ℃, the growth pressure is 10-100torr, and the partial pressure ratio of the Si source, the C source and the N source is 1 (5-8): 10-15.
As an improvement of the technical scheme, the AlN layer is grown by CVD, the growth temperature is 1000-1400 ℃, and the growth pressure is 100-500torr.
As an improvement of the technical scheme, the second buffer layer is grown by CVD, the growth temperature is 700-900 ℃, the growth pressure is 10-100torr, and the partial pressure ratio of the Si source, the C source and the N source is 1 (1-4): 5-10.
As an improvement of the technical scheme, the 3C-SiC layer is grown by CVD, the growth temperature is 1000-1400 ℃, the growth pressure is 10-50Torr, the growth time is 120-150min, and the partial pressure ratio of the C source to the Si source is 1 (1-2).
As an improvement of the above technical solution, S100 further includes: and carbonizing the Si substrate, wherein the carbonization temperature is 1000-1200 ℃.
As an improvement of the above technical solution, the sum of thicknesses of the first buffer layer, the second buffer layer, and the 3C-SiC layer is 0.5 to 2 μm.
As an improvement of the technical scheme, the thickness ratio of the first buffer layer to the second buffer layer to the 3C-SiC layer is 1 (1-2): 1-3.
As an improvement of the technical scheme, the thickness ratio of the AlN layer to the first buffer layer is 1 (8-12).
The embodiment of the invention has the following beneficial effects:
according to the preparation method of the light-emitting diode epitaxial wafer, the first buffer layer is grown, so that lattice matching and thermal matching between the first buffer layer and the 3C-SiC layer can be relieved, and the crystal quality of the thin film is improved; meanwhile, the small lattice mismatch between the 3C-SiC layer and the first buffer layer can generate in-plane compressive stress in the first buffer layer, so that the film is converted from an in-plane biaxial compressive strain state to an in-plane biaxial tensile strain state along with the increase of the growth time, the in-plane biaxial tensile stress can be effectively reduced, and the generation of surface cracks is reduced. The second buffer layer can further adjust lattice mismatch between the second buffer layer and the 3C-SiC layer, and the growth difficulty of the 3C-SiC layer is low. By adopting the preparation method provided by the invention, the crystal quality of the epitaxial layer can be improved, and the non-radiative recombination of carriers can be reduced, so that the luminous efficiency and the epitaxial appearance yield of the light-emitting diode can be improved.
Drawings
Fig. 1 is a flowchart of a method for preparing an led epitaxial wafer in embodiment 1 of the present invention;
fig. 2 is a flowchart of a method for manufacturing a light emitting diode epitaxial wafer in embodiment 2 of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to specific embodiments.
As shown in fig. 1 and 2, the invention discloses a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps:
s100 provides a Si substrate:
in one embodiment, the Si substrate is ultrasonically cleaned in anhydrous acetone for 8-10min to remove grease; ultrasonically cleaning in absolute ethyl alcohol for 8-10min to remove organic matters; after the surface oxide is cleaned by a mixed solution of concentrated sulfuric acid (98 wt%) and hydrogen peroxide (30 wt%) in a volume ratio of 4:1, the surface oxide is removed by hydrofluoric acid (5 wt%).
In one embodimentAt C 2 H 4 And carbonizing the Si substrate in the atmosphere at the carbonization temperature of 1000-1200 ℃ to form the SiC layer with the thickness of 80-100 nm.
In one embodiment, the method further comprises:
s200 growing an AlN layer:
adopting CVD to grow at 1000-1400 deg.C and 100-500torr under H 2 For growth atmosphere, TMAL is Al source, NH 3 Is an N source. By growing the AlN layer in front of the first buffer layer, the growth quality of the first buffer layer is improved.
S201 growth of a first buffer layer:
adopting CVD to grow at 700-900 deg.C under 10-100Torr, and using H 2 Growing atmosphere, N 2 As N source, siH 4 Is a Si source, C 2 H 4 As C source, siH 4 、C 2 H 4 And N 2 The partial pressure ratio of (2) is 1 (5-8), and (10-15), and the first buffer layer is grown. The first buffer layer can relieve lattice mismatch and thermal mismatch between the first buffer layer and the 3C-SiC layer, so that the epitaxial crystal quality of the film is improved; meanwhile, tiny lattice mismatch exists between the 3C-SiC layer and the first buffer layer, so that in-plane compressive stress is generated in the first buffer layer, the film is converted from an in-plane biaxial compressive strain state to an in-plane biaxial tensile strain state along with the increase of growth time, in-plane biaxial tensile stress is effectively reduced, and accordingly surface crack generation is reduced.
S202 growing a second buffer layer:
adopting CVD to grow at 700-900 deg.C under 10-100Torr, and using H 2 Growing atmosphere, N 2 As N source, siH 4 Is a Si source, C 2 H 4 As C source, siH 4 、C 2 H 4 And N 2 The partial pressure ratio of (2) is 1 (1-4) and 5-10.
The first buffer layer and the second buffer layer are both SiCN materials, and the SiCN materials are made of Si 3 N 4 、Si 3-a C a N 4 (a=1, 2), siC, and the like. The N source access amount of the second buffer layer is larger than that of the first buffer layer; si source access of the second buffer layerThe amount > the Si source passing amount of the first buffer layer. The higher Si concentration and N concentration in the second buffer layer are beneficial to improving the crystal growth quality of the 3C-SiC layer, thereby improving the luminous efficiency of the light emitting diode.
S203 growth of a 3C-SiC layer:
adopting CVD to grow at 1000-1400 deg.C under 10-50Torr, and using H 2 Generating an atmosphere of C 2 H 4 As C source, siH 4 Is a Si source, C 2 H 4 And SiH 4 The partial pressure ratio of (1) to (2) is 1, and the epitaxial growth time is 120to 150 minutes.
In one embodiment, the sum of the thicknesses of the first buffer layer, the second buffer layer, and the 3C-SiC layer is 0.5 to 2 μm. If the sum of the thicknesses of the first buffer layer, the second buffer layer and the 3C-SiC layer is less than 0.5 mu m, mismatch between the substrate and the epitaxial structure cannot be relieved; if the sum of the thicknesses of the first buffer layer, the second buffer layer and the 3C-SiC layer is more than 2 mu m, resource waste is caused. Illustratively, the sum of the thicknesses of the first buffer layer, the second buffer layer, and the 3C-SiC layer is 0.5 μm, 0.8 μm, 1 μm, 1.2 μm, 1.5 μm, 1.8 μm, or 2 μm, but is not limited thereto. The thickness ratio of the first buffer layer, the second buffer layer, and the 3C-SiC layer is 1 (1-2): (1-3), and exemplary thickness ratios of the first buffer layer, the second buffer layer, and the 3C-SiC layer are 1:1:1, 1:2:3, 1:1:3, or 1:2:1, but are not limited thereto.
In one embodiment, the AlN layer and the first buffer layer have a thickness ratio of 1 (8-12). Illustratively, the thickness ratio of the AlN layer to the first buffer layer is 1:8, 1:9, 1:10, 1:11, or 1:12, but is not limited thereto.
The SiCN material grows between the Si substrate and the 3C-SiC layer, so that lattice mismatch between the 3C-SiC layer and the Si substrate can be regulated, the quality of the 3C-SiC film is improved, the cost is reduced, and the crystal quality of the GaN epitaxial structure is improved.
S300, growing an undoped GaN layer:
MOCVD is adopted for growth, the growth temperature is 1050-1200 ℃, the growth pressure is 100-600Torr, and N is introduced 2 And H 2 Is carrier gas, TMGa is Ga source, NH 3 Is N source, and grows to a thickness of 1-5 μmDoping the GaN layer. Preferably, the thickness of the undoped GaN layer is 2-3 μm.
The undoped GaN layer has higher growth temperature and lower growth pressure, and the prepared GaN crystal has better quality. Along with the increase of the thickness of the undoped GaN layer, the compressive stress can be released through stacking faults, the line defects are reduced, the crystal quality is improved, and the reverse leakage current is reduced, but the increase of the thickness of the undoped GaN layer consumes more Ga source materials, so that the epitaxial cost of the LED is greatly increased, the thickness of the undoped GaN layer is controlled, the production cost is saved, and the GaN material has higher crystal quality.
S400 growth of n-type GaN layer:
MOCVD is adopted for growth, the growth temperature is 1050-1200 ℃, the growth pressure is 100-600Torr, and N is introduced 2 And H 2 Is carrier gas, TMGa is Ga source, NH 3 As N source, siH 4 Providing doping with a grown Si doping concentration of 1×10 19 -5×10 19 cm -3 An n-type GaN layer with a thickness of 2-3 μm.
Firstly, the n-type GaN layer provides sufficient electrons for LED luminescence, secondly, the resistivity of the n-type GaN layer is higher than that of the transparent electrode on the p-GaN layer, so that the resistivity of the n-type GaN layer can be effectively reduced due to sufficient Si doping, and finally, the stress can be effectively released due to sufficient thickness of the n-type GaN layer, so that the luminous efficiency of the light-emitting diode is improved.
S500 growth of multiple quantum well layers:
MOCVD is adopted for growth, the growth temperature is 790-810 ℃, the growth pressure is 50-300Torr, and N is introduced 2 As carrier gas, NH 3 An InGaN quantum well layer with an In composition of 0.2-0.4 and a thickness of 2-5nm is grown by taking an N source, TMIn as an In source and TEGa as a Ga source; the growth temperature is 800-900 ℃, the growth pressure is 50-300Torr, the In source is closed, the other source gases are kept unchanged, TMAL is introduced as an Al source, and an AlGaN quantum barrier layer with the Al component of 0.01-0.1 and the thickness of 5-12nm is grown; and circularly growing an InGaN quantum well layer and an AlGaN quantum barrier layer with 6-12 cycles.
The multi-quantum well layer is an electron and hole composite region, and the reasonable structural design can obviously increase the overlapping degree of the electron and hole wave functions, so that the luminous efficiency of the light-emitting diode is improved.
S600 growth of electron blocking layer:
MOCVD is adopted for growth, the growth temperature is 900-1000 ℃, the growth pressure is 100-300Torr, and N is introduced 2 And H 2 As carrier gas, NH 3 An AlInGaN electron blocking layer with the thickness of 10-40nm is grown by using an N source, TMIn as an In source, TMAL as an Al source and TEGa as a Ga source.
In one embodiment, the AlInGaN electron blocking layer has an Al composition of 0.005-0.1 and an in composition of 0.01-0.2. The electron blocking layer can not only effectively limit electron overflow, but also reduce blocking of holes, improve injection efficiency of holes to the quantum well, reduce carrier auger recombination, and improve luminous efficiency of the light emitting diode.
S700 growth of p-type GaN layer:
MOCVD is adopted for growth, the growth temperature is 900-1050 ℃, the growth pressure is 100-600Torr, and N is introduced 2 And H 2 As carrier gas, NH 3 Is N source, TEGa is Ga source, cp 2 Mg providing doping with a grown Mg doping concentration of 1 x 10 19 -1×10 21 cm -3 And a p-type GaN layer with the thickness of 10-50 nm.
For the LED structure containing the V-shaped pits, the higher growth temperature of the p-type GaN layer is beneficial to combining the V-shaped pits, so that the LED epitaxial wafer with a smooth surface is obtained. The high Mg doping concentration of the p-type GaN layer may damage the crystal quality, while the low doping concentration may affect the hole concentration.
The invention is further illustrated by the following specific examples.
Example 1
The embodiment provides a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps:
s100 provides a Si substrate:
ultrasonically cleaning the Si substrate in anhydrous acetone for 10min to remove grease; ultrasonically cleaning in absolute ethyl alcohol for 10min to remove organic matters; after the surface oxide is cleaned by a mixed solution of concentrated sulfuric acid (98 wt%) and hydrogen peroxide (30 wt%) in a volume ratio of 4:1, the surface oxide is removed by hydrofluoric acid (5 wt%).
S201 growth of a first buffer layer:
adopting CVD growth, the growth temperature is 850 ℃, the growth pressure is 80Torr, and H is adopted 2 Growing atmosphere, N 2 As N source, siH 4 Is a Si source, C 2 H 4 As C source, siH 4 、C 2 H 4 And N 2 The partial pressure ratio of (2) was 1:6:12, and a first buffer layer having a thickness of 0.5 μm was grown.
S202 growing a second buffer layer:
adopting CVD growth, the growth temperature is 900 ℃, the growth pressure is 60Torr, and H is adopted 2 Growing atmosphere, N 2 As N source, siH 4 Is a Si source, C 2 H 4 As C source, siH 4 、C 2 H 4 And N 2 The partial pressure ratio of (2:3:14), and the thickness of the second buffer layer was 0.5. Mu.m.
S203 growth of a 3C-SiC layer:
adopting CVD growth, the growth temperature is 1160 ℃, the growth pressure is 50Torr, and H is adopted 2 Generating an atmosphere of C 2 H 4 As C source, siH 4 Is a Si source, C 2 H 4 And SiH 4 The partial pressure ratio of (2) is 1:1.5, the epitaxial growth time is 120min, and the 3C-SiC layer with the thickness of 0.5 μm is grown.
S300, growing an undoped GaN layer:
MOCVD is adopted for growth, the growth temperature is 1100 ℃, the growth pressure is 150Torr, and N is introduced 2 And H 2 Is carrier gas, TMGa is Ga source, NH 3 An undoped GaN layer was grown to a thickness of 2.5 μm as the N source.
S400 growth of n-type GaN layer:
MOCVD is adopted for growth, the growth temperature is 1120 ℃, the growth pressure is 100Torr, and N is introduced 2 And H 2 Is carrier gas, TMGa is Ga source, NH 3 As N source, siH 4 Providing doping with a grown Si doping concentration of 2.5X10 19 cm -3 An n-type GaN layer with a thickness of 2 μm.
S500 growth of multiple quantum well layers:
MOCVD is adopted for growth, the growth temperature is 795 ℃, the growth pressure is 200Torr, and N is introduced 2 As carrier gas, NH 3 Is N source, TMIn is In source, TEGa is Ga source, and In with thickness of 3.5nm is grown 0.22 Ga 0.78 An N quantum well layer; the growth temperature is 855 ℃, the growth pressure is 200Torr, the In source is closed, the other source gases are kept unchanged, TMAL is introduced as Al source, and the Al with the thickness of 9.8nm is grown 0.05 Ga 0.95 An N quantum barrier layer; cycle growth of 10 cycles of In 0.22 Ga 0.78 N quantum well layer and Al 0.05 Ga 0.95 And an N quantum barrier layer.
S600 growth of electron blocking layer:
MOCVD is adopted for growth, the growth temperature is 965 ℃, the growth pressure is 200Torr, and N is introduced 2 And H 2 As carrier gas, NH 3 TMIn is an In source, TMAL is an Al source, TEGa is a Ga source, an AlInGaN electron blocking layer with the thickness of 15nm is grown, the Al component gradually changes from 0.01 to 0.05 along the growth direction of the epitaxial layer, and the In component is 0.01.
S700 growth of p-type GaN layer:
MOCVD is adopted for growth, the growth temperature is 985 ℃, the growth pressure is 200Torr, and N is introduced 2 And H 2 As carrier gas, NH 3 Is N source, TEGa is Ga source, cp 2 Mg providing doping with a grown Mg doping concentration of 2 x 10 20 cm -3 A p-type GaN layer with a thickness of 15 nm.
Example 2
The embodiment provides a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps:
s100 provides a Si substrate:
ultrasonically cleaning the Si substrate in anhydrous acetone for 10min to remove grease; ultrasonically cleaning in absolute ethyl alcohol for 10min to remove organic matters; after the surface oxide is cleaned by a mixed solution of concentrated sulfuric acid (98 wt%) and hydrogen peroxide (30 wt%) in a volume ratio of 4:1, the surface oxide is removed by hydrofluoric acid (5 wt%).
S200 growing an AlN layer:
adopting CVD growth, the growth temperature is 1350 ℃, the growth pressure is 120torr, and H is adopted 2 For growth atmosphere, TMAL is Al source, NH 3 An AlN layer having a thickness of 0.05 μm was grown as an N source.
S201 growth of a first buffer layer:
adopting CVD growth, the growth temperature is 850 ℃, the growth pressure is 80Torr, and H is adopted 2 Growing atmosphere, N 2 As N source, siH 4 Is a Si source, C 2 H 4 As C source, siH 4 、C 2 H 4 And N 2 The partial pressure ratio of (2) was 1:6:12, and a first buffer layer having a thickness of 0.5 μm was grown.
S202 growing a second buffer layer:
adopting CVD growth, the growth temperature is 900 ℃, the growth pressure is 60Torr, and H is adopted 2 Growing atmosphere, N 2 As N source, siH 4 Is a Si source, C 2 H 4 As C source, siH 4 、C 2 H 4 And N 2 The partial pressure ratio of (2:3:14), and the thickness of the second buffer layer was 0.5. Mu.m.
S203 growth of a 3C-SiC layer:
adopting CVD growth, the growth temperature is 1160 ℃, the growth pressure is 50Torr, and H is adopted 2 Generating an atmosphere of C 2 H 4 As C source, siH 4 Is a Si source, C 2 H 4 And SiH 4 The partial pressure ratio of (2) is 1:1.5, the epitaxial growth time is 120min, and the 3C-SiC layer with the thickness of 0.5 μm is grown.
The remainder was the same as in example 1.
Example 3
The embodiment provides a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps:
s100 provides a Si substrate:
ultrasonically cleaning the Si substrate in anhydrous acetone for 10min to remove grease; ultrasonically cleaning in absolute ethyl alcohol for 10min to remove organic matters; after the surface oxide is cleaned by a mixed solution of concentrated sulfuric acid (98 wt%) and hydrogen peroxide (30 wt%) in a volume ratio of 4:1, the surface oxide is removed by hydrofluoric acid (5 wt%).
At C 2 H 4 And carbonizing the Si substrate in the atmosphere at the carbonization temperature of 1000 ℃ to form a SiC layer with the thickness of 80 nm.
S200 growing an AlN layer:
adopting CVD growth, the growth temperature is 1350 ℃, and the growth pressure is 120torr, so as toH 2 For growth atmosphere, TMAL is Al source, NH 3 An AlN layer having a thickness of 0.05 μm was grown as an N source.
S201 growth of a first buffer layer:
adopting CVD growth, the growth temperature is 850 ℃, the growth pressure is 80Torr, and H is adopted 2 Growing atmosphere, N 2 As N source, siH 4 Is a Si source, C 2 H 4 As C source, siH 4 、C 2 H 4 And N 2 The partial pressure ratio of (2) was 1:6:12, and a first buffer layer having a thickness of 0.5 μm was grown.
S202 growing a second buffer layer:
adopting CVD growth, the growth temperature is 900 ℃, the growth pressure is 60Torr, and H is adopted 2 Growing atmosphere, N 2 As N source, siH 4 Is a Si source, C 2 H 4 As C source, siH 4 、C 2 H 4 And N 2 The partial pressure ratio of (2:3:14), and the thickness of the second buffer layer was 0.5. Mu.m.
S203 growth of a 3C-SiC layer:
adopting CVD growth, the growth temperature is 1160 ℃, the growth pressure is 50Torr, and H is adopted 2 Generating an atmosphere of C 2 H 4 As C source, siH 4 Is a Si source, C 2 H 4 And SiH 4 The partial pressure ratio of (2) is 1:1.5, the epitaxial growth time is 120min, and the 3C-SiC layer with the thickness of 0.5 μm is grown.
The remainder was the same as in example 1.
Example 4
The embodiment provides a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps:
s100 provides a Si substrate:
ultrasonically cleaning the Si substrate in anhydrous acetone for 10min to remove grease; ultrasonically cleaning in absolute ethyl alcohol for 10min to remove organic matters; after the surface oxide is cleaned by a mixed solution of concentrated sulfuric acid (98 wt%) and hydrogen peroxide (30 wt%) in a volume ratio of 4:1, the surface oxide is removed by hydrofluoric acid (5 wt%).
At C 2 H 4 Carbonizing the Si substrate in atmosphere at 1000deg.C to form Si with thickness of 80nmAnd C layer.
S200 growing an AlN layer:
adopting CVD growth, the growth temperature is 1350 ℃, the growth pressure is 120Torr, and H is adopted 2 An AlN layer having a thickness of 0.025 μm was grown in a growth atmosphere.
S201 growth of a first buffer layer:
adopting CVD growth, the growth temperature is 850 ℃, the growth pressure is 80Torr, and H is adopted 2 Growing atmosphere, N 2 As N source, siH 4 Is a Si source, C 2 H 4 As C source, siH 4 、C 2 H 4 And N 2 The partial pressure ratio of (2) was 1:6:12, and a first buffer layer having a thickness of 0.25 μm was grown.
S202 growing a second buffer layer:
adopting CVD growth, the growth temperature is 900 ℃, the growth pressure is 60Torr, and H is adopted 2 Growing atmosphere, N 2 As N source, siH 4 Is a Si source, C 2 H 4 As C source, siH 4 、C 2 H 4 And N 2 The partial pressure ratio of (2:3:14), and the thickness of the second buffer layer was 0.5. Mu.m.
S203 growth of a 3C-SiC layer:
adopting CVD growth, the growth temperature is 1160 ℃, the growth pressure is 50Torr, and H is adopted 2 Generating an atmosphere of C 2 H 4 As C source, siH 4 Is a Si source, C 2 H 4 And SiH 4 The partial pressure ratio of (2) is 1:1.5, the epitaxial growth time is 120min, and the 3C-SiC layer with the thickness of 0.75 μm is grown.
The remainder was the same as in example 1.
Comparative example 1
The comparative example provides a method for preparing a light-emitting diode epitaxial wafer, which comprises the following steps:
s100 provides a Si substrate:
ultrasonically cleaning the Si substrate in anhydrous acetone for 10min to remove grease; ultrasonically cleaning in absolute ethyl alcohol for 10min to remove organic matters; after the surface oxide is cleaned by a mixed solution of concentrated sulfuric acid (98 wt%) and hydrogen peroxide (30 wt%) in a volume ratio of 4:1, the surface oxide is removed by hydrofluoric acid (5 wt%).
S200 growing an AlN layer:
adopting CVD growth, the growth temperature is 1350 ℃, the growth pressure is 120Torr, and H is adopted 2 Growth atmosphere, NH 3 TMAL was used as an Al source, and an AlN layer was grown to a thickness of 1.5. Mu.m.
S201, S202, and S203 are not performed. The remainder was the same as in example 1.
Comparative example 2
The comparative example provides a method for preparing a light-emitting diode epitaxial wafer, which comprises the following steps:
s100 provides a Si substrate:
ultrasonically cleaning the Si substrate in anhydrous acetone for 10min to remove grease; ultrasonically cleaning in absolute ethyl alcohol for 10min to remove organic matters; after the surface oxide is cleaned by a mixed solution of concentrated sulfuric acid (98 wt%) and hydrogen peroxide (30 wt%) in a volume ratio of 4:1, the surface oxide is removed by hydrofluoric acid (5 wt%).
S201 growth of a first buffer layer:
adopting CVD growth, the growth temperature is 850 ℃, the growth pressure is 80Torr, and H is adopted 2 Growing atmosphere, N 2 As N source, siH 4 Is a Si source, C 2 H 4 As C source, siH 4 、C 2 H 4 And N 2 The partial pressure ratio of (2) was 1:6:12, and a first buffer layer having a thickness of 0.5 μm was grown.
S203 growth of a 3C-SiC layer:
adopting CVD growth, the growth temperature is 1160 ℃, the growth pressure is 50Torr, and H is adopted 2 Generating an atmosphere of C 2 H 4 As C source, siH 4 Is a Si source, C 2 H 4 And SiH 4 The partial pressure ratio of (2) is 1:1.5, the epitaxial growth time is 120min, and the 3C-SiC layer with the thickness of 0.5 μm is grown.
S202 is not included, and the rest is the same as in example 1.
Comparative example 3
The comparative example provides a method for preparing a light-emitting diode epitaxial wafer, which comprises the following steps:
s100 provides a Si substrate:
ultrasonically cleaning the Si substrate in anhydrous acetone for 10min to remove grease; ultrasonically cleaning in absolute ethyl alcohol for 10min to remove organic matters; after the surface oxide is cleaned by a mixed solution of concentrated sulfuric acid (98 wt%) and hydrogen peroxide (30 wt%) in a volume ratio of 4:1, the surface oxide is removed by hydrofluoric acid (5 wt%).
S202 growing a second buffer layer:
adopting CVD growth, the growth temperature is 900 ℃, the growth pressure is 60Torr, and H is adopted 2 Growing atmosphere, N 2 As N source, siH 4 Is a Si source, C 2 H 4 As C source, siH 4 、C 2 H 4 And N 2 The partial pressure ratio of (2:3:14), and the thickness of the second buffer layer was 0.5. Mu.m.
S203 growth of a 3C-SiC layer:
adopting CVD growth, the growth temperature is 1160 ℃, the growth pressure is 50Torr, and H is adopted 2 Generating an atmosphere of C 2 H 4 As C source, siH 4 Is a Si source, C 2 H 4 And SiH 4 The partial pressure ratio of (2) is 1:1.5, the epitaxial growth time is 120min, and the 3C-SiC layer with the thickness of 0.5 μm is grown.
S201 is not included, and the rest is the same as in example 1.
Performance test:
the light emitting diode epitaxial wafers were prepared by the preparation methods of examples 1 to 4 and comparative examples 1 to 3, and 10mil×24mil LED chips were prepared, 300 LED chips were extracted, and the appearance yield was measured and the light emission luminance was measured at 120mA current. The light efficiency improvement rate and the appearance yield improvement rate of examples 1 to 4 and comparative examples 2 and 3 as compared with comparative example 1 were calculated, and the detection results are shown in table 1.
Table 1 results of testing the photoelectric properties of led epitaxial wafers
As shown in the results of Table 1, the appearance yield and the luminous efficiency of the chips prepared by the preparation method of the LED epitaxial wafer provided by the embodiment of the invention are obviously improved.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that changes and modifications may be made without departing from the principles of the invention, such changes and modifications are also intended to be within the scope of the invention.

Claims (10)

1. The preparation method of the light-emitting diode epitaxial wafer is characterized by comprising the following steps of:
s100, providing a Si substrate;
s201 at H 2 Under a growth atmosphere, introducing an N source, an Si source and a C source, and growing a first buffer layer on the Si substrate;
s202 at H 2 Under the growth atmosphere, introducing an N source, an Si source and a C source, and growing a second buffer layer on the first buffer layer;
s203 at H 2 And under the growth atmosphere, introducing a Si source and a C source, and growing a 3C-SiC layer on the second buffer layer.
The N source access amount of the second buffer layer is larger than that of the first buffer layer; the Si source access amount of the second buffer layer is larger than that of the first buffer layer;
s300, growing an undoped GaN layer on the 3C-SiC layer;
s400, growing an n-type GaN layer on the undoped GaN layer;
s500, growing a multi-quantum well layer on the n-type GaN layer;
s600, growing an electron blocking layer on the multiple quantum well layer;
s700 grows a p-type GaN layer on the electron blocking layer.
2. The method for manufacturing a light-emitting diode epitaxial wafer according to claim 1, further comprising: s200 at H 2 And under the growth atmosphere, introducing an Al source and an N source, and growing an AlN layer on the Si substrate.
3. The method for preparing a light-emitting diode epitaxial wafer according to claim 1, wherein the first buffer layer is grown by CVD at a growth temperature of 700-900 ℃ and a growth pressure of 10-100torr, and the partial pressure ratio of Si source, C source and N source is 1 (5-8): 10-15.
4. The method for preparing an epitaxial wafer of a light-emitting diode according to claim 2, wherein the AlN layer is grown by CVD at a temperature of 1000-1400 ℃ and a growth pressure of 100-500torr.
5. The method for preparing a light-emitting diode epitaxial wafer according to claim 1, wherein the second buffer layer is grown by CVD at a growth temperature of 700-900 ℃ and a growth pressure of 10-100torr, and the partial pressure ratio of Si source, C source and N source is 1 (1-4): 5-10.
6. The method for preparing a light-emitting diode epitaxial wafer according to claim 1, wherein the 3C-SiC layer is grown by CVD at a temperature of 1000-1400 ℃, a growth pressure of 10-50Torr, a growth time of 120-150min, and a partial pressure ratio of C source to Si source of 1 (1-2).
7. The method for manufacturing a light-emitting diode epitaxial wafer according to claim 1, wherein S100 further comprises: and carbonizing the Si substrate, wherein the carbonization temperature is 1000-1200 ℃.
8. The method of manufacturing a light emitting diode epitaxial wafer according to claim 1, wherein the sum of thicknesses of the first buffer layer, the second buffer layer and the 3C-SiC layer is 0.5 to 2 μm.
9. The method of manufacturing a light-emitting diode epitaxial wafer according to claim 8, wherein the thickness ratio of the first buffer layer, the second buffer layer and the 3C-SiC layer is 1 (1-2): 1-3.
10. The method for manufacturing a light emitting diode epitaxial wafer according to claim 2, wherein the thickness ratio of the AlN layer to the first buffer layer is 1 (8-12).
CN202310952921.7A 2023-07-31 2023-07-31 Preparation method of light-emitting diode epitaxial wafer Pending CN116978986A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117423787A (en) * 2023-12-18 2024-01-19 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117423787A (en) * 2023-12-18 2024-01-19 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
CN117423787B (en) * 2023-12-18 2024-02-23 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode

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