CN1169291C - Product-to-pulse conversion method and circuit - Google Patents

Product-to-pulse conversion method and circuit Download PDF

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Publication number
CN1169291C
CN1169291C CNB011319674A CN01131967A CN1169291C CN 1169291 C CN1169291 C CN 1169291C CN B011319674 A CNB011319674 A CN B011319674A CN 01131967 A CN01131967 A CN 01131967A CN 1169291 C CN1169291 C CN 1169291C
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China
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product
output
frequency
pulse
signal
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CN1348254A (en
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清 李
李清
刘阳
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Shanghai Fudan Microelectronics Group Co Ltd
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Shanghai Fudan Microelectronics Co Ltd
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Abstract

The present invention relates to a method and a circuit for converting products into pulses. The the prior art is mainly composed of an analog circuit which can not meet the requirements in precision, linearity, etc. The present invention develops a method and a device for converting analogue signal products into output pulses with definite frequency, especially for converting the products of two analogue signals into output pulses with definite frequency, wherein the frequency of the pulses is relevant to the magnitude of the signal products. The analogue signals are converted into digital signals 1 and modulation signals 2 by an analog-digital converter and a modulator, a digital multiplier multiplies the digital signals 1 and the modulation signals 2 so as to generate digital signals 2, a filter filters the digital signals 2 so as to generate products, and a product-pulse converter converts the products into pulse signals with definite frequency, wherein the frequency of the pulses is relevant to the item size magnitude of the products, the sampling frequency of the two paths of analogue signals can be different, and the output frequency of the products and the working frequency of the product-pulse converter can also be different.

Description

Be used for method and the circuit of product to pulses switch
Technical field
The present invention is a kind of method and circuit that the analog signal product is converted to pulse output that be used for, and the frequency of pulse is directly proportional with the size of product.
Background technology
The product of analog signal is converted to pulse output and comprises two parts: the generation of the product of analog signal and product are to the conversion of pulse output.Common implementation method as shown in Figure 2, the two-way analog signal is multiplied each other by analog multiplier (6), produce product (pd), this product (pd) produces with pulse signal output by a voltage-frequency converter (7), and the value of the frequency of this pulse signal and product (pd) is proportional.Typical voltage-frequency converter circuit is made up of analogue integrator (8), comparator (9), logic control circuit (10) and analog switch (11) as shown in Figure 3.This implementation method mainly is made up of analog circuit, and owing to the restriction of analog circuit at aspects such as precision, linearity, imbalance, speed, under the application scenario that requires degree of precision and output frequency, this implementation method usually can't satisfy system requirements.In order to address this problem, usually adopting analog signal conversion is digital signal, multiply each other with digital signal and to obtain product, method by digital processing is converted to pulse output with product again, in order to guarantee precision, analog signal need be converted to the digital signal of multidigit, makes the larger of analogue-to-digital converters circuit and digital multiplier circuit, and the cost of circuit increases.
Summary of the invention
The objective of the invention is to study a kind of precision height, good linearity, speed is fast, cost is low product method and circuit thereof to pulses switch.
According to the present invention, the product of analog signal is realized by the following method to the conversion of pulse output:
1, one tunnel analog signal is converted to the digital signal (dx1) of N position through over-sampling sigma-delta modulator and low pass filter;
2, other one tunnel analog signal is converted to 1 modulation signal (mx2) through the over-sampling sigma-delta modulator;
3, the digital signal of N position (dx1) multiplies each other through digital multiplier with 1 modulation signal (mx2), produces the digital signal (dx2) of N position;
4, the digital signal of N position (dx2) produces the product (pd) of N position through low pass filter filtering;
5, the digital signal of N position (dx2) is latched in the register 1;
6, the adder addition of the content of the content of register 1 and register 2 by the M position produces the numeral of M position and (sum);
7, the numeral of M position and (sum) with the predetermined constant (constant) of M position relatively, if numeral and (sum) less than constant (constant), then with numeral with (sum) be latched in the register 2; If numeral and (sum) more than or equal to constant (constant) then is latched in the register 2 with numeral with the difference (sum-constant) of constant, simultaneously, produce spill over (ov);
8, the frequency of the pulse train formed of the signal that is produced by spill over or spill over is directly proportional with the size of the product of importing analog signal.
Above-described transfer process is seen Fig. 4.
Modulator 1 (12) and modulator 2 (13) all are the over-sampling sigma-delta modulators, are 1 bit data stream of exporting with predetermined over-sampling frequency (mx1 and mx2) with the input analog signal conversion.Low pass filter 1 (14) carries out low-pass filtering to 1 bit data stream (mx1) of the first via, the high-frequency noise that the filtering modulator is produced, simultaneously, as decimation filter, 1 bit data stream (mx1) is converted to N bit data (as 16) (dx1), and the data rate of N bit data (dx1) is still identical with (mx1).
In the sample frequency of two-way analog input signal not simultaneously, digital multiplier (15) will extract or interpolation N bit data (dx1), and make the two-way input of multiplier sampling: N bit data (dx1) has identical sample rate with 1 modulation signal (mx2).
According to the principle of sigma-delta modulator, 1 bit data stream of its output should have two values: ' 1 ' and ' 1 ', realize for the ease of digital circuit, and need to represent ' 1 ' with ' 0 '.
The two-way input of multiplier (15) comes from the N bit data (dx1) of low pass filter 1 (14) output and 1 modulation signal (mx2) of modulator 2 (13) outputs respectively, its structure such as Fig. 5, form by negate circuit (22) and alternative circuit (23), when mx2 is ' 1 ', the output dx2=dx1 of multiplier; When mx2 was ' 0 ', the equivalence that is equivalent to modulator was output as ' 1 ', so the output dx2=-dx1 of multiplier.
Low pass filter 2 (16) carries out low-pass filtering to the digital signal (dx2) of multiplier output, with the high frequency quantizing noise that filtering modulator 2 (13) is produced, is output as the digital signal (pd) of N position, corresponding to the product of two-way analog input.
Because the generation of product is relevant with the sample frequency of sigma-delta modulator, and the frequency of sigma-delta modulator will be subjected to the restriction of analog circuit, therefore, in the present invention, between product output (pd) and product-pulse converter, be provided with register 1 (17), make the frequency of transducer thereafter can be different, thereby make final pulse output frequency unrestricted with the operating frequency of the circuit of first half.The effect of register 1 (17) is equivalent to a zeroth order interpolater.
The product (pd) that adder (18) latchs register 1 (17) and the content addition of register 2 (21), its result is stored in the register 2 (21) again, therefore, adder (18) and register 2 (21) have been formed an integrator, but the result of integrator will be no more than predetermined constant (constant).The output (sum) of adder (18) will be compared with the constant (constant) deposited in the literal register (19), when the output (sum) of adder (18) during less than constant (constant), the output of adder (sum) will directly deposit register 2 (21) in; When the output (sum) of adder during more than or equal to constant (constant), the output of adder (sum) deposits in the register 2 (21) with the difference (sum-constant) of constant (constant), simultaneously, to produce overflow pulse, the frequency of pulse is directly proportional with product (pd), and (constant) is inversely proportional to constant value, product increases, when constant was constant, accumulator can surpass constant in the short cycle, and output pulse frequency increases; Product is constant, and when constant increased, accumulator needed adding up of long period could surpass constant value, and output pulse frequency reduces.Example 1
1) N=4, pd=0001 (=1), constant 1=01000 (=8)
Example 1
Clock product input register 2 and overflowing
1 0001 0000 0001 0
2 0001 0001 0010 0
3 0001 0010 0011 0
4 0001 0011 0100 0
5 0001 0100 0101 0
6 0001 0101 0110 0
7 0001 0110 0111 0
8 0001 0111 1000 1
9 0001 0000 0001 0
10 0001 0001 0010 0
11 0001 0010 0011 0
12 0001 0011 0100 0
13 0001 0100 0101 0
14 0001 0101 0110 0
15 0001 0110 0111 0
16 0001 0111 1000 1
17 0001 0000 0001 0
By example 1 as can be seen, the frequency of overflow pulse is
F1=f/8, f are the sample frequency of register 1.
2)N=4,pd=0011(=3),Constant1=01000(=8)
Example 2
Clock product input register 2 and overflowing
1 0011 0000 0011 0
2 0011 0011 0110 0
3 0011 0110 1001 1
4 0011 0001 0100 0
5 0011 0100 0111 0
6 0011 0111 1010 1
7 0011 0010 0101 0
8 0011 0101 1000 1
9 0011 0000 0011 0
10 0011 0011 0110 0
11 0011 0110 1001 1
12 0011 0001 0100 0
13 0011 0100 0111 0
14 0011 0111 1010 1
15 0011 0010 0101 0
16 0011 0101 1000 1
17 0011 0000 0011 0
By example 2 as can be seen, the frequency of overflow pulse is
F2=3*f/8=3*f1, f are the sample frequency of register 1.
3) N=4, pd=0011 (=3), constant 3=1100 (=12)
Example 3
Clock product input register 2 and overflowing
1 0011 0000 0011 0
2 0011 0011 0110 0
3 0011 0110 1001 0
4 0011 1001 1100 1
5 0011 0000 0011 0
6 0011 0011 0110 0
7 0011 0110 1001 0
8 0011 1001 1100 1
9 0011 0000 0011 0
By example 3 as can be seen, the frequency of overflow pulse is
F3=f/4=f2/ (12/8)=f2/ (Constant3/Constant1), f is the sample frequency of register 1.
In above example, for simplicity, the product definite value.As can be seen, the overflow pulse frequency is directly proportional with product (pd), and (constant) is inversely proportional to constant value.In actual applications, become owing to import when analog signal is, become when product also is, overflowing frequency will be proportional with the average of product.According to different application requirements, change the value of constant, to import under the constant situation, the output frequency of pulse will change.
To the required precision of output pulse frequency, can pass through to increase constant, and product be done corresponding increase realize.With above-mentioned example 1 is example, if product becomes when being, minimum value is 00001, and constant is 5 (1 bit sign positions), is benchmark with the frequency of register 1 (17), and the precision of pulse frequency is 1/8; If to get constant is 6, correspondingly: Constant=010000, the product minimum value is 00001, then the precision of pulse frequency is 1/16, but to the product of example 1, correspondingly becomes 00010, and is constant to guarantee the pulse output frequency.
The circuit that the inventive method realizes can be used for power measurement, effective value is measured or the like, has obtained the excellent results that cost is low, precision is high, simple in structure, proves absolutely the inventive method effect widely.
Among the present invention, the product generative circuit has very big application flexibility, can be applied to multiple fields such as power measurement and effective value measurement, simultaneously, at different application requirements, can carry out multiplying each other again after other processing (as high-pass filtering, figure adjustment) to digital signal, this before multiplying each other the disposal ability to input signal be one of advantage of the present invention.
The generation mechanism of the setting of constant and overflow pulse in the pulse conversion circuit makes the frequency of pulse, precision all controlled, and this is two of an advantage of the present invention.
The interpolation functions that implies in the multiplier (15) and the interpolation effect of register 1 (17), make the present invention can be applied to the different situation of frequency input signal, the paired pulses output frequency makes application more flexible also without limits simultaneously, and this is three of an advantage of the present invention.
Circuit structure of the present invention is simple, and circuit scale is less, can realize with common CMOS technology.
Description of drawings
Fig. 1 is a circuit block diagram of the present invention.
Wherein, (1) is analogue-to-digital converters, and (2) are sigma-delta modulator, and (3) are digital multiplier, and (4) are low pass filter, and (5) are pulse converter.
Fig. 2 is that existing analog signal multiplies each other and product arrives pulses switch implementation method figure.
Wherein, (6) are analog multiplier, and (7) are voltage-frequency converter.
Fig. 3 is typical voltage-frequency converter circuit structure diagram.
Wherein, (8) are analogue integrator, and (9) are analog comparator, and (10) are logic control circuit, and (11) are analog switch.Fig. 4 is the flow path switch figure that the analog signal product arrives pulse among the present invention.
Wherein, (12) be sigma-delta modulator 1, (13) be sigma-delta modulator 2, (14) are low pass filter 1, and (15) are digital multiplier, (16) be low pass filter 2, (17) be register 1, (18) are adder, and (19) are literal register, (20) be comparator and subtracter, (21) are register 2.
Fig. 5 is the digital multiplier circuit structure diagram among Fig. 4.
Wherein, (22) are the negate circuit, and (23) are Port Multiplier.
Fig. 6 is the circuit structure diagram of the embodiment of the invention.
Wherein, (24) be sigma-delta modulator 1, (25) be sigma-delta modulator 2, (26) are low pass filter 1, and (27) are 16 bit digital multipliers, (28) be low pass filter 2, (29) be 16 bit registers, (30) are 32 adders, and (31) are 32 bit constant registers, (32) be 32-bit number comparator and subtracter, (33) are 32 bit registers.
Embodiment
Analog current signal (curr) is converted to 16 digital current signal (d_I) through over-sampling sigma-delta modulator 1 (24) and low pass filter 1 (26); Analog voltage signal (volt) is converted to 1 modulated voltage signal (m_V) through over-sampling sigma-delta modulator 2 (25); 16 digital current signal (d_I) multiplies each other through digital multiplier (27) with 1 modulated voltage signal (m_V), produces 16 product of numbers signal (d_Mul); 16 product of numbers signal (d_Mul) produces 16 digital power signal (Power) through low pass filter 2 (28) filtering; 16 digital power signal (Power) is latched in 16 bit registers (29); Adder (30) addition of the content of the content of 16 bit registers (29) and 32 bit registers (33) by 32, produces 32 numeral with; 32 numeral and with 32 literal register (31) in constant (12345678h) relatively, if numeral and less than constant, then with numeral be latched in 32 bit registers (29); If numeral and more than or equal to constant then is latched in 32 bit registers (29) with numeral with the difference of constant, simultaneously, produce spill over (pulse); The frequency of the pulse train of being made up of spill over and the mean value of analog current (curr) and voltage (volt) product, promptly power (Power) is big or small in direct ratio.

Claims (8)

1, a kind of conversion method that is used for product to pulse is characterized in that:
1) analog signal multiplies each other and produces the method for product, transfers the sampled value of two-way analog signal to digital signal corresponding, two ways of digital signals is multiplied each other again, and produces product;
1. one road analog input signal is converted to the digital signal dx1 of N position through analog-digital conversion;
2. other one road analog input signal is converted to 1 modulation signal mx2 through ∑-Δ modulation;
3. the digital signal dx2 that obtains after the digital signal dx1 of N position and 1 's modulation signal mx2 being multiplied each other;
4. digital signal dx2 is carried out low-pass filtering, the product pd that obtains after the filter away high frequency noise;
2) product is converted to the method for pulse, with
With product accumulation, and with predetermined constant relatively, produce overflow pulse, the frequency of this overflow pulse is directly proportional with the size of product.
2, a kind of circuit that is used for product to the conversion method of pulse according to claim 1, it is characterized in that: circuit is connected to form by product generative circuit and pulse conversion circuit, after the product generative circuit carries out analog-digital conversion with the two-way analog input signal, multiply each other through digital multiplier, obtain the product of two-way analog signal; The product that pulse conversion circuit is produced the product generative circuit after accumulator adds up, with predetermined constant relatively, produce the pulse that is directly proportional with this product, is inversely proportional to constant value and export.
3, the circuit that is used for product to pulses switch according to claim 2 is characterized in that the product generative circuit is:
1) analogue-to-digital converters are converted to one road analog input signal digital signal dx1 of N position;
2) sigma-delta modulator 2, other one road analog input signal are converted to 1 modulation signal mx2;
3) digital multiplier is imported the digital signal dx1 of the N position that is respectively analogue-to-digital converters output and 1 modulation signal mx2 of sigma-delta modulator output, is output as the digital signal dx2 that obtains after multiplying each other, when mx2=' 1 ', and dx2=dx1; When mx2=' 0 ', dx2=-dx1;
4) low pass filter 2, are input as digital signal dx2, are output as the product pd that obtains after the filtering;
Wherein, 1) described analogue-to-digital converters comprise:
1. sigma-delta modulator 1, analog input signal is converted to 1 modulation signal mx1;
2. low pass filter 1, with 1 modulation signal mx1 filtering of modulator 1 output, and the digital signal dx1 of output N position.
4, the circuit that is used for product to pulses switch according to claim 2, when it is characterized in that the frequency of the frequency of digital signal dx1 of product generative circuit and modulation signal mx2 is inequality, digital multiplier carries out interpolation or extraction to digital signal dx1, makes the output frequency of multiplier identical with modulation signal mx2.
5, according to the described circuit that is used for product to pulses switch of claim 2, it is characterized in that the described pulse conversion circuit of claim 2 is:
1) accumulator is made up of register 1, adder and register 2, wherein:
1. register 1, latchs the output of digital multiplier in the product generative circuit;
2. register 2, latch accumulator output;
3. adder adds up the content of register 1 and register 2, and output latch is to register 2;
2) literal register is deposited predetermined constant, and this constant is relevant with the pulse output frequency;
3) comparator compares the output of adder and predetermined constant, and adder, register 2 and literal register are the M position, and when the output of adder during less than constant value, the output of adder directly is latched in the register 2; When the output of adder during more than or equal to constant value, the output of adder and the difference of constant are latched in the register 2, and produce the output pulse; The frequency of occurrences of this output pulse is relevant with the constant value in the sum of products literal register: product increases, and when constant was constant, accumulator can surpass constant in the short cycle, produce pulse output; Product is constant, and when constant increased, accumulator needed adding up of long period could surpass constant value, produces pulse output; Be that the pulse output frequency is directly proportional with product, be inversely proportional to constant.
6, product according to claim 2 is to the circuit of pulses switch, the frequency that it is characterized in that the pulse frequency of the described pulse conversion circuit of claim 2 and product generative circuit not simultaneously, the sample frequency of register 1 is identical with the frequency of pulses switch.
7, product according to claim 2 is to the circuit of pulses switch, and the sample frequency that it is characterized in that the two-way analog signal can be different.
8, the product that is used for according to claim 2 is to the circuit of pulses switch, and the coded system that it is characterized in that digital signal adopts the form of 2 complement code.
CNB011319674A 2001-10-18 2001-10-18 Product-to-pulse conversion method and circuit Expired - Lifetime CN1169291C (en)

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Application Number Priority Date Filing Date Title
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CN1924111B (en) * 2005-09-02 2010-05-05 中国科学院合肥物质科学研究院 Two-way modulation pulse electrochemical deposition apparatus
CN109026813B (en) * 2018-10-22 2024-05-17 中车洛阳机车有限公司 Electric locomotive air supply fan test tool equipment

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