CN116908612A

CN116908612A - Fault indicator, fault detection method, electronic equipment and storage medium

Info

Publication number: CN116908612A
Application number: CN202310875435.XA
Authority: CN
Inventors: 李永辉; 吕凤龙; 郑卓然; 李娜
Original assignee: Weichai New Energy Power Technology Co ltd; Weichai Power Co Ltd
Current assignee: Weichai New Energy Power Technology Co ltd; Weichai Power Co Ltd
Priority date: 2023-07-17
Filing date: 2023-07-17
Publication date: 2023-10-20

Abstract

The invention discloses a fault indicator, a fault detection method, an electronic device and a storage medium, wherein the fault indicator comprises: the system comprises N measuring modules, a signal processing module and a control module; the N input signal ends of the signal processing module are respectively connected with the N measuring modules, and the output signal end of the signal processing module is also connected with the control module; the control module is connected with the N measuring modules, and is also connected with the control end of the signal processing module, and is used for respectively collecting the state signals of the N measuring modules, and when the state signal of the ith measuring module is detected to be in a fault state, the control module is used for controlling the signal processing module to process the measuring signal of the ith measuring module, and i is more than or equal to 1 and less than or equal to N. In the invention, the corresponding signal channel is controlled to be opened when the fault occurs, so that the control module can rapidly acquire the fault measurement signal, the subsequent fault cause analysis and positioning are facilitated, and the fault detection precision is improved.

Description

Fault indicator, fault detection method, electronic equipment and storage medium

Technical Field

The present invention relates to the field of line fault detection technologies, and in particular, to a fault indicator, a fault detection method, an electronic device, and a storage medium.

Background

The cable fault indicator is a comprehensive detection device for short circuit faults and single-phase earth faults of a power cable section. The fault detection system is arranged in a ring network switch cabinet and a cable branch box in a power distribution network system, and workers can determine and judge a fault section by means of alarm indication of an indicator to find out a fault point.

At present, the cable fault indicator can find out a fault line and maintain the fault line by detecting each signal in sequence.

However, the existing detection process is cumbersome, has a delay, and causes low fault detection accuracy.

Disclosure of Invention

The invention provides a fault indicator, a fault detection method, an electronic device and a storage medium, so as to improve fault detection precision.

According to an aspect of the present invention, there is provided a fault indicator comprising: n measuring modules, a signal processing module and a control module, wherein N is more than 1;

the N input signal ends of the signal processing module are respectively connected with the N measuring modules, the output signal end of the signal processing module is also connected with the control module, and the signal processing module is used for collecting the measuring signals of the N measuring modules and transmitting the processed measuring signals to the control module;

the control module is connected with the N measuring modules, and is also connected with the control end of the signal processing module, and is used for respectively collecting the state signals of the N measuring modules, and when the state signal of the i measuring module is detected to be in a fault state, the signal processing module is controlled to process the measuring signals of the i measuring module, and i is more than or equal to 1 and less than or equal to N.

According to another aspect of the present invention, there is provided a fault detection method applied to the fault indicator as above, the fault detection method comprising:

collecting state signals of the N measuring modules;

when the state signal of the ith measuring module is detected to be in a fault state, the signal processing module is controlled to process the measuring signal of the ith measuring module, and i is more than or equal to 1 and less than or equal to N.

According to another aspect of the present invention, there is provided an electronic apparatus including:

at least one processor;

and a memory communicatively coupled to the at least one processor;

the memory stores a computer program executed by the at least one processor to cause the at least one processor to perform the fault detection method as described above.

According to another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to implement the fault detection method as described above when executed.

The embodiment of the invention provides a fault indicator, wherein a control module in the fault indicator is connected with N measuring modules and is used for respectively collecting state signals of the N measuring modules, and when the state signal of an ith measuring module is detected to be a fault state, a control signal processing module directly processes the measuring signal of the ith measuring module. Therefore, when a fault occurs, the control module can accurately judge and control to acquire a fault measurement signal in real time, so that the interval between the fault occurrence time of the measurement signal and the fault signal acquisition time of the control module is very short, the control module can obtain the rapid change and transient information of the fault signal when the fault occurs, the follow-up fault cause analysis and positioning are facilitated, and the fault detection precision is improved.

It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic illustration of a fault indicator provided by an embodiment of the present invention;

FIG. 2 is a schematic illustration of a fault indicator in comparison to FIG. 1;

FIG. 3 is a schematic illustration of yet another fault indicator provided by an embodiment of the present invention;

FIG. 4 is a schematic illustration of yet another fault indicator provided by an embodiment of the present invention;

FIG. 5 is a schematic diagram of a fault detection method according to an embodiment of the present invention;

fig. 6 is a schematic diagram of an electronic device according to an embodiment of the present invention.

Detailed Description

In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

Fig. 1 is a schematic diagram of a fault indicator provided in an embodiment of the present invention, where the fault indicator may be implemented in hardware and/or software and configured in a cable line. As shown in fig. 1, the fault indicator includes: n measuring modules 10, a signal processing module 11 and a control module 12, N >1; the N input signal ends IN of the signal processing module 11 are respectively connected with the N measuring modules 10, the output signal end OUT of the signal processing module 11 is also connected with the control module 12, and is used for collecting the measuring signals of the N measuring modules 10 and transmitting the processed measuring signals to the control module 12; the control module 12 is connected with the N measuring modules 10, the control module 12 is also connected with the control end CT of the signal processing module 11, and is used for respectively collecting the state signals of the N measuring modules 10, and when the state signal of the ith measuring module is detected to be in a fault state, the control signal processing module 11 is used for processing the measuring signal of the ith measuring module, and i is more than or equal to 1 and less than or equal to N.

In this embodiment, the fault indicator may be applied to detection of a cable line, and in particular, the cable line includes multiple signal transmission lines, and the fault indicator is connected to the cable line, and may be used to detect whether a signal of one or multiple signal transmission lines in the cable line has a fault. The fault indicator comprises N measurement modules 10, N being a positive integer greater than 1, the N measurement modules 10 being sequentially labeled 10/1, 10/2, …, 10/N. The N measuring modules 10 are connected with N paths of signal transmission lines in the cable line, one measuring module 10 is correspondingly connected with one path of signal transmission line, the measuring module 10 is used for collecting signals transmitted by the signal transmission lines, and the signals of the signal transmission lines collected by the measuring module 10 are called measuring signals.

The fault indicator comprises a signal processing module 11, the signal processing module 11 comprising at least N input signal terminals IN, which can be marked IN turn as IN/1, IN/2, …, IN/N. N input signal ends IN of the signal processing module 11 are respectively connected with N measuring modules 10, one input signal end IN is correspondingly connected with one measuring module 10, wherein a 1 st input signal end IN/1 is correspondingly connected with a 1 st measuring module 10/1, a 2 nd input signal end IN/2 is correspondingly connected with a 2 nd measuring module 10/2, and the like, an i-th input signal end is correspondingly connected with an i-th measuring module, and an N-th input signal end IN/N is correspondingly connected with an N-th measuring module 10/N. The ith measurement module transmits the collected measurement signals to the signal processing module 11 through the ith input signal terminal.

The signal processing module 11 includes an output signal terminal OUT for outputting the processed measurement signal. The output signal terminal OUT of the signal processing module 11 is connected to the control module 12. It will be appreciated that the output signal terminal OUT of the signal processing module 11 serves as a signal transmission port, and is capable of transmitting the processed measurement signal to the control module 12.

The fault indicator comprises a control module 12, and the optional control module 12 comprises an MCU or a singlechip and the like; a specific optional control module 12 includes a microprocessor chip. The control module 12 is connected to the N measurement modules 10, and is configured to collect status signals of the N measurement modules 10 respectively.

The measurement module 10 is not only used for collecting measurement signals of a signal transmission line, but also used for fault detection of the collected measurement signals. The measurement module 10 may detect whether the measurement signal is faulty, if the detection result is that the measurement signal is abnormal, the measurement module 10 may generate a fault status signal and send the fault status signal to the control module 12, and if the detection result is that the measurement signal is normal, the measurement module 10 may generate a non-fault status signal and send the non-fault status signal to the control module 12. The non-fault state may be represented by a number "0" and the fault state by a number "1", based on which, when the measurement module 10 detects that the measurement signal is abnormal, an electrical signal representing the number "1" is sent to the control module 12; when the measurement module 10 detects that the measurement signal is normal, an electrical signal representing the number "0" is sent to the control module 12. The control module 12 may include a plurality of sampling ports for respectively collecting status signals provided by a plurality of measurement modules 10, and in particular, the control module 12 may include N sampling ports, where one sampling port is correspondingly connected to one measurement module, and the sampling ports are used for collecting status signals provided by the corresponding measurement modules 10.

After the control module 12 receives the status signal of the i-th measurement module, the status signal of the i-th measurement module may be analyzed. If it is determined that the status signal output by the i-th measurement module is characterized as a fault status, the control module 12 controls the signal processing module 11 to process the measurement signal of the i-th measurement module. Specifically, the control module 12 is connected to the control end CT of the signal processing module 11. The signal processing module 11 is provided with N paths of signal channels, wherein an inlet end of the ith path of signal channel is connected with the ith input signal end, when the ith path of signal channel is started, measurement signals of the ith measurement module are collected, and the processed measurement signals are transmitted to the control module 12 through an output signal end OUT. It should be noted that, when the control module 12 controls the N signal channels to conduct in a time-sharing manner, the output signal terminal OUT outputs the processed measurement signal to the control module 12. The measurement signal of the i-th measurement module received by the i-th signal path of the signal processing module 11 is referred to herein as an i-th measurement signal.

It should be noted that, the signal processing module 11 includes a register, when the ith signal channel is opened, the measurement signal of the ith measurement module is collected, and then the ith measurement signal is processed, the processed ith measurement signal is stored in the register, and when the signal processing module 11 receives the read signal of the control module 12, the signal processing module 11 transmits the data in the register to the control module 12. It can be understood that, in this embodiment, after the control module 12 receives the status signal of the ith measurement module, if it is determined that the status signal output by the ith measurement module is characterized as a fault status, the control module 12 processes the measurement signal of the ith measurement module for the control instruction issued by the control end CT of the signal processing module 11 by the signal processing module 11, and then the control instruction may carry a read instruction, and after processing based on the ith measurement signal, the control instruction is sent to the control module 12 through a register.

As described above, the control module 12 controls the signal processing module 11 to process the ith measurement signal, that is, the control module 12 sends a control instruction to the control end CT of the signal processing module 11, which includes opening the ith signal channel instruction to open the ith signal channel corresponding to the ith measurement module, and the ith signal channel receives the ith measurement signal, and the ith measurement signal is transmitted to the control module 12 through the register and the output signal end OUT after being processed. Thereby enabling a rapid acquisition of the fault signal by the control module 12.

Assuming that at time T1, the signal processing module 11 is directly processing the (N-3) -th measurement signal according to a conventional sequence, when it is detected that the N-th measurement signal encounters a fault, the control module 12 controls the N-th signal channel to be opened, and other signal channels to be closed, so that the N-th signal channel of the signal processing module 11 can immediately collect the N-th measurement signal. Obviously, when detecting that the Nth path of measurement signal encounters a fault at the moment T1, the Nth path of signal channel can be immediately opened to collect the Nth path of measurement signal.

Fig. 2 is a schematic illustration of a fault indicator in comparison to fig. 1. As shown in fig. 2, there is no process in the fault indicator to monitor the status information of the measurement module. The fault indicator in fig. 2 includes an ADC and an MCU. The ADC is an analog-to-digital converter, the ADC is provided with N paths of analog signal input channels, each path of analog signal input channel is used for collecting analog signals, and analog signals received by different analog signal input channels can be different. The N analog signal input channels of the ADC sequentially receive analog signals analog_Signa_l, analog_Signa_2, …, analog_Signa_N. The MCU is a microcontroller. The MCU is connected with the ADC, configures the working mode of the ADC, and gates the analog signal input channel of the ADC through pins such as chip selection and the like. Under the control of the MCU, the ADC acquires the analog signal of the measurement module through the conducted analog signal input channel, processes and converts the analog signal and transmits the processed analog signal to the MCU. The MCU controls N paths of analog signal input channels in the ADC to be sequentially conducted, so that the MCU sequentially receives the processed analog_Signa_l, the processed analog_Signa_2 and … and the processed analog_Signa_N. Not all connection relations of the MCU and the ADC are shown here.

Based on the above, the 1 st path analog signal analog_sign_l enters the 1 st path analog signal input channel, is converted into a digital signal by the ADC and is transmitted to the MCU; sequentially, the 2 nd path of analog signals analog_sign_2 enter the 2 nd path of analog signal input channel, are converted into digital signals by the ADC and are transmitted to the MCU; and by analogy, the Nth analog signal analog_sign_N enters the Nth analog signal input channel and is converted into a digital signal by the ADC and is transmitted to the MCU. After the MCU analyzes the received digital signal, the MCU enters the next signal sampling flow.

Assuming that the nth analog signal encounters a fault at time T1, the ADC continues to collect all analog signals in sequence. Assuming that the analog_sign_ (N-3) is entering an (N-3) -th analog signal input channel at the moment T1, converting the (N-3) -th analog signal into a digital signal by an ADC, transmitting the digital signal to an MCU, and judging that the (N-3) -th signal is normal by the MCU, and entering the next signal sampling flow; sequentially, at the moment (T1 + delta T), the analog_Signa_ (N-2) enters an (N-2) th path of analog signal input channel, the (N-2) th path of analog signal is converted into a digital signal by an ADC and then transmitted to an MCU, and the MCU judges that the (N-2) th path of signal is normal and enters the next signal sampling flow; sequentially, at the moment (T1+2) deltaT, the analog_Signa_ (N-1) enters an (N-1) th path of analog signal input channel, the (N-1) th path of analog signal is converted into a digital signal by an ADC and then transmitted to an MCU, and the MCU judges that the (N-1) th path of signal is normal and enters the next signal sampling flow; sequentially, (T1+3 is delta T) time, angle_Signa_N enters an N-th analog signal input channel, the N-th analog signal is converted into a digital signal by an ADC and then is transmitted to an MCU, and the MCU judges that the N-th signal is abnormal.

As described above, when the nth analog signal encounters a fault at the time T1, but the fault indicator shown in fig. 2 only implements fault detection on the nth analog signal at the time (t1+3×Δt), the fault detection has a delay, and transient information during the fault carried in the fault signal cannot be detected, which is not beneficial to analysis and positioning of subsequent fault causes.

The fault detection logic of the fault indicator shown in fig. 2 is therefore: the ADC acquires each path of analog signals according to the sequence from the 1 st path of analog signal input channel to the N path of analog signal input channel no matter whether the analog signals have faults or not. Assuming that the nth analog signal is faulty, the ADC will sequentially collect the signals in sequence until the nth analog signal is collected.

In this embodiment, the control module 12 at the time T1 receives the status signal sent by the nth measurement module and detects that the nth measurement signal encounters a fault, and then the control module 12 controls the nth signal channel in the signal processing module 11 to be immediately opened, so that the signal processing module 11 processes the nth measurement signal. Therefore, the fault indicator shown in fig. 1 can quickly obtain a fault signal when a fault occurs, so that the rapid change of the fault signal when the fault occurs and the transient information when the fault occurs can be acquired, and the analysis and the positioning of the fault cause are facilitated.

The fault detection logic of the fault indicator shown in fig. 1 is therefore: assuming that the nth measurement signal has a fault, the control module 12 controls the nth signal channel to be opened immediately, and the nth signal channel of the signal processing module 11 collects the nth measurement signal.

The fault indicator shown in fig. 1 may obtain a fault signal when a fault occurs. Specifically, fig. 2 and 1 are aligned. Assuming that 10us of time is required for acquisition of one signal input channel, at the current T1 time, the nth signal fails and the ADC is acquiring the (N-3) th signal. Then in the fault indicator shown in fig. 2, the maximum possible time when the ADC collects the nth analog signal is (t1+3×10us), so the collection interval when the ADC collects the fault signal is 3×10us. In the fault indicator shown in fig. 1, the latest time when the signal processing module 11 collects the nth signal may be (t1+10us), so the collection interval when the signal processing module 11 collects the fault signal is 10us at maximum. Obviously, when a fault occurs, the acquisition interval of the fault indicator in this embodiment for acquiring the fault signal is very short and is far smaller than that of the fault indicator in fig. 2, so the fault indicator in this embodiment can acquire and record important information carried by the fault signal.

Fig. 3 is a schematic view of yet another fault indicator provided by an embodiment of the present invention. As shown in FIG. 3, the optional control module 12 includes M status signal terminals CIN, M < N, and the jth status signal terminal CIN is correspondingly connected with at least 1 measurement module 10, wherein 1.ltoreq.j.ltoreq.M; the control module 12 is configured to, when detecting that the status signal received by the jth status signal terminal CIN is in a fault state, control the signal processing module 11 to perform time-sharing processing on the measurement signal of the measurement module 10 corresponding to the jth status signal terminal CIN.

In this embodiment, the M status signal terminals CIN of the control module 12 are marked with CIN/1 and CIN/2 in sequence, and the n measurement modules 10 are marked with 10/1, 10/2, 10/3 and 10/4 in sequence, alternatively m=2 and n=4. The j-th status signal terminal CIN is correspondingly connected with at least 1 measuring module 10, wherein, as shown in fig. 3, the 1-th status signal terminal CIN/1 is correspondingly connected with 2 measuring modules 10/1 and 10/2, and the 2-th status signal terminal CIN/2 is correspondingly connected with 2 measuring modules 10/3 and 10/4. It will be appreciated by those skilled in the art that the above illustration is only one example of the embodiment of the present invention, and is not limited thereto, and for example, the jth status signal terminal may be correspondingly connected to 1 measurement module, the (j+1) th status signal terminal may be correspondingly connected to 3 measurement modules, and so on. M is a positive integer.

Assuming that the control module 12 detects that the status signal of the 1 st status signal terminal CIN/1 is characterized as a fault status, the control module 12 may determine that the fault measurement module is one or all of the 2 measurement modules 10/1 and 10/2 to which the 1 st status signal terminal CIN/1 is correspondingly connected.

At this time, the control module 12 may first send an opening command to the 1 st channel corresponding to the 1 st measurement module 10/1 in the signal processing module 11, so that the 1 st channel is opened, and then the control module 12 may collect the processed 1 st measurement signal, to determine whether the 1 st measurement signal has a fault. In sequence, the control module 12 sends an opening command to the 2 nd signal channel corresponding to the 2 nd measuring module 10/2 in the signal processing module 11, so that the 2 nd signal channel is opened, and the control module 12 can acquire the processed 2 nd measuring signal to judge whether the 2 nd measuring signal has a fault or not. Thereby realizing the rapid collection of fault signals and the subsequent processing such as fault cause analysis by the control module 12.

The more ports of the control module 12 are, the higher the cost is, and one or more measurement modules 10 are commonly connected to the same status signal terminal, and after the fault status is determined, the fault detection is sequentially performed on the measurements of the one or more measurement modules 10 corresponding to the status signal terminal. Obviously, the number of ports of the control module 12 can be reduced, and the production cost of the control module 12 can be reduced.

Referring to FIG. 1, the optional control module 12 includes N status signal terminals CIN, where the i status signal terminal CIN is correspondingly connected with the i measurement module 10, where 1.ltoreq.i.ltoreq.N; the control module 12 is configured to control the signal processing module 11 to perform processing of the measurement signal of the ith measurement module 10 when detecting that the status signal received by the ith status signal terminal CIN is in a fault state.

In this embodiment, the number of status signal terminals CIN of the control module 12 corresponds to the number of measurement modules 10, and N status signal terminals CIN of the control module 12 are marked as CIN/1, CIN/2, …, CIN/N in sequence. The jth status signal terminal CIN is correspondingly connected to the jth measurement module 10, wherein, as shown in fig. 1, the 1 st status signal terminal CIN/1 is correspondingly connected to the 1 st measurement module 10/1, the 2 nd status signal terminal CIN/2 is correspondingly connected to the 2 nd measurement module 10/2, and so on, the nth status signal terminal CIN/N is correspondingly connected to the nth measurement module 10/N.

Assuming that the control module 12 detects that the status signal of the 1 st status signal terminal CIN/1 is characterized as a fault status, the control module 12 may determine that the fault measurement module is the 1 st measurement module 10/1 to which the 1 st status signal terminal CIN/1 corresponds. At this time, the control module 12 may directly send an opening instruction to the 1 st channel of the signal processing module 11 corresponding to the 1 st measuring module 10/1 to open the 1 st channel, so that the control module 12 may collect the processed 1 st channel of the measuring signal, thereby implementing rapid collection of the fault signal by the control module 12, so as to facilitate subsequent processing such as fault cause analysis.

In this embodiment, the number of status signal ports of the control module 12 corresponds to the number of measurement modules, and after determining the fault status, the control module directly sends an opening signal to the corresponding signal channel, so as to collect and analyze the measurement signals of the corresponding measurement module 10. Obviously, the rapid fault detection can be realized, and the detection precision is improved.

Fig. 4 is a schematic view of yet another fault indicator provided by an embodiment of the present invention. As shown in fig. 4, the optional signal processing module 11 includes N switching devices K and one processing device 13, where the i-th switching device K is correspondingly connected to the i-th measurement module 10; a switching device K is connected between the measuring module 10 and the processing device 13, a control terminal (not shown) of the switching device K being connected to the control module 12.

In this embodiment, the number of N switching devices K of the signal processing module 11 corresponds to the number of measuring modules 10, and the N switching devices K of the signal processing module 11 are sequentially labeled as K1, K2, …, KN. The ith switching device K is correspondingly connected to the ith measurement module 10. As shown in fig. 4, a first end of the 1 st switching device K1 is connected to the 1 st measuring module 10/1, a second end of the 1 st switching device K1 is connected to the processing device 13, a control end of the 1 st switching device K1 is connected to the control module 12, and the 1 st switching device K1 is turned on or off under the control of the control module 12. If the control module 12 controls the 1 st switching device K1 to be turned on, that is, the 1 st signal channel is opened, the measurement signal of the 1 st measurement module 10/1 is transmitted to the processing device 13 through the 1 st switching device K1, and the processing device 13 processes the 1 st measurement signal and sends the processed 1 st measurement signal to the control module 12. If the control module 12 controls the 1 st switching device K1 to be turned off, i.e. the 1 st signal channel is opened, the measurement signal of the 1 st measurement module 10/1 cannot enter the processing device 13.

When the control module 12 detects that the status signal of the ith measurement module is in a fault state, the ith switching device in the signal processing module 11 is controlled to be on, and other switching devices are controlled to be off, namely the ith signal channel is opened, so that the measurement signal of the ith measurement module is collected, and the fault cause analysis is conveniently carried out subsequently. The selectable switching device includes a switching transistor.

The optional signal processing module comprises a digital to analog converter or the signal processing module comprises an analog to digital converter. If the signal processing module comprises a digital-to-analog converter, the measurement signal output by the measurement module is a digital signal, and the signal processing module can convert the i-th measurement signal into an analog signal and send the analog signal to the control module. If the signal processing module comprises an analog-to-digital converter, the measurement signal output by the measurement module is an analog signal, and the signal processing module can convert the i-th measurement signal into a digital signal and send the digital signal to the control module.

It should be noted that, taking an example that the signal processing module includes an analog-to-digital converter, the data transmitted from the register of the signal processing module to the control module is a string of 2-system codes, where the code may include a processing result of one or more input channels. In other embodiments of the present invention, there may be a case where the communication process of the signal processing module with the control module is not synchronized with the conversion process, and the communication process of the signal processing module is controlled by the control signal of the control module.

Based on the same inventive concept, the embodiment of the present invention also provides a fault detection method, which is applied to the fault indicator described in any embodiment above. Fig. 5 is a schematic diagram of a fault detection method according to an embodiment of the present invention. As shown in fig. 5, the fault detection method includes:

step 110, collecting state signals of N measuring modules;

and 120, when the state signal of the ith measuring module is detected to be in a fault state, controlling the signal processing module to process the measuring signal of the ith measuring module, wherein i is more than or equal to 1 and less than or equal to N.

The optional signal processing module comprises N switching devices and a processing device, and the ith switching device is correspondingly connected with the ith measuring module; step 120 includes: and when the ith measuring module is in a fault state, sending an opening instruction to the ith switching device.

In the invention, when the fault indicator detects that the state signal of the ith measurement module is in a fault state, the signal channel corresponding to the ith measurement module is directly switched on, so that the control module can rapidly acquire fault related signals under the fault state, thereby being beneficial to acquiring rapid change and transient information of fault related analog signals when faults occur, recording real waveforms of the fault signals as much as possible, facilitating subsequent analysis and positioning of fault reasons and avoiding the problem of acquisition omission of important information of the fault signals.

Specifically, the operation of the control module may be classified into when a fault occurs and when no fault occurs. When no fault is judged to occur through the state signals, a normal processing program is arranged in the control module, so that the signal processing module can sequentially collect N paths of measuring signals according to the sequence from the 1 st path of signal channels to the N path of signal channels, the signal processing module sequentially transmits the signals after sampling and converting the N paths of signal channels to the control module in a time sharing way, and the control module analyzes and processes the measuring signals.

When the fault is judged to occur through the state signals, a fault processing program is built in the control module to enter a fault flow, a signal channel code can be determined according to the measurement module corresponding to the state signals, a corresponding signal channel is opened according to the signal channel code, the signal processing module transmits signals after sampling and conversion of the opened signal channel to the control module, and the control module collects fault measurement signals and analyzes the measurement signals. It will be appreciated that the control module stores a plurality of channel codes, each measurement module has a corresponding channel code, each channel code corresponds to a signal channel, and the control module stores the measurement module, the signal channel code and their correspondence.

Based on the same inventive concept, an embodiment of the present invention further provides an electronic device, including: at least one processor; and a memory communicatively coupled to the at least one processor; the memory stores a computer program for execution by the at least one processor to cause the at least one processor to perform the fault detection method as described in any of the embodiments above.

The embodiment of the invention also provides a computer readable storage medium, wherein the computer readable storage medium stores computer instructions, and the computer instructions are used for enabling a processor to implement the fault detection method according to any embodiment.

Fig. 6 is a schematic diagram of an electronic device according to an embodiment of the present invention. The electronic device 210 is intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device 210 may also represent various forms of mobile equipment, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing equipment. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.

As shown in fig. 6, the electronic device 210 includes at least one processor 211, and a memory communicatively connected to the at least one processor 211, such as a Read Only Memory (ROM) 212, a Random Access Memory (RAM) 213, etc., in which the memory stores a computer program executable by the at least one processor 211, and the processor 211 may perform various suitable actions and processes according to the computer program stored in the Read Only Memory (ROM) 212 or the computer program loaded from the storage unit 218 into the Random Access Memory (RAM) 213. In the RAM213, various programs and data required for the operation of the electronic device 210 may also be stored. The processor 211, the ROM212, and the RAM213 are connected to each other via a bus 214. An input/output (I/O) interface 215 is also connected to bus 214.

Various components in the electronic device 210 are connected to the I/O interface 215, including: an input unit 216 such as a keyboard, a mouse, etc.; an output unit 217 such as various types of displays, speakers, and the like; a storage unit 218 such as a magnetic disk, an optical disk, or the like; and a communication unit 219 such as a network card, modem, wireless communication transceiver, etc. The communication unit 219 allows the electronic device 210 to exchange information/data with other devices via a computer network such as the internet and/or various telecommunication networks.

The processor 211 may be a variety of general and/or special purpose processing components with processing and computing capabilities. Some examples of processor 211 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 211 performs the various methods and processes described above, such as fault detection methods.

In some embodiments, the fault detection method may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as storage unit 218. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 210 via the ROM212 and/or the communication unit 219. When the computer program is loaded into RAM213 and executed by processor 211, one or more steps of the fault detection method described above may be performed. Alternatively, in other embodiments, processor 211 may be configured to perform the fault detection method in any other suitable manner (e.g., by means of firmware).

Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.

A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.

The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.

It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.

The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims

1. A fault indicator, comprising: n measuring modules, a signal processing module and a control module, wherein N is more than 1;

2. The fault indicator of claim 1, wherein the control module comprises M status signal terminals, M < N, and a j-th status signal terminal is correspondingly connected with at least 1 measurement module, 1.ltoreq.j.ltoreq.m;

and the control module is used for controlling the signal processing module to perform time-sharing processing on the measurement signals of the measurement module corresponding to the jth state signal end when the state signal received by the jth state signal end is detected to be in a fault state.

3. The fault indicator of claim 1, wherein the control module comprises N status signal terminals, and an i-th status signal terminal is correspondingly connected to the i-th measurement module, wherein i is greater than or equal to 1 and less than or equal to N;

and the control module is used for controlling the signal processing module to process the measurement signal of the ith measurement module when detecting that the state signal received by the ith state signal end is in a fault state.

4. The fault indicator of claim 1, wherein the signal processing module comprises N switching devices and one processing device, an i-th switching device being correspondingly connected to the i-th measurement module;

the switching device is connected between the measuring module and the processing device, and the control end of the switching device is connected with the control module.

5. The fault indicator of claim 1, wherein the signal processing module comprises a digital-to-analog converter or the signal processing module comprises an analog-to-digital converter.

6. The fault indicator of claim 1, wherein the control module comprises a microprocessor chip.

7. A fault detection method applied to the fault indicator of any one of claims 1 to 6, the fault detection method comprising:

collecting state signals of the N measuring modules;

8. The fault detection method of claim 7, wherein the signal processing module includes N switching devices and one processing device, and an i-th switching device is correspondingly connected to the i-th measuring module;

controlling the signal processing module to process the measurement signal of the ith measurement module includes:

and when the ith measuring module is in a fault state, sending an opening instruction to the ith switching device.

9. An electronic device, the electronic device comprising:

at least one processor;

and a memory communicatively coupled to the at least one processor;

the memory stores a computer program for execution by the at least one processor to cause the at least one processor to perform the fault detection method of any of claims 7-8.

10. A computer readable storage medium storing computer instructions for causing a processor to perform the fault detection method of any one of claims 7-8.