CN116827522B - UVM-based AES-GCM function verification method and related equipment - Google Patents
UVM-based AES-GCM function verification method and related equipment Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
- H04L9/0631—Substitution permutation network [SPN], i.e. cipher composed of a number of stages or rounds each involving linear and nonlinear transformations, e.g. AES algorithms
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- H—ELECTRICITY
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The application discloses an AES-GCM function verification method and related equipment based on UVM, wherein the method comprises the following steps: the input component acquires target input excitation of a target test case; the input component inputs the target input stimulus to the DUT top-level input interface; the DUT top layer input interface expects target input excitation to obtain a first verification result; inputting target input excitation into a preset reference model through an input component to obtain a second verification result; and the score board determines a target verification result according to the first verification result and the second verification result. The application can improve the verification efficiency of the AES-GCM function.
Description
Technical Field
The application relates to the technical field of chips, in particular to an AES-GCM function verification method based on UVM and related equipment.
Background
Currently, in most chip validations, most reference models are written using hardware description language (verilog), system hardware description language (system verilog) to begin writing from the bottom layer. Because the verification of the AES-GCM function is performed by adopting a pure system verilog or a UVM+system verilog, when a reference model is written, a verification staff adopts a bottom code verilog or a system verilog to write.
Disclosure of Invention
The application provides an AES-GCM function verification method based on UVM and related equipment, which can improve the verification efficiency of the AES-GCM function.
In a first aspect, the present application provides a UVM-based AES-GCM function verification method, applied to an electronic device, where the electronic device includes a UVM verification platform, and the UVM verification platform includes: the system comprises an input assembly, an output assembly, a DUT top layer input interface, a preset reference model and a score board; the DUT top layer input interface is used for realizing an AES-GCM function; the preset reference model is realized based on a C language and is used for realizing the AES-GCM function; the method comprises the following steps:
acquiring target input excitation of a target test case through the input component;
inputting the target input stimulus to the DUT top-level input interface through the input component;
the target input excitation is expected through the DUT top layer input interface, and a first verification result is obtained;
transmitting the first verification result to the scoreboard through the output component;
inputting the target input excitation to the preset reference model through the input assembly for operation to obtain a second verification result;
And determining a target verification result according to the first verification result and the second verification result through the score board.
In a second aspect, the present application provides a UVM-based AES-GCM function verification apparatus, applied to an electronic device, where the electronic device includes a UVM verification platform, and the UVM verification platform includes: the system comprises an input assembly, an output assembly, a DUT top layer input interface, a preset reference model and a score board; the DUT top layer input interface is used for realizing an AES-GCM function; the preset reference model is realized based on a C language and is used for realizing the AES-GCM function; the device comprises: an acquisition unit, an expectation unit, an operation unit and a determination unit,
the acquisition unit is used for acquiring target input excitation of the target test case through the input component;
the anticipation unit is used for inputting the target input excitation to the DUT top layer input interface through the input component; the target input excitation is expected through the DUT top layer input interface, and a first verification result is obtained; transmitting the first verification result to the scoreboard through the output component;
the operation unit is used for inputting the target input excitation to the preset reference model through the input assembly to operate so as to obtain a second verification result;
The determining unit is used for determining a target verification result according to the first verification result and the second verification result through the score board.
In a third aspect, the present application provides an electronic device comprising a processor, a memory, a communication interface and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, the programs comprising instructions for performing the steps of the first aspect of the application.
In a fourth aspect, the present application provides a computer-readable storage medium storing a computer program for electronic data exchange, wherein the computer program causes a computer to execute some or all of the steps as described in the first aspect of the present application.
In a fifth aspect, the present application provides a computer program product, wherein the computer program product comprises a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform part or all of the steps described in the first aspect of the application. The computer program product may be a software installation package.
The implementation of the application has the following beneficial effects:
it can be seen that the AES-GCM function verification method and related apparatus based on UVM described in the present application are applied to an electronic device, where the electronic device includes a UVM verification platform, and the UVM verification platform includes: the system comprises an input assembly, an output assembly, a DUT top layer input interface, a preset reference model and a score board; the DUT top layer input interface is used for realizing an AES-GCM function; the method comprises the steps that a preset reference model is realized based on a C language, the preset reference model is used for realizing an AES-GCM function, target input excitation of a target test case is obtained through an input component, the target input excitation is input to a DUT top-layer input interface through the input component, the target input excitation is expected through the DUT top-layer input interface to obtain a first verification result, the first verification result is transmitted to a score board through an output component, the target input excitation is input to the preset reference model through the input component to operate to obtain a second verification result, the score board determines the target verification result according to the first verification result and the second verification result, the compiling of a bottom-layer reference model is completed through the C language, the whole environment is packaged through UVM, simplification of the reference model is achieved, the transplanting of the reference model and the verification environment is facilitated, and the verification efficiency of the AES-GCM function can be improved.
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In order to more clearly illustrate the application or the technical solutions of the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it being obvious that the drawings in the description below are only some embodiments of the application, and that other drawings can be obtained from them without inventive effort for a person skilled in the art.
FIG. 1 is a schematic flow chart of an AES-GCM function verification method based on UVM;
fig. 2 is a schematic structural diagram of a UVM verification platform according to the present application;
FIG. 3 is a schematic structural diagram of a preset reference model according to the present application;
fig. 4 is a schematic structural diagram of an electronic device according to the present application;
fig. 5 is a functional unit composition block diagram of an AES-GCM functional verification apparatus based on UVM according to the present application.
Detailed Description
In order that the manner in which the application may be better understood, a more particular description of the application will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The terms first, second and the like in the description and in the claims and in the above-described figures are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
In particular implementations, the electronic device to which the present application relates may be any electronic device that includes a universal verification methodology (universal verification methodology, UVM) verification platform, which may include, but is not limited to: smart phones, tablet computers, smart robots, smart projectors, conferencing devices, in-vehicle devices, wearable devices, servers, networking devices, computing devices, or other processing devices connected to wireless modems, as well as various forms of User Equipment (UE), mobile Stations (MSs), terminal devices (terminal devices), etc., without limitation.
The present application will be described in detail below.
Referring to fig. 1, fig. 1 is a flow chart of an AES-GCM function verification method based on UVM, which is provided by the present application, and is applied to an electronic device, where the electronic device includes a UVM verification platform, and the UVM verification platform includes: the system comprises an input assembly, an output assembly, a DUT top layer input interface, a preset reference model and a score board; the DUT top layer input interface is used for realizing an AES-GCM function; the preset reference model is realized based on a C language and is used for realizing the AES-GCM function; as shown in the figure, the AES-GCM function verification method based on UVM comprises the following steps:
s101, acquiring target input excitation of a target test case through the input component.
In the present application, the electronic device may include a UVM verification platform, as shown in fig. 2, where the UVM verification platform includes: an input component (agt_i), an output component (agt_o), a DUT top layer input interface (AES-GCM DUT), a preset Reference Model (RM), a scoreboard (scoreboard), the input component comprising stimulus data (sqr), a driver (drv) and a monitor (mon). The output components include stimulus data (sqr), drivers (drv) and monitors (mon). Wherein the DUT top-level input interface, i.e. the design under test (design under test, DUT) top-level input interface.
Among them, AES-GCM, that is, advanced encryption standard algorithm (advanced encryption standard, AES) and Counter Mode (CTR) adopted by the symmetric encryption, and has a function of a Galois Message Authentication Code (GMAC), GCM is collectively called Galois/Counter Mode, it can be seen that G refers to GMAC, and C refers to CTR. The method increases the characteristic of GMAC on the basis of CTR encryption, and solves the problem that the CTR cannot carry out integrity check on encrypted information. Specifically, the AES-GCM function can be divided into encrypting and decrypting data and generating a value of a check HMAC (hash-based message authentication code), i.e., a hash message authentication code.
In a specific implementation, the DUT top layer input interface is used for realizing an AES-GCM function, the preset reference model is realized based on a C language, and the preset reference model is used for realizing the AES-GCM function.
Optionally, the step S101 of acquiring, by the input component, the target input stimulus of the target test case may include the following steps:
11. generating a random number by a sequencer;
12. determining the target test case corresponding to the random number;
13. and acquiring the target input excitation of the target test case through the input component.
In a specific implementation, a sequence generator (seqence) can be utilized to generate random numbers, and then different test cases are selected based on the difference of the random numbers to obtain target test cases, and the target input excitation of the target test cases is obtained through an input component, so that the test of the target test cases can be completed.
S102, inputting the target input excitation to the DUT top layer input interface through the input component.
In the present application, the input component can input target input stimuli to the DUT top-level input interface to facilitate AES-GCM functional testing of the target input stimuli.
S103, the target input excitation is expected through the DUT top layer input interface, and a first verification result is obtained.
In the application, the DUT top layer input interface is used for realizing the AES-GCM function, and the DUT top layer input interface expects target input excitation to obtain a first verification result, namely the verification result of the AES-GCM function can be obtained.
S104, transmitting the first verification result to the score board through the output component.
In the application, the output component can transmit the first verification result to the score board so as to obtain a final verification result.
S105, inputting the target input excitation to the preset reference model through the input component for operation, and obtaining a second verification result.
In the application, the preset reference model is used for realizing the AES-GCM function, the input component inputs the target input excitation to the preset reference model for operation, and a second verification result is obtained, namely the verification result of the AES-GCM function can be obtained.
S106, determining a target verification result according to the first verification result and the second verification result through the score board.
According to the application, the target verification result can be determined through the score board according to the first verification result and the second verification result, so that the final verification result is obtained.
In the application, the UVM is combined with the C language, namely, part of the bottom layer general reference model is written by the C language, and the bottom layer written by the C language is wrapped by the UVM, so that the simplification of the reference model is realized, the transplantation of the reference model and the verification environment is facilitated, the reusability of the module is enhanced, the development efficiency of a chip is improved, and the integral verification efficiency of the system is improved.
Optionally, the preset reference model includes: the system comprises an unpacking module, a task module and a packaging module; the task module comprises a plurality of functions, and each function is realized by adopting a C language;
the unpacking module is used for unpacking the input data input into the preset reference model to obtain plaintext and unpacking information;
the task module is used for selecting an objective function according to the plaintext and the unpacking information, and converting the plaintext into ciphertext through the objective function;
and the packaging module is used for packaging the ciphertext and the unpacking information to obtain output data.
In the present application, as shown in fig. 3, the preset reference model may include: an unpacking module (uvm _unpack), a task module (task) and a packaging module (uvm _pack); the task module comprises a plurality of functions, each function is realized by adopting a C language, and different functions are used for realizing different functions.
In a specific implementation, the unpacking module can be used for unpacking input data input into a preset reference model to obtain plaintext and unpacking information, the task module is used for selecting an objective function according to the plaintext and the unpacking information, converting the plaintext into ciphertext through the objective function, and the packaging module is used for packaging the ciphertext and the unpacking information to obtain output data.
Under the illustration, after the preset reference model takes one data (tr), unpacking (uvm _unpack) is performed first to obtain corresponding unpacking information such as plaintext and sid, key, salt, iv and length, the unpacking information and the unpacking information are stored, then the C is correspondingly called to realize the function of AES-GCM, the result output by the C is maintained and stored, and uvm _pack is performed to obtain output data (tr 1) for output.
Where sil can be understood that the encryption scenario applies to transport layer security (transport layer security, TLS), requiring the information of session ID (sil) to distinguish which stream is encrypted, thus giving corresponding maintained intermediate state information; key can be understood as the key value required by the encryption algorithm; salt can be understood as the salt value required by the encryption algorithm; iv can be understood as the initialization vector required by the encryption algorithm; the length is understood to mean the count value that needs to be generated for encryption based on the length information.
Optionally, in the step S106, determining, by the scoreboard, the target verification result according to the first verification result and the second verification result may include the following steps:
61. determining an absolute value of a difference between the first validation result and the second validation result;
62. acquiring a reference threshold value corresponding to the target test case;
63. determining target environmental parameters of the UVM verification platform;
64. adjusting the reference threshold value through the target environment parameter to obtain a target threshold value;
65. when the absolute value is larger than the target threshold, confirming that the AES-GCM function verification fails;
66. and when the absolute value is smaller than or equal to the target threshold value, confirming that the AES-GCM function verification is successful.
In the application, the reference threshold value can be preset or the system defaults, and different test cases can correspond to different threshold values, namely, the mapping relation between the test cases and the threshold values can be preset.
In a specific implementation, an absolute value of a difference value between the first verification result and the second verification result can be determined, and a reference threshold corresponding to the target test case can be obtained based on a mapping relation between a preset test case and the threshold.
Next, target environmental parameters of the UVM verification platform are re-determined, which may include at least one of: hardware environment parameters, software environment parameters, etc., are not limited herein. And then, the reference threshold value is regulated through the target environment parameter to obtain a target threshold value, so that the final threshold value is more suitable for the test environment.
And finally, when the absolute value is larger than the target threshold, confirming that the AES-GCM function verification fails, otherwise, when the absolute value is smaller than or equal to the target threshold, confirming that the AES-GCM function verification succeeds.
Optionally, when the target environment parameter includes a target hardware environment parameter and a target software environment parameter, step 64 above adjusts the reference threshold by the target environment parameter to obtain a target threshold, which may include the following steps:
s1, determining a first adjusting factor corresponding to the target hardware environment parameter;
s2, determining a second adjusting factor corresponding to the target software environment parameter;
s3, acquiring a test physical environment parameter;
s4, determining a target weight pair corresponding to the test physical environment parameter, wherein the target weight pair comprises a target first weight and a target second weight, and the sum of the target first weight and the target second weight is 1; the target first weight corresponds to the first adjustment factor, and the target second weight corresponds to the second adjustment factor;
S5, carrying out weighting operation according to the first adjusting factor, the second adjusting factor and the target weight to obtain a target adjusting factor;
s6, adjusting the reference threshold according to the target adjusting factor to obtain the target threshold.
In the present application, the hardware environment parameters may include at least one of: the hardware model number, the hardware performance, and the like are not limited herein. The software environment parameters may include at least one of: system performance, number of applications, remaining memory size, etc., are not limited herein. The test physical environment parameters may include at least one of: ambient temperature, ambient humidity, magnetic field disturbance strength, barometric pressure, weather, geographical location, etc., are not limited herein.
In a specific implementation, a mapping relation between a preset hardware environment parameter and an adjustment factor may be stored in advance, a first adjustment factor corresponding to a target hardware environment parameter may be determined according to the mapping relation, a mapping relation between a preset software environment parameter and an adjustment factor may be stored in advance, and a second adjustment factor corresponding to the target software environment parameter may be determined according to the mapping relation.
Furthermore, the test physical environment parameters, namely the external environment influence under the real scene which needs to be considered by the tester, can also be obtained. The mapping relation between the preset physical environment parameters and the weight pairs can be stored in advance, the weight pairs can comprise a first weight and a second weight, the sum of the first weight and the second weight is 1, the first weight is the weight corresponding to the hardware environment parameters, and the second weight is the weight corresponding to the software environment parameters.
Specifically, a target weight pair corresponding to the test physical environment parameter may be determined according to a mapping relationship between a pre-stored physical environment parameter and a weight pair, where the target weight pair includes a target first weight and a target second weight, and a sum of the target first weight and the target second weight is 1. The target first weight corresponds to the first adjustment factor and the target second weight corresponds to the second adjustment factor. Furthermore, the weighting operation can be performed according to the first adjustment factor, the second adjustment factor and the target weight pair to obtain the target adjustment factor, which is specifically as follows:
target adjustment factor = first adjustment factor target first weight + second adjustment factor target second weight
Finally, the reference threshold value can be adjusted according to the target adjustment factor, and the target threshold value is obtained.
In this way, the influence of the hardware environment and the software environment can be considered, the influence of each dimension on the threshold value is judged, in addition, the influence of the hardware dimension and the software dimension on the threshold value is dynamically regulated by combining the external environment influence of the tester under the real scene to be considered, and finally, the requirements of the test environment of the current UVM verification platform and the external environment of the tester under the real scene to be considered are met, so that the AES-GCM functional test efficiency is guaranteed.
For example, in a specific implementation, the main functions of the AES-GCM module are divided into encrypting and decrypting data and generating a value of the check HMAC. When the two functions are verified, the work flow of the verification platform is mainly divided into the following steps: firstly, initializing a UVM verification platform at random, and then instantiating a DUT top layer input interface; connecting and communicating all components of the UVM verification platform through tlm_fifo; resetting and initializing the input interface of the top layer of the DUT; starting a sequence generator (sequence) to send different test cases; after the test case is operated, corresponding input excitation is obtained, then the input excitation is input to a DUT top layer input interface and a preset reference model respectively, a first verification result and a second verification result are obtained, and the score board compares the first verification result with the second verification result to obtain a final verification result.
It can be seen that the AES-GCM function verification method based on UVM described in the present application is applied to an electronic device, the electronic device includes a UVM verification platform, and the UVM verification platform includes: the system comprises an input assembly, an output assembly, a DUT top layer input interface, a preset reference model and a score board; the DUT top layer input interface is used for realizing an AES-GCM function; the method comprises the steps that a preset reference model is realized based on a C language, the preset reference model is used for realizing an AES-GCM function, target input excitation of a target test case is obtained through an input component, the target input excitation is input to a DUT top-layer input interface through the input component, the target input excitation is expected through the DUT top-layer input interface to obtain a first verification result, the first verification result is transmitted to a score board through an output component, the target input excitation is input to the preset reference model through the input component to operate to obtain a second verification result, the score board determines the target verification result according to the first verification result and the second verification result, the compiling of a bottom-layer reference model is completed through the C language, the whole environment is packaged through UVM, simplification of the reference model is achieved, the transplanting of the reference model and the verification environment is facilitated, and the verification efficiency of the AES-GCM function can be improved.
In accordance with the above embodiments, referring to fig. 4, fig. 4 is a schematic structural diagram of an electronic device provided by the present application, as shown in the fig. 4, the electronic device includes a processor, a memory, a communication interface, and one or more programs, the electronic device includes a UVM verification platform, the one or more programs are stored in the memory and configured to be executed by the processor, the electronic device includes a UVM verification platform, and the UVM verification platform includes: the system comprises an input assembly, an output assembly, a DUT top layer input interface, a preset reference model and a score board; the DUT top layer input interface is used for realizing an AES-GCM function; the preset reference model is realized based on a C language and is used for realizing the AES-GCM function; in the present application, the program includes instructions for performing the steps of:
acquiring target input excitation of a target test case through the input component;
inputting the target input stimulus to the DUT top-level input interface through the input component;
the target input excitation is expected through the DUT top layer input interface, and a first verification result is obtained;
transmitting the first verification result to the scoreboard through the output component;
Inputting the target input excitation to the preset reference model through the input assembly for operation to obtain a second verification result;
and determining a target verification result according to the first verification result and the second verification result through the score board.
Optionally, the preset reference model includes: the system comprises an unpacking module, a task module and a packaging module; the task module comprises a plurality of functions, and each function is realized by adopting a C language;
the unpacking module is used for unpacking the input data input into the preset reference model to obtain plaintext and unpacking information;
the task module is used for selecting an objective function according to the plaintext and the unpacking information, and converting the plaintext into ciphertext through the objective function;
and the packaging module is used for packaging the ciphertext and the unpacking information to obtain output data.
Optionally, in the aspect of acquiring the target input stimulus of the target test case through the input component, the program includes instructions for executing the following steps:
generating a random number by a sequencer;
determining the target test case corresponding to the random number;
and acquiring the target input excitation of the target test case through the input component.
Optionally, in the aspect that the target verification result is determined by the scoreboard according to the first verification result and the second verification result, the program includes instructions for executing the following steps:
determining an absolute value of a difference between the first validation result and the second validation result;
acquiring a reference threshold value corresponding to the target test case;
determining target environmental parameters of the UVM verification platform;
adjusting the reference threshold value through the target environment parameter to obtain a target threshold value;
when the absolute value is larger than the target threshold, confirming that the AES-GCM function verification fails;
and when the absolute value is smaller than or equal to the target threshold value, confirming that the AES-GCM function verification is successful.
Optionally, when the target environment parameter includes a target hardware environment parameter and a target software environment parameter, in the aspect that the reference threshold is adjusted by the target environment parameter to obtain a target threshold, the program includes instructions for executing the following steps:
determining a first adjustment factor corresponding to the target hardware environment parameter;
determining a second adjustment factor corresponding to the target software environment parameter;
Acquiring a test physical environment parameter;
determining a target weight pair corresponding to the test physical environment parameter, wherein the target weight pair comprises a target first weight and a target second weight, and the sum of the target first weight and the target second weight is 1; the target first weight corresponds to the first adjustment factor, and the target second weight corresponds to the second adjustment factor;
performing weighting operation according to the first adjusting factor, the second adjusting factor and the target weight to obtain a target adjusting factor;
and adjusting the reference threshold according to the target adjustment factor to obtain the target threshold.
It can be seen that the electronic device described in the present application, the electronic device comprises a UVM verification platform, the UVM verification platform comprising: the system comprises an input assembly, an output assembly, a DUT top layer input interface, a preset reference model and a score board; the DUT top layer input interface is used for realizing an AES-GCM function; the method comprises the steps that a preset reference model is realized based on a C language, the preset reference model is used for realizing an AES-GCM function, target input excitation of a target test case is obtained through an input component, the target input excitation is input to a DUT top-layer input interface through the input component, the target input excitation is expected through the DUT top-layer input interface to obtain a first verification result, the first verification result is transmitted to a score board through an output component, the target input excitation is input to the preset reference model through the input component to operate to obtain a second verification result, the score board determines the target verification result according to the first verification result and the second verification result, the compiling of a bottom-layer reference model is completed through the C language, the whole environment is packaged through UVM, simplification of the reference model is achieved, the transplanting of the reference model and the verification environment is facilitated, and the verification efficiency of the AES-GCM function can be improved.
Fig. 5 is a block diagram showing the functional units of an AES-GCM function authentication apparatus 500 based on UVM according to the present application. The AES-GCM function verification device 500 based on UVM is applied to electronic equipment, wherein the electronic equipment comprises a UVM verification platform, and the UVM verification platform comprises: the system comprises an input assembly, an output assembly, a DUT top layer input interface, a preset reference model and a score board; the DUT top layer input interface is used for realizing an AES-GCM function; the preset reference model is realized based on a C language and is used for realizing the AES-GCM function; the UVM-based AES-GCM function authentication apparatus 500 includes: an acquisition unit 501, an expectation unit 502, an operation unit 503 and a determination unit 504,
the acquiring unit 501 is configured to acquire, through the input component, a target input excitation of a target test case;
the anticipation unit 502 for inputting the target input stimulus to the DUT top-level input interface through the input component; the target input excitation is expected through the DUT top layer input interface, and a first verification result is obtained; transmitting the first verification result to the scoreboard through the output component;
the operation unit 503 is configured to input, through the input component, the target input excitation to the preset reference model for operation, so as to obtain a second verification result;
The determining unit 504 is configured to determine, by using the scoreboard, a target verification result according to the first verification result and the second verification result.
Optionally, the preset reference model includes: the system comprises an unpacking module, a task module and a packaging module; the task module comprises a plurality of functions, and each function is realized by adopting a C language;
the unpacking module is used for unpacking the input data input into the preset reference model to obtain plaintext and unpacking information;
the task module is used for selecting an objective function according to the plaintext and the unpacking information, and converting the plaintext into ciphertext through the objective function;
and the packaging module is used for packaging the ciphertext and the unpacking information to obtain output data.
Optionally, in terms of the acquiring the target input stimulus of the target test case, the acquiring unit 501 is specifically configured to:
generating a random number by a sequencer;
determining the target test case corresponding to the random number;
and acquiring the target input excitation of the target test case through the input component.
Optionally, in the aspect that the target verification result is determined by the scoreboard according to the first verification result and the second verification result, the determining unit 504 is specifically configured to:
Determining an absolute value of a difference between the first validation result and the second validation result;
acquiring a reference threshold value corresponding to the target test case;
determining target environmental parameters of the UVM verification platform;
adjusting the reference threshold value through the target environment parameter to obtain a target threshold value;
when the absolute value is larger than the target threshold, confirming that the AES-GCM function verification fails;
and when the absolute value is smaller than or equal to the target threshold value, confirming that the AES-GCM function verification is successful.
Optionally, when the target environment parameter includes a target hardware environment parameter and a target software environment parameter, the determining unit is specifically configured to:
determining a first adjustment factor corresponding to the target hardware environment parameter;
determining a second adjustment factor corresponding to the target software environment parameter;
acquiring a test physical environment parameter;
determining a target weight pair corresponding to the test physical environment parameter, wherein the target weight pair comprises a target first weight and a target second weight, and the sum of the target first weight and the target second weight is 1; the target first weight corresponds to the first adjustment factor, and the target second weight corresponds to the second adjustment factor;
Performing weighting operation according to the first adjusting factor, the second adjusting factor and the target weight to obtain a target adjusting factor;
and adjusting the reference threshold according to the target adjustment factor to obtain the target threshold.
It can be seen that the AES-GCM function verification apparatus based on UVM described in the present application is applied to an electronic device, the electronic device includes a UVM verification platform, and the UVM verification platform includes: the system comprises an input assembly, an output assembly, a DUT top layer input interface, a preset reference model and a score board; the DUT top layer input interface is used for realizing an AES-GCM function; the method comprises the steps that a preset reference model is realized based on a C language, the preset reference model is used for realizing an AES-GCM function, target input excitation of a target test case is obtained through an input component, the target input excitation is input to a DUT top-layer input interface through the input component, the target input excitation is expected through the DUT top-layer input interface to obtain a first verification result, the first verification result is transmitted to a score board through an output component, the target input excitation is input to the preset reference model through the input component to operate to obtain a second verification result, the score board determines the target verification result according to the first verification result and the second verification result, the compiling of a bottom-layer reference model is completed through the C language, the whole environment is packaged through UVM, simplification of the reference model is achieved, the transplanting of the reference model and the verification environment is facilitated, and the verification efficiency of the AES-GCM function can be improved.
It can be understood that the functions of each program module of the UVM-based AES-GCM function verification apparatus of this embodiment may be specifically implemented according to the method in the foregoing method embodiment, and the specific implementation process may refer to the relevant description of the foregoing method embodiment, which is not repeated herein.
The present application also provides a computer storage medium storing a computer program for electronic data exchange, the computer program causing a computer to execute part or all of the steps of any one of the methods described in the above method embodiments, the computer including an electronic device.
The present application also provides a computer program product comprising a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform part or all of the steps of any one of the methods described in the method embodiments above. The computer program product may be a software installation package, said computer comprising an electronic device.
It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present application is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required for the present application.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
In the several embodiments provided by the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, such as the above-described division of units, merely a division of logic functions, and there may be additional manners of dividing in actual implementation, such as multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, or may be in electrical or other forms.
The units described above as separate components may or may not be physically separate, and components shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units described above, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable memory. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a memory, comprising several instructions for causing a computer device (which may be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the above-mentioned method of the various embodiments of the present application. And the aforementioned memory includes: a U-disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Those of ordinary skill in the art will appreciate that all or a portion of the steps in the various methods of the above embodiments may be implemented by a program that instructs associated hardware, and the program may be stored in a computer readable memory, which may include: flash disk, read-Only Memory (ROM), random access Memory (Random Access Memory, RAM), magnetic disk or optical disk.
The foregoing has outlined rather broadly the more detailed description of the application in order that the detailed description of the principles and embodiments of the application may be implemented in conjunction with the detailed description of the application that follows, the examples being merely intended to facilitate an understanding of the method of the application and its core concepts; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present application, the present description should not be construed as limiting the present application in view of the above.
Claims (9)
1. The AES-GCM function verification method based on the UVM is characterized by being applied to electronic equipment, wherein the electronic equipment comprises a UVM verification platform, and the UVM verification platform comprises: the system comprises an input assembly, an output assembly, a DUT top layer input interface, a preset reference model and a score board; the DUT top layer input interface is used for realizing an AES-GCM function; the preset reference model is realized based on a C language and is used for realizing the AES-GCM function; the method comprises the following steps:
Acquiring target input excitation of a target test case through the input component;
inputting the target input stimulus to the DUT top-level input interface through the input component;
the target input excitation is expected through the DUT top layer input interface, and a first verification result is obtained;
transmitting the first verification result to the scoreboard through the output component;
inputting the target input excitation to the preset reference model through the input assembly for operation to obtain a second verification result;
determining a target verification result according to the first verification result and the second verification result through the score board;
wherein, the determining, by the scoreboard, the target verification result according to the first verification result and the second verification result includes:
determining an absolute value of a difference between the first validation result and the second validation result;
acquiring a reference threshold value corresponding to the target test case;
determining target environmental parameters of the UVM verification platform;
adjusting the reference threshold value through the target environment parameter to obtain a target threshold value;
when the absolute value is larger than the target threshold, confirming that the AES-GCM function verification fails;
And when the absolute value is smaller than or equal to the target threshold value, confirming that the AES-GCM function verification is successful.
2. The method of claim 1, wherein the pre-set reference model comprises: the system comprises an unpacking module, a task module and a packaging module; the task module comprises a plurality of functions, and each function is realized by adopting a C language;
the unpacking module is used for unpacking the input data input into the preset reference model to obtain plaintext and unpacking information;
the task module is used for selecting an objective function according to the plaintext and the unpacking information, and converting the plaintext into ciphertext through the objective function;
and the packaging module is used for packaging the ciphertext and the unpacking information to obtain output data.
3. The method according to claim 1 or 2, wherein the obtaining, by the input component, the target input stimulus of the target test case comprises:
generating a random number by a sequencer;
determining the target test case corresponding to the random number;
and acquiring the target input excitation of the target test case through the input component.
4. The method according to claim 1, wherein when the target environment parameter includes a target hardware environment parameter and a target software environment parameter, the adjusting the reference threshold by the target environment parameter to obtain a target threshold includes:
Determining a first adjustment factor corresponding to the target hardware environment parameter;
determining a second adjustment factor corresponding to the target software environment parameter;
acquiring a test physical environment parameter;
determining a target weight pair corresponding to the test physical environment parameter, wherein the target weight pair comprises a target first weight and a target second weight, and the sum of the target first weight and the target second weight is 1; the target first weight corresponds to the first adjustment factor, and the target second weight corresponds to the second adjustment factor;
performing weighting operation according to the first adjusting factor, the second adjusting factor and the target weight to obtain a target adjusting factor;
and adjusting the reference threshold according to the target adjustment factor to obtain the target threshold.
5. The AES-GCM function verification device based on UVM is characterized by being applied to electronic equipment, wherein the electronic equipment comprises a UVM verification platform, and the UVM verification platform comprises: the system comprises an input assembly, an output assembly, a DUT top layer input interface, a preset reference model and a score board; the DUT top layer input interface is used for realizing an AES-GCM function; the preset reference model is realized based on a C language and is used for realizing the AES-GCM function; the device comprises: an acquisition unit, an expectation unit, an operation unit and a determination unit,
The acquisition unit is used for acquiring target input excitation of the target test case through the input component;
the anticipation unit is used for inputting the target input excitation to the DUT top layer input interface through the input component; the target input excitation is expected through the DUT top layer input interface, and a first verification result is obtained; transmitting the first verification result to the scoreboard through the output component;
the operation unit is used for inputting the target input excitation to the preset reference model through the input assembly to operate so as to obtain a second verification result;
the determining unit is used for determining a target verification result according to the first verification result and the second verification result through the score board;
wherein, the determining, by the scoreboard, the target verification result according to the first verification result and the second verification result includes:
determining an absolute value of a difference between the first validation result and the second validation result;
acquiring a reference threshold value corresponding to the target test case;
determining target environmental parameters of the UVM verification platform;
adjusting the reference threshold value through the target environment parameter to obtain a target threshold value;
When the absolute value is larger than the target threshold, confirming that the AES-GCM function verification fails;
and when the absolute value is smaller than or equal to the target threshold value, confirming that the AES-GCM function verification is successful.
6. The apparatus of claim 5, wherein the pre-set reference model comprises: the system comprises an unpacking module, a task module and a packaging module; the task module comprises a plurality of functions, and each function is realized by adopting a C language;
the unpacking module is used for unpacking the input data input into the preset reference model to obtain plaintext and unpacking information;
the task module is used for selecting an objective function according to the plaintext and the unpacking information, and converting the plaintext into ciphertext through the objective function;
and the packaging module is used for packaging the ciphertext and the unpacking information to obtain output data.
7. The apparatus according to claim 5 or 6, wherein, in terms of the target input stimuli for the target test case, the obtaining unit is specifically configured to:
generating a random number by a sequencer;
determining the target test case corresponding to the random number;
and acquiring the target input excitation of the target test case through the input component.
8. An electronic device comprising a processor, a memory for storing one or more programs and configured to be executed by the processor, the programs comprising instructions for performing the steps in the method of any of claims 1-4.
9. A computer-readable storage medium, characterized in that a computer program for electronic data exchange is stored, wherein the computer program causes a computer to perform the method according to any of claims 1-4.
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