CN116799613A

CN116799613A - VCSEL chip with high uniformity of optical power, laser radar and preparation method thereof

Info

Publication number: CN116799613A
Application number: CN202310843059.6A
Authority: CN
Inventors: 杨国庆; 赖威廷; 杨通辉; 李念宜; 郭铭浩
Original assignee: Zhejiang Ruixi Technology Co ltd
Current assignee: Zhejiang Ruixi Technology Co ltd
Priority date: 2023-07-11
Filing date: 2023-07-11
Publication date: 2023-09-22

Abstract

The application belongs to the technical field of semiconductors, in particular to a VCSEL chip with high uniform optical power, which comprises a plurality of VCSEL luminous areas, wherein each VCSEL luminous area is provided with a plurality of luminous points; each VCSEL light emitting region is provided with a first electrode structure and a second electrode structure matched with the first electrode structure, wherein the VCSEL light emitting region is divided into a plurality of lighting regions, and the plurality of lighting regions at least comprise a first lighting region and a second lighting region adjacent to the first lighting region; the first electrode structure comprises a first electrode layer and a second electrode layer, wherein the first electrode layer is connected with the second electrode layer in parallel; the first electrode layer is at least communicated with the first lighting area, and the second electrode layer is communicated with the second lighting area.

Description

VCSEL chip with high uniformity of optical power, laser radar and preparation method thereof

Technical Field

The application belongs to the technical field of semiconductors, and particularly relates to a VCSEL chip with high-uniformity optical power.

Background

A VCSEL (Vertical-Cavity Surface Emitting Laser) is a semiconductor Laser that emits Laser light in a direction perpendicular to a substrate. The VCSEL has the characteristics of small divergence angle, symmetrical light beams, high wavelength heat stability, stable light beam quality, single longitudinal mode output, high photoelectric conversion efficiency, small volume, low threshold current, low power consumption, easy integration and the like, and is suitable for being widely applied as a light source, for example, a laser light source of a laser radar.

A Laser Radar (Laser Radar) is a device that detects a characteristic quantity such as a position, a speed, etc. of a target object with Laser light as a medium. Specifically, the laser radar can detect the relative position of the target object and the laser radar by emitting a laser beam to the target object and receiving the reflected signal, thereby realizing detection, tracking and identification of the target object. For example, by using the TOF technique, a laser pulse is emitted to a target area in a very short time, the laser pulse reflected back by an obstacle in the target area is received by a detector, and the time difference between the emitted pulse and the received pulse, which is one-half times the speed of light, is multiplied by the distance between the obstacle and the radar.

In recent years, lidar is widely used in the fields of intelligent traffic, environmental monitoring, military security, etc. For example: the laser radar can be applied to new technologies such as automatic driving of a vehicle, auxiliary driving of the vehicle, active braking and the like, so that the vehicle has the function of automatically avoiding obstacles under the control of a computer, and the driving safety is ensured. Correspondingly, the laser radar can also realize functions such as unmanned aerial vehicle obstacle avoidance and the like. The laser radar takes the VCSEL light source as the laser light source, benefits from good light emitting performance of the VCSEL light source, and the detection function of the laser radar can be effectively improved. And the laser radar can scan the target object step by means of the VCSEL light source in a partitioning manner, so that the scanning stability can be improved, and the difficulty of subsequent three-dimensional modeling is simplified compared with the scanning of the target object by driving the VCSEL light source to rotate through the rotating motor.

The one-dimensional addressable VCSEL used for the pure solid-state laser radar transmitting assembly is traditionally designed to be longer in channel length so as to increase the scanning range and angle of a single channel, but the longer channel also enables the channel metal electrode to be longer and parasitic inductance to be overlarge; the current distribution at the time of lighting the VCSEL chip is not uniform, so that the light power of the light emitting holes at different positions within a single channel is not uniform (typically, the light power of the light emitting holes near the bond pad is higher and the light emitting holes far from the bond pad is lower).

Disclosure of Invention

An advantage of the present application is to provide a VCSEL chip with high uniformity of optical power, wherein a conventional single-layer metal electrode is changed to a multi-layer stacked electrode, which reduces parasitic inductance of the metal electrode, so that the current fed in is uniformly distributed, resulting in the advantage of a highly uniform addressable VCSEL chip.

Another advantage of the present application is to provide a VCSEL chip with high uniformity of optical power, in which after the total current is input from a single-side bond pad (i.e., a portion where the first electrode layer and the second electrode layer are connected in parallel), the current is split through the multiple metal electrode layers, that is, the parasitic inductance of the multiple metal electrode layers is connected in parallel, so that the total inductance is reduced, and the emission uniformity of the VCSEL chip that is lighted by the first electrode structure is better.

Another advantage of the present application is to provide a VCSEL chip with high uniformity of optical power, in which total current is input from two sides, and the inductance of the first electrode layer and the inductance of the second electrode layer can be partially offset due to opposite current directions, so as to reduce the total inductance effect and improve the uniformity of light emission of the VCSEL chip.

To achieve at least one of the above or other advantages and objects, according to one aspect of the present application, there is provided a VCSEL chip of high uniformity of optical power, comprising a plurality of VCSEL light emitting regions,

each VCSEL light emitting region is provided with a first electrode structure and a second electrode structure matched with the first electrode structure, wherein,

dividing the VCSEL emission region into a plurality of illumination regions, wherein each illumination region includes at least one emission point; the plurality of lighting areas at least comprise a first lighting area and a second lighting area adjacent to the first lighting area; the first electrode structure comprises a first electrode layer and a second electrode layer, wherein,

the first electrode layer is connected with the second electrode layer in parallel;

the first electrode layer is at least communicated with the first lighting area, and the second electrode layer is communicated with the second lighting area.

In the VCSEL chip of high uniformity optical power according to the present application, the first electrode layer communicates with the first lighting region and the second lighting region at the same time, and the second electrode layer communicates with the second lighting region.

In the VCSEL chip of high uniformity optical power according to the present application, the flow direction of the current entering the first electrode layer is the same as the flow direction of the current entering the second electrode layer.

In the VCSEL chip of high uniformity optical power according to the present application, the flow direction of the current entering the first electrode layer is opposite to the flow direction of the current entering the second electrode layer.

In the VCSEL chip of high uniformity optical power according to the present application, the first electrode layer is located below the second electrode layer.

In the VCSEL chip with high uniformity of optical power according to the present application, the VCSEL light emitting region comprises, from bottom to top, a substrate layer, a first bragg mirror, an active region, a confinement layer with an oxide aperture, and a second bragg mirror, the second electrode structure being in ohmic contact with the substrate layer.

In the VCSEL chip with high uniformity of optical power according to the present application, the second bragg mirror is provided with an insulating layer 106, and the first electrode layer and the second electrode layer are partially contacted with the second bragg mirror through the insulating layer 106.

In the VCSEL chip with high uniformity of optical power according to the present application, the insulating layer 106 is one of silicon dioxide, silicon nitride, hafnium oxide, and aluminum oxide, which are light-transmitting.

In the VCSEL chip of high uniformity optical power according to the present application, the first electrode layer is connected in parallel with the second electrode layer through a plurality of conductor layers arranged at intervals.

In the VCSEL chip with high uniformity of optical power according to the present application, the first electrode structure material is one or more of platinum, gold, silver, copper, and aluminum.

According to a further aspect of the present application, there is provided a lidar comprising:

a laser projection device for projecting laser light, wherein the laser projection device is included in any of the VCSEL chips of high uniformity of optical power as described above;

a laser receiving device for receiving a laser signal; and

a processor communicatively coupled to the laser projection device and the laser receiving device.

Further objects and advantages of the present application will become fully apparent from the following description and the accompanying drawings.

According to still another aspect of the present application, there is provided a method for fabricating a VCSEL chip with high uniformity of optical power, comprising:

s1, growing an epitaxial wafer;

s2, on the epitaxial waferCoating photoresist, defining a Metal anode (P-Metal) pattern of the VCSEL, forming a required anode (P-Metal) range, subsequently removing the photoresist, and then depositing an insulating layer to protect the surface of the element;

s3, oxidizing at a high temperature to form an oxidized hole with a limiting hole;coating photoresist, defining a Mesa pattern, etching areas which are not protected by the photoresist in the subsequent steps, wherein the etching depth is required to be deeper than the position of the oxide layer, and then removing the photoresist cleanly; through a water oxidation process, an AlGaAs layer with high aluminum concentration can form an oxide layer;

s4, formingAfter the oxide layer, depositing an insulating layer to protect the surface of the element; coating photoresist and defining pattern of open pore, etching the silicon nitride protective layer above the metal anode to expose the metal anode of VCSEL,the photoresist is then removed cleanly and,thereby obtaining a first through hole；

S5.Coating photoresist and defining the pattern of anode metal layer of final VCSEL, forming anode metal layer of VCSEL by electroplating gold, and removing photoresistForming a first electrode layer；

S6.Repeating the steps S4 to S5,depositing an insulating layer, defining and etching to form a second via and a second electrode A layer;

S7. repeating the steps S4 to S5,depositing an insulating layer, defining and etching to form a third via and a third electrode A layer;

S8.coating photoresist to protect Wafer front surface, grinding Wafer to a required set thickness, plating cathode metal layer, and removing front photoresistForming a second electrode structure on the back of the wafer。

These and other objects, features and advantages of the present application will become more fully apparent from the following detailed description, the accompanying drawings and the appended claims.

Drawings

Fig. 1 is a schematic diagram of a first electrode layer, a second electrode layer, and a third electrode layer of a VCSEL chip with high uniformity of optical power according to the present application, corresponding to a first lighting region, a second lighting region, and a third lighting region, respectively.

Fig. 2 is a schematic cross-sectional view of a line A-A of the first, second and third electrode layers of the VCSEL chip of fig. 1 corresponding to the first, second and third light-up regions, respectively.

Fig. 3 is a schematic cross-sectional view of B-B lines of the first, second and third electrode layers of the VCSEL chip of fig. 1 corresponding to the first, second and third light-up regions, respectively.

Fig. 4 is a schematic diagram of a first electrode layer of a VCSEL chip with high uniformity of optical power according to the present application simultaneously connecting a first lighting region, a second lighting region, and a third lighting region, and sharing the same metal layer.

Fig. 5 is a schematic cross-sectional view of a C-C line of a VCSEL chip with high uniformity of optical power, in which a first electrode layer of the VCSEL chip is connected to a first lighting region, a second lighting region, and a third lighting region simultaneously, and the first electrode layer and the second electrode layer share the same metal layer.

Fig. 6 is a schematic D-D sectional view of a first electrode layer of a VCSEL chip of the present application having high uniformity of optical power, which is connected to a first lighting region, a second lighting region, and a third lighting region at the same time, and shares the same metal layer.

Fig. 7 is a schematic diagram of a first electrode layer of a VCSEL chip with high uniformity of optical power according to the present application simultaneously connecting a first lighting region, a second lighting region, and a third lighting region, wherein the second lighting region is a single metal layer.

Fig. 8 is a schematic diagram of a first electrode layer of a VCSEL chip with high uniformity of optical power according to the present application simultaneously connecting a first lighting region, a second lighting region, and a third lighting region, wherein the second lighting region is a schematic diagram of an E-E line cross-section using one metal layer alone.

Fig. 9 is a schematic diagram of a first electrode layer of a VCSEL chip with high uniformity of optical power according to the present application simultaneously connecting a first lighting region, a second lighting region, and a third lighting region, wherein the second lighting region is a cross-sectional view of F-F lines of a single metal layer.

Detailed Description

The terms and words used in the following description and claims are not limited to literal meanings, but are used only by the applicant to enable a clear and consistent understanding of the application. It will be apparent to those skilled in the art, therefore, that the following description of the various embodiments of the application is provided for illustration only and not for the purpose of limiting the application as defined by the appended claims and their equivalents.

It will be understood that the terms "a" and "an" should be interpreted as referring to "at least one" or "one or more," i.e., in one embodiment, the number of elements may be one, while in another embodiment, the number of elements may be plural, and the term "a" should not be interpreted as limiting the number.

Although ordinal numbers such as "first," "second," etc., will be used to describe various components, those components are not limited herein. The term is used merely to distinguish one component from another. For example, a first component may be referred to as a second component, and likewise, a second component may be referred to as a first component, without departing from the teachings of the present inventive concept. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.

The terminology used herein is for the purpose of describing various embodiments only and is not intended to be limiting. As used herein, the singular is intended to include the plural unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, or groups thereof.

Summary of the application

The prior VCSEL chip is divided into a plurality of VCSEL light emitting areas by a plurality of electrode areas, wherein each VCSEL light emitting area comprises a plurality of light emitting points; when the laser radar works, current is input to the VCSEL luminous area through the electrode, so that the corresponding VCSEL luminous area is lightened to realize solid-state scanning of the laser radar. However, since the electrode of the lidar has a long length, parasitic inductance of the electrode is excessive, and when current is input to the electrode from one end, current distribution is uneven. Specifically, as the current flows along the electrode, the current gradually decreases; resulting in maximum optical power at the emission point on the VCSEL emission region closest to the current input end and minimum optical power at the emission point furthest from the current input end of the VCSEL emission region.

For the above reasons, the present application proposes to artificially and subjectively divide each VCSEL emission region into a plurality of lighting regions, each of the lighting regions having at least one emission point. Then, by dividing the current which is transmitted into the VCSEL luminous area into a plurality of branch currents, each branch current is transmitted into a corresponding lighting area, and the optical power of each lighting area is the same; therefore, the problem of large light power difference of single light emitting point of the VCSEL chip is solved, the light emitting effect of the VCSEL chip is improved, and the detection performance of the laser radar formed by the VCSEL light emitting area is improved.

Specifically, the application provides a VCSEL chip with high uniform optical power, and the VCSEL chip conducts current through a first electrode structure and a second electrode structure, so that the VCSEL chip is lightened. The VCSEL chip is divided into a plurality of VCSEL light emitting areas through a plurality of first electrode structures, namely, each VCSEL light emitting area is correspondingly connected with one first electrode structure, total current enters the first electrode structure, and then the total current flows out of the second electrode structure after being input into the VCSEL light emitting area, so that the corresponding VCSEL light emitting area is lightened.

Each VCSEL emission region is divided into two illumination regions by artificial subjectivity, and each of the illumination regions contains at least one emission point. Dividing the two lighting areas into a first lighting area and a second lighting area; of course, the number of the lighting areas in which the VCSEL light emitting region is divided may be three or more, and the specific number of the lighting areas may be reasonably divided according to the total length of the VCSEL light emitting region.

The first electrode structure is divided into a plurality of electrode layers, the number of which is equal to the number of the above-described lighting areas, and each electrode layer corresponds to one lighting area. I.e. the first electrode structure comprises a first electrode layer and a second electrode layer. In one embodiment, the first electrode layer supplies a current to the first lighting region, and the second electrode layer supplies a current to the second lighting region.

In another aspect, the first electrode layer simultaneously inputs current to the first lighting region and the second lighting region; the second electrode layer independently inputs current to the second lighting area so as to complement the deficiency of the current input to the second lighting area by the first electrode layer, thereby keeping the light power of the first lighting area consistent with the light power of the second lighting area.

In the application, the total current is divided into two parts by adjusting the flowing direction of the current, wherein one part of the current is input from the metal disc of the first electrode layer, the other part of the current is input from the metal disc of the second electrode layer, the flowing direction of the current input into the first electrode layer is opposite to the flowing direction of the current input into the second electrode layer, and the two currents with opposite flowing directions enable the inductance generated by the first electrode layer and the inductance generated by the second electrode layer to be mutually offset, so that the total inductance effect is reduced to improve the luminous uniformity of the VCSEL chip.

The VCSEL chips of the present application with high uniform optical power are described in detail below by way of the following examples:

as shown in fig. 1, 2 and 3, the present application provides a high-uniformity optical power VCSEL chip, which includes a plurality of VCSEL light emitting regions 10, and a first electrode structure 20a is disposed on the VCSEL light emitting regions 10 by one of evaporation, sputtering, and plating, wherein the first electrode structure 20a is one or more of platinum, gold, silver, copper, and aluminum. The bottom of the VCSEL chip is provided with a second electrode structure 30 by one of evaporation, sputtering and electroplating, wherein the plurality of VCSEL light emitting regions 10 can share the same second electrode structure 30, so as to realize one-dimensional addressing; or a plurality of second electrode structures 30 are arranged at the bottom of the VCSEL chip, a space exists among the plurality of second electrode structures 30, and each second electrode structure 30 is respectively communicated with all VCSEL light-emitting areas 10, so that two-dimensional addressable is realized. Wherein the second electrode structure 30 is one or more of platinum, gold, silver, copper, aluminum.

In addition, a plurality of the first electrode structures 20a are respectively disposed on the wafer, and the plurality of light emitting points 100 on the wafer of the second electrode structure 30 are divided into a plurality of VCSEL light emitting regions 10, that is, each VCSEL light emitting region 10 contains a plurality of light emitting points 100.

Wherein each light emitting point 100 of the VCSEL light emitting region 10 comprises, from bottom to top, a substrate layer 101, a first bragg mirror 102, an active region 103, a confinement layer 104 with an oxidized aperture, and a second bragg mirror 105. The substrate layer 101 is an N-type gallium arsenide substrate, and the first bragg mirror 102 is grown on the substrate layer 101. The first bragg mirror 102 and the second bragg mirror 105 are a system of alternating layers of different refractive index materials that form a distributed bragg mirror (Distributed Bragg Reflector). The choice of material for the alternating layers depends on the operating wavelength of the laser light desired. In this embodiment, the first Bragg reflector 102 is an N-DBR, and the second Bragg reflector 105 is a P-DBR; still or in other embodiments, the first Bragg reflector is a P-DBR and the second Bragg reflector is an N-DBR. For example, in one specific example of the present application, the P-DBR and the N-DBR may be formed of alternating layers of high aluminum content AlGaAs and low aluminum content AlGaAs. It is worth mentioning that the optical thickness of the alternating layers is equal to or approximately equal to 1/4 times the laser operating wavelength lambda. In particular, in an embodiment of the present application, the P-DBR is a P-doped distributed bragg reflector and the N-DBR is an N-doped distributed bragg reflector.

The active region 103 is sandwiched between the second bragg mirror 105 and the first bragg mirror 102 to form a resonant cavity, wherein photons are repeatedly amplified by back and forth reflection within the resonant cavity after being excited to form laser oscillation, thereby forming laser light. It will be appreciated by those of ordinary skill in the art that the direction of the laser light emission can be selectively controlled by the configuration and design of the second bragg mirror 105 and the first bragg mirror 102, for example, from the second bragg mirror 105 (i.e., from the top surface of the VCSEL laser) or from the first bragg mirror 102 (i.e., from the bottom surface of the VCSEL laser). In an embodiment of the present application, the second bragg mirror 105 and the first bragg mirror 102 are designed such that after the laser light oscillates in the resonant cavity, the laser light exits from the second bragg mirror 105, that is, the VCSEL laser is a semiconductor laser with front side light. In the embodiment of the present application, the second bragg mirror 105, the confinement layer 104, the active region 103 and the first bragg mirror 102 form an epitaxial structure of the light emitting point 100.

In order to limit the light exit aperture of the light emitting point 100, the light emitting point 100 of the embodiment of the present application is limited to an oxidation limiting layer 104 located above the active region 103, and the oxidation limiting layer 104 has an oxidation opening for limiting the light exit aperture of the light emitting point 100. In particular, the confinement is formed in the bottom region of the P-DBR by an oxidation process, that is, the oxide layer is formed by oxidizing a portion of the material of the bottom region of the P-DBR.

Each of the VCSEL emission regions 10 is subjectively divided into three lighting regions (of course, in other embodiments, the VCSEL emission region 10 may be divided into four, five or more lighting regions), and the three lighting regions are a first lighting region 110, a second lighting region 120 and a third lighting region 130, respectively, and the first electrode structure 20a is used to input a current, and the current lights the emission point 100 in the VCSEL emission region 10 after passing through the VCSEL emission region 10, and then flows out of the second electrode structure 30, so as to light the VCSEL emission region 10. Wherein the first electrode structure 20a is arranged on the upper end surface of the second bragg mirror 105 and the second electrode structure 30 is connected to the bottom of the substrate layer 101.

Wherein the first electrode structure 20a includes a first electrode layer 21a, a second electrode layer 22a and a third electrode layer 23a, in this embodiment, the first electrode structure 20a has only one metal disc (bond) for inputting a total current, and the first electrode layer 21a, the second electrode layer 22a and the third electrode layer 23a share the same metal disc 24a; the first electrode layer 21a is correspondingly connected to the first lighting region 110 to input a current to the first lighting region 110. The second electrode layer 22a is correspondingly connected to the second lighting area 120 to input current to the second lighting area 120. Also, the third electrode layer 23a is correspondingly connected to the third lighting area 130 to input a current to the third lighting area 130. The first electrode layer 21a, the second electrode layer 22a and the third electrode layer 23a are all connected to the same metal plate, i.e. the first electrode layer 21a, the second electrode layer 22a and the third electrode layer 23a are connected in parallel to the same metal plate. After the total current is input through the metal disc, the total current is equally divided into three equivalent currents, and the three equivalent currents respectively flow into the first electrode layer 21a, the second electrode layer 22a and the third electrode layer 23a, so that the currents input into the first lighting area 110, the second lighting area 120 and the third lighting area 130 are basically consistent, the light power of the light emitting point 100 of the whole VCSEL light emitting area 10 is uniform, and the performance of the laser radar is improved.

The first electrode layer 21a, the second electrode layer 22a and the third electrode layer 23a are stacked, and the structure is specifically that the first electrode layer 21a is at the lowest, the second electrode layer 22a is located above the first electrode layer 21a, the first electrode layer 21a and the second electrode layer 22a have a certain distance, and the first electrode layer 21a and the second electrode layer 22a are in metal communication at the metal disc through a plurality of through holes with a certain distance, so as to realize the parallel connection of the first electrode layer 21a and the second electrode layer 22 a. Similarly, the third electrode layer 23a is located above the second electrode layer 22a, and the second electrode layer 22a and the third electrode layer 23a have a certain distance, and the second electrode layer 22a and the third electrode layer 23a are in metal communication at the metal disc through a plurality of through holes spaced at a certain distance, so that the second electrode layer 22a and the third electrode layer 23a are connected in parallel.

In order to ensure that the respective lighting areas between the first electrode layer 21a, the second electrode layer 22a and the third electrode layer 23a are maintained accurately, an insulating layer 106 is provided between the second bragg mirror 105 and the first electrode layer 21a, and insulating layers are also provided between the second electrode layer 22a and the first electrode layer 21a and between the second electrode layer and the third electrode layer. The insulating layer 106 is one of light-transmitting silicon dioxide, silicon nitride, hafnium oxide, and aluminum oxide. The first, second and third electrode layers 21a, 22a and 23a partially penetrate the insulating layer 106, respectively, to light up the corresponding first, second and third light-up regions 110, 120 and 130.

Other exemplary expressions

As shown in fig. 4, 5 and 6, the first electrode structure 20b includes a first electrode layer 21b, a second electrode layer 22b and a third electrode layer 23b, and in this embodiment, the first electrode structure 20b has only one metal pad 24b (bonding pad) for inputting a total current, and the first electrode layer 21b, the second electrode layer 22b and the third electrode layer 23b share the same metal pad 24b; the first electrode layer 21b is correspondingly connected to the first, second and third lighting areas 110, 120 and 130, so that current is simultaneously input to the first, second and third lighting areas 110, 120 and 130. The second electrode layer 22b is correspondingly connected to the second lighting region 120 and the third lighting region 130, so that the second lighting region 120 and the third lighting region 130 are supplied with current, and the current supplied thereto supplements the loss of the current supplied from the first electrode layer 21b to the second lighting region 120 and the third lighting region 130. The third electrode layer 23b is correspondingly connected to the third lighting area 130 to input a current to the third lighting area 130, and the current input by the third electrode layer 23b is used for compensating the loss of the current input to the third lighting area 130 by the first electrode layer 21b and the second electrode layer 22 b.

The first electrode layer 21b, the second electrode layer 22b and the third electrode layer 23b are all connected to the same metal plate 24b, i.e. the first electrode layer 21b, the second electrode layer 22b and the third electrode layer 23b are connected in parallel to the same metal plate 24 b. After the total current is input through the metal disc 24b, the total current is divided into three equivalent currents, and the three equivalent currents respectively flow into the first electrode layer 21b, the second electrode layer 22b and the third electrode layer 23b, so that the currents input into the first lighting area 110, the second lighting area 120 and the third lighting area 130 are basically consistent, the light power of the light emitting point 100 of the whole VCSEL light emitting area is uniform, and the performance of the laser radar is improved.

The first electrode layer 21b, the second electrode layer 22b and the third electrode layer 23b are stacked, and the structure is specifically that the first electrode layer 21b is at the lowest, the second electrode layer 22b is located above the first electrode layer 21b, the first electrode layer 21b and the second electrode layer 22b have a certain distance, and the first electrode layer 21b and the second electrode layer 22b are connected at the metal disc 24b through a plurality of through hole metals with certain distances, so as to realize that the first electrode layer 21b and the second electrode layer 22b are connected in parallel, wherein the through hole metals can be gold wires or other high-conductivity noble metals. Similarly, the third electrode layer 23b is located above the second electrode layer 22b, where the second electrode layer 22b is spaced from the third electrode layer 23b by a certain distance, and the second electrode layer 22b and the third electrode layer 23b are in metal communication with each other at the metal plate 24b through a plurality of through holes spaced from each other by a certain distance, so as to realize that the second electrode layer 22b and the third electrode layer 23b are connected in parallel.

In order to ensure that the first electrode layer 21b, the second electrode layer 22b and the third electrode layer 23b can be accurately corresponding to the corresponding lighting areas, an insulating layer 106 is arranged on the second bragg reflector, and the insulating layer 106 is one of transparent silicon dioxide, silicon nitride, hafnium oxide and aluminum oxide. The first electrode layer 21b partially penetrates the insulating layer 106, respectively, to light the corresponding first, second, and third light-up regions 110, 120, and 130.

Other exemplary expressions

As shown in fig. 7, 8 and 9, the first electrode structure 20c includes a first electrode layer 21c, a second electrode layer 22c and a third electrode layer 23c, and in this embodiment, the first electrode structure 20c is provided with two metal discs (bond pads) for inputting a total current, and the first electrode layer 21c and the third electrode layer 23c share the same metal disc 24c; the second electrode layer 22c uses another metal pad, and the first electrode layer 21c is correspondingly connected to the first, second and third lighting areas 110, 120 and 130, thereby inputting current to the first, second and third lighting areas 110, 120 and 130 at the same time. The second electrode layer 22c is correspondingly connected to the second lighting region 120 and the third lighting region 130, so that the second lighting region 120 and the third lighting region 130 are supplied with current, and the current supplied thereto supplements the loss of the current supplied from the first electrode layer 21c to the second lighting region 120 and the third lighting region 130. The third electrode layer 23c is correspondingly connected to the third lighting area 130 to input a current to the third lighting area 130, and the current input by the third electrode layer 23c is used for compensating the loss of the current input to the third lighting area 130 by the first electrode layer 21c and the second electrode layer 22 c.

The first electrode layer 21c and the third electrode layer 23c are connected to the same metal plate, and the second electrode layer 22c is connected to another metal plate. Since the total current is input via the two metal plates, the total current input to one metal plate is shunted to the first electrode layer 21c and the third electrode layer 23c, and then flows into the corresponding lighting areas correspondingly; the current of the other metal disc flows into the second electrode layer 22c correspondingly, at this time, the current of the corresponding first electrode layer 21c and the current of the third electrode layer 23c flow in the same direction, and the current of the second electrode layer 22c is opposite to the current of the first electrode layer 21c and the current of the third electrode layer 23c, and the opposite current flows can cancel the inductance mutually, so that the uniformity of laser emitted by the VCSEL chip is improved, and the performance of the laser radar is further improved.

The first electrode layer 21c, the second electrode layer 22c and the third electrode layer 23c are stacked, and the structure is specifically that the first electrode layer 21c is at the lowest, the second electrode layer 22c is located above the first electrode layer 21c, the first electrode layer 21c and the second electrode layer 22c have a certain distance, and the first electrode layer 21c and the second electrode layer 22c are in metal communication at the metal disc through a plurality of through holes with a certain distance, so as to realize the parallel connection of the first electrode layer 21c and the second electrode layer 22 c. Similarly, the third electrode layer 23c is located above the second electrode layer 22c, and the second electrode layer 22c and the third electrode layer 23c have a certain distance, and the second electrode layer 22c and the third electrode layer 23c are in metal communication at the metal disc through a plurality of through holes spaced at a certain distance, so that the second electrode layer 22c and the third electrode layer 23c are connected in parallel.

In order to ensure that the first electrode layer 21c, the second electrode layer 22c and the third electrode layer 23c can be accurately corresponding to the corresponding lighting areas, an insulating layer 106 is disposed on the second bragg reflector, and the insulating layer 106 is one of transparent silicon dioxide, silicon nitride, hafnium oxide and aluminum oxide. The first electrode layer 21c partially penetrates the insulating layer 106, respectively, to light the corresponding first, second, and third light-up regions 110, 120, and 130. A first insulator layer is disposed between the first electrode layer and the second electrode layer, and a second insulator layer is disposed between the second electrode layer and the third electrode layer.

Schematic vehicle-mounted laser radar

According to yet another aspect of the present application, there is also provided a lidar. The working principle of the laser radar is as follows: the laser is used as a medium to emit laser to the measured target, the laser reflected by the measured target is received, and the relative position and distance between the measured target and the laser radar are obtained based on the time difference between the emitted laser and the received laser pulse (or the phase difference between the emitted laser and the received reflected laser), so that the detection, tracking and identification of the object to be measured in the target area are realized.

Accordingly, the lidar includes: a laser projection device for projecting laser light, a laser receiving device for receiving a laser signal, and a processor communicatively connected to the laser projection device and the laser receiving device, wherein the laser projection device comprises a VCSEL chip of high uniformity optical power as described above.

Preparation method of VCSEL chip with high-uniformity optical power

According to another aspect of the present application, there is also provided a method of manufacturing a VCSEL chip of high uniformity optical power, for manufacturing a VCSEL chip of high uniformity optical power as described above. It should be noted that in the embodiment of the present application, in the process of preparing the VCSEL chip with high uniformity of optical power, the preparation process of the VCSEL in the prior art can be still used, so that the original VCSEL production line and production equipment can be maintained as much as possible, the production line modification cost of the VCSEL device is effectively reduced, and the preparation cost of the VCSEL chip is further reduced.

The preparation method of the VCSEL chip with the specific high-uniformity optical power comprises the following steps:

s1, growing an epitaxial wafer;

s2, defining and forming a p-type contact metal region:coating photoresist, defining a Metal anode (P-Metal) pattern of the VCSEL, finally forming a required Metal anode (P-Metal) range, subsequently removing the photoresist cleanly, and then depositing an insulating layer (silicon nitride) to protect the surface of the element;

s3, defining and etching a groove, and oxidizing at high temperature to form an oxidized hole with a limiting holeCoating photoresist and defining a Mesa pattern, and etching the area which is not protected by the photoresist in the subsequent step, wherein the etching depth is required to be deeper than the position of the oxide layer, the photoresist is continuously removed, and the oxide layer is formed on the AlGaAs layer with high aluminum concentration through a water oxidation process;

s4, depositing an insulating layer, defining and etching to form a first through hole, wherein the first through hole is formedAfter the oxide layer, depositing an insulating layer (silicon nitride) to protect the surface of the element, coating photoresist, defining a pattern of an opening, etching the insulating layer (silicon nitride) above the metal anode to expose the metal anode, and subsequently removing the photoresist cleanly;

s5, defining and forming a first electrode layer:coating photoresist and defining a pattern (including the positions of metal wire bonding areas) of a final anode metal layer, finally forming a required anode metal layer by a gold electroplating mode, and subsequently removing the photoresist cleanly;

S6.repeating the steps S4 to S5, and forming a second through hole, a second electrode layer, a third through hole and a third electrode layer by collocating pattern definitions of different areas and different shapes;

it is noted that in the apparatus and method of the present application, the components or steps of the different embodiments may be disassembled and/or assembled without departing from the principles of the present application. Such decomposition and/or recombination should be considered to be included within the scope of the present application.

The basic principles of the present application have been described above in connection with specific embodiments, however, it should be noted that the advantages, benefits, effects, etc. mentioned in the present application are merely examples and not intended to be limiting, and these advantages, benefits, effects, etc. are not to be considered as essential to the various embodiments of the present application. Furthermore, the specific details disclosed herein are for purposes of illustration and understanding only, and are not intended to be limiting, as the application is not necessarily limited to practice with the above described specific details.

Claims

1. A VCSEL chip with high uniformity of optical power comprises a plurality of VCSEL light emitting areas, and is characterized in that,

2. A VCSEL chip with high uniformity of optical power according to claim 1,

the first electrode layer is communicated with the first lighting area and the second lighting area at the same time, and the second electrode layer is communicated with the second lighting area.

3. A VCSEL chip with high uniformity of optical power according to claim 1,

the current flowing into the first electrode layer has the same direction as the current flowing into the second electrode layer.

4. A VCSEL chip with high uniformity of optical power as set forth in claim 2 wherein,

the current flowing into the first electrode layer is opposite to the current flowing into the second electrode layer.

5. A VCSEL chip with high uniformity of optical power according to claim 1,

the first electrode layer is located below the second electrode layer.

6. A VCSEL chip with high uniformity of optical power according to claim 1,

the VCSEL light-emitting region comprises a substrate layer, a first Bragg reflector, an active region, a limiting layer with an oxidation hole and a second Bragg reflector from bottom to top, and the second electrode structure is in ohmic contact with the substrate layer.

7. A VCSEL chip with high uniformity of optical power according to claim 6,

and the second Bragg reflector is provided with an insulating layer, and the first electrode layer and the second electrode layer partially penetrate through the insulating layer to be in contact with the second Bragg reflector.

8. A VCSEL chip with high uniformity of optical power according to claim 7,

the insulating layer is one of light-transmitting silicon dioxide, silicon nitride, hafnium oxide and aluminum oxide.

9. A VCSEL chip with high uniformity of optical power according to claim 1,

the first electrode layer is connected with the second electrode layer in parallel through a plurality of conductor layers which are arranged at intervals.

10. A VCSEL chip of high uniformity of optical power in accordance with claim 1, characterized in that

The first electrode structure material is one or more of platinum, gold, silver, copper and aluminum.

11. A lidar, comprising:

a laser projection device for projecting laser light, wherein the laser projection device comprises a VCSEL chip of any of claims 1 to 10 having a high uniform optical power;

a laser receiving device for receiving a laser signal; and

12. A method for fabricating a VCSEL chip with high uniformity of optical power, comprising:

s1, growing an epitaxial wafer;

s2, coating photoresist on the epitaxial wafer, defining an anode contact Metal (P-Metal) pattern of the VCSEL, forming a required anode contact Metal (P-Metal) range, subsequently removing the photoresist, and then depositing an insulating layer to protect the surface of the component;

s3, coating photoresist, defining a Mesa pattern, etching the area which is not protected by the photoresist later, wherein the etching depth is required to be deeper than the position of the oxide layer, and then removing the photoresist cleanly; through a water oxidation process, an AlGaAs layer with high aluminum concentration can form an oxide layer to form an oxide hole with a limiting hole, and then an insulating layer is deposited to protect the surface of the component;

s4, coating photoresist and defining an open-pore pattern, etching away a silicon nitride protective layer above the metal anode to expose anode contact metal of the VCSEL, and subsequently removing the photoresist cleanly to obtain a first through hole;

s5, coating photoresist and defining the pattern of anode metal layer of VCSEL, forming the required VCSEL by electroplating goldAnode metal layerRemoving the photoresist cleanly to form a first electrode layer;

s6, depositing an insulating layer, repeating the steps from S4 to S5, defining and etching to form a second through hole and a second electrode layer;

s7, depositing an insulating layer, repeating the steps from S4 to S5, defining and etching to form a third through hole and a third electrode layer; forming a crystal face first electrode structure

S8, coating photoresist to protect the front surface of Wafer, grinding the Wafer to a set thickness required by the product by a grinding mode, firstly plating and forming cathode contact Metal (N-Metal), and then forming the required VCSEL by a gold electroplating modeYin type vagina Electrode metal layerAnd then removing the front photoresist cleanly to form a crystal back second electrode structure.