CN116779602A - Micro LED with isolation groove and preparation method thereof - Google Patents
Micro LED with isolation groove and preparation method thereof Download PDFInfo
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- CN116779602A CN116779602A CN202310733992.8A CN202310733992A CN116779602A CN 116779602 A CN116779602 A CN 116779602A CN 202310733992 A CN202310733992 A CN 202310733992A CN 116779602 A CN116779602 A CN 116779602A
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- 238000002955 isolation Methods 0.000 title claims abstract description 90
- 238000002360 preparation method Methods 0.000 title claims abstract description 18
- 229910052751 metal Inorganic materials 0.000 claims abstract description 116
- 239000002184 metal Substances 0.000 claims abstract description 116
- 238000002161 passivation Methods 0.000 claims abstract description 77
- 238000000034 method Methods 0.000 claims abstract description 32
- 150000002739 metals Chemical class 0.000 claims description 18
- 239000000758 substrate Substances 0.000 claims description 17
- 238000012545 processing Methods 0.000 claims description 13
- 238000003486 chemical etching Methods 0.000 claims description 10
- 238000000151 deposition Methods 0.000 claims description 10
- 238000001312 dry etching Methods 0.000 claims description 10
- 235000012431 wafers Nutrition 0.000 claims description 10
- 239000003292 glue Substances 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 238000001020 plasma etching Methods 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 238000005520 cutting process Methods 0.000 claims description 3
- 238000011049 filling Methods 0.000 claims description 3
- 239000002096 quantum dot Substances 0.000 claims description 3
- 238000003754 machining Methods 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 10
- 238000009616 inductively coupled plasma Methods 0.000 description 7
- 230000004888 barrier function Effects 0.000 description 6
- 229910045601 alloy Inorganic materials 0.000 description 5
- 239000000956 alloy Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 238000003892 spreading Methods 0.000 description 4
- 230000007480 spreading Effects 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 3
- 230000005012 migration Effects 0.000 description 3
- 238000013508 migration Methods 0.000 description 3
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000005253 cladding Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910000765 intermetallic Inorganic materials 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
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Abstract
The invention discloses a micro LED with an isolation groove and a preparation method thereof, wherein the micro LED comprises an LED component and an IC component, and the LED component and the IC component are connected through bonding, and the micro LED is characterized in that: the IC assembly comprises an IC layer, an IC cathode ring is arranged at the upper edge of the IC layer, anode metal is arranged in the middle of the IC layer, an IC passivation layer is arranged on one side of a bonding surface of the IC layer, bonding grooves are formed in the IC cathode ring and the IC anode metal, and a first isolation groove is formed in each IC anode metal circumference on the IC passivation layer. The micro LED with the isolation groove and the preparation method thereof have simple structure, effectively prevent the condition that pixel points are directly conducted with each other or the anode and the cathode are short-circuited in the bonding process, and have stronger practicability and better application prospect.
Description
Technical Field
The invention belongs to the technical field of micro display, and particularly relates to a micro LED with an isolation groove and a preparation method thereof.
Background
Micro Light emitting diode (Micro LED) is a new generation display technology, and has self-luminous display characteristics, and compared with the existing Organic Light emitting diode (Organic Light-EmittingDiode, OLED) technology, the Micro LED display device has a series of advantages of higher brightness and stability, better luminous efficiency, lower power consumption, faster response time and the like. The display principle of the Micro LED display device is that the LED structure design is thinned, miniaturized and arrayed, and the size of the Micro LED display device is only about 1-10 um grade; the display is then formed by monolithic integration or mass transfer, etc. Bonding the epitaxial layer to the IC/PCB for fixation and connecting the P/N of the LED and the anode and cathode of the IC is a particularly critical step in the whole Micro LED manufacturing process. Because of the fine circuitry and components within the IC, the IC may suffer damage under excessive pressure and temperature to subsequent use. Therefore, in the conventional Micro LED manufacturing process, a solid-liquid interdiffusion low-temperature bonding process (after the low-melting-point metal is melted, the low-melting-point metal diffuses and penetrates into the high-melting-point metal to form an intermetallic compound with the low-melting-point metal and the intermetallic compound has the melting point and the physical and chemical properties between the low-melting-point metal and the high-melting-point metal), and the IC component and the LED component are bonded together. In the bonding process, the low-melting-point metal is heated and melted, and the melted metal can be diffused and migrated, so that adjacent pixel points are directly conducted with each other or the anode and cathode are short-circuited, the subsequent use effect is influenced, and even the whole Micro LED chip is scrapped.
Migration diffusion during metal bonding can cause direct mutual conduction or anode and cathode short circuit between adjacent pixel points; increasing the pixel pitch helps to improve the migration diffusion of the alloy, but limits further enhancement of PPI; reducing the bonding metal thickness/lowering the bonding pressure helps to improve the migration diffusion of the alloy but reduces the bonding quality.
Disclosure of Invention
The invention aims to solve the problems in the prior art and provides a micro LED with an isolation groove, which has a simple structure and can effectively prevent the condition that pixel points are directly conducted with each other or the positive electrode and the negative electrode are short-circuited in the bonding process, and a preparation method thereof.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows: the provided micro LED with the isolation groove comprises an LED component and an IC component, wherein the LED component and the IC component are connected through bonding, and the micro LED with the isolation groove is characterized in that: the IC assembly comprises an IC layer, an IC cathode ring is arranged at the upper edge of the IC layer, anode metal is arranged in the middle of the IC layer, an IC passivation layer is arranged on one side of a bonding surface of the IC layer, bonding grooves are formed in the IC cathode ring and the IC anode metal, and a first isolation groove is formed in each IC anode metal circumference on the IC passivation layer.
In order to make the above technical solution more detailed and concrete, the present invention further provides the following preferred technical solutions, so as to obtain a satisfactory practical effect:
and an annular second isolation groove is arranged on the IC passivation layer, which is close to the inner side of the IC anode metal, of the IC cathode ring.
The bonding groove, the first isolation groove and the second isolation groove are of inverted trapezoid structures.
The width of the upper bottom of the first isolation groove is smaller than half of the distance between adjacent IC anode metals, the depth of the first isolation groove is larger than half of the passivation layer on the surface of the IC, and the passivation layer with the thickness not smaller than 10nm is reserved at the bottom; the second isolation groove is positioned on the outer ring of the first isolation groove, the upper bottom width of the second isolation groove is smaller than half of the distance between the IC cathode ring and the adjacent IC anode metal, the depth of the second isolation groove is larger than half of the passivation layer on the surface of the IC, and the passivation layer with the thickness not smaller than 10nm is reserved at the bottom.
A preparation method of a micro LED with an isolation groove comprises the following steps: step 1) preparing an LED component; step 2) preparing an IC assembly; step 3) bonding the LED assembly and the IC assembly; wherein in step 2), bonding grooves are processed in bonding areas of the bonding surfaces of the ICs, and IC bonding metals are deposited in the bonding grooves; annular first isolation grooves are processed on the IC passivation layer around each IC anode metal.
In step 1), the preparation of the LED component specifically comprises the following steps:
step 1-1, removing all the P-GaN layer and the quantum well layer on the epitaxial substrate except the outer ring LED cathode ring region and the pixel point in the middle until the N-GaN layer is exposed;
step 1-2, processing N interconnection electrodes between adjacent pixel points;
step 1-3, depositing a current expansion layer on the whole bonding surface of the LED epitaxial substrate, removing part of the current expansion layer by adopting a dry etching or chemical etching method, and reserving the current expansion layer on the surface of the P-GaN layer corresponding to the pixel point or reserving the current expansion layer corresponding to the surface of the P-GaN layer corresponding to the pixel point and the LED cathode ring region;
step 1-4, depositing an LED passivation layer on the whole bonding surface of the LED epitaxial substrate;
step 1-5, removing the passivation layer covered by the surface of the pixel point and the cathode ring area by adopting dry etching or chemical etching methods of ICP/RIE equipment and the like;
and step 1-6, processing LED bonding metal, preparing the cathode ring bonding metal on the LED cathode ring area, and preparing the P electrode on the pixel point.
In the step 1-4, the thickness of the LED passivation layer is more than or equal to 10nm, and the thickness of the LED passivation layer plus the N interconnection electrode is less than the sum of the thicknesses of the bonding metal layer plus the P-GaN layer plus the quantum well layer.
In the step 1-5, the edge of the passivation layer after removal is positioned on the P-GaN mesa of the pixel point, and the area of the mesa covered by the passivation layer is not more than 50%.
In step 2), the preparation of the IC assembly specifically includes the steps of:
step 2-1, arranging an IC passivation layer on the bonding surface of the IC, wherein the thickness of the IC passivation layer is not less than 20nm;
step 2-2, machining bonding grooves on the IC cathode ring and the IC anode metal, wherein the bonding grooves are of an inverted trapezoid groove structure;
step 2-3, then depositing IC bonding metal in the bonding grooves on the IC cathode ring area and the IC anode metal;
step 2-4, processing annular first isolation grooves around each IC anode metal on the IC passivation layer, and simultaneously arranging a circle of second isolation grooves on the IC passivation layer, which is close to the inner side of the IC anode metal, of the IC cathode ring; the first isolation groove and the second isolation groove are of inverted trapezoid structures.
In the step 3), the bonding surface of the LED component and the bonding surface of the IC component are overlapped and aligned according to the characteristics of bonding metal, and bonded micro wafers are prepared in bonding equipment; and thinning, stripping and chemically eliminating surface damage of the bonded micro wafer substrate to expose the N-GaN layer, sequentially coating crosstalk-proof black glue, quantum dot materials, color filter films and OC filling glue, and then cutting, binding and fixing bonding wires by using black glue to obtain the micro screen with the isolation grooves, which is used in normal lighting.
Compared with the prior art, the invention has the following advantages: the micro LED with the isolation groove and the preparation method thereof have simple structure, effectively prevent the condition that pixel points are directly conducted with each other or the anode and the cathode are short-circuited in the bonding process, and have stronger practicability and better application prospect.
Drawings
The contents expressed in the drawings of the present specification and the marks in the drawings are briefly described as follows:
FIG. 1 is a schematic cross-sectional view of a device without substrate lift-off after bonding in accordance with the present invention;
FIG. 2 is a schematic plan view of a bonding surface of an LED module before bonding according to the present invention;
fig. 3 is a schematic plan view of a bonding surface of an IC package before bonding according to the present invention.
Reference numerals: 10. an LED assembly; 11. an LED cathode ring region; 12. a pixel point; 13. an N-GaN layer; 14. a quantum well layer; 15. a P-GaN layer; 16. n interconnection electrodes; 161. a lateral N interconnection electrode; 162. longitudinal N interconnection electrodes; 163. overlapping the interconnection electrode; 17. an LED passivation layer; 18. a current spreading layer; 19. an LED bonding metal; 191. a cathode ring bonding metal; 192. a P electrode;
20. an IC assembly; 21. an IC cathode ring; 22.IC anode metal; 23. an IC cathode conductive hole; 24. an IC anode conductive hole; 25. a first isolation groove; 26. a second isolation groove; 27. and an IC passivation layer.
Detailed Description
The following description of the embodiments of the present invention refers to the accompanying drawings, which illustrate in further detail.
In the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention.
The micro LED with the isolation groove of the present invention, as shown in fig. 1, includes an LED assembly 10 and an IC assembly 20, and the LED assembly 10 and the IC assembly 20 are connected by bonding. As shown in fig. 3, the IC assembly 20 includes an IC layer, an IC cathode ring 21 is provided at the upper edge of the IC layer, an IC anode metal 22 is provided at the middle part of the IC layer, an IC passivation layer 27 is provided at one side of the bonding surface of the IC layer, bonding grooves are provided on the IC cathode ring 21 and the IC anode metal 22, and a first isolation groove 25 is provided on the IC passivation layer 27 at the circumference of each IC anode metal 22; an annular second isolation trench 26 is provided in the IC cathode ring 21 on the IC passivation layer 27 adjacent to the inside of the IC anode metal 22.
As shown in fig. 1 and 2, an LED assembly 10 sequentially grows an N-GaN layer 13, a quantum well layer 14 and a P-GaN layer on an epitaxial substrate, wherein a trapezoid groove structure is formed between adjacent P-GaN layers 15, and the side edges of the P-GaN layers 15 are inclined structures; the P-GaN layer at the edge corresponds to the LED cathode ring region 11, and the P-GaN layer 15 in the middle corresponds to the pixel point 12.
N interconnection electrodes 16 are processed between adjacent pixel points, and the N interconnection electrodes 16 comprise transverse N interconnection electrodes 161 and longitudinal N interconnection electrodes 162 which are arranged in a crisscross manner.
The width of the N interconnection electrode is smaller than the narrowest distance between the adjacent pixel points 12, the height is smaller than the sum of the thicknesses of the P-GaN layer 15 and the quantum well layer 14, and the N interconnection electrode at the edge extends along the inner inclined plane of the LED cathode ring area 11 to form a lap joint interconnection electrode 163; the lower end of the overlap interconnection electrode 163 is connected to the cathode ring bonding metal 191.
The surface of the P-GaN layer corresponding to the pixel point is provided with a current expansion layer 18, or the surface of the P-GaN layer corresponding to the pixel point is provided with the current expansion layer 18 at the position corresponding to the LED cathode ring area. Wherein the current spreading layer 18 may be a conductive transparent layer of ITO or IZO.
The LED passivation layer 17 covers the bonding surface of the LED epitaxial substrate between adjacent pixel points and on both sides of the LED cathode ring region. A cathode ring bonding metal 191 is prepared on the LED cathode ring region 11, and a P electrode 192 is prepared on the current spreading layer 18 of the pixel 12. The cathode ring bonding metal 191 is connected to the overlap interconnection electrode 163.
In the invention, the bonding grooves on the IC cathode ring 21 and the IC anode metal 22 are of inverted trapezoid groove structures, the width of the upper bottom of the trapezoid is larger than or equal to the width of the corresponding P-GaN table top on the LED wafer, and the volume of the bonding groove is larger than or equal to the volume of the bonding metal after being heated and expanded under the corresponding bonding condition.
The first isolation groove 25 has an inverted trapezoid structure, wherein the upper bottom is wider and the lower bottom is narrower, and the upper bottom width is smaller than half of the distance between adjacent IC anode metals 22; the first isolation trench 25 has a depth greater than half of the passivation layer on the IC surface and a bottom portion remains with the passivation layer having a thickness not less than 10nm.
The second isolation groove 26 is located on the outer ring of the first isolation groove 25, the section is of an inverted trapezoid structure, the upper bottom width of the second isolation groove is smaller than half of the distance between the IC cathode ring 21 and the adjacent IC anode metal 22, the depth of the second isolation groove 26 is larger than half of the passivation layer on the surface of the IC, and the passivation layer with the thickness not smaller than 10nm is reserved at the bottom.
An IC bonding metal corresponding to the LED bonding metal is provided in the bonding groove between the IC cathode ring 21 and the IC anode metal 22. During bonding, the bonding surface of the LED component 10 and the bonding surface of the IC component 20 are stacked and aligned according to the characteristics of bonding metal, the bonding metal of the bonding surface is opposite, and the bonding equipment is processed by selecting proper temperature, pressure and time conditions to prepare the bonded micro wafer.
A preparation method of a micro LED with isolation grooves specifically comprises the following steps: step 1) preparing an LED assembly 10; step 2) preparing an IC assembly 20; step 3) bonding the LED assembly 10 to the IC assembly 20. Wherein in step 2) bonding grooves are processed in the bonding region of the IC bonding surface; annular first isolation trenches 25 are formed in the IC passivation layer 27 around each IC anode metal 22.
Wherein in step 2), annular second isolation trenches 26 are machined in the IC cathode ring 21 on the IC passivation layer 27 near the inside of the IC anode metal 22.
Specifically, the preparation method of the micro LED with the isolation groove comprises the following steps:
the LED assembly 10 is structured as shown in fig. 1 and 2. An N-GaN layer 13, a quantum well layer 14, and a P-GaN layer are sequentially grown on the epitaxial substrate.
In step 1), the preparation of the LED assembly 10 specifically includes the steps of:
step 1-1, removing all the P-GaN layer 15 and the quantum well layer 14 on the epitaxial substrate except the outer ring LED cathode ring region 11 and the pixel points 12 in the middle until the N-GaN layer 13 is exposed;
wherein the epitaxial substrate may be Si-based/Al 2 O 3 A base/GaN base/GaAs base; the P-GaN layer 15 and the quantum well layer 14 at the corresponding positions are removed by dry etching or chemical etching using ICP/RIE or the like.
In step 1-2, N interconnection electrodes 16 are processed between adjacent pixel points. Adopting a negative photoresist stripping method or adopting E-beam equipment to deposit or adopting Spter equipment to Sputter electrode metal to process N interconnection electrodes; the N interconnection electrode comprises an electrode adhesion layer, a barrier layer and a current expansion layer, wherein the electrode adhesion layer is made of Cr/Ni/Pd and other metals, the barrier layer is made of Ti/Pt/Ge and other metals, the current expansion layer is made of Al/Cu/Au/Ag and other metals or alloys, and the N interconnection electrode forms an embodiment: the layer structure and the corresponding layer thickness of each layer are Cr/Al/Ti/Ni/Pt/Ni/Pt/Au
(25A/50A/25A/50A/500A/50A/500A/50A/500A/5000A)；
The N interconnect electrode 16 includes a transverse N interconnect electrode 161 and a longitudinal N interconnect electrode 162 arranged crisscross as shown in fig. 2;
the width of the N interconnection electrode is smaller than the narrowest distance between the adjacent pixel points 12, the height is smaller than the sum of the thicknesses of the P-GaN layer 15 and the quantum well layer 14, and the N interconnection electrode at the edge extends along the inner inclined plane of the LED cathode ring area 11 to form a lap joint interconnection electrode 163; the lower end of the overlap interconnection electrode 163 is connected to the cathode ring bonding metal 191.
And 1-3, depositing a current expansion layer 18 on the whole bonding surface of the LED epitaxial substrate, removing part of the current expansion layer 18 by adopting a dry etching or chemical etching method, and reserving the current expansion layer 18 on the surface of the P-GaN layer corresponding to the pixel point or reserving the current expansion layer 18 on the surface of the P-GaN layer corresponding to the pixel point and the LED cathode ring region. Wherein the current spreading layer 18 of the LED cathode ring area may be left or removed. The current expansion layer 18 on the surface of the P-GaN layer corresponding to the pixel point is reserved, namely, the current expansion layer 18 on all positions except the surface of the P-GaN layer corresponding to the pixel point is removed; the current expansion layer 18 corresponding to the surface of the P-GaN layer and the LED cathode ring area corresponding to the pixel point is reserved, namely, the current expansion layer 18 at all positions except the surface of the P-GaN layer and the LED cathode ring area corresponding to the pixel point is removed;
the current expansion layer 18 can be an ITO or IZO conductive transparent layer, and is deposited by E-beam equipment or sputtered by Spter equipment, and the thickness of the film is between 10nm and 240nm, and the deposited film is annealed by a furnace tube/RTA/RTP/hot plate machine to increase the adhesiveness and improve the ohmic contact with P-GaN; then, dry etching or chemical etching is carried out by using ICP/RIE equipment and the like, the current expansion layers 18 at all positions except the P-GaN surface corresponding to the pixel point and the LED cathode ring area are removed, and the conductive transparent layer of the cathode ring area can be reserved or removed according to the requirement; the conductive transparent layer of the cathode ring region is reserved, so that ohmic contact between P-GaN and bonding metal is improved, and current expansion in subsequent use is facilitated; the conductive transparent layer is removed, so that the adhesiveness between the P-GaN and the bonding metal can be improved, and the conductive transparent layer in the cathode ring area can be selectively reserved or removed according to actual product conditions.
Step 1-4, depositing an LED passivation layer 17 on the whole bonding surface of the LED epitaxial substrate, wherein the thickness of the LED passivation layer 17 is more than or equal to 10nm, and the thickness of the LED passivation layer 17 plus an N interconnection electrode is less than the sum of the thicknesses of a bonding metal layer plus a P-GaN layer 15 plus a quantum well layer 14; deposition of SiO using CVD/PECVD/ALD apparatus 2 /Al 2 O 3 /SiN x And the like as passivation layers.
Step 1-5, removing the passivation layer covered by the pixel point surface and the cathode ring area by adopting dry etching or chemical etching methods of ICP/RIE and other equipment, wherein the edge of the passivation layer after removal is positioned on the P-GaN mesa of the pixel point, the cladding area of the mesa by the passivation layer is not more than 50%, and the tail end of the overlap joint interconnection electrode 163 at the inner inclined plane of the LED cathode ring area cannot be covered by the passivation layer, so that effective communication with the bond metal layer is ensured; the table top is coated, so that the risk of falling off of the edge of the passivation layer in the subsequent processing and use is prevented, and a good insulating effect is not achieved; if the cladding area is too large, the area of the actually conducted current is too small, which is not beneficial to current expansion in subsequent use. Therefore, the coating area is preferably not more than 50%.
And step 1-6, processing the LED bonding metal 19. Adopting a negative photoresist stripping method or adopting E-beam equipment to deposit or adopting Spter equipment to Sputter electrode metal to process bonding metal; the LED bonding metal 19 includes a cathode ring bonding metal 191 and a P electrode 192, the cathode ring bonding metal 191 is prepared on the LED cathode ring region 11, and the P electrode 192 is prepared on the pixel 12; the LED bond metal 19 includes an electrode adhesion layer, a barrier layer, and a bonding layer. Wherein the electrode adhesion layer is Cr/Ni/Pd and other metals, the barrier layer is Ti/Pt/Ge and other metals, the bonding layer is Al/Cu/Au/Ag and other metals or alloys, and one LED bonding metal composition embodiment is as follows: the layer structure and the layer thickness corresponding to each layer are Cr/Al/Ti/Ni/Pt/Ni/Pt/Ni/Pt/Au (25A/50A/25A/50A/500A/50A/500A/50A/500A/5000A).
As shown in fig. 1 and 3, the IC assembly 20 is configured such that an IC cathode ring 21 is disposed on the outer ring of the IC layer, the IC cathode ring 21 is opposite to the LED cathode ring region 11, and an IC anode metal 22 disposed corresponding to the pixel 12 is disposed in the middle. An IC cathode conductive hole 23 is arranged on the IC layer corresponding to the IC cathode ring 21, and an IC anode conductive hole 24 is arranged on the IC layer corresponding to the IC anode metal 22. The side of the IC assembly 20 opposite the LED assembly 10 to which it is bonded is the IC bonding surface.
In step 2), the preparation of the IC assembly 20 specifically includes the steps of:
step 2-1, arranging an IC passivation layer 27 on the bonding surface of the IC, ensuring that the thickness of the whole IC passivation layer 27 is not less than 20nm, and not setting the upper limit of the thickness, wherein the thickness increase cost and the processing difficulty can be increased, and the specific process implementation process is combined with the actual requirements and the cost situation to select a proper thickness; in the post-processing of the trench, it is desirable to leave a passivation layer at least 10nm thick and a trench depth of at least 10nm. And depositing materials such as SiO2/Al2O3/SiNx and the like by adopting a CVD/PECVD/ALD device to form a passivation layer. The specific thickness should be matched to the bond groove volume calculation at the bond point, and the IC passivation layer 27 thickness is greater than the bond groove height.
And 2-2, processing the bonding surface of the IC by adopting dry etching or chemical etching methods of ICP/RIE and other equipment, processing bonding grooves in an IC bonding area, wherein the bonding grooves are of an inverted trapezoid groove structure, and processing the bonding grooves in the IC bonding area, namely the positions of the IC cathode ring 21 area and the IC anode metal 22, and the IC cathode ring 21 and the IC anode metal 22. The volume of the bonding groove is larger than or equal to the volume of the bonding metal after being heated and expanded under the corresponding bonding condition, and the bonding groove is calculated in advance according to the selected bonding metal and the selected bonding condition, so that the groove section can be ensured to better contain the expanded bonding metal. The width of the upper bottom of the trapezoid is larger than or equal to the width of the corresponding P-GaN table top on the LED wafer, so that a good bonding effect is obtained;
step 2-3, then deposit the IC bond metal in the bonding grooves on the IC cathode ring region and the IC anode metal 22. The negative adhesive stripping method is adopted, or the electrode metal is deposited by an E-beam device or sputtered by a Spter device to manufacture the IC bonding metal, and the IC bonding metal has the same structure as the LED bonding metal and comprises an electrode adhesion layer, a barrier layer and a bonding layer. Wherein the electrode adhesion layer is Cr/Ni/Pd and other metals, the barrier layer is Ti/Pt/Ge and other metals, the bonding layer is Al/Cu/Au/Ag and other metals or alloys, and the composition of one IC bonding metal is as follows: the layer structure and the layer thickness corresponding to each layer are Cr/Al/Ti/Ni/Pt/Ni/Pt/Ni/Pt/Au 25A/50A/25A/50A/500A/50A/500A/5000A;
in step 2-4, an ICP/RIE (inductively coupled plasma/reactive ion etching) or other equipment dry etching or chemical etching method is adopted, annular first isolation grooves 25 are processed on the periphery of each IC anode metal 22 on the IC passivation layer 27, and the metals are heated to melt and diffuse during bonding, so that the first isolation grooves 25 can effectively prevent adjacent pixel points and edge cathode rings from being connected, and prevent connection conduction of positive and negative electrodes and influence on product quality. The first isolation grooves 25 are of inverted trapezoid structures, the upper bottom is wide and the lower bottom is narrow, the upper bottom is wider than half of the distance between adjacent IC anode metals 22, and the requirement that two first isolation grooves 25 need to be bypassed on a passivation layer between adjacent IIC anode metals is met; the first isolation trench 25 has a depth greater than half of the passivation layer on the surface of the IC and a bottom portion of the passivation layer remains having a thickness of not less than 10nm;
meanwhile, a circle of second isolation grooves 26 are arranged on an IC passivation layer 27 of the IC cathode ring 21, which is close to the inner side of the IC anode metal 22, the second isolation grooves 26 are positioned on the outer ring of the first isolation grooves 25, the cross section is of an inverted trapezoid structure, the upper bottom width of the second isolation grooves is smaller than half of the distance between the IC cathode ring 21 and the adjacent IC anode metal 22, the depth of the second isolation grooves 26 is larger than half of the passivation layer on the surface of the IC, and the passivation layer with the thickness not smaller than 10nm is reserved at the bottom of the second isolation grooves 26; the second isolation groove 26 further isolates the positive and negative electrodes, effectively preventing the positive and negative electrodes from shorting.
In step 3), the LED assembly 10 is bonded to the IC assembly 20. Stacking and aligning the bonding surface of the LED component 10 and the bonding surface of the IC component 20 according to the characteristics of bonding metal, and processing the bonding surface by selecting proper temperature, pressure and time conditions on bonding equipment to prepare a bonded micro wafer; and thinning, stripping and chemically eliminating surface damage treatment are carried out on the bonded micro-controlled wafer substrate to expose the N-GaN layer, then, after crosstalk-preventing black glue/quantum dot material/color filter film/OC filling glue are sequentially coated, cutting, die bonding/wafer bonding and black glue curing and fixing bonding wires are carried out, and the micro-controlled screen with the isolation groove, which is normally used, can be obtained.
According to the micro LED with the isolation groove and the preparation method thereof, an inverted trapezoid bonding groove design is adopted at the bonding position of the surface of the IC, the trapezoid volume is larger than or equal to the volume of the bonding metal after being heated and expanded under the corresponding bonding condition, and the upper bottom width of the trapezoid is larger than or equal to the P-GaN mesa width of the corresponding LED pixel point; an annular first isolation groove 25 is arranged around the bonding point of each IC anode metal 22, the first isolation groove 25 is in an inverted trapezoid shape, the upper bottom width is not more than half of the distance between adjacent bonding points, the depth of the first isolation groove 25 is more than half of the passivation layer on the surface of the IC, and the passivation layer with the thickness not less than 10nm is reserved at the bottom; an annular second isolation groove 26 is arranged between the IC cathode ring 21 and the nearest bonding point, the second isolation groove 26 is in an inverted trapezoid shape, the upper bottom width of the second isolation groove is not more than the distance between the cathode ring and the adjacent IC anode metal 22, the depth of the second isolation groove is more than half of the passivation layer on the surface of the IC, and the passivation layer with the thickness not less than 10nm is reserved at the bottom of the second isolation groove; all the bonding surfaces of the LEDs except the bonding positions are covered by passivation layers, and the thickness of the passivation layers is more than or equal to 10nm; the epitaxial layer between adjacent pixel points is etched until the N-GaN layer and an N interconnection electrode (the thickness of the electrode is more than 0.1 um) is manufactured at the middle position of the N-GaN layer, an annular isolation groove is formed around the pixel points on the LED component through thickness dimension control, so that an upper accommodating space and a lower accommodating space are increased, the situation that metals are outwards expanded to adjacent positions during bonding to cause direct mutual conduction or positive and negative electrode short circuit between the adjacent pixel points is avoided, the quality of produced products is improved, and the product qualification rate is improved.
The micro LED with the isolation groove and the preparation method thereof have simple structure, effectively prevent the condition that pixel points are directly conducted with each other or the anode and the cathode are short-circuited in the bonding process, and have stronger practicability and better application prospect.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
Thus far, the technical solution of the present invention has been described in connection with the preferred embodiments shown in the drawings, but it is easily understood by those skilled in the art that the scope of protection of the present invention is not limited to these specific embodiments. Equivalent modifications and substitutions for related technical features may be made by those skilled in the art without departing from the principles of the present invention, and such modifications and substitutions will be within the scope of the present invention.
The foregoing description is only of the preferred embodiments of the invention and is not intended to limit the invention; various modifications and variations of the present invention will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. The utility model provides a take micro LED of isolation groove, includes LED subassembly and IC subassembly, and LED subassembly and IC subassembly pass through bonding connection, its characterized in that: the IC assembly comprises an IC layer, an IC cathode ring is arranged at the upper edge of the IC layer, anode metal is arranged in the middle of the IC layer, an IC passivation layer is arranged on one side of a bonding surface of the IC layer, bonding grooves are formed in the IC cathode ring and the IC anode metal, and a first isolation groove is formed in each IC anode metal circumference on the IC passivation layer.
2. The isolated trench micro LED of claim 1, wherein: and an annular second isolation groove is arranged on the IC passivation layer, which is close to the inner side of the IC anode metal, of the IC cathode ring.
3. The isolated trench micro LED of claim 1, wherein: the bonding groove, the first isolation groove and the second isolation groove are of inverted trapezoid structures.
4. A micro LED with isolation groove according to claim 3, characterized in that: the width of the upper bottom of the first isolation groove is smaller than half of the distance between adjacent IC anode metals, the depth of the first isolation groove is larger than half of the passivation layer on the surface of the IC, and the passivation layer with the thickness not smaller than 10nm is reserved at the bottom; the second isolation groove is positioned on the outer ring of the first isolation groove, the upper bottom width of the second isolation groove is smaller than half of the distance between the IC cathode ring and the adjacent IC anode metal, the depth of the second isolation groove is larger than half of the passivation layer on the surface of the IC, and the passivation layer with the thickness not smaller than 10nm is reserved at the bottom.
5. A method for manufacturing the micro LED with the isolation groove according to any one of claims 1 to 4, comprising the steps of: step 1) preparing an LED component; step 2) preparing an IC assembly; step 3) bonding the LED assembly and the IC assembly; wherein in step 2), bonding grooves are processed in bonding areas of the bonding surfaces of the ICs, and IC bonding metals are deposited in the bonding grooves; annular first isolation grooves are processed on the IC passivation layer around each IC anode metal.
6. The method for manufacturing the micro LED with the isolation groove according to claim 5, wherein the method comprises the following steps: in step 1), the preparation of the LED component specifically comprises the following steps:
step 1-1, removing all the P-GaN layer and the quantum well layer on the epitaxial substrate except the outer ring LED cathode ring region and the pixel point in the middle until the N-GaN layer is exposed;
step 1-2, processing N interconnection electrodes between adjacent pixel points;
step 1-3, depositing a current expansion layer on the whole bonding surface of the LED epitaxial substrate, removing part of the current expansion layer by adopting a dry etching or chemical etching method, and reserving the current expansion layer on the surface of the P-GaN layer corresponding to the pixel point or reserving the current expansion layer corresponding to the surface of the P-GaN layer corresponding to the pixel point and the LED cathode ring region;
step 1-4, depositing an LED passivation layer on the whole bonding surface of the LED epitaxial substrate;
step 1-5, removing the passivation layer covered by the surface of the pixel point and the cathode ring area by adopting dry etching or chemical etching methods of ICP/RIE equipment and the like;
and step 1-6, processing LED bonding metal, preparing the cathode ring bonding metal on the LED cathode ring area, and preparing the P electrode on the pixel point.
7. The method for manufacturing the micro LED with the isolation groove according to claim 6, wherein the method comprises the following steps: in the step 1-4, the thickness of the LED passivation layer is more than or equal to 10nm, and the thickness of the LED passivation layer plus the N interconnection electrode is less than the sum of the thicknesses of the bonding metal layer plus the P-GaN layer plus the quantum well layer.
8. The method for manufacturing the micro LED with the isolation groove according to claim 6, wherein the method comprises the following steps: in the step 1-5, the edge of the passivation layer after removal is positioned on the P-GaN mesa of the pixel point, and the area of the mesa covered by the passivation layer is not more than 50%.
9. The method for manufacturing the micro LED with the isolation groove according to claim 5, wherein the method comprises the following steps: in step 2), the preparation of the IC assembly specifically includes the steps of:
step 2-1, arranging an IC passivation layer on the bonding surface of the IC, wherein the thickness of the IC passivation layer is not less than 20nm;
step 2-2, machining bonding grooves on the IC cathode ring and the IC anode metal, wherein the bonding grooves are of an inverted trapezoid groove structure;
step 2-3, then depositing IC bonding metal in the bonding grooves on the IC cathode ring area and the IC anode metal;
step 2-4, processing annular first isolation grooves around each IC anode metal on the IC passivation layer, and simultaneously arranging a circle of second isolation grooves on the IC passivation layer, which is close to the inner side of the IC anode metal, of the IC cathode ring; the first isolation groove and the second isolation groove are of inverted trapezoid structures.
10. The method for manufacturing the micro LED with the isolation groove according to claim 7, wherein the method comprises the following steps: in the step 3), the bonding surface of the LED component and the bonding surface of the IC component are overlapped and aligned according to the characteristics of bonding metal, and bonded micro wafers are prepared in bonding equipment; and thinning, stripping and chemically eliminating surface damage of the bonded micro wafer substrate to expose the N-GaN layer, sequentially coating crosstalk-proof black glue, quantum dot materials, color filter films and OC filling glue, and then cutting, binding and fixing bonding wires by using black glue to obtain the micro screen with the isolation grooves, which is used in normal lighting.
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