CN116777670A - Hierarchical parallel calculation method, system and terminal for theoretical line loss of power distribution network - Google Patents
Hierarchical parallel calculation method, system and terminal for theoretical line loss of power distribution network Download PDFInfo
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Abstract
The application discloses a hierarchical parallel calculation method, a hierarchical parallel calculation system and a hierarchical parallel calculation terminal for theoretical line loss of a power distribution network, belonging to the field of calculation of theoretical line loss of the power distribution network, comprising the following steps: converting the CIM information of the power distribution network by taking the connection node object as analysis granularity, and constructing a power distribution network graph model oriented to line loss analysis based on a Neo4j graph database; dividing a feeder line layer and a load branch layer of a network according to the installation position of a switching element in a power distribution network, establishing an equivalent loss model of a corresponding level, and realizing layered calculation by combining a forward substitution algorithm; based on a layered forward push back power flow algorithm, the parallel computation of the molecular diagram of the distribution network line loss analysis diagram model is realized based on a parallel computation mechanism in the whole synchronous parallel computation model. According to the application, the hierarchical parallel graph calculation of the theoretical line loss is realized by constructing the distribution network line loss analysis graph model and the BSP model through the graph database, so that the analysis efficiency of the theoretical line loss can be improved, and key points of network loss reduction can be rapidly and accurately found.
Description
Technical Field
The application relates to the field of calculation of theoretical line loss of a power distribution network, in particular to a hierarchical parallel calculation method, system and terminal of theoretical line loss of the power distribution network.
Background
The line loss is one of important means for checking the operation management level of power supply enterprises, and theoretical line loss optimization calculation and analysis work is an important method for making loss reduction schemes and improving line loss management and power grid operation level. With the improvement of the automation degree of the electricity consumption information acquisition system, the user load data acquisition frequency is increased to 15min, the target of accurately reflecting the fluctuation condition of the solar line loss of the power distribution network through increasing the line loss calculation times provides higher requirements on the calculation speed of the theoretical line loss, and the parallel calculation capability of the graph calculation provides possibility for realizing the target. Therefore, it is necessary to research a power distribution network graph database modeling method facing line loss analysis and a corresponding theoretical line loss calculation method with high efficiency.
Disclosure of Invention
Aiming at the defects of the prior art, the application provides a power distribution network theoretical line loss layering parallel computing method based on graph computation, which is introduced into theoretical line loss optimization computation and solves the problems of high computation and requirement, low computation speed and long computation time consumption caused by overlarge power grid scale. Meanwhile, through rapid theoretical line loss optimization calculation, an access point for reducing network loss can be accurately and rapidly found, and data reference and suggestion are provided for making loss reduction measures.
The aim of the application can be achieved by the following technical scheme:
the application discloses a power distribution network theoretical line loss layering parallel computing method based on graph computation, which comprises the following steps:
connecting nodes in the CIM model data of the power distribution network are taken as an analysis basis, and a power distribution network topological graph model oriented to line loss analysis is constructed based on a graph database;
dividing a feeder layer and a load branch layer of a power distribution network based on the positions of different types of switching elements of the power distribution network, and establishing an equivalent loss model; carrying out layered calculation based on the equivalent loss model and a forward push back power flow algorithm;
based on hierarchical computation and a hierarchical parallel computation framework in a BSP model, forward-push back substitution parallel computation is carried out on feeder layers and load branch layers of all levels, and a theoretical line loss analysis result is obtained.
In some embodiments, the construction of the power distribution network topology model includes the steps of:
according to the requirement of topology analysis granularity in the power flow calculation process of the power distribution network, analyzing CIM model data of the power distribution network by taking the connection nodes as analysis objects, and storing information corresponding to the connection nodes into an equivalent node data table;
storing the electric equipment such as a circuit, a switch or a transformer connected between two connecting nodes into a relational data table between the nodes;
and respectively defining a node data table and a relation data table corresponding to the connection nodes as nodes and relations in a graph database, and generating a corresponding power distribution network graph model G (V, E) facing line loss analysis based on the graph database.
In some embodiments, the equivalent loss model includes a load branch equivalent loss model and a feeder layer equivalent loss model, and the specific construction includes the following steps:
dividing the power distribution network into a feeder layer and a load branch layer through a circuit containing breaker equipment and a circuit containing fuse equipment; the feeder line layer is further divided into a first-level feeder line layer, a second-level feeder line layer and a third-level feeder line layer to an N-level feeder line layer according to the front and back positions of the circuit breakers, wherein the N-1-level feeder line layer is connected with the N-2-level feeder line layer through the circuit breakers, the N-level feeder line layer is connected with the N-1-level feeder line layer through the circuit breakers, and N is a positive integer larger than 2; defining a branch with a head end being a fuse as a load branch, and connecting the load branch with a connecting node in a corresponding feeder layer, wherein all the load branches are positioned in a load branch layer;
building a load branch equivalent loss model: the load branch structure consists of n lines and 1 transformer, and consists of nodes 1 to (n+2), and the power data carried by the load branch is satisfied as S=P+jQ; the equivalent admittance of a single-section line in the power distribution network can be ignored under the conditions that the length of the single-section line in the power distribution network is not more than 100km and the voltage level is lower than 35kV, and only the serial impedance branch Z is needed to be considered Ln The method comprises the steps of carrying out a first treatment on the surface of the Only the equivalent impedance Z of the transformer is considered in the forward-backward generation calculation process T The variable loss is brought about, and the loss of the ground branch is fixed loss delta S T ；
Establishing a feeder line layer equivalent loss model: the feeder layer is mainly composed of m lines, the equivalent admittance of the lines is ignored, and only the series impedance branch is considered, so that the corresponding equivalent loss model of the N-level feeder layer is assumed to be shown in figure 3; the equivalent loss model is composed of nodes 1 to (m+1), and the power data corresponding to the load branch connected with node m in the feeder layer is assumed to be S m ＝P m +jQ m 。
In some embodiments, the hierarchical computation is performed based on an equivalent loss model and a forward-push back power flow algorithm, comprising the steps of:
step 1: performing forward calculation according to the load branch equivalent loss model aiming at each load branch in the power distribution network to obtain power values of head end connection nodes of each load branch, and transmitting the power values of the head end connection nodes of the load branch to corresponding nodes in a feeder line layer connected with the load branch;
step 2: starting analysis from the N-th level feeder layer, performing forward calculation according to the equivalent loss model of the feeder layer to obtain a power value of a first end connection node of the feeder layer, transmitting the power value of the first end connection node of the N-th level feeder layer to a corresponding node in the N-1 level feeder layer connected with the N-th level feeder layer, and repeating the process until the power value is transmitted to the first level feeder layer to finish the forward calculation;
step 3: starting from a first-stage feeder line layer, performing back-substitution calculation according to a feeder line layer equivalent loss model, then transmitting the voltage update value of each node to a lower-stage feeder line layer or a connected load branch, and repeating the process until the back-substitution calculation is transmitted to an N-stage feeder line layer and the load branch connected with the N-stage feeder line layer;
step 4: all load branches for updating the voltage value of the head end node perform back-substitution calculation according to the load branch equivalent loss model, and judge convergence condition |delta U according to the calculation result max |<Epsilon, stopping calculation if the result is satisfied, otherwise returning to the step 1 to perform iterative calculation again;
after iteration is finished, theoretical line loss values of all load branches and all feeder layers can be obtained;
the loss calculation formula of the load branch layer is as follows:
in DeltaS F Representing load branch loss; ΔS L Representing line loss; ΔS T Representing transformer losses; n represents n lines in the load branch;
the loss calculation formula of the feeder layer is as follows:
in DeltaS K Representing feeder layer losses; m represents that the feeder layer comprises m lines; i represents the load branch or the ith line segment in the feeder layer, ΔS Li Representing the theoretical loss value of line i.
In some embodiments, the hierarchical parallel computing framework based on hierarchical computing and BSP models includes n+1 supersteps, specifically including the steps of:
the 1 st super step is to complete parallelization forward calculation of the load branch subgraph in the load branch layer, transfer the corresponding calculation result to the connected feeder subgraph, finish the 1 st super step after all communication is finished, and start the 2 nd super step;
the 2 nd super step is that parallelization forward calculation is carried out on the feeder subgraphs in the N-level feeder layers, then the corresponding updated power data is transmitted to the connected N-1-level feeder subgraphs, the 3 rd super step is ended after all communication ends, the 3 rd super step is started, and the like, and the super steps of parallelization calculation processes of the N-2-level feeder subgraphs, the N-3-level feeder subgraphs and the like are carried out until the N-th super step corresponding to the two-level feeder layers is completed;
the (n+1) th super step is that the only feeder line subgraph in the first-level feeder line layer carries out forward calculation, then the voltage of each node is updated through back generation calculation and is transmitted to the connected second-level feeder line subgraph, so that the parallelization calculation of the back generation process is started;
and finally, calculating the theoretical line loss layering parallel graph of the power distribution network based on the graph database to obtain theoretical line loss values of each load branch, each feeder layer and the whole power distribution network system.
In some embodiments, the graph database is a Neo4j graph database.
In some embodiments, the node data table includes at least a device type, a device ID, a device name, a voltage class, an active load, and a reactive load;
the relation data table at least comprises a head node ID, a tail node ID and a relation type;
when the two connecting nodes are connected by a line with a switch, the relation data table at least comprises a switch equipment ID, a switch type, a line equipment ID, a line model and a line length;
when two connected nodes are connected to a bit transformer, the relational data table includes at least the transformer device ID, the transformer type and the equivalent impedance parameters.
The second aspect of the application discloses a graph-calculation-based power distribution network theoretical line loss hierarchical parallel computing system, which comprises the following components;
a power distribution network topological graph module: connecting nodes in the CIM model data of the power distribution network are taken as an analysis basis, and a power distribution network topological graph model oriented to line loss analysis is constructed based on a graph database;
layering module: dividing a feeder layer and a load branch layer of a power distribution network based on the positions of different types of switching elements of the power distribution network, and establishing an equivalent loss model; carrying out layered calculation based on the equivalent loss model and a forward push back power flow algorithm;
and a result output module: based on hierarchical computation and a hierarchical parallel computation framework in a BSP model, forward-push back substitution parallel computation is carried out on feeder layers and load branch layers of all levels, and a theoretical line loss analysis result is obtained.
The third aspect of the present application discloses a terminal device, which comprises a memory, a processor and a computer program stored in the memory and capable of running on the processor, wherein the memory stores the computer program capable of running on the processor, and when the processor loads and executes the computer program, the method for calculating the theoretical line loss layering parallel of the power distribution network based on graph according to any one of the first aspect is adopted.
In a third aspect, the present application discloses a computer readable storage medium, where a computer program is stored, where the computer program, when loaded and executed by a processor, adopts a graph-based hierarchical parallel calculation method for theoretical line loss of a power distribution network according to any one of the first aspects.
The application has the beneficial effects that:
according to the application, a line loss graph model of the power distribution network is constructed through the Neo4j graph database, so that the problem that the traditional relational database storage mode is based on the need of converting the topology structure of the power distribution network into a matrix and numbering according to the rule of a forward-push substitution algorithm is solved; meanwhile, the multi-level characteristics in the power distribution network graph model are fully considered, the power distribution network graph model is divided into a load branch layer and a feeder line layer, a corresponding equivalent loss model is established, and layered calculation of a forward-push back-generation power flow algorithm is realized based on each model; and finally, the efficiency improvement brought by the parallel computing capability of the graph is fully utilized, the theoretical line loss analysis of the parallel computing of each level of the power distribution network is realized based on the BSP model, and the efficiency of the theoretical line loss computing of the large-scale power distribution network is improved.
Drawings
The application is further described below with reference to the accompanying drawings.
FIG. 1 is a schematic diagram of a forward push back power flow analysis topology;
FIG. 2 is a schematic diagram of a load branching layer equivalent loss model;
FIG. 3 is a schematic diagram of a feeder layer equivalent loss model;
FIG. 4 is a flow chart of a hierarchical push-back power flow algorithm;
FIG. 5 is a schematic diagram of a BSP model framework;
FIG. 6 is a schematic diagram of a hierarchical parallel BSP model calculation based on subgraphs;
FIG. 7 is a topology diagram of an IEEE 33 node distribution network with increased load branching architecture;
FIG. 8 is an IEEE 33 node distribution network line loss analysis graph model taking into account load branching structure;
fig. 9 is a schematic diagram of active and reactive loss conditions of each branch sub-graph in the load branch layer of the test system.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
In the description of the present specification, the descriptions of the terms "one embodiment," "example," "specific example," and the like, mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Fig. 1 is a typical power distribution network flow analysis topology comprising 18 connection nodes (electrical nodes), 3 lines with circuit breaker devices, 4 lines without switches, 5 lines with fuse devices and 5 distribution transformer devices. The application relates to a graph-calculation-based power distribution network theoretical line loss layering parallel calculation method by using a typical power distribution network power flow analysis topological structure, which comprises the following steps:
based on analysis of connection nodes in CIM model data of a power distribution network, constructing a power distribution network topological graph model oriented to line loss analysis based on a Neo4j graph database, and specifically comprising the following steps:
(1) According to the requirement of topology analysis granularity in the power flow calculation process of the power distribution network, analyzing the CIM model data of the power distribution network by taking the connection nodes as analysis objects, and storing information corresponding to the connection nodes into an equivalent node data table, wherein the information comprises relevant parameters such as equipment type, equipment ID, equipment name, voltage level, active load, reactive load and the like.
(2) The relation data table is stored for the electric equipment such as the circuit, the switch or the transformer connected between the two connection nodes. The relationship data table includes a head node ID, a tail node ID, a relationship type, and various attributes. When the two connection nodes are connected by a line with a switch, the attribute comprises a switch equipment ID, a switch type, a line equipment ID, a line model, a line length and the like; when two connected nodes are connected to a bit transformer, then the properties include transformer device ID, transformer type, equivalent impedance parameters, etc.
(3) According to the characteristics that the Neo4j graph database contains two basic data structures of nodes and relations (relations), and the nodes and the relations can contain a plurality of attributes in the form of keys/values, a Node data table and a connection relation table corresponding to the connection nodes are respectively defined as the nodes and the relations in the graph database, and are imported into the Neo4j through a data importing tool Toneo4j to generate a corresponding distribution network graph model G (V, E) facing line loss analysis.
Dividing a feeder line layer and a load branch layer of a power distribution network according to the positions of different types of switching elements of the power distribution network, establishing a corresponding equivalent loss model, and realizing a layered forward push back power flow algorithm, wherein the method specifically comprises the following steps:
(1) Multi-level partitioning of power distribution networks
The typical topology structure division method for power flow analysis of the power distribution network in fig. 1 is as follows: the distribution network is divided into a feeder layer and a load branching layer by a line containing a breaker device and a line containing a fuse device. The feeder layers can be further divided into a first-level feeder layer, a second-level feeder layer and a third-level feeder layer according to the circuit breaker, wherein a branch with a fuse at the head end is defined as a load branch and is connected with an electrical node in the corresponding feeder layer, and all the load branches are positioned in the load branch layer.
In the forward push back power flow calculation, the connection of the load branch and the corresponding feeder layers and the parameter transfer between the feeder layers is active power P, reactive power Q and node voltage U. Since the main loss element in the feeder layer is a line and the loss element in the load branch includes a line and a transformer, it is necessary to further build an equivalent loss model of the load branch layer and an equivalent loss model of the feeder layer.
(2) Load branch equivalent loss model establishment
The analysis is performed by taking the load branch 5 (CN 8-CN17-CN 18) in FIG. 1 as an example, and the corresponding equivalent loss model is shown in FIG. 2. Wherein a line L12 is connected between CN8 and CN17, and the impedance parameter of the line is assumed to be Z L12 ＝R L12 +jX L12 The method comprises the steps of carrying out a first treatment on the surface of the A distribution transformer T5 is connected between CN17 and CN18, and the transformation ratio parameter is k and the equivalent impedance parameter is Z T5 ＝R T5 +jX T5 The method comprises the steps of carrying out a first treatment on the surface of the And node 18 is a node with load attribute, assuming that the active data is P 18 Reactive data is Q 18 . Considering that the length of a single-section line in a distribution network is usually not more than 100km and the voltage level is lower than 35kV, the equivalent admittance of the line can be ignored, and only the series impedance branch is considered. Meanwhile, only the variable loss caused by the equivalent impedance of the transformer is considered in the forward-push back generation calculation process, the loss of the ground branch is fixed loss, and the fixed loss value is assumed to be S T5 。
Assuming that the initial voltage of all nodes in the load branch is the rated voltage U of the line N The specific push-forward substitution process is as follows:
1) Forward pushing process
S 17 ＝S 18 +ΔS 17 +S T5 ＝P 17 +jQ 17 (2)
S 8 ＝S 17 +ΔS 8 ＝P 8 +jQ 8 (4)
For three stagesFor CN8 in feeder line layer, power data P obtained in CN8 forward pushing process in load branch layer 8 And Q 8 The active load and the reactive load of the node can be equivalently used, so that the active load and the reactive load are substituted into the forward calculation of the three-level feeder layer.
2) Process of regeneration
Assuming that the updated voltage value after the load branch head-end node CN8 is pushed back by the three-stage feeder line layer is Unew 8, the voltage value of each subsequent node is updated back.
And according to the updated voltage of each node, recalculating the loss of each line and the transformer and the power of the starting end node according to the forward pushing step. Notably, the power data updated by the connection node CN8 in the load branch 5 after each push-forward procedure needs to be synchronously updated to the CN8 in the three-stage feeder layer connected to the load branch; likewise, the voltage data updated by the connection node CN8 in the three-stage feeder layer after the back-substitution process needs to be synchronously updated to CN8 in the load branch 5.
(3) Establishment of equivalent loss model of feeder line layer
Analysis was performed by taking the three-level feeder layer (CN 6-CN7-CN 8) of FIG. 1 as an exampleThe corresponding equivalent loss model is shown in fig. 3. Wherein a line L6 is connected between CN6 and CN7, and the impedance parameter of the line is assumed to be Z L6 ＝R L6 +jX L6 The method comprises the steps of carrying out a first treatment on the surface of the A line L7 is connected between CN7 and CN8, and the equivalent impedance parameter is Z L7 ＝R L7 +jX L7 The method comprises the steps of carrying out a first treatment on the surface of the And node 8 is the head-end node of load branch 5 (CN 8-CN17-CN 18), and is therefore equivalent to the loaded attribute P in the feeder layer 8 +jQ 8 The power value is the result of the forward calculation of the load branch 5; node 7 is the head-end node of load branch 4 (CN 7-CN15-CN 16), and is equivalent to load attribute P in the feeder layer 7 +jQ 7 The power value is the result of the load branch 4 push-forward calculation.
Similarly, in the initial forward pushing process, it is assumed that the initial voltages of all the nodes in the feeder layer are the rated voltage U of the line N The specific push-forward substitution process is as follows:
1) Forward pushing process
For CN6 in the secondary feeder layer, power data P of CN6 obtained by forward pushing process in the tertiary feeder layer 6 And Q 6 The method can be equivalent to the active load and the reactive load of the node, and can be substituted into the forward calculation of the secondary feeder layer.
(2) Process of regeneration
Assuming that the updated voltage value of the head end node CN6 of the three-stage feeder line layer after the back generation of the two-stage feeder line layer is Unew 6, the voltage value of each subsequent node is updated in the back generation.
The updated voltage value in the CN8 regeneration process in the three-stage feeder layer is transmitted to CN8 in the load branch 5, so that the regeneration calculation of the load branch 5 is completed; the same applies to the head-end node CN7 in the load branch 4.
(4) Layered forward push back power flow algorithm
The power of the head end node obtained after load branch forward pushing calculation corresponds to the load power data of the corresponding node in the feeder line layer, and the node voltage obtained after feeder line layer back substitution calculation corresponds to the voltage value of the head end node of the connected load branch, and the relation between the lower feeder line layer and the upper feeder line layer is the same. As shown in FIG. 4, for the corresponding hierarchical forward push back power flow algorithm flow chart, assume that the convergence criterion condition is |DeltaU max |<Epsilon, the specific steps are as follows:
step 1: performing forward calculation according to a load branch equivalent loss model aiming at each load branch in the power distribution network to obtain power values of head end connection nodes of each load branch, and transmitting the respective power values to corresponding nodes in a feeder line layer connected with the load branch;
step 2: starting analysis from an N-th level feeder layer, performing forward calculation according to a feeder layer equivalent loss model to obtain a power value of a head end connection node of the feeder layer, transmitting the power value to a corresponding node in an N-1 level feeder layer connected with the feeder layer, and the like until the power value is transmitted to a first level feeder layer to finish the forward calculation;
step 3: starting from a first-stage feeder line layer, performing back-substitution calculation according to a feeder line layer equivalent loss model, then transmitting the voltage update value of each node to a lower-stage feeder line layer or a connected load branch, and the like until the back-substitution calculation is transmitted to an N-stage feeder line layer and the load branch connected with the N-stage feeder line layer;
step 4: and (3) performing back-substitution calculation on all load branches for updating the voltage value of the head end node according to the load branch equivalent loss model, judging convergence conditions according to calculation results, stopping calculation if the convergence conditions are met, and otherwise, returning to the step (1) to perform iterative calculation again.
And after the iteration is finished, the theoretical line loss value of each load branch and each feeder line layer can be obtained. Wherein the load branch loss DeltaS F Generally including line loss deltas L Transformer loss deltas T Assuming that the load branch includes n lines, the loss calculation formula of the load branch is:
feeder layer loss deltas K The loss of the feeder line layer is mainly line loss, and assuming that the feeder line layer contains m lines, the loss calculation formula of the feeder line layer is as follows:
wherein i represents the i-th wire in the load branch or the feeder layer, deltaS Li Representing the theoretical loss value of the wire i.
Based on a power distribution network graph model and a layered forward push back substitution power flow algorithm, based on a layered parallel computing framework in a BSP model, forward push back substitution parallel computing of feeder layers and load branch layers of each level is realized, and a theoretical line loss analysis result is obtained, and the method specifically comprises the following steps:
(1) Integral synchronous parallel computing model frame construction
Currently, the core technology for implementing parallel computation in a graph database is an overall synchronous parallel computation model, and a BSP model performs successive iterations through a series of global supersteps (supersteps). One superstep mainly comprises three steps: 1) Local calculation: each participating processor is assigned its own computing task and independent of each other; 2) The communication process comprises the following steps: information transfer is carried out among the processors; 3) Fence synchronization: when one processor encounters a "barrier" (or fence), it waits until all other processors complete their calculation steps. Each synchronization represents the completion of one stride and the beginning of the next stride.
As shown in fig. 5, a schematic diagram of a BSP model framework is shown. As seen from the figure, the user-defined local function computation is performed in parallel between the 5 processors; then, the respective calculation results are sent to the corresponding processors, and can be sent to the activated processors in the current superstep or to other processors; the existence of the fence synchronization enables the super step to be ended only after the information transfer of 5 processors is completed, and the adoption of the fence synchronization provides an effective way for executing the synchronous parallel algorithm. In general, graph computation can be divided into two classes, node parallel and hierarchical parallel: 1) Node parallelism: all nodes are activated in one super step; 2) Hierarchical parallelism: only some nodes in the same hierarchy are activated in one super step.
For a single computing cycle, the operation of graph computation is to activate all nodes in the corresponding subgraph and compute in memory at the same time, but because the hardware resources of the computer system are limited, it is necessary to define the parameter η to characterize the efficiency of graph computation under certain conditions of computing hardware resources according to the corresponding relationship between the BSP model and the graph structure.
Wherein N is LCB Representing local computation modules in BSP model(Loacl Computation Blocks) number, N threads Representing the number of computing threads of the computer.
Since the computation time cost of a single computation cycle is mainly determined by the local computation module LCB that computes the slowest in the cycle, it is necessary to equalize the relationship between the number of nodes and computation threads in each computation module. Under the condition of a certain system scale, the number of the graph calculation units is equal to the number of the calculation threads, and the subgraphs with the same level are uniformly distributed in the corresponding graph calculation units, so that better calculation efficiency is realized.
(2) Hierarchical forward push back generation tide algorithm parallelization
And b, according to the division of the load branch layer and the feeder line layer in the step b, the query of the load branch sub-graph and the feeder line sub-graph can be realized by combining the path query statement of Neo4j, and the parallelization of the hierarchical forward push back substitution tide algorithm is realized by taking each sub-graph as a unit.
As shown in fig. 6, taking a hierarchical parallel push-forward process between feeder lines and load branches of each level as an example, the radial distribution network is divided into 2 feeder line layers in total, wherein the main feeder line layer has only 1 feeder line sub-graph, the secondary feeder line layer has 4 feeder line sub-graphs, and the load branch layer has 7 load branch sub-graphs, and the parallelized push-forward calculation mainly comprises 3 super-steps:
1) The 1 st super step is that 7 load branch subgraphs in the load branch layer finish parallelization forward calculation, and the corresponding calculation result is transmitted to the connected two-level feeder subgraphs, after all communication ends, the 1 st super step is ended, and the 2 nd super step is started;
2) The 2 nd super step is that 4 feeder subgraphs in the two-level feeder layer are subjected to parallelization forward pushing calculation, then the corresponding updated power data is transmitted to the connected one-level feeder subgraphs, after all communication ends, the 3 rd super step is ended, and the 3 rd super step is started;
3) The 3 rd super step is that the only feeder subgraph in the first-level feeder layer carries out forward calculation, then the voltage of each node is updated through back generation calculation and is transmitted to the connected second-level feeder subgraph, so that the parallelization calculation of the back generation process is started.
And finally, calculating the theoretical line loss layering parallel graph of the power distribution network based on the graph database to obtain theoretical line loss values of each load branch, each feeder layer and the whole power distribution network.
Example 1: the application is verified by the IEEE 33 node system example considering the load branch structure shown in fig. 7, 32 load branches are added on the basis of the original 33 nodes in the power distribution network, and the scale is changed into 97 nodes. The node 0 is a balance node in the system, the corresponding head-end voltage is 10.5kV, and the reference power is 1MVA. The total load of the selected distribution network model was 3715kw+2300kvar without taking into account the uncertainty. Meanwhile, the transformer model in the system is S13-M-400/10, the capacity is 0.4MVA, the primary side voltage is set to be 10kV, the secondary side voltage is set to be 0.4kV, the equivalent impedance is 1.325+j10Ω, and the no-load loss is 0.95kW.
The power distribution network theoretical line loss layering parallel computing method based on graph computation, which is implemented according to the application, comprises the following steps:
step a: as shown in FIG. 8, the power distribution network line loss analysis graph model of the test system based on the Neo4j graph database is shown. The graph model consists of 97 nodes and 96 relations, active and reactive data of each load are stored in the attributes of the nodes, and impedance parameters of each line and each transformer are stored in the attributes of the relations.
Step b: and dividing a feeder line layer and a load branch layer of the power distribution network according to the positions of different types of switching elements of the power distribution network. The system is divided into a first-level feeder layer and a second-level feeder layer, wherein 3 sub-graphs are respectively arranged in the second-level feeder layer, namely sub-graph 2, sub-graph 3 and sub-graph 4; meanwhile, the load branch layer in the system comprises 32 load branch subgraphs which are correspondingly connected in the feeder line.
Step c: based on a power distribution network graph model and a layered forward push back power flow algorithm, forward push back parallel calculation of each level feeder line layer and load branch layer is realized based on a layered parallel calculation frame in a BSP model, and theoretical line loss analysis results are obtained, and as shown in table 1, the loss and the duty ratio of a primary feeder line subgraph are highest by comparison, so that a targeted loss reduction area and measures can be improved for staff, such as replacing a wire segment in the primary feeder line layer, and a wire with better performance and smaller impedance value is adopted. The active loss and reactive loss fluctuations of the 32 load branches included in the load branch layer are shown in fig. 9, wherein the branches with larger active and reactive loss values are numbered as load branch 23, load branch 24 and load branch 29, so that the wires and transformers in the load branches can be purposefully modified based on the analysis result, and the purpose of reducing loss is achieved.
TABLE 1
In order to further verify the advantages brought by the theoretical line loss hierarchical parallel computing method of the distribution network based on graph computation in terms of computing performance, the time efficiency of data storage based on the MySQL relational database and the Neo4j graph database is compared, meanwhile, the time efficiency of serial and parallel power flow computation based on the Neo4j graph database is evaluated, and the specific computing time results are shown in table 2. As can be seen from comparison results, the hierarchical parallelization calculation method provided by the application is effective in large-scale theoretical line loss analysis of the power distribution network.
TABLE 2
The embodiment of the application also discloses a power distribution network theoretical line loss layering parallel computing system based on graph computation, which comprises the following steps of;
a power distribution network topological graph module: connecting nodes in the CIM model data of the power distribution network are taken as an analysis basis, and a power distribution network topological graph model oriented to line loss analysis is constructed based on a graph database;
layering module: dividing a feeder layer and a load branch layer of a power distribution network based on the positions of different types of switching elements of the power distribution network, and establishing an equivalent loss model; carrying out layered calculation based on the equivalent loss model and a forward push back power flow algorithm;
and a result output module: based on hierarchical computation and a hierarchical parallel computation framework in a BSP model, forward-push back substitution parallel computation is carried out on feeder layers and load branch layers of all levels, and a theoretical line loss analysis result is obtained.
The embodiment of the application also discloses a terminal device which comprises a memory, a processor and a computer program stored in the memory and capable of running on the processor, wherein when the processor executes the computer program, any graph-calculation-based power distribution network theoretical line loss layering parallel calculation method is adopted.
The terminal device may be a computer device such as a desktop computer, a notebook computer, or a cloud server, and the terminal device includes, but is not limited to, a processor and a memory, for example, the terminal device may further include an input/output device, a network access device, a bus, and the like.
The processor may be a Central Processing Unit (CPU), or of course, according to actual use, other general purpose processors, digital Signal Processors (DSP), application Specific Integrated Circuits (ASIC), ready-made programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc., and the general purpose processor may be a microprocessor or any conventional processor, etc., which is not limited in this respect.
The memory may be an internal storage unit of the terminal device, for example, a hard disk or a memory of the terminal device, or an external storage device of the terminal device, for example, a plug-in hard disk, a Smart Memory Card (SMC), a secure digital card (SD), or a flash memory card (FC) provided on the terminal device, or the like, and may be a combination of the internal storage unit of the terminal device and the external storage device, where the memory is used to store a computer program and other programs and data required by the terminal device, and the memory may be used to temporarily store data that has been output or is to be output, which is not limited by the present application.
Any of the power distribution network theoretical line loss hierarchical parallel computing methods based on graph computation in the embodiments are stored in a memory of the terminal device through the terminal device, and are loaded and executed on a processor of the terminal device, so that the power distribution network theoretical line loss hierarchical parallel computing method is convenient to use.
The embodiment of the application also discloses a computer readable storage medium, and the computer readable storage medium stores a computer program, wherein when the computer program is executed by a processor, any graph-based power distribution network theoretical line loss layering parallel computing method in the embodiment is adopted.
The computer program may be stored in a computer readable medium, where the computer program includes computer program code, where the computer program code may be in a source code form, an object code form, an executable file form, or some middleware form, etc., and the computer readable medium includes any entity or device capable of carrying the computer program code, a recording medium, a usb disk, a removable hard disk, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a Random Access Memory (RAM), an electrical carrier signal, a telecommunication signal, a software distribution medium, etc., where the computer readable medium includes, but is not limited to, the above components.
The method for calculating the theoretical line loss of the power distribution network based on graph calculation in any one of the embodiments is stored in the computer readable storage medium through the computer readable storage medium, and is loaded and executed on a processor, so that the storage and the application of the method are convenient.
The foregoing has shown and described the basic principles, principal features and advantages of the application. It will be understood by those skilled in the art that the present application is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present application, and various changes and modifications may be made without departing from the spirit and scope of the application, which is defined in the appended claims.
Claims (10)
1. The power distribution network theoretical line loss layering parallel computing method based on graph computation is characterized by comprising the following steps of:
connecting nodes in the CIM model data of the power distribution network are taken as an analysis basis, and a power distribution network topological graph model oriented to line loss analysis is constructed based on a graph database;
dividing a feeder layer and a load branch layer of a power distribution network based on the positions of different types of switching elements of the power distribution network, and establishing an equivalent loss model; carrying out layered calculation based on the equivalent loss model and a forward push back power flow algorithm;
based on hierarchical computation and a hierarchical parallel computation framework in a BSP model, forward-push back substitution parallel computation is carried out on feeder layers and load branch layers of all levels, and a theoretical line loss analysis result is obtained.
2. The graph-calculation-based power distribution network theoretical line loss hierarchical parallel calculation method according to claim 1, wherein the construction of a power distribution network topological graph model comprises the following steps:
according to the requirement of topology analysis granularity in the power flow calculation process of the power distribution network, analyzing CIM model data of the power distribution network by taking the connection nodes as analysis objects, and storing information corresponding to the connection nodes into an equivalent node data table;
storing the electric equipment such as a circuit, a switch or a transformer connected between two connecting nodes into a relational data table between the nodes;
and respectively defining a node data table and a relation data table corresponding to the connection nodes as nodes and relations in a graph database, and generating a corresponding power distribution network graph model G (V, E) facing line loss analysis based on the graph database.
3. The graph-calculation-based power distribution network theoretical line loss layering parallel calculation method according to claim 1, wherein the equivalent loss model comprises a load branch equivalent loss model and a feeder line layer equivalent loss model, and the specific construction comprises the following steps:
dividing the power distribution network into a feeder layer and a load branch layer through a circuit containing breaker equipment and a circuit containing fuse equipment; the feeder line layer is further divided into a first-level feeder line layer, a second-level feeder line layer and a third-level feeder line layer to an N-level feeder line layer according to the front and back positions of the circuit breakers, wherein the N-1-level feeder line layer is connected with the N-2-level feeder line layer through the circuit breakers, the N-level feeder line layer is connected with the N-1-level feeder line layer through the circuit breakers, and N is a positive integer larger than 2; defining a branch with a head end being a fuse as a load branch, and connecting the load branch with a connecting node in a corresponding feeder layer, wherein all the load branches are positioned in a load branch layer;
building a load branch equivalent loss model: the load branch structure consists of n lines and 1 transformer, and consists of nodes 1 to (n+2), and the power data carried by the load branch is satisfied as S=P+jQ; the equivalent admittance of a single-section line in the power distribution network can be ignored under the conditions that the length of the single-section line in the power distribution network is not more than 100km and the voltage level is lower than 35kV, and only the serial impedance branch Z is needed to be considered Ln The method comprises the steps of carrying out a first treatment on the surface of the Only the equivalent impedance Z of the transformer is considered in the forward-backward generation calculation process T The variable loss is brought about, and the loss of the ground branch is fixed loss delta S T ；
Establishing a feeder line layer equivalent loss model: the feeder layer is mainly composed of m lines, the equivalent admittance of the lines is ignored, and only the series impedance branch is considered, so that the corresponding equivalent loss model of the N-level feeder layer is assumed to be shown in figure 3; the equivalent loss model is composed of nodes 1 to (m+1), and the power data corresponding to the load branch connected with node m in the feeder layer is assumed to be S m ＝P m +jQ m 。
4. The graph-calculation-based power distribution network theoretical line loss hierarchical parallel calculation method according to claim 1, wherein the hierarchical calculation is performed based on an equivalent loss model and a forward push back power flow algorithm, and the method comprises the following steps:
step 1: performing forward calculation according to the load branch equivalent loss model aiming at each load branch in the power distribution network to obtain power values of head end connection nodes of each load branch, and transmitting the power values of the head end connection nodes of the load branch to corresponding nodes in a feeder line layer connected with the load branch;
step 2: starting analysis from the N-th level feeder layer, performing forward calculation according to the equivalent loss model of the feeder layer to obtain a power value of a first end connection node of the feeder layer, transmitting the power value of the first end connection node of the N-th level feeder layer to a corresponding node in the N-1 level feeder layer connected with the N-th level feeder layer, and repeating the process until the power value is transmitted to the first level feeder layer to finish the forward calculation;
step 3: starting from a first-stage feeder line layer, performing back-substitution calculation according to a feeder line layer equivalent loss model, then transmitting the voltage update value of each node to a lower-stage feeder line layer or a connected load branch, and repeating the process until the back-substitution calculation is transmitted to an N-stage feeder line layer and the load branch connected with the N-stage feeder line layer;
step 4: all load branches for updating the voltage value of the head end node perform back-substitution calculation according to the load branch equivalent loss model, and judge convergence condition |delta U according to the calculation result max |<Epsilon, stopping calculation if the result is satisfied, otherwise returning to the step 1 to perform iterative calculation again;
after iteration is finished, theoretical line loss values of all load branches and all feeder layers can be obtained;
the loss calculation formula of the load branch layer is as follows:
in DeltaS F Representing load branch loss; ΔS L Representing line loss; ΔS T Representing transformer losses; n represents n lines in the load branch;
the loss calculation formula of the feeder layer is as follows:
in DeltaS K Representing feeder layer losses; m represents that the feeder layer comprises m lines; i represents the load branch or the ith line segment in the feeder layer, ΔS Li Representing the theoretical loss value of line i.
5. The hierarchical parallel computing method for theoretical line loss of a power distribution network based on graph computation according to claim 1, wherein the hierarchical parallel computing framework based on hierarchical computation and BSP model comprises n+1 supersteps, and specifically comprises the following steps:
the 1 st super step is to complete parallelization forward calculation of the load branch subgraph in the load branch layer, transfer the corresponding calculation result to the connected feeder subgraph, finish the 1 st super step after all communication is finished, and start the 2 nd super step;
the 2 nd super step is that parallelization forward calculation is carried out on the feeder subgraphs in the N-level feeder layers, then the corresponding updated power data is transmitted to the connected N-1-level feeder subgraphs, the 3 rd super step is ended after all communication ends, the 3 rd super step is started, and the like, and the super steps of parallelization calculation processes of the N-2-level feeder subgraphs, the N-3-level feeder subgraphs and the like are carried out until the N-th super step corresponding to the two-level feeder layers is completed;
the (n+1) th super step is that the only feeder line subgraph in the first-level feeder line layer carries out forward calculation, then the voltage of each node is updated through back generation calculation and is transmitted to the connected second-level feeder line subgraph, so that the parallelization calculation of the back generation process is started;
and finally, calculating the theoretical line loss layering parallel graph of the power distribution network based on the graph database to obtain theoretical line loss values of each load branch, each feeder layer and the whole power distribution network system.
6. The graph-calculation-based power distribution network theoretical line loss hierarchical parallel calculation method according to claim 1, wherein the graph database is a Neo4j graph database.
7. The graph-calculation-based power distribution network theoretical line loss hierarchical parallel calculation method according to claim 2, wherein the node data table at least comprises equipment type, equipment ID, equipment name, voltage class, active load and reactive load;
the relation data table at least comprises a head node ID, a tail node ID and a relation type;
when the two connecting nodes are connected by a line with a switch, the relation data table at least comprises a switch equipment ID, a switch type, a line equipment ID, a line model and a line length;
when two connected nodes are connected to a bit transformer, the relational data table includes at least the transformer device ID, the transformer type and the equivalent impedance parameters.
8. A graph computation-based power distribution network theoretical line loss hierarchical parallel computing system employing any of claims 1 to 6, comprising;
a power distribution network topological graph module: connecting nodes in the CIM model data of the power distribution network are taken as an analysis basis, and a power distribution network topological graph model oriented to line loss analysis is constructed based on a graph database;
layering module: dividing a feeder layer and a load branch layer of a power distribution network based on the positions of different types of switching elements of the power distribution network, and establishing an equivalent loss model; carrying out layered calculation based on the equivalent loss model and a forward push back power flow algorithm;
and a result output module: based on hierarchical computation and a hierarchical parallel computation framework in a BSP model, forward-push back substitution parallel computation is carried out on feeder layers and load branch layers of all levels, and a theoretical line loss analysis result is obtained.
9. A terminal device comprising a memory, a processor and a computer program stored in the memory and capable of running on the processor, characterized in that the memory stores the computer program capable of running on the processor, and when the processor loads and executes the computer program, a graph-calculation-based power distribution network theoretical line loss hierarchical parallel calculation method is adopted.
10. A computer readable storage medium, in which a computer program is stored, wherein the computer program is loaded and executed by a processor, and a graph-based power distribution network theoretical line loss hierarchical parallel computing method is adopted according to any one of claims 1 to 6.
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