CN108988346B - Network reconstruction preprocessing method and system for reducing invalid solutions in power grid - Google Patents

Network reconstruction preprocessing method and system for reducing invalid solutions in power grid Download PDF

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CN108988346B
CN108988346B CN201811096598.3A CN201811096598A CN108988346B CN 108988346 B CN108988346 B CN 108988346B CN 201811096598 A CN201811096598 A CN 201811096598A CN 108988346 B CN108988346 B CN 108988346B
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CN108988346A (en
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周步祥
邹家惠
陈鑫
陈实
袁岳
张致强
罗燕萍
刘思聪
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Abstract

The invention discloses a network reconstruction preprocessing method and a preprocessing system for reducing invalid solutions in a power grid, which finish the preprocessing of network reconstruction by simplifying an original power grid, defining a loop matrix and then partitioning and recombining the loop matrix, avoid searching in an infeasible solution, reduce the search space, reduce the generation of invalid solutions, improve the search speed and save the time cost.

Description

Network reconstruction preprocessing method and system for reducing invalid solutions in power grid
Technical Field
The invention relates to the power grid technology, in particular to a network reconstruction preprocessing method and a preprocessing system for reducing invalid solutions in a power grid.
Background
The power grid reconstruction is a means for achieving the purpose of economic operation by changing the state of a switch in a power grid, the methods are various, and the key is to improve the reconstruction speed. The reconstruction speed is improved by improving the search speed in the aspect of algorithm, for example, intelligent algorithms such as particle swarm algorithm and ant colony algorithm are adopted, but the search space is not reduced fundamentally, the space to be searched is still huge, and the speed improvement is not obvious; there are methods for research in terms of simplifying the topology structure, such as a method based on a basic matrix ring, which simplifies the particle coding mode by defining the matrix ring, shortens the coding length, improves the search efficiency, but still avoids the generation of inferior solutions, and still needs to consume too much time to eliminate infeasible solutions when island detection is required. Therefore, in the prior art, when the power grid is reconstructed, the number of the spaces to be searched is large, the searching speed is low, and the power grid reconstruction speed is influenced.
Disclosure of Invention
The invention mainly aims to provide a network reconstruction preprocessing method and a preprocessing system for reducing invalid solutions in a power grid, which reduce a search space and improve the search speed by simplifying a network structure.
The invention is realized by the following technical scheme:
a network reconstruction preprocessing method for reducing invalid solutions in a power grid comprises the following steps:
step 1: simplifying the network according to the radial requirement of the power grid network so as to reduce the number of solution spaces and reduce the occurrence of partial infeasible solutions;
step 2: define loop matrix H ═ (H)ij) a x b, where a represents the total number of loops in the grid, b represents the maximum total number of switches in each loop, and element hijA number indicating the jth switch counted from any direction in the ith loop;
and step 3: dividing non-zero elements of each row in the loop matrix into a parts to form a loop block matrix M ═ (M ═ij) a x a, the matrix is a row and a column square matrix, the element mijRepresenting a switch set shared by the ith loop and the jth loop; the loop block matrix divides all switches to be searched into at most a x (a +1)/2 switch sets;
and 4, step 4: and selecting a subsets from the at most a x (a +1)/2 switch sets, respectively selecting a switch from each subset, recombining the switches, and selecting the optimal solution from each combination obtained by recombining through a search algorithm.
Further, the step 1 comprises:
step 1-1: closing all tie switches and section switches in the network;
step 1-2: switches not in any of the loops are omitted from the topology;
step 1-3: switches directly connected to the power supply points are omitted from the topology.
Further, in step 2, the total number of switches included in each loop is inconsistent, and if the total number of switches in a certain loop is less than b, 0 is supplemented behind the last element of the row until the number of elements in each row is b.
Further, in step 3, if the element mijWithout a common switch, the element is zero, and finally the original zero element is removed.
Further, in the step 4, the recombination is performed based on the following premise:
in the loop block matrix, at least one switch set is selected in each row and each column;
the number of selected subsets is equal to the total number of loops and the number of tie switches;
at least one element on the diagonal of the loop blocking matrix in the selected switch set is selected.
Further, the step 4 comprises:
firstly, selecting independent switches to form subsets, and obtaining an initial set [ m ] of a subsets11,m22,m33,...,maa]；
Assume a first set m of independent switches in the loop11Must be selected and then the remaining elements are filled in the other a-1 elements of the initial set, resulting in a first solution set m11,{m12,m22，m32，...,ma2}，{m13,m23,m33,...,ma3},...，{m1a，m2a，m3a，...,maa}]；
Deleting the repeated elements in the solution set to obtain a solution space [ m11,{m12,m22,m32,...,ma2},{m13,m33,...,ma3}，...,{m1a,maa}]Thereby obtaining a set m11The solution space that must be selected to form;
obtaining the remaining a-1 solution spaces in turn according to the method:
[{m11,m21,m31,...,ma1},m22,{m23,m33,...，ma3},...，{m2a，maa}]
[{m11，m21,m31,...,ma1},{m22,m32,...,ma2},m33,...,{m3a,maa}]
……
[{m11,m21,m31,...,ma1},{m22,m32,...，ma2}，{m33，m43，...，ma3}，...,{ma-1a-1,ma-1a},maa]；
starting from the second solution space, if m has the previously appeared independent switch setiiAnd i is 1,2,3, a, it is removed to obtain the final a solution spaces:
[m11,{m12,m22,m32,...,ma2},{m13,m33,...,ma3},...,{m1a,maa}]
[{m21,m31,...,ma1},m22,{m23,m33,...,ma3},...,{m2a,maa}]
[{m21,m31,...,ma1},{m32,...,ma2},m33,...,{m3a,maa}]
…...
[{m21,m31,...,ma1},{m32,...,ma2},{m43,...,ma3},...,ma-1a,maa]。
a network reconfiguration preprocessing system for reducing invalid solutions in an electrical grid, comprising:
the network simplifying module is used for simplifying the network according to the radial requirement of the power grid network so as to reduce the number of solution spaces and reduce the occurrence of part of infeasible solutions;
a loop matrix constructing module for defining a loop matrix H ═ (H)ij) a x b, where a represents the total number of loops in the grid, b represents the maximum total number of switches in each loop, and element hijA number indicating the jth switch counted from any direction in the ith loop;
a loop matrix blocking module, configured to divide a non-zero element of each row in the loop matrix into a parts, so as to form a loop blocking matrix M ═ (M ═ M)ij) a x a, the matrix is a row and a column square matrix, the element mijRepresenting a switch set shared by the ith loop and the jth loop; the loop block matrix divides all switches to be searched into at most a x (a +1)/2 switch sets;
and the loop block matrix recombination module is used for selecting a subsets from the at most a x (a +1)/2 switch sets, selecting a switch from each subset respectively and recombining, and then selecting the optimal solution from each combination obtained by recombining through a search algorithm.
Further, the network simplification module is specifically configured to:
all tie switches and sectionalizers in the network are closed, and switches that are not in any loop are omitted from the topology, and switches that are directly connected to the power supply points are omitted from the topology.
Further, the total number of the switches contained in each loop is inconsistent, and if the total number of the switches in a certain loop is less than b, the loop matrix construction module supplements 0 after the tail element of the row until the number of the elements in each row is b.
Further, if the element mijIf no common switch exists, the element is zero, and the loop matrix blocking module finally removes the original zero element;
the loop block matrix reorganization module reorganizes the loop block matrix based on the following premise:
in the loop block matrix, at least one switch set is selected in each row and each column;
the number of selected subsets is equal to the total number of loops and the number of tie switches;
at least one element on the diagonal of the loop blocking matrix in the selected switch set is selected.
Compared with the prior art, the network reconstruction preprocessing method and the preprocessing system for reducing invalid solutions in the power grid provided by the invention have the advantages that the original power grid is simplified, the loop matrix is defined, and then the loop matrix is partitioned and recombined to complete the preprocessing of network reconstruction, so that the searching in an infeasible solution is avoided, the searching space is reduced, the generation of invalid solutions is reduced, the searching speed is improved, the time cost is saved, and after the network reconstruction preprocessing, the power grid reconstruction speed can be effectively improved, and the purpose of economic operation of the power grid is realized.
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FIG. 1 is a schematic flow chart of a network reconfiguration preprocessing method for reducing invalid solutions in a power grid according to an embodiment of the present invention;
fig. 2 is a schematic diagram of an IEEE33 node;
FIG. 3 is a simplified IEEE33 node diagram;
fig. 4 is a schematic diagram illustrating a principle of a network reconfiguration preprocessing system for reducing invalid solutions in a power grid according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail with reference to the following embodiments and the accompanying drawings.
As shown in fig. 1, the method for preprocessing network reconfiguration to reduce invalid solutions in a power grid provided by the present invention includes:
step 1: simplifying the network according to the radial requirement of the power grid network so as to reduce the number of solution spaces and reduce the occurrence of part of infeasible solutions;
step 2: define loop matrix H ═ (H)ij) a x b, where a represents the total number of loops in the grid, b represents the maximum total number of switches in each loop, and element hijRepresents the ithThe number of the jth switch in the loop, starting from either direction;
and step 3: dividing non-zero elements of each row in the loop matrix into a parts to form a loop block matrix M ═ M (M)ij) a x a, the matrix is a row and a column square matrix, the element mijRepresenting a switch set shared by the ith loop and the jth loop; the loop block matrix divides all switches to be searched into at most a x (a +1)/2 switch sets;
and 4, step 4: selecting a subsets from a (a +1)/2 switch sets at most, respectively selecting a switch from each subset and recombining, and then selecting the optimal solution from each combination obtained by recombining through a search algorithm.
In the above steps, step 1 includes:
step 1-1: all tie switches and section switches in the network are closed.
Step 1-2: for the switches not in any loop, the switches not in any loop are omitted in the topological diagram because the switches are necessarily closed in the power distribution network because the switches form an island after being opened.
Step 1-3: switches directly connected to the power supply points are omitted from the topology, since such switches do not have to be considered, since they have to be closed.
After the network is simplified, a closed complex looped network with loops in contact with each other is formed.
In step 2, it should be noted that the total number of switches included in each loop is not consistent, and if the total number of switches in a certain loop is less than b, 0 is supplemented after the last element of the row until the number of elements in each row is b.
In step 3, if the element mijWithout a common switch, the element is zero, and finally the original zero element is removed.
In step 4, the recombination is carried out on the following premise:
1) in a loop-blocking matrix, at least one set of switches is selected for each row and column, i.e.
S＝[s1,s2,s3,...,sa]
si∈mij(j＝1,2,...,a)；
2) The number of the selected subsets is equal to the total number of the loops and the number of the interconnection switches;
3) at least one diagonal element of the loop-blocking matrix of the selected switch set, i.e.
Figure BDA0001805694260000051
si∈mjj(i,j＝1,2,...,a)。
According to the 3 rd premise, since one of the independent switch sets must be selected, such a switch can be selected first to obtain the initial set. Based on this, step 4 includes:
firstly, selecting independent switches to form subsets, and obtaining an initial set [ m ] of a subsets11,m22,m33,...,maa]；
Assume a first set m of independent switches in the loop11Must be selected and then the remaining elements are filled in the other a-1 elements of the initial set, resulting in a first solution set m11,{m12,m22,m32,...,ma2},{m13,m23,m33,...,ma3},...,{m1a,m2a,m3a,...,maa}]；
Since the loop block matrix is a symmetric matrix, repeated elements in the solution set are deleted to obtain a solution space [ m [ ]11,{m12,m22,m32,...,ma2},{m13,m33,...,ma3},...,{m1a,maa}]Thereby obtaining a set m11The solution space that must be selected to form;
obtaining the remaining a-1 solution spaces in turn according to the method:
[{m11,m21,m31,...,ma1},m22,{m23,m33,...,ma3},...,{m2a,maa}]
[{m11,m21,m31,...,ma1},{m22,m32,...,ma2},m33,...,{m3a,maa}]
……
[{m11,m21,m31,...,ma1},{m22,m32,...,ma2},{m33,m43,...,ma3},...,{ma-1a-1,ma-1a},maa]；
although there are no repeated parts when selecting solution sets within the above a solution spaces, the same solution cannot be searched between the solution spaces, for example, m can be selected within each solution space11,m22,m33,...,maa]And a space to be solved is formed, so that further simplification is needed. Therefore, starting from the second solution space, if there is a previously present set m of independent switchesiiAnd i is 1,2,3, a, it is removed to obtain the final a solution spaces:
[m11,{m12,m22,m32,...,ma2},{m13,m33,...,ma3},...,{m1a,maa}]
[{m21,m31,...,ma1},m22,{m23,m33,...,ma3},...,{m2a,maa}]
[{m21,m31,...,ma1},{m32,...,ma2},m33,...,{m3a,maa}]
…...
[{m21,m31,...,ma1},{m32,...,ma2},{m43,...，ma3}，...，ma-1a，maa]。
the technical scheme of the invention is described by taking an IEEE33 node as an example as follows:
fig. 2 is a schematic diagram of IEEE33 nodes, which is simplified to obtain a network with five loops, and fig. 3 is a schematic diagram of simplified IEEE33 nodes. The numbers without circles in fig. 2 and 3 represent node numbers, and the numbers in the circles represent loop numbers. And forming a loop matrix after simplification:
Figure BDA0001805694260000071
then, a loop block matrix is obtained:
Figure BDA0001805694260000072
the simplified representation is:
Figure BDA0001805694260000073
five solution spaces were selected by recombination:
1: [ A, { B, E, F, G }, { H, I }, { C, J, K }, { D, L } ], the number of switches of each part is: 4,7,4,1, 10
2: [ { B, C, D }, E, { F, H, I }, { J, K }, { G, L } ], the number of switches of each part: 6,2,7,8,9
3: [ { B, C, D }, { F, G }, H, { J, K }, { I, L } ], the number of switches of each part is: 6,4,3,8,9
4: [ { B, C, D }, { F, G }, I, J, { K, L } ], the number of switches of each part is: 6,4,1,4,12
5: { B, C, D }, { F, G }, I, K, L ], the number of switches of each part is: 6,4,1,4,8
Through calculation, the number of the reconstruction solutions in the five solution spaces is 12320, 6048, 5184, 1152 and 768 respectively, the total number is 25472, and if the solution is carried out according to the original network structure, C is obtained5 37(i.e., 435879). The technical scheme of the invention reduces the total number to 5.84% of the original number, greatly reduces the search space and improves the search efficiency.
As shown in fig. 4, based on the foregoing preprocessing method, an embodiment of the present invention further provides a network reconfiguration preprocessing system for reducing invalid solutions in a power grid, including:
the network simplifying module is used for simplifying the network according to the radial requirement of the power grid network so as to reduce the number of solution spaces and reduce the occurrence of part of infeasible solutions;
a loop matrix constructing module for defining a loop matrix H ═ (H)ij) a x b, where a represents the total number of loops in the grid, b represents the maximum total number of switches in each loop, and element hijA number indicating the jth switch counted from any direction in the ith loop;
a loop matrix blocking module, configured to divide a non-zero element of each row in the loop matrix into a parts, so as to form a loop blocking matrix M ═ (M ═ M)ij) a x a, the matrix is a row and a column square matrix, the element mijRepresenting a switch set shared by the ith loop and the jth loop; the loop block matrix divides all switches to be searched into at most a x (a +1)/2 switch sets;
the loop block matrix recombination module is used for selecting a subsets from at most a x (a +1)/2 switch sets, selecting a switch from each subset respectively and recombining the switch, and then selecting the optimal solution from each combination obtained by recombining through a search algorithm.
Wherein, the network simplifying module is specifically configured to:
all tie switches and sectionalizers in the network are closed, and switches that are not in any loop are omitted from the topology, and switches that are directly connected to the power supply points are omitted from the topology.
And if the total number of the switches in a certain loop is less than b, the loop matrix construction module supplements 0 behind the tail element of the line until the number of the elements in each line is b.
Wherein, if the element mijIf no common switch exists, the element is zero, and the loop matrix partitioning module finally removes the original zero element;
the loop block matrix recombination module carries out recombination based on the following premises:
in the loop block matrix, at least one switch set is selected in each row and each column;
the number of the selected subsets is equal to the total number of the loops and the number of the interconnection switches;
at least one element on the diagonal of the loop blocking matrix in the selected switch set is selected.
The preprocessing system is configured to execute the preprocessing method, and each module corresponds to each step in the preprocessing method one to one, which may specifically refer to the description in the preprocessing method and is not described herein again.
The above-described embodiments are merely preferred embodiments, which are not intended to limit the scope of the present invention, and any modifications, equivalents, improvements, etc. made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (10)

1. A network reconstruction preprocessing method for reducing invalid solutions in a power grid is characterized by comprising the following steps:
step 1: simplifying the network according to the radial requirement of the power grid network so as to reduce the number of solution spaces and reduce the occurrence of partial infeasible solutions;
step 2: define loop matrix H ═ (H)ij) a x b, where a represents the total number of loops in the grid, b represents the maximum total number of switches in each loop, and element hijA number indicating the jth switch counted from any direction in the ith loop;
and step 3: dividing non-zero elements of each row in the loop matrix into a parts to form a loop block matrix M ═ (M ═ij) a x a, the matrix is a row and a column square matrix, the element mijRepresenting a switch set shared by the ith loop and the jth loop; the loop block matrix divides all switches to be searched into at most a x (a +1)/2 switch sets;
and 4, step 4: and selecting a subsets from the at most a x (a +1)/2 switch sets, respectively selecting a switch from each subset, recombining the switches, and selecting the optimal solution from each combination obtained by recombining through a search algorithm.
2. The method for preprocessing network reconfiguration to reduce invalid solutions in an electrical grid according to claim 1, wherein said step 1 comprises:
step 1-1: closing all tie switches and section switches in the network;
step 1-2: switches not in any of the loops are omitted from the topology;
step 1-3: switches directly connected to the power supply points are omitted from the topology.
3. The method as claimed in claim 1, wherein in step 2, the total number of switches included in each loop is inconsistent, and if the total number of switches in a certain loop is less than b, 0 is added after the last element of the row until the number of elements in each row is b.
4. A method for network reconfiguration pre-processing to reduce invalid solutions in an electric network according to claim 3, characterized in that in step 3, if element m is presentijWithout a common switch, the element is zero, and finally the original zero element is removed.
5. The method for preprocessing network reconfiguration to reduce invalid solutions in an electric network according to claim 2, wherein in the step 4, the reorganization is based on the following premise:
in the loop block matrix, at least one switch set is selected in each row and each column;
the number of selected subsets is equal to the total number of loops and the number of tie switches;
at least one element on the diagonal of the loop blocking matrix in the selected switch set is selected.
6. The method for preprocessing network reconfiguration to reduce invalid solutions in an electrical grid according to claim 1, wherein said step 4 comprises:
firstly, selecting independent switches to form subsets, and obtaining an initial set [ m ] of a subsets11,m22,m33,...,maa]；
Assume a first set m of independent switches in the loop11Must be selected in such a way that,then filling the rest elements in the other a-1 elements in the initial set to obtain a first-step solution set [ m11,{m12,m22,m32,...,ma2},{m13,m23,m33,...,ma3},...,{m1a,m2a,m3a,...,maa}]；
Deleting the repeated elements in the solution set to obtain a solution space [ m11,{m12,m22,m32,...,ma2},{m13,m33,...,ma3},...,{m1a,maa}]Thereby obtaining a set m11The solution space that must be selected to form;
obtaining the remaining a-1 solution spaces in turn according to the method:
[{m11,m21,m31,...,ma1},m22,{m23,m33,...,ma3},...,{m2a,maa}]
[{m11,m21,m31,...,ma1},{m22,m32,...,ma2},m33,...,{m3a,maa}]
……
[{m11,m21,m31,...,ma1},{m22,m32,...,ma2},{m33,m43,...,ma3},...,{ma-1a-1,ma-1a},maa]；
starting from the second solution space, if m has the previously appeared independent switch setiiAnd i is 1,2,3, … …, a, it is removed to obtain the final a solution spaces:
[m11,{m12,m22,m32,...,ma2},{m13,m33,...,ma3},...,{m1a,maa}]
[{m21,m31,...,ma1},m22,{m23,m33,...,ma3},...,{m2a,maa}]
[{m21,m31,...,ma1},{m32,...,ma2},m33,...,{m3a,maa}]
......
[{m21,m31,...,ma1},{m32,...,ma2},{m43,...,ma3},...,ma-1a,maa]。
7. a system for network reconfiguration preprocessing for reducing invalid solutions in an electrical grid, comprising:
the network simplifying module is used for simplifying the network according to the radial requirement of the power grid network so as to reduce the number of solution spaces and reduce the occurrence of part of infeasible solutions;
a loop matrix constructing module for defining a loop matrix H ═ (H)ij) a x b, where a represents the total number of loops in the grid, b represents the maximum total number of switches in each loop, and element hijA number indicating the jth switch counted from any direction in the ith loop;
a loop matrix blocking module, configured to divide a non-zero element of each row in the loop matrix into a parts, so as to form a loop blocking matrix M ═ (M ═ M)ij) a x a, the matrix is a row and a column square matrix, the element mijRepresenting a switch set shared by the ith loop and the jth loop; the loop block matrix divides all switches to be searched into at most a x (a +1)/2 switch sets;
and the loop block matrix recombination module is used for selecting a subsets from the at most a x (a +1)/2 switch sets, selecting a switch from each subset respectively and recombining, and then selecting the optimal solution from each combination obtained by recombining through a search algorithm.
8. The system of claim 7, wherein the network simplification module is specifically configured to:
all tie switches and sectionalizers in the network are closed, and switches that are not in any loop are omitted from the topology, and switches that are directly connected to the power supply points are omitted from the topology.
9. The system of claim 8, wherein the total number of switches in each loop is inconsistent, and if the total number of switches in a loop is less than b, the loop matrix construction module complements the last element of the row by 0 until the number of elements in each row is b.
10. The system for network reconfiguration preprocessing in a power grid to reduce invalid solutions according to claim 9, wherein if element mijIf no common switch exists, the element is zero, and the loop matrix blocking module finally removes the original zero element;
the loop block matrix reorganization module reorganizes the loop block matrix based on the following premise:
in the loop block matrix, at least one switch set is selected in each row and each column;
the number of selected subsets is equal to the total number of loops and the number of tie switches;
at least one element on the diagonal of the loop blocking matrix in the selected switch set is selected.
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