CN116773900A - Residual current detection circuit and method thereof - Google Patents
Residual current detection circuit and method thereof Download PDFInfo
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Abstract
The embodiment of the application discloses a residual current detection circuit and a method thereof, wherein the circuit comprises the following components: the system comprises a leakage current detection transformer, an active filtering amplifying unit and a DSP control chip, wherein the leakage current detection transformer is used for sampling three-phase grid-connected current or single-phase current and converting the sampled current into sampling voltage; the active filtering amplifying unit responds to the sampling voltage, the calibration voltage and the bias voltage of the DSP control chip and outputs conditioning voltage to the DSP control chip; the DSP control chip is used for calculating residual current according to the conditioning voltage. According to the embodiment of the application, the DAC module is used for adjusting the active filtering amplifying unit, the DAC module is adjusted according to the sampling result of the ADC module, and the residual current is calculated according to the register values of the DAC module and the ADC module, so that a larger leakage current detection range and higher leakage current detection precision are obtained; in addition, bias voltage matching and sampling proportion coefficient calibration can automatically repair sampling deviation caused by environmental transformation, device aging and other factors.
Description
Technical Field
The embodiment of the application relates to the field of photovoltaic grid-connected inverters, in particular to a residual current detection circuit and a method thereof.
Background
In recent years, new energy power generation systems typified by photovoltaic and wind power have been rapidly developed, and with the massive use of photovoltaic arrays and photovoltaic inverters, there is a possibility that an ungrounded photovoltaic array operating at a safe voltage level or higher may cause an electric shock hazard. The inverter is not isolated, or the contact current is not guaranteed to be within a reasonable range although the inverter is provided with an isolating measure, and if a user contacts the electrified part of the square matrix and the ground at the same time, the connection between the power grid and the ground provides a loop for the contact current, so that the electric shock hazard is generated.
According to the requirements of technical Specification of NB/T32004-2018 photovoltaic grid-connected inverter, under any condition that the inverter is connected into an alternating current power grid and an alternating current breaker is closed, the inverter should provide residual current detection, and the excess continuous residual current and the abrupt change of the excess residual current are detected. The residual current detection means should be able to detect the total effective value current.
For high power inverters, the continuous residual current protection will become greater as the power level increases, which necessarily results in an increase in the residual current sampling range. However, the abrupt change protection value of the residual current is kept unchanged, so that the abrupt change sampling precision of the residual current is reduced, and the actual application of the residual current monitoring protection method is not facilitated. The existing residual current monitoring protection method is designed based on a low-power converter and a device, and the contradiction between continuous residual current protection and abrupt change protection of residual current after the power level of the converter is increased is not considered. The high-power converter is required to realize continuous residual current protection, and the detection range of leakage current needs to be increased; however, in order to realize "abrupt change protection of residual current", it is necessary to precisely detect a minute change in leakage current.
Disclosure of Invention
The technical problem that the embodiment of the application mainly solves is to provide a residual current detection circuit and a method thereof, wherein a Digital-to-Analog Converter (DAC) module of a Digital Signal Processor (DSP) control chip is used for adjusting an active filter amplifying unit, and the DAC module is adjusted according to a sampling result of an Analog-to-Digital Converter (ADC) module of the DSP control chip so as to ensure that the input voltage of the ADC module is always in a normal working range. Meanwhile, the current residual current can be calculated according to the register values of the DAC module and the ADC module.
In order to solve the technical problems, one technical scheme adopted by the embodiment of the application is as follows: there is provided a residual current detection circuit including: the system comprises a leakage current detection transformer, an active filtering amplifying unit and a DSP control chip, wherein the leakage current detection transformer is used for sampling three-phase grid-connected current or single-phase current and converting the sampled current into sampling voltage; the active filtering amplifying unit responds to the sampling voltage, the calibration voltage and the bias voltage of the DSP control chip and outputs conditioning voltage to the DSP control chip; and the DSP control chip is used for calculating residual current according to the conditioning voltage.
In some embodiments, the circuit further comprises: and the stabilized power supply is used for providing the bias voltage.
In some embodiments, the leakage current detection transformer may further convert a preset test current into a test voltage, and determine whether the leakage current detection transformer is normal by comparing the test voltage with a preset theoretical voltage.
In some embodiments, the active filtering amplifying unit includes an operational amplifier U1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, and a resistor R6, wherein a first end of the resistor R1 is connected to a voltage output terminal of the leakage current detection transformer, a second end of the resistor R1 is connected to a non-inverting input terminal of the operational amplifier U1, a first end of the resistor R5 is connected to a reference voltage output terminal of the leakage current detection transformer, and a second end of the resistor R5 is connected to an inverting input terminal of the operational amplifier U1; the resistor R2 is connected between the inverting input end and the output end of the operational amplifier U1, the first end of the resistor R3 is connected to the inverting input end of the operational amplifier U1, and the second end of the resistor R3 is connected to the output end of the DAC module of the DSP control chip; the first end of the resistor R4 is connected to the output end of the operational amplifier U1, and the second end of the resistor R4 is connected to the input end of the ADC module of the DSP control chip; the first end of the resistor R6 is connected to the non-inverting input end of the operational amplifier U1, and the second end of the resistor R6 is connected to the output end of the regulated power supply; the resistance of the resistor R5 is equal to the resistance of the resistor R1, and the resistance of the resistor R6 is equal to the parallel resistance of the resistor R2 and the resistor R3.
In some embodiments, the active filter amplification unit further includes a diode D1 and a diode D2, wherein an anode of the diode D1 and a cathode of the diode D2 are connected to an input terminal of the ADC module, a cathode of the diode D1 is connected to a voltage-limiting power supply, and an anode of the diode D2 is grounded.
In some embodiments, the conditioning voltage is calculated according to the following formula:
，
wherein VADC is the conditioning voltage,for the said sampled voltage(s),for the calibration voltage, VSET is the bias voltage.
In some embodiments, the digital-to-analog conversion expressions of the DAC module and the ADC module of the DSP control chip are as follows:
，
wherein VADCREF is a preset ADC reference voltage, and ADCRESULT is a digital signal obtained by converting the conditioning voltage.
In some embodiments, the DSP control chip converts the conditioning voltage to a digital signal and calculates the residual current by:
，
and the ILeakage is the residual current, the Gain1 is the first Gain of the leakage current detection transformer, and the DACVALA is the value range of a register of the DAC module.
In some embodiments, the output voltage of the voltage limited power supply is 3.3V.
In some embodiments, the ADC reference voltage is 3V.
In some embodiments, the bias voltage is 1.5V.
In order to solve the technical problems, another technical scheme adopted by the embodiment of the application is as follows: provided is a residual current detection method including: setting a register value of a DAC module in a DSP control chip as an initial value; setting the DAC module to be a preset voltage to match the bias voltage output by the stabilized voltage supply; and calculating residual current by the DSP control chip according to the digital signals converted by the conditioning voltage.
In some embodiments, the method further comprises: and inputting a preset test current into a leakage current detection transformer to convert the current into a test voltage, judging whether the leakage current detection transformer is normal or not by comparing the test voltage with a preset theoretical voltage, and calibrating the sampling proportion coefficient of the ADC module.
In some embodiments, the calculating, by the DSP control chip, a residual current from the digital signal converted from the conditioning voltage includes: judging whether the digital signal is larger than the maximum value of a preset range or not; if yes, increasing the register value of the DAC module; judging whether the digital signal is larger than the minimum value of a preset range or not; if yes, reducing the register value of the DAC module; and if the digital signal is in the preset range, calculating the residual current according to the digital signal.
In some embodiments, the preset range is 0-4096.
In some embodiments, the initial value is 2048.
The beneficial effects of the embodiment of the application are as follows: different from the condition of the prior art, the embodiment of the application adjusts the active filtering amplifying unit by using the DAC module of the DSP control chip, and adjusts the DAC module according to the sampling result of the ADC module of the DSP control chip, so as to ensure that the input voltage of the ADC module is always in a normal working range. Meanwhile, the current residual current is calculated according to the register values of the DAC module and the ADC module, so that a larger leakage current detection range and higher leakage current detection precision are obtained, and the range requirement of detecting continuous residual current in a large range and the precision requirement of detecting small abrupt change residual current in a large range can be met at the same time; in addition, the leakage current detection transformer has a self-checking function and can be used for calibrating sampling proportion coefficients. The bias voltage matching and sampling proportion coefficient calibration of the circuit can automatically repair sampling deviation caused by environmental transformation, device aging and other factors.
Drawings
Fig. 1 is a schematic structural diagram of a residual current detection circuit according to an embodiment of the present application;
fig. 2 is a circuit configuration diagram of a residual current detection circuit according to an embodiment of the present application;
fig. 3 is a circuit configuration diagram of another residual current detection circuit according to an embodiment of the present application;
fig. 4 is a schematic flow chart of a residual current detection method according to an embodiment of the present application;
fig. 5 is a schematic flow chart of step S400 provided in the embodiment of the present application;
fig. 6 is a flow chart of another residual current detection method according to an embodiment of the present application.
Detailed Description
In order that the application may be readily understood, a more particular description thereof will be rendered by reference to specific embodiments that are illustrated in the appended drawings. It will be understood that when an element is referred to as being "fixed" to another element, it can be directly on the other element or one or more intervening elements may be present therebetween. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or one or more intervening elements may be present therebetween. The terms "upper," "lower," "inner," "outer," "bottom," and the like as used in this specification are used in an orientation or positional relationship based on that shown in the drawings, merely to facilitate the description of the application and to simplify the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the application. Furthermore, the terms "first," "second," "third," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used in this specification includes any and all combinations of one or more of the associated listed items.
In addition, the technical features mentioned in the different embodiments of the application described below can be combined with one another as long as they do not conflict with one another.
Continuous residual current protection: if the continuous residual current exceeds the following limit, the inverter should be turned off and fault-occurrence signal within 0.3 s: 300mA for an inverter with a rated output of not more than 30 kVA; for inverters rated for outputs greater than 30kVA, 10mA/kVA.
Abrupt protection of residual current: if the continuous residual current exceeds the following limit, the inverter should be turned off and signaled of a fault occurrence within a prescribed time period: the abrupt change of the residual current is more than 30mA, and the maximum time of disconnection is 0.3s; the abrupt change of the residual current is larger than 60mA, and the maximum time of disconnection is 0.15s; the abrupt change in residual current is greater than 150mA, with a maximum off time of 0.04s.
The embodiment of the application provides a residual current detection circuit and a method thereof, wherein an active filter amplifying unit is regulated by a Digital-to-Analog Converter (DAC) module of a Digital Signal Processor (DSP) control chip, and the DAC module is regulated according to the sampling result of an Analog-to-Digital Converter (ADC) module of the DSP control chip, so that the input voltage of the ADC module is always in a normal working range. Meanwhile, the current residual current can be calculated according to the register values of the DAC module and the ADC module.
The schematic structure of the residual current detection circuit provided by the embodiment of the application is shown in fig. 1, and the residual current detection circuit comprises a leakage current detection transformer 110, an active filtering and amplifying unit 120, a DSP control chip 130 and a regulated power supply 140.
The output terminal of the leakage current detection transformer 110 is connected to the first input terminal and the second input terminal of the active filtering amplifying unit 120, and the sampling terminal of the leakage current detection transformer 110 is connected to the ac side of the three-phase inverter or the single-phase inverter. The leakage current detection transformer 110 is used for sampling three-phase grid-connected current or single-phase current, and converting the sampled current into sampled voltage and outputting the sampled voltage to the active filtering amplifying unit 120.
The first input end of the active filter amplification unit 120 is connected to the regulated power supply 140, the second input end of the active filter amplification unit 120 is connected to the output end of the DSP control chip 130, and the output end of the active filter amplification unit 120 is connected to the input end of the DSP control chip 130. The active filter amplifying unit 120 outputs a conditioning voltage to the DSP control chip 130 in response to the sampling voltage outputted from the active filter amplifying unit 120, the calibration voltage outputted from the DSP control chip 130, and the bias voltage outputted from the regulated power supply 140.
The DSP control chip 130 is used for calculating the residual current according to the conditioning voltage. Specifically, the DSP control chip 130 includes an ADC module and a DAC module, where the ADC module converts the received conditioning voltage into a digital signal and performs sampling calculation, and calculates an output signal of the DAC module according to the sampled signal.
The regulated power supply 140 is configured to provide a bias voltage, which in an embodiment of the present application is 1.5V.
It should be noted that, the leakage current detection transformer 110 further has a self-checking function, that is, the leakage current detection transformer 110 can also convert a preset test current into a test voltage, and determine whether the leakage current detection transformer is normal by comparing the test voltage with a preset theoretical voltage.
In some embodiments of the present application, a circuit configuration diagram of a residual current detection circuit is provided, as shown in fig. 2. The residual current detection circuit comprises a leakage current detection transformer 110, an active filter amplification unit 120, a DSP control chip 130 and a regulated power supply 140, wherein the active filter amplification unit 120 comprises an operational amplifier U1, a resistor R2, a resistor R3, a resistor R4, a resistor R5 and a resistor R6.
The first end of the resistor R1 is connected to the voltage output terminal VOUT of the leakage current detection transformer 110, the second end of the resistor R1 is connected to the non-inverting input terminal of the operational amplifier U1, the first end of the resistor R5 is connected to the reference voltage output terminal VREF of the leakage current detection transformer 110, and the second end of the resistor R5 is connected to the inverting input terminal of the operational amplifier U1.
The resistor R2 is connected between the inverting input terminal and the output terminal of the operational amplifier U1, the first terminal of the resistor R3 is connected to the inverting input terminal of the operational amplifier U1, and the second terminal of the resistor R3 is connected to the output terminal VDAC of the DAC module of the DSP control chip 130.
The first terminal of the resistor R4 is connected to the output terminal of the operational amplifier U1, and the second terminal of the resistor R4 is connected to the input terminal VADC of the ADC module of the DSP control chip 130. The first end of the resistor R6 is connected to the non-inverting input terminal of the operational amplifier U1, and the second end of the resistor R6 is connected to the output terminal of the regulated power supply 140.
In the embodiment of the present application, the resistance value of the resistor R5 is equal to the resistance R1, that is, r5=r1; the resistance of the resistor R6 is equal to the parallel resistance of the resistor R2 and the resistor R3, i.e., r6=r2// r3.
The VINVR port, the VINVS port, the VINVT port, the VGRIDR port, the VGRIDS port and the VGRIDT port of the leakage current detection transformer 110 are used for sampling three-phase grid-connected current; the VTESTIN port and the VTESTOUT port of the leakage current detecting transformer 110 are self-checking signal input ports, when a preset test current is input to the VTESTIN port and the VTESTOUT port, a corresponding test voltage can be detected at the voltage output terminal VOUT and the reference voltage output terminal VREF, and whether the leakage current detecting transformer 110 is normal can be judged by comparing whether the test voltage is consistent with a preset theoretical voltage.
Theoretical voltage vtest=gain 2×itest.
In normal operation, leakage current detection transformer 110, test current itest=0,
VOUT-VREF=Gain1*ILeakage +Gain2*ITest，（1）
gain2 is the Gain of the test current in the leakage current detection transformer 110, and Gain1 is the Gain of the leakage current flowing through the leakage current detection transformer 110.
In this embodiment, taking the application of the residual current detection circuit to the three-phase inverter as an example, the leakage current detection transformer 110 sums the sampled three-phase grid-connected current, converts the three-phase grid-connected current into a voltage signal, and outputs the voltage signal to the active filtering amplifying unit 120. The relationship between the voltages of the respective input and output terminals of the active filter amplification unit 120 can be calculated based on the characteristics of the weak-short and weak-break of the input terminal of the operational amplifier U1 in the active filter amplification unit 120.
The characteristics of the virtual circuit at the input of the operational amplifier U1 are as follows:
(VOUT-Vpos)/(R1)=(Vpos-VSET)/(R3//R2)（2）
(VREF-Vneg)/(R1)=(Vneg-VADC)/(R2)+(Vneg-VDAC)/(R3)（3）
the voltage of the same direction input end and the voltage of the opposite direction input end of the operational amplifier are respectively Vpos and Vneg, and VSET is the bias voltage output by the bias power supply.
After the simplification of the formula (2) and the formula (3), the following can be obtained respectively:
Vpos=(VOUT/R1+VSET/R2+VSET/R3)×(R1∙R2∙R3)/(R1∙R2+R2∙R3+R3∙R1)（4）
Vneg=(VREF/R1+VADC/R2+VDAC/R3)×(R1∙R2∙R3)/(R1∙R2+R2∙R3+R3∙R1)（5）
the short-term characteristics of the input of the operational amplifier U1 are as follows:
Vpos=Vneg（6）
the key expressions available are as follows:
VADC=R2/R1 (VOUT-VREF)+R2/R3 (VSET-VDAC)+VSET（7）
as can be seen from equation (7), the conditioning voltage VADC finally input to the ADC module of the DSP control chip 130 is composed of three parts, the first part a1=r2/R1 (VOUT-VREF) represents the output signal part of the leakage current detection transformer 110, i.e., the sampling voltage, and the output signal of the leakage current detection transformer 110 can be amplified by increasing the ratio of R2/R1.
The second portion a2=r2/R3 (VSET-VDAC) represents a calibration signal, that is, a calibration voltage, of the DAC module of the DSP control chip 130 for the sampling voltage, where the ratio of R2/R3 can be designed according to the voltage range of A1 and the voltage range of (VSET-VDAC), so as to ensure that the voltage range of the conditioning voltage VADC can be controlled between 0 and 3v.
The third portion a3=vset represents the bias voltage of the conditioning voltage VADC. In the embodiment of the present application, vset=1.5v, and the maximum value of the second portion > the maximum value of the first portion.
It should be noted that, in the existing residual current detection scheme, the conditioning voltage VADC input to the ADC module of the DSP control chip 130 includes only the first portion A1 and the third portion A3. In order to control the voltage range of VADC between 0 and 3V, the value range of A1 is fixed and is only-1.5V to 1.5V. In the application of wide-range sampling, the sampling accuracy is inevitably reduced. The residual current detection circuit provided by the embodiment of the application can amplify the value range of A1 to obtain higher sampling precision, and simultaneously control the amplitude of the output voltage of the DAC module to balance the conditioning voltage VADC so as to keep a larger sampling range.
The DSP control chip 130 converts the conditioning voltage VADC into a digital signal ADCRESULT and performs sampling calculation, and calculates the magnitude of the voltage signal that the DAC module should output according to the sampled signal.
Specifically, the register value DACVALA of the DAC module in the DSP control chip 130 is initially set to an initial value, so that the output voltage VDAC of the DAC module=1.5v. In the initial state, the output signals of the two output terminals of the leakage current detection transformer 110 are approximately 0, so that the input signal VADC of the ADC module at this time is approximately equal to 1.5V, which can be used to match the bias voltage and calibrate the sampling signal.
The leakage current detection transformer 110 is then tested for proper operation using a preset test current, and the process can be used to calibrate the sampling scaling factor of the ADC module.
In this embodiment, the initial value is 2048.
After the bias voltage matching and the sampling scaling factor calibration are completed, the ADC module is configured to sample the residual current, that is, perform analog-to-digital conversion on the conditioning voltage VADC, and convert the conditioning voltage VADC into the digital signal ADCRESULT. The magnitude of the residual current is then calculated by converting the digital signal ADCRESULT to the conditioning voltage VADC.
In this embodiment, the value of the digital signal ADCRESULT ranges from 0 to 4096.
When the digital signal ADCRESULT sampled by the ADC module is too large, i.e. when ADCRESULT > limimax, the digital signal ADCRESULT is reduced by increasing the register value DACVALA of the DAC module, so that it is kept in the value range of 0-4096.
In this embodiment, limtmax=4096.
When the digital signal adchelt sampled by the ADC module is too small, i.e. when adchelt < LIMITMIN, the digital signal adchelt is increased by decreasing the register value DACVALA of the DAC module, so that it is kept in the value range of 0-4096.
In this embodiment, limitmin=0.
In this embodiment, the digital-to-analog conversion expressions of the ADC module and the DAC module are as follows:
ADCRESULT=4096 *VADC/VADCREF（8）
VADC=VDACREF *DACVALA/4096（9）
wherein, VADCREF and VDACREF are the reference voltage of the ADC module and the reference voltage of the DAC module respectively.
In the present embodiment, vadref=vdacref=3v.
By combining the formula (1), the formula (7) and the formula (8)
ILeakage=VADCREF/(4096×Gain1)*[R1/R2*(ADCRESULT-2048)+R1/R3* (DACVALA-2048)]（10）
DSP control chip 130 may calculate the present residual current according to equation (10).
The residual current detection circuit provided by the embodiment of the application is suitable for the residual current monitoring and protection application scene of the high-power inverter, and the detection range and the detection precision of the leakage current are required to be enlarged at the same time. For example, a 320kW inverter, according to the requirement of continuous residual current protection of 10mA/kVA, the residual current detection range is at least-3200mA. In this wide-range sampling, it is also necessary to ensure the accuracy of 30mA abrupt residual current detection.
Different from the condition of the prior art, the embodiment of the application adjusts the active filtering amplifying unit by using the DAC module of the DSP control chip, and adjusts the DAC module according to the sampling result of the ADC module of the DSP control chip, so as to ensure that the input voltage of the ADC module is always in a normal working range. Meanwhile, the current residual current is calculated according to the register values of the DAC module and the ADC module, so that a larger leakage current detection range and higher leakage current detection precision are obtained, and the range requirement of detecting continuous residual current in a large range and the precision requirement of detecting small abrupt change residual current in a large range can be met at the same time; in addition, the leakage current detection transformer has a self-checking function and can be used for calibrating sampling proportion coefficients. The bias voltage matching and sampling proportion coefficient calibration of the circuit can automatically repair sampling deviation caused by environmental transformation, device aging and other factors.
In other embodiments of the present application, there is provided another residual current detection circuit, the circuit configuration of which is shown in fig. 3. The residual current detection circuit includes a leakage current detection transformer 110, an active filter amplification unit 120, a DSP control chip 130, and a regulated power supply 140, wherein the active filter amplification unit 120 includes an operational amplifier U1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a diode D1, and a diode D2.
The first end of the resistor R1 is connected to the voltage output terminal VOUT of the leakage current detection transformer 110, the second end of the resistor R1 is connected to the non-inverting input terminal of the operational amplifier U1, the first end of the resistor R5 is connected to the reference voltage output terminal VREF of the leakage current detection transformer 110, and the second end of the resistor R5 is connected to the inverting input terminal of the operational amplifier U1.
The resistor R2 is connected between the inverting input terminal and the output terminal of the operational amplifier U1, the first terminal of the resistor R3 is connected to the inverting input terminal of the operational amplifier U1, and the second terminal of the resistor R3 is connected to the output terminal VDAC of the DAC module of the DSP control chip 130.
The first terminal of the resistor R4 is connected to the output terminal of the operational amplifier U1, and the second terminal of the resistor R4 is connected to the input terminal VADC of the ADC module of the DSP control chip 130. The first end of the resistor R6 is connected to the non-inverting input terminal of the operational amplifier U1, and the second end of the resistor R6 is connected to the output terminal of the regulated power supply 140.
The anode of the diode D1 and the cathode of the diode D2 are connected to the input end of the ADC module, the cathode of the diode D1 is connected to a voltage limiting power supply, and the anode of the diode D2 is grounded.
In the embodiment of the application, the output voltage of the voltage-limiting power supply is 3.3V.
The diode D1 and the diode D2 play a role in protection, and can limit the input voltage VADC of the ADC module within a range of 0-3.3V, so that the damage of the VADC to the ADC module caused by abnormal overvoltage is prevented.
In the embodiment of the present application, the resistance value of the resistor R5 is equal to the resistance R1, that is, r5=r1; the resistance of the resistor R6 is equal to the parallel resistance of the resistor R2 and the resistor R3, i.e., r6=r2// r3.
The specific operation principle of the residual current detection circuit is the same as that of the above embodiment, and will not be described herein.
Based on the residual current detection circuit, the embodiment of the application also provides a residual current detection method, and a flow chart of the residual current detection method is shown in fig. 4. The residual current detection method specifically comprises the following steps:
step S100: setting the register value of the DAC module in the DSP control chip as an initial value.
In the embodiment of the application, the initial value is 2048.
Step S200: the output voltage of the DAC module is set to be a preset voltage so as to be matched with the bias voltage output by the stabilized voltage supply.
In an initial state, setting the output voltage VDAC of the DAC module to be a preset voltage, and inputting the output voltage VDAC to an inverting input end of the operational amplifier U1 through a resistor R3; as can be seen from the above embodiments, the conditioning voltage output by the operational amplifier U1 is composed of three parts, vadc=r2/R1 (VOUT-VREF) +r2/R3 (VSET-VDAC) +vset.
In the embodiment of the present application, the preset voltage is 1.5V, i.e., vdac=1.5v.
In the initial state, the sampling voltage output by the leakage current detection transformer is approximately 0, i.e. R2/R1 (VOUT-VREF) =0, so vadc=r2/R3 (VSET-VDAC) +vset, and if the bias voltage output by the regulated power supply is 1.5V, the conditioning voltage vadc=vset=1.5V input to the ADC module. Therefore, whether the bias voltage output by the regulated power supply is matched with the preset voltage can be judged by judging whether the conditioning voltage input to the ADC module is approximately 1.5V. If the two values are not matched, the ADC module records the deviation value and calibrates the conditioning voltage with the deviation value in the subsequent sampling process. Specifically, when the bias voltage matches the preset voltage, the bias value is 0; if the bias voltage is smaller than the preset voltage, R2/R3 (VSET-VDAC) is <0, and the actual VADC is <1.5V, so that the deviation value of the actual value and the theoretical value of the VADC is negative, and the absolute value of the deviation value needs to be added to the actual VADC before the subsequent sampling; if the bias voltage is greater than the preset voltage, R2/R3 (VSET-VDAC) >0 and the actual VADC is greater than 1.5V, so that the deviation value between the actual value and the theoretical value of the VADC is positive, and the actual VADC needs to be subtracted before the subsequent sampling.
It should be noted that, in the above process, the sampling voltage output by the leakage current detection transformer is approximately 0 to perform calculation, and in the actual process, the leakage current detection transformer also generates a dc offset, so the offset value in the above process also includes the dc offset generated by the leakage current detection transformer.
Step S400: and calculating residual current by the DSP control chip according to the digital signals converted by the conditioning voltage.
In some embodiments of the present application, the step S400 specifically includes the following steps, and the flow chart is shown in fig. 5:
step S410: and judging whether the digital signal is larger than the maximum value of the preset range.
In the embodiment of the present application, whether the digital signal is greater than 4096 is determined, if yes, step S420 is executed; if not, step S450 is performed.
Step S420: and increasing the register value of the DAC module.
Specifically, the digital signal is reduced by increasing the register value of the DAC module so that it remains in the value range of 0-4096.
Step S430: and judging whether the digital signal is larger than the minimum value of the preset range.
In the embodiment of the present application, whether the digital signal is smaller than 0 is determined, if yes, step S440 is executed; if not, step S450 is performed.
Step S440: and reducing the register value of the DAC module.
Specifically, the digital signal is increased by decreasing the register value of the DAC module so that it remains in the value range of 0-4096.
Step S450: the residual current is calculated from the digital signal.
Specifically, the residual current is calculated from the digital signal according to equation (10).
In some embodiments of the present application, another residual current detection method is also provided, and a schematic flow chart of the method is shown in fig. 6. The residual current detection method specifically comprises the following steps:
step S100: setting the register value of the DAC module in the DSP control chip as an initial value.
In the embodiment of the application, the initial value is 2048.
Step S200: the output voltage of the DAC module is set to be a preset voltage so as to be matched with the bias voltage output by the stabilized voltage supply.
In the embodiment of the application, the preset voltage is 1.5V.
Step S300: and comparing the test voltage with a preset theoretical voltage, judging whether the leakage current detection transformer is normal or not, and calibrating the sampling proportionality coefficient of the ADC module.
Specifically, a preset test current is input to a leakage current detection transformer to be converted into a test voltage, whether the leakage current detection transformer is normal or not is judged by comparing the test voltage with a preset theoretical voltage, and the sampling proportionality coefficient of the ADC module is calibrated.
Step S400: and calculating residual current by the DSP control chip according to the digital signals converted by the conditioning voltage.
Different from the condition of the prior art, the embodiment of the application adjusts the active filtering amplifying unit by using the DAC module of the DSP control chip, and adjusts the DAC module according to the sampling result of the ADC module of the DSP control chip, so as to ensure that the input voltage of the ADC module is always in a normal working range. Meanwhile, the current residual current is calculated according to the register values of the DAC module and the ADC module, so that a larger leakage current detection range and higher leakage current detection precision are obtained, and the range requirement of detecting continuous residual current in a large range and the precision requirement of detecting small abrupt change residual current in a large range can be met at the same time; in addition, the leakage current detection transformer has a self-checking function and can be used for calibrating sampling proportion coefficients. The bias voltage matching and sampling proportion coefficient calibration of the circuit can automatically repair sampling deviation caused by environmental transformation, device aging and other factors.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and are not limiting; the technical features of the above embodiments or in the different embodiments may also be combined within the idea of the application, the steps may be implemented in any order, and there are many other variations of the different aspects of the application as above, which are not provided in details for the sake of brevity; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.
Claims (16)
1. A residual current detection circuit, comprising: the leakage current detection transformer, the active filtering amplifying unit and the DSP control chip, wherein,
the leakage current detection transformer is used for sampling three-phase grid-connected current or single-phase current and converting the sampled current into sampled voltage;
the active filtering amplifying unit responds to the sampling voltage, the calibration voltage and the bias voltage of the DSP control chip and outputs conditioning voltage to the DSP control chip;
and the DSP control chip is used for calculating residual current according to the conditioning voltage.
2. The circuit of claim 1, further comprising:
and the stabilized power supply is used for providing the bias voltage.
3. The circuit of claim 1, wherein the leakage current detection transformer is further configured to convert a predetermined test current into a test voltage, and to determine whether the leakage current detection transformer is normal by comparing the test voltage with a predetermined theoretical voltage.
4. The circuit of claim 1, wherein the active filter amplification unit comprises an operational amplifier U1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, and a resistor R6, wherein,
the first end of the resistor R1 is connected to the voltage output end of the leakage current detection transformer, the second end of the resistor R1 is connected to the non-inverting input end of the operational amplifier U1, the first end of the resistor R5 is connected to the reference voltage output end of the leakage current detection transformer, and the second end of the resistor R5 is connected to the inverting input end of the operational amplifier U1;
the resistor R2 is connected between the inverting input end and the output end of the operational amplifier U1, the first end of the resistor R3 is connected to the inverting input end of the operational amplifier U1, and the second end of the resistor R3 is connected to the output end of the DAC module of the DSP control chip;
the first end of the resistor R4 is connected to the output end of the operational amplifier U1, and the second end of the resistor R4 is connected to the input end of the ADC module of the DSP control chip;
the first end of the resistor R6 is connected to the non-inverting input end of the operational amplifier U1, and the second end of the resistor R6 is connected to the output end of the regulated power supply;
the resistance of the resistor R5 is equal to the resistance of the resistor R1, and the resistance of the resistor R6 is equal to the parallel resistance of the resistor R2 and the resistor R3.
5. The circuit of claim 4, wherein the active filter amplification unit further comprises a diode D1 and a diode D2, wherein,
the anode of the diode D1 and the cathode of the diode D2 are connected to the input end of the ADC module, the cathode of the diode D1 is connected to a voltage limiting power supply, and the anode of the diode D2 is grounded.
6. The circuit of claim 4, wherein the conditioning voltage is calculated according to the formula:
，
wherein VADC is the conditioning voltage,for the sampling voltage, +.>For the calibration voltage, VSET is the bias voltage.
7. The circuit of claim 1, wherein the digital-to-analog conversion expressions of the DAC module and the ADC module of the DSP control chip are as follows:
，
wherein VADCREF is a preset ADC reference voltage, and ADCRESULT is a digital signal obtained by converting the conditioning voltage.
8. The circuit of claim 7, wherein the DSP control chip converts the conditioning voltage to a digital signal and calculates the residual current by:
，
and the ILeakage is the residual current, the Gain1 is the first Gain of the leakage current detection transformer, and the DACVALA is the value range of a register of the DAC module.
9. The circuit of claim 5, wherein the voltage limited power supply has an output voltage of 3.3V.
10. The circuit of claim 7, wherein the ADC reference voltage is 3V.
11. The circuit of any of claims 1-10, wherein the bias voltage is 1.5V.
12. A residual current detection method, comprising:
setting a register value of a DAC module in a DSP control chip as an initial value;
setting the output voltage of the DAC module as a preset voltage to match the bias voltage output by the stabilized voltage supply;
and calculating residual current by the DSP control chip according to the digital signals converted by the conditioning voltage.
13. The method as recited in claim 12, further comprising:
and inputting a preset test current into a leakage current detection transformer to convert the current into a test voltage, judging whether the leakage current detection transformer is normal or not by comparing the test voltage with a preset theoretical voltage, and calibrating the sampling proportionality coefficient of the ADC module.
14. The method of claim 12, wherein the calculating, by the DSP control chip, a residual current from the digital signal converted from the conditioning voltage comprises:
judging whether the digital signal is larger than the maximum value of a preset range or not;
if yes, increasing the register value of the DAC module;
judging whether the digital signal is larger than the minimum value of a preset range or not;
if yes, reducing the register value of the DAC module;
and if the digital signal is in the preset range, calculating the residual current according to the digital signal.
15. The method of claim 14, wherein the predetermined range is 0-4096.
16. The method according to any one of claims 12-15, wherein the initial value is 2048.
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Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0918290A (en) * | 1995-06-29 | 1997-01-17 | Matsushita Electric Ind Co Ltd | Switched capacitor circuit |
| JPH10300826A (en) * | 1997-04-28 | 1998-11-13 | Ando Electric Co Ltd | Digital calibration method for analog measuring unit |
| KR200190642Y1 (en) * | 2000-03-07 | 2000-08-01 | 엘지정보통신주식회사 | Apparatus for controlling output of converter |
| JP2000295102A (en) * | 1999-02-03 | 2000-10-20 | Hitachi Electronics Eng Co Ltd | Digital calibration method and system for a/d converter or d/a converter |
| CN102427295A (en) * | 2011-12-09 | 2012-04-25 | 成都芯源系统有限公司 | Switching regulator circuit |
| CN104133099A (en) * | 2014-07-07 | 2014-11-05 | 中国电子科技集团公司第四十一研究所 | Detection device and method for residual current of photovoltaic array |
| WO2016179964A1 (en) * | 2015-05-08 | 2016-11-17 | 中兴通讯股份有限公司 | Detection circuit and detection method for high-side current |
| CN108459647A (en) * | 2017-02-22 | 2018-08-28 | 苏州普源精电科技有限公司 | The calibration mistuned circuit and method of electronic load constant current control loop |
| CN109618270A (en) * | 2018-12-04 | 2019-04-12 | 珠海市杰理科技股份有限公司 | Microphone input offset calibration method and microphone bias device |
| CN212569993U (en) * | 2020-07-15 | 2021-02-19 | 北京北元安达电子有限公司 | Electric fire monitoring detector |
| CN112385902A (en) * | 2020-11-03 | 2021-02-23 | 深圳市合元科技有限公司 | Aerosol generating device |
| CN112671405A (en) * | 2020-12-23 | 2021-04-16 | 中国原子能科学研究院 | Ionization chamber charge signal reading device |
| CN113485508A (en) * | 2021-07-09 | 2021-10-08 | 珠海格力电器股份有限公司 | Voltage reference regulating circuit, processing circuit and servo driver |
| US20220300724A1 (en) * | 2019-09-03 | 2022-09-22 | Y Soft Corporation | Method of Processing a Signal of a Passive RFID Chip with a Reader |
| CN218382393U (en) * | 2022-04-22 | 2023-01-24 | 华中科技大学 | Sensor circuit based on TDLAS |
-
2023
- 2023-08-17 CN CN202311036026.7A patent/CN116773900A/en active Pending
Patent Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0918290A (en) * | 1995-06-29 | 1997-01-17 | Matsushita Electric Ind Co Ltd | Switched capacitor circuit |
| JPH10300826A (en) * | 1997-04-28 | 1998-11-13 | Ando Electric Co Ltd | Digital calibration method for analog measuring unit |
| JP2000295102A (en) * | 1999-02-03 | 2000-10-20 | Hitachi Electronics Eng Co Ltd | Digital calibration method and system for a/d converter or d/a converter |
| KR200190642Y1 (en) * | 2000-03-07 | 2000-08-01 | 엘지정보통신주식회사 | Apparatus for controlling output of converter |
| CN102427295A (en) * | 2011-12-09 | 2012-04-25 | 成都芯源系统有限公司 | Switching regulator circuit |
| CN104133099A (en) * | 2014-07-07 | 2014-11-05 | 中国电子科技集团公司第四十一研究所 | Detection device and method for residual current of photovoltaic array |
| WO2016179964A1 (en) * | 2015-05-08 | 2016-11-17 | 中兴通讯股份有限公司 | Detection circuit and detection method for high-side current |
| CN108459647A (en) * | 2017-02-22 | 2018-08-28 | 苏州普源精电科技有限公司 | The calibration mistuned circuit and method of electronic load constant current control loop |
| CN109618270A (en) * | 2018-12-04 | 2019-04-12 | 珠海市杰理科技股份有限公司 | Microphone input offset calibration method and microphone bias device |
| US20220300724A1 (en) * | 2019-09-03 | 2022-09-22 | Y Soft Corporation | Method of Processing a Signal of a Passive RFID Chip with a Reader |
| CN212569993U (en) * | 2020-07-15 | 2021-02-19 | 北京北元安达电子有限公司 | Electric fire monitoring detector |
| CN112385902A (en) * | 2020-11-03 | 2021-02-23 | 深圳市合元科技有限公司 | Aerosol generating device |
| CN112671405A (en) * | 2020-12-23 | 2021-04-16 | 中国原子能科学研究院 | Ionization chamber charge signal reading device |
| CN113485508A (en) * | 2021-07-09 | 2021-10-08 | 珠海格力电器股份有限公司 | Voltage reference regulating circuit, processing circuit and servo driver |
| CN218382393U (en) * | 2022-04-22 | 2023-01-24 | 华中科技大学 | Sensor circuit based on TDLAS |
Non-Patent Citations (1)
| Title |
|---|
| 祝世兴 等: "基于 TL494 磁流变减震器电压驱动电路设计与测试", 《重庆科技学院学报(自然科学版)》, vol. 9, no. 3, pages 130 - 133 * |
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