CN116759283B - Bottom electrode device and wafer processing method - Google Patents
Bottom electrode device and wafer processing method Download PDFInfo
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- CN116759283B CN116759283B CN202310654376.3A CN202310654376A CN116759283B CN 116759283 B CN116759283 B CN 116759283B CN 202310654376 A CN202310654376 A CN 202310654376A CN 116759283 B CN116759283 B CN 116759283B
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- wafer
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- carrying disc
- process gas
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- 238000003672 processing method Methods 0.000 title abstract description 7
- 238000000034 method Methods 0.000 claims abstract description 58
- 238000000605 extraction Methods 0.000 claims abstract description 4
- 238000009826 distribution Methods 0.000 claims description 13
- 238000004891 communication Methods 0.000 claims description 2
- 239000007789 gas Substances 0.000 description 57
- 230000000694 effects Effects 0.000 description 4
- 238000001179 sorption measurement Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000005121 nitriding Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000000110 cooling liquid Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32623—Mechanical discharge control means
- H01J37/32642—Focus rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67069—Apparatus for fluid treatment for etching for drying etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6838—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/32—Processing objects by plasma generation
- H01J2237/33—Processing objects by plasma generation characterised by the type of processing
- H01J2237/332—Coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/32—Processing objects by plasma generation
- H01J2237/33—Processing objects by plasma generation characterised by the type of processing
- H01J2237/334—Etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The invention provides a lower electrode device and a wafer processing method, wherein the device comprises a wafer carrying disc, a plurality of annular grooves are formed in the front surface of the wafer carrying disc, and adjacent annular grooves are communicated through linear grooves; the non-process gas through hole is used for introducing non-process gas, and the non-process gas overflows from the non-process gas through hole and flows out from the edge of the wafer so as to prevent plasma from being drilled into the back surface of the wafer, and is arranged in an annular groove positioned at the inner side and positioned in a linear groove; the non-process gas through hole is communicated with the output end of the gas branch, and the gas branch extends downwards out of the wafer carrying disc from the inner part of the wafer carrying disc; the vacuum through hole is used for providing an extraction port for gas between the back surface of the wafer and the wafer carrying disc, is arranged on the front surface of the wafer carrying disc and is positioned between two adjacent annular grooves at the outermost side. The invention can reduce the gap between the wafer and the carrying platform and can prevent plasma from being drilled into the back of the wafer.
Description
Technical Field
The invention belongs to the field of wafer equipment, and particularly relates to a lower electrode device and a wafer processing method.
Background
In the semiconductor manufacturing process, plasma photoresist stripping, oxidizing and nitriding equipment is an indispensable equipment in the whole production process; the plasma photoresist removing equipment mainly adopts a carrying disc as a carrying platform of a wafer in a process cavity, a heater is embedded in the carrying disc or a cooling liquid is connected into the carrying disc, and the carrying platform is automatically conveyed or a uniform wafer heat diffusion carrier is provided for the wafer; however, the wafer has a certain amount of warpage phenomenon after being processed at high and low temperatures, slotting, hole digging and the like in the processing process, and the phenomenon that the middle high edge is low or the middle low edge is high is faced.
Specifically, after the wafer is placed on the carrier plate, as shown in fig. 1-2, because the carrier adopts an electrostatic adsorption mode, the wafer is placed on the carrier plate through gravity, a certain gap exists between the wafer and the carrier plate, and when the wafer goes through various technological processes, certain warping is generated, so that the gap between the wafer and the carrier plate is enlarged; the plasma drills into the gap between the wafer and the carrier to react with the back of the wafer in the photoresist removing or oxidizing and nitriding process, so that the back of the wafer is etched and marked, the appearance of the product is affected, customers return goods due to disqualification of the appearance,
Disclosure of Invention
The invention aims to provide a lower electrode device and a wafer processing method, which can reduce a gap between a wafer and a carrier and can prevent plasma from being drilled into the back of the wafer. In order to achieve the above purpose, the following technical scheme is adopted:
A lower electrode assembly comprising:
The front surface of the wafer carrying disc is provided with a plurality of annular grooves, and the adjacent annular grooves are communicated through linear grooves;
The non-process gas through hole is used for introducing non-process gas, and the non-process gas overflows from the non-process gas through hole and flows out from the edge of the wafer so as to prevent plasma from being drilled into the back surface of the wafer, and is arranged in an annular groove positioned at the inner side and positioned in a linear groove; the non-process gas through hole is communicated with the output end of the gas branch, and the gas branch extends downwards out of the wafer carrying disc from the inside of the wafer carrying disc;
The vacuum through hole is used for providing an extraction port for gas between the back surface of the wafer and the wafer carrying disc, is arranged on the front surface of the wafer carrying disc and is positioned between two adjacent annular grooves at the outermost side; the vacuum through holes extend downwards into the wafer carrying disc;
The output end of the vacuum through hole is communicated with the vacuum distribution cavity, and the vacuum distribution cavity is arranged in the wafer carrying disc; the vacuum distribution cavity is communicated with the vacuum pump.
Preferably, the non-process gas through holes are all located outside the area surrounded by the top pinhole.
Preferably, the non-process gas through holes are distributed on two adjacent annular grooves.
Preferably, the vacuum through holes are formed in the wafer carrier plate part surrounded by the innermost annular groove.
Preferably, all of the gas branches are in communication with a gas line assembly that is located outside of the wafer carrier.
Preferably, the vacuum switch pneumatic valve is arranged on a pipeline between the vacuum distribution cavity and the vacuum pump; the gas switch pneumatic valve is arranged on the gas pipeline assembly.
Preferably, the heating rod is located at an edge portion of the wafer carrier plate.
A wafer processing method comprising the steps of:
Step1, conveying a wafer to a thimble of a process cavity through a manipulator;
Step2, the ejector pin descends, and the wafer is dropped onto the wafer carrying disc;
step 3, opening a vacuum switch pneumatic valve, and extracting gas from the back surface of the wafer to adsorb the wafer on the wafer carrying disc;
step 4, opening a gas switch pneumatic valve, and introducing non-process gas;
Step 5, starting a process in the process chamber;
step 6, after the process is finished, closing the gas switch pneumatic valve;
step 7, closing a vacuum switch pneumatic valve;
Step 8, lifting the thimble;
and 9, taking the wafer out of the process cavity by the mechanical arm.
Compared with the prior art, the invention has the advantages that:
(1) Through increasing the air suction hole (vacuum through hole) at the bottom of the wafer carrying disc, the vacuum adsorption force is generated at the back of the wafer by utilizing the vacuum of the process cavity or the vacuum pipeline system, the wafer is adsorbed on the wafer carrying disc, and the gap between the wafer and the carrying platform is reduced, so that plasma is prevented from being drilled into the back of the wafer and reacting.
And simultaneously, non-process gas through holes are formed in the annular groove and the linear groove on the inner side, non-current process reaction gases such as nitrogen or helium are introduced into the back surface of the wafer, and flow out from a gap between the wafer and the wafer carrying disc carrier to the edge in an overflow mode, and a circle of gas film is generated at the edge of the wafer so as to prevent Plasma (Plasma) from drilling into the back surface of the wafer.
(2) The introduced gas can be used as a temperature conduction medium at the same time, so that the temperature of the wafer is more uniform. Specifically, because the temperature of the wafer near the center is higher, the annular groove and the linear groove on the inner side are provided with non-process gas through holes, and the gas overflows to the edge, the temperature of the middle part diffuses to the edge along with the gas, so that the temperature of the wafer is more uniform.
Drawings
FIG. 1 is a schematic view of a prior art wafer carrier in a process chamber;
FIG. 2 is a top view and a cross-sectional view of a prior art wafer carrier plate;
FIG. 3 is a top view of a wafer carrier in this embodiment;
Fig. 4 is a cross-sectional view of a wafer carrier in this embodiment.
The device comprises a 1-wafer carrying disc, an 11-annular groove, a 12-linear groove, a 2-thimble, a 3-heating rod, a 4-non-process gas through hole, a 5-gas branch, a 6-gas pipeline assembly, a 7-gas switch pneumatic valve, an 8-vacuum through hole, a 9-vacuum distribution cavity and a 10-vacuum switch pneumatic valve.
Detailed Description
The present invention will be described in more detail below with reference to the drawings, in which preferred embodiments of the invention are shown, it being understood that one skilled in the art can modify the invention described herein while still achieving the advantageous effects of the invention. Accordingly, the following description is to be construed as broadly known to those skilled in the art and not as limiting the invention.
As shown in fig. 3 to 4, the lower electrode device includes:
The front surface of the wafer carrier plate 1 is provided with a plurality of annular grooves 11, and the adjacent annular grooves 11 are communicated through linear grooves 12; the heating rod 3 is located at an edge portion of the wafer carrier plate 1.
The non-process gas through hole 4 is used for introducing non-process gas, and the non-process gas overflows from the non-process gas through hole 4 and flows out from the edge of the wafer so as to prevent plasma from being drilled into the back surface of the wafer, and the non-process gas through hole is formed in the annular groove 11 positioned on the inner side and positioned in the linear groove 12. The non-process gas diffuses along the annular groove 11 and the linear groove 12 at the same time, so that a gas film for isolating plasma can be rapidly formed, and the cooling effect is good.
The non-process gas through hole 4 is communicated with the output end of the gas branch 5, and the gas branch 5 extends downwards out of the wafer carrier 1 from the inside of the wafer carrier 1; all the gas branches 5 are communicated with a gas pipeline assembly 6, and the gas pipeline assembly 6 is positioned outside the wafer carrier plate 1.
Further, the non-process gas through holes 4 are all located outside the area surrounded by the top needle holes and distributed on two adjacent annular grooves 11. As shown in fig. 3, in the two annular grooves, the non-process gas through holes 4 on the inner ring and the non-process gas through holes 4 on the outer ring are distributed in a staggered manner, so that the gas film forming speed and the cooling effect are further improved. Wherein, the thimble hole is used for installing thimble 2, is prior art.
The gas switching pneumatic valve 7 is mounted on the gas line assembly 6. In order to prevent the pressure of the gas introduced from the bottom from being excessively large to break the established vacuum adsorption force, a pressure regulating valve and a gas switching pneumatic valve 7 are arranged on a gas supply pipeline to regulate the gas supply pressure.
The vacuum through hole 8 is used for providing an extraction port for gas between the back surface of the wafer and the wafer carrying disc 1, is arranged on the front surface of the wafer carrying disc 1 and is positioned between two adjacent annular grooves 11 at the outermost side; the vacuum through holes 8 extend downwardly into the wafer carrier plate 1.
The part of the wafer carrier 1 surrounded by the innermost annular groove 11 is provided with a vacuum through hole 8. The outermost and innermost vacuum through holes 8 work simultaneously so that both ends of a wafer are simultaneously adsorbed on the wafer carrier 1, and a two-point positioning principle is adopted, so that the adsorption effect is good and the speed is high.
The output end of the vacuum through hole 8 is communicated with the vacuum distribution cavity 9, and the vacuum distribution cavity 9 is arranged in the wafer carrier plate 1; the vacuum distribution chamber 9 communicates with a vacuum pump.
A vacuum switch pneumatic valve 10 is mounted on the line between the vacuum distribution chamber 9 and the vacuum pump.
A wafer processing method comprising the steps of:
Step 1, conveying a wafer to a process cavity thimble 2 through a mechanical arm;
Step 2, the thimble 2 descends, and the wafer is dropped onto the wafer carrying disc 1;
step 3, opening a vacuum switch pneumatic valve 10, and extracting gas from the back surface of the wafer to adsorb the wafer on the wafer carrying disc 1;
step4, opening a gas switch pneumatic valve 7, and introducing non-process gas;
Step 5, starting a process in the process chamber;
Step 6, after the process is finished, closing the gas switch pneumatic valve 7;
Step 7, closing the vacuum switch pneumatic valve 10;
step 8, lifting the thimble 2;
and 9, taking the wafer out of the process cavity by the mechanical arm.
The foregoing is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Any person skilled in the art will make any equivalent substitution or modification to the technical solution and technical content disclosed in the invention without departing from the scope of the technical solution of the invention, and the technical solution of the invention is not departing from the scope of the invention.
Claims (8)
1. A lower electrode assembly, comprising:
The front surface of the wafer carrying disc is provided with a plurality of annular grooves, and the adjacent annular grooves are communicated through linear grooves;
The non-process gas through hole is used for introducing non-process gas, and the non-process gas overflows from the non-process gas through hole and flows out from the edge of the wafer so as to prevent plasma from being drilled into the back surface of the wafer, and is arranged in an annular groove positioned at the inner side and positioned in a linear groove; the non-process gas through hole is communicated with the output end of the gas branch, and the gas branch extends downwards out of the wafer carrying disc from the inside of the wafer carrying disc;
The vacuum through hole is used for providing an extraction port for gas between the back surface of the wafer and the wafer carrying disc, is arranged on the front surface of the wafer carrying disc and is positioned between two adjacent annular grooves at the outermost side; the vacuum through holes extend downwards into the wafer carrying disc;
The output end of the vacuum through hole is communicated with the vacuum distribution cavity, and the vacuum distribution cavity is arranged in the wafer carrying disc; the vacuum distribution cavity is communicated with the vacuum pump.
2. The bottom electrode assembly of claim 1 wherein the non-process gas through holes are located outside of the area enclosed by the top pin holes.
3. The bottom electrode assembly of claim 1 wherein the non-process gas through holes are distributed over two adjacent annular grooves.
4. The bottom electrode assembly of claim 1 wherein the wafer carrier portion surrounded by the innermost annular groove is open to vacuum through holes.
5. The bottom electrode assembly of claim 1, wherein all of the gas branches are in communication with a gas line assembly, the gas line assembly being located outside of the wafer carrier.
6. The bottom electrode assembly of claim 5 wherein the vacuum switch pneumatic valve is mounted on a line between the vacuum distribution chamber and the vacuum pump; the gas switch pneumatic valve is arranged on the gas pipeline assembly.
7. The bottom electrode assembly of claim 1 wherein the heater bar is located at an edge portion of the wafer carrier plate.
8. A method of processing a wafer, comprising the steps of:
Step1, conveying a wafer to a thimble of a process cavity through a manipulator;
Step2, the ejector pin descends, and the wafer is dropped onto the wafer carrying disc;
step 3, opening a vacuum switch pneumatic valve, and extracting gas from the back surface of the wafer to adsorb the wafer on the wafer carrying disc;
step 4, opening a gas switch pneumatic valve, and introducing non-process gas;
Step 5, starting a process in the process chamber;
step 6, after the process is finished, closing the gas switch pneumatic valve;
step 7, closing a vacuum switch pneumatic valve;
Step 8, lifting the thimble;
and 9, taking the wafer out of the process cavity by the mechanical arm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310654376.3A CN116759283B (en) | 2023-06-05 | 2023-06-05 | Bottom electrode device and wafer processing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310654376.3A CN116759283B (en) | 2023-06-05 | 2023-06-05 | Bottom electrode device and wafer processing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN116759283A CN116759283A (en) | 2023-09-15 |
| CN116759283B true CN116759283B (en) | 2024-05-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310654376.3A Active CN116759283B (en) | 2023-06-05 | 2023-06-05 | Bottom electrode device and wafer processing method |
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| Country | Link |
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| CN (1) | CN116759283B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101924012A (en) * | 2009-06-12 | 2010-12-22 | 中芯国际集成电路制造(上海)有限公司 | Method for removing organic matter and moisture on surface of wafer |
| CN109786292A (en) * | 2018-12-26 | 2019-05-21 | 华灿光电（浙江）有限公司 | The cleaning device of light-emitting diode chip for backlight unit |
| CN110299278A (en) * | 2019-06-12 | 2019-10-01 | 华灿光电(苏州）有限公司 | Plasma etching bogey and plasma etching machine |
| CN215527693U (en) * | 2021-05-12 | 2022-01-14 | 威科赛乐微电子股份有限公司 | Wafer carrier |
| CN218677100U (en) * | 2022-11-21 | 2023-03-21 | 厦门柯尔自动化设备有限公司 | Wafer flattening device capable of absorbing warping |
-
2023
- 2023-06-05 CN CN202310654376.3A patent/CN116759283B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101924012A (en) * | 2009-06-12 | 2010-12-22 | 中芯国际集成电路制造(上海)有限公司 | Method for removing organic matter and moisture on surface of wafer |
| CN109786292A (en) * | 2018-12-26 | 2019-05-21 | 华灿光电（浙江）有限公司 | The cleaning device of light-emitting diode chip for backlight unit |
| CN110299278A (en) * | 2019-06-12 | 2019-10-01 | 华灿光电(苏州）有限公司 | Plasma etching bogey and plasma etching machine |
| CN215527693U (en) * | 2021-05-12 | 2022-01-14 | 威科赛乐微电子股份有限公司 | Wafer carrier |
| CN218677100U (en) * | 2022-11-21 | 2023-03-21 | 厦门柯尔自动化设备有限公司 | Wafer flattening device capable of absorbing warping |
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| Publication number | Publication date |
|---|---|
| CN116759283A (en) | 2023-09-15 |
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