CN116743102A - Packaging structure of MEMS resonant device and manufacturing method of packaging structure - Google Patents
Packaging structure of MEMS resonant device and manufacturing method of packaging structure Download PDFInfo
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 50
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 189
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 189
- 239000010703 silicon Substances 0.000 claims abstract description 189
- 239000000758 substrate Substances 0.000 claims abstract description 77
- 238000000034 method Methods 0.000 claims abstract description 38
- 230000008021 deposition Effects 0.000 claims abstract description 19
- 239000002184 metal Substances 0.000 claims description 53
- 229910052751 metal Inorganic materials 0.000 claims description 53
- 238000005530 etching Methods 0.000 claims description 37
- 238000002955 isolation Methods 0.000 claims description 22
- 230000002093 peripheral effect Effects 0.000 claims description 22
- 238000009413 insulation Methods 0.000 claims description 13
- 230000005611 electricity Effects 0.000 claims description 7
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 3
- 230000008569 process Effects 0.000 abstract description 21
- 239000002210 silicon-based material Substances 0.000 abstract description 8
- 238000005516 engineering process Methods 0.000 description 15
- 238000009461 vacuum packaging Methods 0.000 description 15
- 238000000151 deposition Methods 0.000 description 13
- 239000007789 gas Substances 0.000 description 11
- 238000012858 packaging process Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 10
- 238000012545 processing Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 8
- 238000013461 design Methods 0.000 description 6
- 239000011521 glass Substances 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 239000011261 inert gas Substances 0.000 description 4
- 239000007769 metal material Substances 0.000 description 4
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 4
- 238000004026 adhesive bonding Methods 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000001035 drying Methods 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000010292 electrical insulation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005234 chemical deposition Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/0072—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks of microelectro-mechanical resonators or networks
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/10—Mounting in enclosures
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Abstract
The invention provides a packaging structure of an MEMS resonance device and a manufacturing method of the packaging structure, wherein the method comprises the following steps: acquiring a first silicon wafer layer as a substrate layer; acquiring a second silicon wafer layer as an MEMS resonance device, and bonding the first surface of the MEMS resonance device with the upper surface of the substrate layer; acquiring a third silicon wafer layer as a cover plate layer, and bonding the first surface of the cover plate layer with the second surface of the MEMS resonant device; and obtaining a fourth silicon wafer layer, carrying out deposition operation on the fourth silicon wafer layer to obtain a lead layer, and connecting the first surface of the lead layer with the second surface of the cover plate layer to obtain the packaging structure of the MEMS resonant device. The invention provides a packaging structure of an MEMS resonance device and a manufacturing method of the packaging structure, wherein the packaging structure comprises a cover plate layer, the MEMS resonance device and a substrate layer which are made of the same silicon-based material, the whole structure has excellent thermal adaptability, avoids thermal mismatch of the resonance device, improves performance stability, can be suitable for packaging MEMS devices of different types such as wafer level and device level, and has high process adaptability and flexibility.
Description
Technical Field
The invention relates to the technical field of MEMS (micro electro mechanical systems), in particular to a packaging structure of an MEMS resonant device and a manufacturing method of the packaging structure.
Background
With the development of microelectronic technology, MEMS microelectromechanical systems are increasingly used, and the microelectromechanical systems have movable structures, are very fragile, and generally need to be protected by vacuum packaging. The vacuum package not only has a protective effect on the MEMS resonant device, but also is a necessary condition for the MEMS resonant device to work normally in a resonant state.
Vacuum packaging can be divided into two main categories: one is a device-level vacuum package, and the other is a wafer-level vacuum package. The device-level vacuum packaging is used as a traditional packaging method, namely cutting a finished wafer into single chips, bonding and packaging in a vacuum environment, and generally adopting a ceramic tube shell, a metal tube shell, a preformed plastic tube shell and the like for cavity packaging, wherein the MEMS movable structure is easy to damage and pollute in the packaging process. The wafer-level vacuum packaging is to vacuum package the chip when the chip is still on the wafer, and finally cut the packaged whole wafer into single chips. The common wafer-level vacuum packaging mostly adopts TSV (Trough Silicon Vias), TGV (Trough Glass Vias) and other process technologies, and the two process technologies of TSV and TGV are manufactured in a three-dimensional stacked mode to form a closed cavity, and the vacuum degree of the cavity is guaranteed through the scheme of preparing the getter through the cavity. The TGV technology introduces glass materials, which have inconsistent coefficients of thermal expansion with silicon materials, thus resulting in poor thermal suitability of the device. The existing TSV process technology has the defects of high technical cost, high technical difficulty and long processing period when realizing wafer-level vacuum packaging. The TSV and TGV processes often use metal materials, such as Cu, au, etc., to fill holes, and the metal materials have different coefficients of thermal expansion from silicon and glass materials, so that the chip packaging stress is large, and the performance is affected. Meanwhile, due to the influence of the processing precision of TSV and TGV processes, the size and distribution of the through hole electrodes are limited, the flexibility of device design is poor, and particularly, the MEMS resonator with small-size multi-electrode connection lines is low.
Disclosure of Invention
In view of the above, it is desirable to provide a package structure of a MEMS resonator device and a method for manufacturing the package structure.
A method for manufacturing a packaging structure of a MEMS resonance device comprises the following steps:
acquiring a first silicon wafer layer as a substrate layer;
acquiring a second silicon wafer layer as an MEMS resonance device, and bonding the first surface of the MEMS resonance device with the upper surface of the substrate layer; the surface, which is contacted with the substrate layer, of the MEMS resonance device is a first surface, and the other surface, which is opposite to the first surface, is a second surface;
acquiring a third silicon wafer layer as a cover plate layer, and bonding the first surface of the cover plate layer with the second surface of the MEMS resonant device; the surface of the cover plate layer, which is contacted with the MEMS resonance device, is a first surface, and the other surface of the cover plate layer, which is opposite to the first surface, is a second surface;
a fourth silicon wafer layer is obtained, deposition operation is carried out on the fourth silicon wafer layer, a lead layer is obtained, and the first surface of the lead layer is connected with the second surface of the cover plate layer, so that the packaging structure of the MEMS resonant device is obtained; the surface, connected with the cover plate layer, of the lead wire layer is a first surface, and the other surface opposite to the first surface is a second surface.
In one embodiment, obtaining the first silicon wafer layer as the substrate layer includes:
and carrying out deposition operation on the first silicon wafer layer, wherein the first insulating layer is the upper surface of the substrate layer, and the first silicon wafer layer is the lower surface of the substrate layer.
In one of the embodiments of the present invention,
acquiring the second silicon wafer layer as the MEMS resonant device, and bonding the first surface of the MEMS resonant device with the upper surface of the substrate layer comprises the following steps:
acquiring a second silicon wafer layer as an MEMS resonance device, and bonding the first surface of the second silicon wafer layer with the upper surface of the substrate layer; etching the first surface of the second silicon wafer layer before bonding the second silicon wafer layer with the MEMS resonant device to form a first groove and a first wide groove; wherein, the first wide slot includes: anchor support posts, electrode support posts, and peripheral guard regions.
In one embodiment, bonding the first surface of the second silicon wafer layer to the upper surface of the substrate layer further comprises:
thinning the second surface of the second silicon wafer layer to form a resonance structure layer;
etching the resonance structure layer to form a resonance structure, a second groove and a second wide groove; the second groove and the second wide groove form a space for arranging a resonance structure;
Wherein the second wide slot comprises: the first electrode block, the second electrode block and the anchor point connecting structure;
the first electrode blocks are positioned at the left end and the right end of the MEMS resonant device;
the second electrode block is positioned between the second grooves;
the anchor point connecting structure is located at the center of the MEMS resonant device.
In one embodiment, obtaining a third silicon wafer layer as a cover plate layer, and bonding the first surface of the cover plate layer to the second surface of the MEMS resonant device includes:
acquiring a third silicon wafer layer as a cover plate layer, and bonding the first surface of the third silicon wafer layer with the second surface of the MEMS resonant device; etching the first surface of the third silicon wafer layer before bonding the third silicon wafer layer and the MEMS resonant device to form a third groove and a third wide groove; the position of the third groove corresponds to the position of a second groove in the second silicon wafer layer, and the second groove and the third groove form a cavity structure for placing a resonance structure;
wherein, the third wide slot includes: an anchor bonding surface, an electrode bonding surface, and a peripheral guard bonding surface; the anchor point bonding surface is connected with the anchor point connecting structure; the electrode bonding surface is connected with the second electrode block; the peripheral guard region bonding surface is connected to the first electrode pad.
In one embodiment, bonding the first surface of the third silicon layer to the second surface of the MEMS resonant device further comprises:
thinning the second surface of the third silicon wafer layer to form a cover plate bottom layer;
etching is carried out between the second surface of the bottom layer of the cover plate and the third groove to form a first electric isolation through groove, wherein the first electric isolation through groove is used for isolating electrode signals; the surface, which is contacted with the MEMS resonance device, of the bottom layer of the cover plate is a first surface, and the other surface, which is opposite to the first surface, is a second surface.
In one embodiment, obtaining a fourth silicon wafer layer, performing a deposition operation on the fourth silicon wafer layer to obtain a lead layer, and connecting the first surface of the lead layer with the second surface of the cover plate layer includes:
a fourth silicon wafer layer is obtained, deposition operation is carried out on the fourth silicon wafer layer to form an electric insulation layer, the electric insulation layer is connected with the second surface of the cover plate layer, the second surface of the cover plate layer is covered, and etching is carried out on the electric insulation layer to form a third groove, a third wide groove and a second electric isolation through groove; the third wide groove is used for insulation; the third groove is used for conducting electricity; the first electric isolation through groove is communicated with the second electric isolation through groove and is used for controlling the air pressure in the cavity structure;
And carrying out deposition operation on the third groove and the third wide groove to form a metal layer, and etching the metal layer to obtain a fourth wide groove, wherein the fourth wide groove is used for conducting electricity.
In one embodiment, the fourth wide slot comprises: a first metal segment, a second metal segment, and a third metal segment;
the first metal section is connected with the bonding surface of the peripheral protection area and is used for guiding out an electric signal of the first electrode block;
the second metal section is connected with the electrode bonding surface and is used for guiding out an electric signal of a second electrode block;
and the third metal segment is connected with the anchor point bonding surface and is used for deriving an electric signal of the anchor point connecting structure.
A packaging structure of a MEMS resonant device, made by a packaging structure manufacturing method of a MEMS resonant device as described above, comprising: a substrate layer, a MEMS resonant device, a cap layer, and a lead layer;
acquiring a first silicon wafer layer as a substrate layer;
acquiring a second silicon wafer layer as an MEMS resonance device, and bonding the first surface of the MEMS resonance device with the upper surface of the substrate layer; the surface, which is contacted with the substrate layer, of the second silicon wafer layer is a first surface, and the other surface, which is opposite to the first surface, is a second surface;
Acquiring a third silicon wafer layer as a cover plate layer, and bonding the first surface of the cover plate layer with the second surface of the MEMS resonant device; the surface, which is contacted with the MEMS resonance device, of the third silicon wafer layer is a first surface, and the other surface, which is opposite to the first surface, is a second surface;
and obtaining a fourth silicon wafer layer, carrying out deposition operation on the fourth silicon wafer layer to obtain a lead layer, and connecting the first surface of the lead layer with the second surface of the cover plate layer to obtain the packaging structure of the MEMS resonant device.
In one embodiment, a packaging structure of a MEMS resonant device further includes:
the substrate layer includes: a first insulating layer, a first silicon wafer layer;
the lead layer includes: a metal layer, and an electrically insulating layer.
Compared with the prior art, the invention has the advantages that: the invention provides a packaging structure of an MEMS resonance device and a manufacturing method of the packaging structure, wherein a full silicon-based sandwich structure is adopted, a cover plate layer, the MEMS resonance device and a substrate layer are all made of the same silicon-based material, the whole structure has excellent thermal adaptability, the thermal mismatch of the MEMS resonance device is avoided, and the performance stability is improved; the T-shaped electrode is formed in the cover plate layer, so that the electrode area is increased, meanwhile, the flexibility of electrode redistribution is improved, the influence of the vibration structure and bonding area of the MEMS resonant device on the electrode area of the top layer is avoided, the vibration structure device with a small gap can be packaged in the mode, and the flexibility and reliability of design are improved; the cover plate layer is provided with at least one groove, so that the resonance structure can move freely, the cover plate layer is in contact with the outside, the resonance structure is protected by the cover plate layer, and the resonance structure is prevented from being damaged in the packaging process. The lead layer is vertically interconnected with the MEMS resonant device through the cover plate layer, so that the electric signal of the resonant device is led out, the area of the whole chip is saved by the vertical interconnection mode, and the wiring flexibility is improved. The electrode connection is vertically interconnected in a three-dimensional way, so that the area of a chip is reduced, and the wiring flexibility is improved; meanwhile, the cover plate layer can be provided with vent holes as required, so that the effect of conducting the gas environment inside the cavity structure and the external gas environment can be achieved, for example, inert gas is introduced or the exhaust effect can be achieved in device-level vacuum packaging, the process is suitable for packaging MEMS devices of different types such as wafer level and device level, the process adaptability and flexibility are high, and the process technology difficulty is reduced; meanwhile, the cover plate layer is in contact with the outside, and the MEMS resonant device is protected by the cover plate layer, so that the MEMS resonant device is prevented from being damaged in the subsequent device-level packaging process.
Drawings
FIG. 1 is a flow chart of a method for manufacturing a package structure of a MEMS resonator device according to an embodiment;
FIG. 2 is a schematic diagram of a substrate layer structure in one embodiment;
FIG. 3 is a schematic illustration of etching a first surface of a second silicon wafer layer in one embodiment;
FIG. 4 is a schematic diagram of a first wide slot structure in one embodiment;
FIG. 5 is a schematic diagram of bonding a MEMS resonant device to a substrate layer in one embodiment;
FIG. 6 is a schematic illustration of thinning of a second silicon wafer layer in one embodiment;
FIG. 7 is a schematic diagram of etching of a resonant structure layer in one embodiment;
FIG. 8 is a schematic diagram of a second wide slot configuration in one embodiment;
FIG. 9 is a schematic illustration of etching of a first surface of a third silicon wafer layer in one embodiment;
FIG. 10 is a schematic diagram of a third wide slot structure in one embodiment;
FIG. 11 is a schematic diagram of bonding of a cover plate layer to a MEMS resonant device in one embodiment;
FIG. 12 is a schematic illustration of thinning of a third silicon wafer layer in one embodiment;
FIG. 13 is a schematic illustration of etching of a second surface of a bottom layer of a cover plate in one embodiment;
FIG. 14 is a schematic view of an electrical insulation layer structure in one embodiment;
FIG. 15 is a first schematic illustration of etching of an electrically insulating layer in one embodiment;
FIG. 16 is a second schematic illustration of etching of an electrically insulating layer in one embodiment;
FIG. 17 is a schematic view of a metal layer structure in one embodiment;
FIG. 18 is a schematic diagram of etching of a metal layer in one embodiment;
FIG. 19 is a schematic view of a fourth wide slot configuration in one embodiment;
FIG. 20 is a schematic diagram of a package structure of a MEMS resonant device in one embodiment;
fig. 21 is a schematic diagram illustrating a package structure of a MEMS resonant device according to an embodiment.
In the figure, 1 denotes a substrate layer, 101 denotes a first insulating layer, 102 denotes a first silicon wafer layer, 2 denotes a MEMS resonant device, 20 denotes a second silicon wafer layer, 201 denotes a first surface of the second silicon wafer layer, 202 denotes a second surface of the second silicon wafer layer, 203 denotes a first groove, 204 denotes a first wide groove, 2041 denotes an anchor support post, 2042 denotes an electrode support post, 2043 denotes a peripheral protection region, 21 denotes a resonant structure layer, 211 denotes a resonant structure, 212 denotes a second groove, 213 denotes a second wide groove, 2131 denotes a first electrode block, 2132 denotes a second electrode block, 2133 denotes an anchor connection structure, 3 denotes a cap layer, 30 denotes a third silicon wafer layer, 301 denotes a first surface of the third silicon wafer layer, 302 denotes a second surface of the third silicon wafer layer, 303 denotes a third groove, 304 denotes a third wide groove, 3041 denotes an anchor bonding surface, 3042 denotes an anchor electrode bonding surface, 3043 denotes a peripheral protection region bonding surface, 31 denotes a cap bottom layer, 311 denotes a first surface of the bottom layer, 312 denotes a second surface of the cap layer, 313 denotes a second wide groove, 4112 denotes a third wire segment, 4113 denotes a third metal segment, and 4113 denotes a third metal segment.
Detailed Description
Before proceeding with the description of the embodiments of the present invention, the general inventive concept will be described as follows:
the invention is mainly developed in the MEMS resonant device packaging process, and the vacuum packaging can be divided into two main types at present: one is a device-level vacuum package, and the other is a wafer-level vacuum package. The device-level vacuum packaging is used as a traditional packaging method, namely cutting a finished wafer into single chips, bonding and packaging in a vacuum environment, and generally adopting a ceramic tube shell, a metal tube shell, a preformed plastic tube shell and the like for cavity packaging, wherein the MEMS movable structure is easy to damage and pollute in the packaging process. The wafer-level vacuum packaging is to vacuum package the chip when the chip is still on the wafer, and finally cut the packaged whole wafer into single chips. The common wafer-level vacuum packaging mostly adopts TSV (Trough Silicon Vias), TGV (Trough Glass Vias) and other process technologies, and the two process technologies of TSV and TGV are manufactured in a three-dimensional stacked mode to form a closed cavity, and the vacuum degree of the cavity is guaranteed through the scheme of preparing the getter through the cavity. The TGV technology introduces glass materials, which have inconsistent coefficients of thermal expansion with silicon materials, thus resulting in poor thermal suitability of the device. The existing TSV process technology has the defects of high technical cost, high technical difficulty and long processing period when realizing wafer-level vacuum packaging.
The inventor finds through analysis that the main reasons for the problems are that, firstly, metal materials such as Cu, au and the like are often adopted for hole filling in TSV and TGV processes, the thermal expansion coefficients of the metal materials are different from those of silicon and glass materials, the chip packaging stress is large, the performance is affected, secondly, the size and distribution of through hole electrodes are limited due to the influence of the processing precision of the TSV and TGV processes, and the flexibility of device design is poor, particularly the MEMS resonator with small-size multi-electrode connection lines. Therefore, the foregoing problems can be avoided by optimizing the package structure. The invention provides a packaging structure of an MEMS resonance device and a manufacturing method of the packaging structure. The substrate layer plays a role in supporting the MEMS resonant device, and the device layer is of an MEMS resonant device structure and is provided with a movable suspended resonant structure, an electrode block, an anchor point connecting structure and the like. The cover plate is provided with at least one second groove with an upper concave cavity structure, so that the resonance structure can freely move, the cover plate layer is in contact with the outside, and the movable suspended resonance structure is protected by the cover plate layer, so that the movable suspended resonance structure is prevented from being damaged in the packaging process. The substrate layer, the MEMS resonant device and the cover plate layer are made of monocrystalline silicon materials, and the whole structure is excellent in thermal adaptability. The lead layer is made of conductive metal, and is vertically interconnected with the MEMS resonant device through the cover plate layer, so that an electric signal of the resonant device is led out, the area of the packaging structure of the whole MEMS resonant device is saved by a vertical interconnection mode, and the wiring flexibility is improved.
Having described the general inventive concept, the present invention will be further described in detail with reference to the accompanying drawings by way of specific embodiments thereof, in order to make the objects, technical solutions and advantages of the present invention more apparent.
It should be noted that unless otherwise defined, technical or scientific terms used in one or more embodiments of the present specification should be given the ordinary meaning as understood by one of ordinary skill in the art to which the present invention pertains. The use of the terms "first," "second," and the like in one or more implementations of the present description does not denote any order, quantity, or importance, but rather the terms "first," "second," and the like are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.
For convenience of understanding, the terms involved in the embodiments of the present invention are explained below:
MEMS: microelectromechanical systems (Micro-Electro-Mechanical System), also called microelectromechanical systems, microsystems, micromechanical etc., refer to high-tech devices with dimensions of a few millimeters or even smaller.
TSV: the through silicon via technology (Through Silicon Via) is a high density packaging technology, and vertical electrical interconnection of through silicon vias is realized through filling of conductive substances such as copper, tungsten, polysilicon and the like.
TGV: the glass through hole technology (Through Glass Via), an emerging longitudinal interconnection technology applied to the field of wafer level packaging, provides a novel technical approach for realizing interconnection with shortest chip-to-chip distance and minimum space.
In one embodiment, as shown in fig. 1, there is provided a method for manufacturing a package structure of a MEMS resonant device, including the steps of:
step S101, a first silicon wafer layer is obtained as a substrate layer.
Specifically, a heavily doped low-resistance silicon wafer is used as a first silicon wafer, and a substrate layer is made of the first silicon wafer.
In the embodiment, the heavily doped low-resistance silicon wafer is used as a base material, so that better electrical performance can be provided, and good performance can be still maintained in high-temperature, high-pressure and other environments.
On this basis, the obtaining the first silicon wafer layer as the substrate layer includes:
and carrying out deposition operation on the first silicon wafer layer, wherein the first insulating layer is the upper surface of the substrate layer, and the first silicon wafer layer is the lower surface of the substrate layer.
Specifically, the specific structure of the substrate layer is shown in fig. 2, wherein 1 represents the substrate layer, 101 represents the first insulating layer, 102 represents the first silicon wafer layer, a heavily doped low-resistance silicon wafer is selected as the first silicon wafer layer 102 of the substrate, a layer of silicon dioxide is deposited by a thermal oxidation or chemical deposition method to serve as the first insulating layer 101, and the first insulating layer 101 and the first silicon wafer layer 102 together form the substrate layer. One surface of the first insulating layer 101 is an upper surface of the substrate layer, and one surface of the first silicon wafer layer 102 is a lower surface of the substrate layer.
Step S102, a second silicon wafer layer is obtained as an MEMS resonance device, and the first surface of the MEMS resonance device is bonded with the upper surface of the substrate layer; the surface, which is contacted with the substrate layer, of the MEMS resonance device is a first surface, and the other surface, which is opposite to the first surface, is a second surface.
Specifically, the second silicon wafer layer is a heavily doped low-resistance silicon wafer, the second silicon wafer layer is used as an MEMS resonance device, the first surface of the MEMS resonance device is aligned with the upper surface of the substrate layer, and the heavily doped low-resistance silicon wafer of the MEMS resonance device is connected with the heavily doped low-resistance silicon wafer of the substrate layer in a silicon-silicon dioxide bonding mode.
On the basis, acquiring a second silicon wafer layer as the MEMS resonance device, and bonding the first surface of the MEMS resonance device and the upper surface of the substrate layer comprises the following steps:
acquiring a second silicon wafer layer as an MEMS resonance device, and bonding the first surface of the second silicon wafer layer with the upper surface of the substrate layer; etching the first surface of the second silicon wafer layer before bonding the second silicon wafer layer with the MEMS resonant device to form a first groove and a first wide groove; wherein, the first wide slot includes: anchor support posts, electrode support posts, and peripheral guard regions.
Specifically, as shown in fig. 3, the second silicon wafer layer is a heavily doped low-resistance silicon wafer, and the first surface 201 of the second silicon wafer layer is subjected to the processing procedures of gluing, exposing, developing, etching Si, photoresist removing, cleaning, drying, and the like, so as to etch an upper concave cavity, thereby forming a first groove 203. The specific first grooves 203 may have different widths, and the plurality of first grooves may have different widths. Wherein 201 denotes the first surface of the second silicon wafer layer, 202 denotes the second surface of the second silicon wafer layer, 203 denotes the first recess, 204 denotes the first wide recess.
As shown in fig. 4, the first wide groove 204 includes: anchor support posts 2041, electrode support posts 2042, and peripheral guard regions 2043.
On the basis, bonding the first surface of the second silicon wafer layer with the upper surface of the substrate layer, and then further comprising:
thinning the second surface of the second silicon wafer layer to form a resonance structure layer;
etching the resonance structure layer to form a resonance structure, a second groove and a second wide groove; the second groove and the second wide groove form a space for arranging a resonance structure.
Specifically, as shown in fig. 5, the first surface 201 of the second silicon wafer layer is bonded to the upper surface of the substrate layer, where 1 represents the substrate layer, 20 represents the second silicon wafer layer, and 201 represents the first surface of the second silicon wafer layer. Then, according to fig. 6, the second surface of the third silicon wafer layer is thinned to form a resonant structure layer 21, and according to fig. 7, the resonant structure layer 21 is etched to form a resonant structure 211, a second groove 212 and a second wide groove 213; the second groove 212 and the second wide groove 213 form a space for disposing the resonance structure 211. The specific second grooves 212 may have different widths, and the plurality of second grooves 212 may have different widths. Wherein 1 denotes a substrate layer, 2 denotes a MEMS resonant device, 211 denotes a resonant structure, 212 denotes a second groove, and 213 denotes a second wide groove.
On this basis, the second wide groove includes: the first electrode block, the second electrode block and the anchor point connecting structure;
the first electrode blocks are positioned at the left end and the right end of the MEMS resonant device;
the second electrode block is positioned between the second grooves;
the anchor point connecting structure is located at the center of the MEMS resonant device.
Specifically, as shown in fig. 8, the second wide groove 213 includes a first electrode block 2131, a second electrode block 2132, and an anchor point connection structure 2133, the first electrode block 2131 is located at the left and right ends of the MEMS resonant device, the second electrode block 2132 is located between the plurality of second grooves, and the anchor point connection structure 2133 is located at the center of the MEMS resonant device.
Step S103, a third silicon wafer layer is obtained as a cover plate layer, and the first surface of the cover plate layer is bonded with the second surface of the MEMS resonant device; the surface of the cover plate layer, which is contacted with the MEMS resonance device, is a first surface, and the other surface of the cover plate layer, which is opposite to the first surface, is a second surface.
Specifically, the third silicon wafer layer is a heavily doped low-resistance silicon wafer, the third silicon wafer layer is used as a cover plate layer, the first surface of the cover plate layer is aligned with the second surface of the MEMS resonance device, and the cover plate layer heavily doped low-resistance silicon wafer is connected with the MEMS resonance device heavily doped low-resistance silicon wafer in a silicon-silicon dioxide bonding mode.
On the basis, acquiring a third silicon wafer layer as a cover plate layer, and bonding the first surface of the cover plate layer and the second surface of the MEMS resonant device comprises the following steps:
acquiring a third silicon wafer layer as a cover plate layer, and bonding the first surface of the third silicon wafer layer with the second surface of the MEMS resonant device; etching the first surface of the third silicon wafer layer before bonding the third silicon wafer layer and the MEMS resonant device to form a third groove and a third wide groove; the position of the third groove corresponds to the position of a second groove in the second silicon wafer layer, and the second groove and the third groove form a cavity structure for placing a resonance structure;
wherein, the third wide slot includes: an anchor bonding surface, an electrode bonding surface, and a peripheral guard bonding surface; the anchor point bonding surface is connected with the anchor point connecting structure; the electrode bonding surface is connected with the second electrode block; the peripheral protection region bonding surface is connected with the first electrode block.
Specifically, the first surface 301 of the third silicon wafer is bonded to the second surface of the MEMS resonator device, and before that, the first surface 301 of the third silicon wafer layer 30 is etched according to fig. 9, so as to form a third groove 303 and a third wide groove 304. Wherein 30 denotes a third silicon wafer layer, 301 denotes a first surface of the third silicon wafer layer 30, 302 denotes a second surface of the third silicon wafer layer 30, 303 denotes a third groove, and 304 denotes a third wide groove. The position of the third groove 303 corresponds to the position of the second groove 212 in the second silicon wafer layer, and the second groove 212 and the third groove 303 form a cavity structure for placing the resonant structure 211. The specific third grooves 303 may have different widths, and the plurality of third grooves 303 may have different widths.
As shown in fig. 10, the third wide groove 304 includes: an anchor bonding surface 3041, an electrode bonding surface 3042, and a peripheral guard region bonding surface 3043; the anchor bonding surface 3041 is connected with an anchor connecting structure 2133; the electrode bonding surface 3042 is connected to the second electrode block 2132; the peripheral guard region bonding surface 3043 is connected to the first electrode block 2131.
In the embodiment, a full silicon-based sandwich structure is adopted, and the cover plate layer, the MEMS resonant device and the substrate layer are all made of the same silicon-based material, so that thermal mismatch of the MEMS resonant device is avoided, and performance stability is improved.
On the basis, bonding the first surface of the third silicon wafer layer with the second surface of the MEMS resonant device, and then further comprising:
thinning the second surface of the third silicon wafer layer to form a cover plate bottom layer;
etching is carried out between the second surface of the bottom layer of the cover plate and the upper surface of the third groove to form a first electric isolation through groove, and the first electric isolation through groove is used for isolating electrode signals; the surface, which is contacted with the MEMS resonance device, of the bottom layer of the cover plate is a first surface, and the other surface, which is opposite to the first surface, is a second surface.
Specifically, according to fig. 11, a first surface of a third silicon wafer layer is bonded to a second surface of the MEMS resonator device, wherein 1 represents a substrate layer, 2 represents the MEMS resonator device, 30 represents the third silicon wafer layer, 301 represents the first surface of the third silicon wafer layer, and 302 represents the second surface of the third silicon wafer layer.
Then, according to fig. 12, the second surface 301 of the third silicon wafer layer is thinned to form a cover substrate layer 31, where 1 represents the substrate layer, 2 represents the MEMS resonant device, 31 represents the cover substrate layer, 311 represents the first surface of the cover substrate layer, and 312 represents the second surface of the cover substrate layer.
Then, as shown in fig. 13, etching is performed between the second surface 312 of the cover bottom layer 31 and the third groove 303, so as to form a first electrically isolated via 313, where the first electrically isolated via 313 is used to isolate an electrode signal. Wherein 1 denotes a substrate layer, 2 denotes a MEMS resonant device, 3 denotes a cover plate layer, 313 denotes a first electrically isolated via.
In the embodiment, the T-shaped electrode is formed in the cover plate layer, so that the electrode area is increased, meanwhile, the flexibility of electrode redistribution is improved, the influence of the vibration structure and the bonding area of the MEMS resonant device on the electrode area of the top layer is avoided, the vibration structure device with a small gap can be packaged in the mode, and the flexibility and the reliability of design are improved.
Step S104, a fourth silicon wafer layer is obtained, deposition operation is carried out on the fourth silicon wafer layer, a lead layer is obtained, and the first surface of the lead layer is connected with the second surface of the cover plate layer, so that the packaging structure of the MEMS resonant device is obtained; the surface, connected with the cover plate layer, of the lead wire layer is a first surface, and the other surface opposite to the first surface is a second surface.
Specifically, a lead layer is obtained through a chemical vapor deposition mode, and the first surface of the lead layer is connected with the second surface of the cover plate layer to obtain the packaging structure of the MEMS resonant device.
On the basis, a fourth silicon wafer layer is obtained, deposition operation is carried out on the fourth silicon wafer layer, a lead layer is obtained, and the connection of the first surface of the lead layer and the second surface of the cover plate layer comprises the following steps:
a fourth silicon wafer layer is obtained, deposition operation is carried out on the fourth silicon wafer layer to form an electric insulation layer, the electric insulation layer is connected with the second surface of the cover plate layer, the second surface of the cover plate layer is covered, and etching is carried out on the electric insulation layer to form a third groove, a third wide groove and a second electric isolation through groove; the third wide groove is used for insulation; the third groove is used for conducting electricity; the first electric isolation through groove is communicated with the second electric isolation through groove and is used for controlling the air pressure in the cavity structure;
and carrying out deposition operation on the third groove and the third wide groove to form a metal layer, and etching the metal layer to form a fourth wide groove, wherein the fourth wide groove is used for conducting electricity.
Specifically, as shown in FIG. 14, siO is deposited by chemical vapor deposition 2 An electrically insulating layer 40, siO 2 As shown in fig. 15 and 16, the SiO2 electrically insulating layer 40 is etched to form a third groove 401, a third wide groove 402, and a second electrically insulating through groove 403, where the electric signal can be led out is exposed, and the unetched portion plays an insulating role to avoid short circuit between signals. The second electrically isolated through-slot 403 communicates the gaseous environment within the internal cavity structure of the resonant structure with the ambient gaseous environment for subsequent control of the gas pressure within the internal cavity structure of the device-level package.
As shown in fig. 17, a metal layer is deposited as a metal layer 41, the metal layer 41 is etched as shown in fig. 18, a fourth wide slot 411 is obtained by etching, the silicon chip of the cover plate layer 3 and the lead layer 4 are connected to the silicon chip of the MEMS resonant device, internal signals are led out, vertical interconnection is carried out for electric signal transmission, and the signals are connected with an external circuit processing module through the fourth wide slot 411.
On this basis, the fourth wide groove includes: a first metal segment, a second metal segment, and a third metal segment;
the first metal section is connected with the bonding surface of the peripheral protection area and is used for guiding out an electric signal of the first electrode block;
the second metal section is connected with the electrode bonding surface and is used for guiding out an electric signal of a second electrode block;
And the third metal segment is connected with the anchor point bonding surface and is used for deriving an electric signal of the anchor point connecting structure.
Specifically, as shown in fig. 19, the fourth wide slot 411 includes: the first metal segment 4111, the second metal segment 4112, and the third metal segment 4113, the first metal segment 4111 being connected to the peripheral guard region bonding surface 3043 for deriving an electrical signal of the first electrode block; the second metal segment 4112 is connected to the electrode bonding surface 3042 for deriving an electrical signal of the second electrode block; the third metal segment 4113 is connected to the anchor bonding surface 3041, and is used for deriving an electrical signal of the anchor connection structure.
In the embodiment, the second electric isolation through groove can be reserved on the cover plate layer according to the requirement, so that the effect of conducting the gas environment inside the cavity structure and the external gas environment is achieved, for example, inert gas is introduced or an exhaust effect can be achieved in device-level vacuum packaging. The electrode connection is vertically interconnected in a three-dimensional mode, the area of the chip is reduced, and wiring flexibility is improved. The cover plate is in contact with the outside, and the MEMS resonance device is protected by the cover plate, so that the MEMS resonance device is prevented from being damaged in the packaging process.
The invention provides a packaging structure of an MEMS resonance device and a manufacturing method of the packaging structure, wherein a full silicon-based sandwich structure is adopted, a cover plate layer, the MEMS resonance device and a substrate layer are all made of the same silicon-based material, the whole structure has excellent thermal adaptability, the thermal mismatch of the MEMS resonance device is avoided, and the performance stability is improved; the T-shaped electrode is formed in the cover plate layer, so that the electrode area is increased, meanwhile, the flexibility of electrode redistribution is improved, the influence of the vibration structure and bonding area of the MEMS resonant device on the electrode area of the top layer is avoided, the vibration structure device with a small gap can be packaged in the mode, and the flexibility and reliability of design are improved; the cover plate layer is provided with at least one groove, so that the resonance structure can move freely, the cover plate layer is in contact with the outside, the resonance structure is protected by the cover plate layer, and the resonance structure is prevented from being damaged in the packaging process. The lead layer is vertically interconnected with the MEMS resonant device through the cover plate layer, so that the electric signal of the resonant device is led out, the area of the whole chip is saved by the vertical interconnection mode, and the wiring flexibility is improved. The electrode connection is vertically interconnected in a three-dimensional way, so that the area of a chip is reduced, and the wiring flexibility is improved; meanwhile, the cover plate layer can be provided with vent holes as required, so that the effect of conducting the gas environment inside the cavity structure and the external gas environment can be achieved, for example, inert gas is introduced or the exhaust effect can be achieved in device-level vacuum packaging, the process is suitable for packaging MEMS devices of different types such as wafer level and device level, the process adaptability and flexibility are high, and the process technology difficulty is reduced; meanwhile, the cover plate layer is in contact with the outside, and the MEMS resonant device is protected by the cover plate layer, so that the MEMS resonant device is prevented from being damaged in the subsequent device-level packaging process.
It should be noted that the foregoing describes some embodiments of the present invention. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the embodiments described above and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results.
Based on the same inventive concept, the present invention also provides a packaging structure of a MEMS resonant device, corresponding to the method of any of the above embodiments, as shown in fig. 20, including: a substrate layer 1, a MEMS resonant device 2, a cap layer 3, and a lead layer 4;
acquiring a first silicon wafer layer as a substrate layer 1;
acquiring a second silicon wafer layer as an MEMS resonance device 2, and bonding the first surface of the MEMS resonance device 2 with the upper surface of the substrate layer 1; the surface, which is contacted with the substrate layer 1, of the second silicon wafer layer is a first surface, and the other surface, which is opposite to the first surface, is a second surface;
acquiring a third silicon wafer layer as a cover plate layer 3, and bonding the first surface of the cover plate layer 3 with the second surface of the MEMS resonant device 2; the surface, which is contacted with the MEMS resonance device 2, of the third silicon wafer layer is a first surface, and the other surface, which is opposite to the first surface, is a second surface;
And obtaining a fourth silicon wafer layer, performing deposition operation on the fourth silicon wafer layer to obtain a lead layer 4, and connecting the first surface of the lead layer 4 with the second surface of the cover plate layer 3 to obtain the packaging structure of the MEMS resonant device.
A packaging structure of a MEMS resonant device, further comprising:
the substrate layer 1 includes: a first insulating layer 101 and a first silicon wafer layer 102;
the lead layer 4 includes: a metal layer 41, and an electrically insulating layer 40.
The package structure of the MEMS resonant device in the foregoing embodiment is manufactured by the method for manufacturing the package structure of the MEMS resonant device in any of the foregoing embodiments, and has the beneficial effects of the corresponding method embodiments, which are not described herein again.
The technical solutions of the present invention will be clearly and completely described in the following in connection with the embodiments of the present invention. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
As shown in fig. 21, a specific implementation procedure of a method for manufacturing a package structure of a MEMS resonator device is as follows:
The first silicon wafer layer 102 is a heavily doped monocrystalline silicon wafer, the first silicon wafer 102 layer is used as a substrate layer 1, the resistivity of the substrate layer 1 is 0.001-0.1 omega CM, the thickness is 300-725 mu m, and 0.5-3 mu mSiO is grown on the surface of the first silicon wafer layer 102 by thermal oxidation or PECVD 2 As the first insulating layer 101, the first insulating layer 101 and the first silicon wafer layer 102 together constitute the substrate layer 1.
The second silicon wafer layer is a heavily doped monocrystalline silicon wafer, the second silicon wafer layer is used as an MEMS resonance device 2, the resistivity of the MEMS resonance device 2 is 0.001-0.1Ω & ltCM, the thickness is 300-725 μm, the first surface of the second silicon wafer layer is subjected to the processing procedures of gluing, exposing, developing, etching Si, photoresist removing, cleaning, drying and the like, and an upper concave cavity is etched to form a first groove, the depth of the first groove is 5-50 μm, and a first wide groove comprises: anchor support posts, electrode support posts, and peripheral guard regions. And then bonding the first surface of the second silicon wafer layer with the upper surface of the substrate layer, and thinning the second silicon wafer layer 2 (except for the depth of the groove) to 10-100 mu m after bonding to form a resonance structure layer. Etching the resonance structure layer to divide the resonance structure layer into a suspended movable resonance structure, a second groove and a second wide groove; the second groove and the second wide groove form a space for arranging the resonance structure. The second wide slot includes: the first electrode block, the second electrode block and the anchor point connecting structure; the first electrode blocks are positioned at the left end and the right end of the MEMS resonance device 2; the second electrode blocks are positioned among the second grooves; the anchor point connection structure is located at the center of the MEMS resonator device 2.
The second silicon wafer layer is a heavily doped monocrystalline silicon wafer, the first silicon wafer layer is used as a cover plate layer 3, the resistivity of the cover plate layer 3 is 0.001-0.1Ω×CM, the thickness is 300-725 μm, the first surface of the third silicon wafer layer is subjected to the processing procedures of gluing, exposing, developing, etching Si, photoresist removing, cleaning, drying and the like, a third groove with an upper concave cavity is etched, the depth is 2-20 μm, and a third wide groove comprises: an anchor bonding surface, an electrode bonding surface, and a peripheral guard bonding surface; the anchor point bonding surface is connected with the anchor point connecting structure; the electrode bonding surface is connected with the second electrode block; the peripheral guard region bonding surface is connected to the first electrode pad. The position of the third groove corresponds to the position of the second groove in the second silicon wafer layer, and the second groove and the third groove form a cavity structure for placing the resonance structure. And bonding the first surface of the third silicon wafer layer with the second surface of the MEMS resonant device 2, thinning the bottom layer of the cover plate (except the depth of the groove) to 20-40 mu m after bonding, etching the bottom layer of the cover plate, etching a first electric isolation through groove of 1-2 mu m, and isolating electric signals of different electrodes by the first electric isolation through groove, and simultaneously conducting the gas environment inside the cavity structure and the external gas environment by the first electric isolation through groove.
SiO with the width 1-2 times of the isolation through groove is deposited by chemical vapor deposition 2 An electrically insulating layer 40, siO 2 Covering the first electrically isolated via, etching SiO 2 An electrically insulating layer 40 exposing the electric signal lead-out position, forming a third recess; the third wide groove is used for insulation; the third groove is used for conducting electricity; the first electric isolation through groove is communicated with the second electric isolation through groove and is used for controllingAnd (3) making the air pressure in the cavity structure, wherein the part which is not etched plays an insulating role for the third wide groove, so that short circuit between signals is avoided. Depositing a layer of 1-3 μm metal as metal layer 41, etching metal layer 41 to form a fourth wide trench, the fourth wide trench comprising: a first metal segment, a second metal segment, and a third metal segment; the first metal section is connected with the bonding surface of the peripheral protection area and is used for guiding out an electric signal of the first electrode block; the second metal section is connected with the electrode bonding surface and is used for guiding out an electric signal of the second electrode block; the third metal segment is connected with the anchor point bonding surface and is used for deriving an electric signal of the anchor point connecting structure. The electrical insulation layer 40 and the metal layer 41 together form a lead layer 4, the low-resistance silicon of the cover plate and the lead layer 4 is connected to the silicon chip of the MEMS resonant device 2, internal signals are led out, vertical interconnection is used for electric signal transmission, and the electrode and the external circuit processing module are connected through a fourth wide groove. Etching SiO 2 An electrically isolating layer 40 covering part of the SiO of the first electrically isolating through slot 2 Etching to expose the second electrically isolated through groove to enable the air environment of the cavity structure inner cavity to be communicated with the external air environment, so that the air pressure of the cavity structure inner cavity of the subsequent device-level packaging chip can be controlled.
The invention provides a packaging structure of an MEMS resonance device and a manufacturing method of the packaging structure, wherein a full silicon-based sandwich structure is adopted, a cover plate layer, the MEMS resonance device and a substrate layer are all made of the same silicon-based material, the whole structure has excellent thermal adaptability, the thermal mismatch of the MEMS resonance device is avoided, and the performance stability is improved; the T-shaped electrode is formed in the cover plate layer, so that the electrode area is increased, meanwhile, the flexibility of electrode redistribution is improved, the influence of the vibration structure and bonding area of the MEMS resonant device on the electrode area of the top layer is avoided, the vibration structure device with a small gap can be packaged in the mode, and the flexibility and reliability of design are improved; the cover plate layer is provided with at least one groove, so that the resonance structure can move freely, the cover plate layer is in contact with the outside, the resonance structure is protected by the cover plate layer, and the resonance structure is prevented from being damaged in the packaging process. The lead layer is vertically interconnected with the MEMS resonant device through the cover plate layer, so that the electric signal of the resonant device is led out, the area of the whole chip is saved by the vertical interconnection mode, and the wiring flexibility is improved. The electrode connection is vertically interconnected in a three-dimensional way, so that the area of a chip is reduced, and the wiring flexibility is improved; meanwhile, the cover plate layer can be provided with vent holes as required, so that the effect of conducting the gas environment inside the cavity structure and the external gas environment can be achieved, for example, inert gas is introduced or the exhaust effect can be achieved in device-level vacuum packaging, the process is suitable for packaging MEMS devices of different types such as wafer level and device level, the process adaptability and flexibility are high, and the process technology difficulty is reduced; meanwhile, the cover plate layer is in contact with the outside, and the MEMS resonant device is protected by the cover plate layer, so that the MEMS resonant device is prevented from being damaged in the subsequent device-level packaging process.
Those of ordinary skill in the art will appreciate that: the discussion of any of the embodiments above is merely exemplary and is not intended to suggest that the scope of the invention (including the claims) is limited to these examples; the technical features of the above embodiments or in the different embodiments may also be combined within the idea of the invention, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity.
The present embodiments are intended to embrace all such alternatives, modifications and variances which fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, and the like, which are within the spirit and principles of the embodiments of the invention, are intended to be included within the scope of the invention.
Claims (10)
1. A method of manufacturing a package structure for a MEMS resonant device, comprising:
acquiring a first silicon wafer layer as a substrate layer;
acquiring a second silicon wafer layer as an MEMS resonance device, and bonding the first surface of the MEMS resonance device with the upper surface of the substrate layer; the surface, which is contacted with the substrate layer, of the MEMS resonance device is a first surface, and the other surface, which is opposite to the first surface, is a second surface;
Acquiring a third silicon wafer layer as a cover plate layer, and bonding the first surface of the cover plate layer with the second surface of the MEMS resonant device; the surface of the cover plate layer, which is contacted with the MEMS resonance device, is a first surface, and the other surface of the cover plate layer, which is opposite to the first surface, is a second surface;
a fourth silicon wafer layer is obtained, deposition operation is carried out on the fourth silicon wafer layer, a lead layer is obtained, and the first surface of the lead layer is connected with the second surface of the cover plate layer, so that the packaging structure of the MEMS resonant device is obtained; the surface, connected with the cover plate layer, of the lead wire layer is a first surface, and the other surface opposite to the first surface is a second surface.
2. The method for manufacturing a package structure of a MEMS resonator device according to claim 1, wherein the obtaining the first silicon wafer layer as the substrate layer comprises:
and carrying out deposition operation on the first silicon wafer layer, wherein the first insulating layer is the upper surface of the substrate layer, and the first silicon wafer layer is the lower surface of the substrate layer.
3. The method of manufacturing a package structure for a MEMS resonator device according to claim 1, wherein the obtaining the second silicon wafer layer as the MEMS resonator device, bonding the first surface of the MEMS resonator device to the upper surface of the substrate layer comprises:
Acquiring a second silicon wafer layer as an MEMS resonance device, and bonding the first surface of the second silicon wafer layer with the upper surface of the substrate layer; etching the first surface of the second silicon wafer layer before bonding the second silicon wafer layer with the MEMS resonant device to form a first groove and a first wide groove; wherein, the first wide slot includes: anchor support posts, electrode support posts, and peripheral guard regions.
4. A method of fabricating a package structure for a MEMS resonator device according to claim 3, wherein bonding the first surface of the second silicon layer to the upper surface of the substrate layer further comprises:
thinning the second surface of the second silicon wafer layer to form a resonance structure layer;
etching the resonance structure layer to form a resonance structure, a second groove and a second wide groove; the second groove and the second wide groove form a space for arranging a resonance structure;
wherein the second wide slot comprises: the first electrode block, the second electrode block and the anchor point connecting structure;
the first electrode blocks are positioned at the left end and the right end of the MEMS resonant device;
the second electrode block is positioned between the second grooves;
The anchor point connecting structure is located at the center of the MEMS resonant device.
5. The method of manufacturing a package structure for a MEMS resonator device according to claim 4, wherein the obtaining a third silicon wafer layer as a cap layer, bonding a first surface of the cap layer to a second surface of the MEMS resonator device comprises:
acquiring a third silicon wafer layer as a cover plate layer, and bonding the first surface of the third silicon wafer layer with the second surface of the MEMS resonant device; etching the first surface of the third silicon wafer layer before bonding the third silicon wafer layer and the MEMS resonant device to form a third groove and a third wide groove; the position of the third groove corresponds to the position of a second groove in the second silicon wafer layer, and the second groove and the third groove form a cavity structure for placing a resonance structure;
wherein, the third wide slot includes: an anchor bonding surface, an electrode bonding surface, and a peripheral guard bonding surface; the anchor point bonding surface is connected with the anchor point connecting structure; the electrode bonding surface is connected with the second electrode block; the peripheral protection region bonding surface is connected with the first electrode block.
6. The method of manufacturing a package structure for a MEMS resonator device according to claim 5, wherein bonding the first surface of the third silicon layer to the second surface of the MEMS resonator device further comprises:
thinning the second surface of the third silicon wafer layer to form a cover plate bottom layer;
etching is carried out between the second surface of the bottom layer of the cover plate and the third groove to form a first electric isolation through groove, wherein the first electric isolation through groove is used for isolating electrode signals; the surface, which is contacted with the MEMS resonance device, of the bottom layer of the cover plate is a first surface, and the other surface, which is opposite to the first surface, is a second surface.
7. The method for manufacturing a package structure of a MEMS resonator device according to claim 6, wherein the obtaining a fourth silicon wafer layer, performing a deposition operation on the fourth silicon wafer layer to obtain a lead layer, and connecting a first surface of the lead layer with a second surface of the cover plate layer comprises:
a fourth silicon wafer layer is obtained, deposition operation is carried out on the fourth silicon wafer layer to form an electric insulation layer, the electric insulation layer is connected with the second surface of the cover plate layer, the second surface of the cover plate layer is covered, and etching is carried out on the electric insulation layer to form a third groove, a third wide groove and a second electric isolation through groove; the third wide groove is used for insulation; the third groove is used for conducting electricity; the first electric isolation through groove is communicated with the second electric isolation through groove and is used for controlling the air pressure in the cavity structure;
And carrying out deposition operation on the third groove and the third wide groove to form a metal layer, and etching the metal layer to obtain a fourth wide groove, wherein the fourth wide groove is used for conducting electricity.
8. The method of manufacturing a package structure for a MEMS resonator device of claim 7 wherein the fourth wide slot comprises: a first metal segment, a second metal segment, and a third metal segment;
the first metal section is connected with the bonding surface of the peripheral protection area and is used for guiding out an electric signal of the first electrode block;
the second metal section is connected with the electrode bonding surface and is used for guiding out an electric signal of a second electrode block;
and the third metal segment is connected with the anchor point bonding surface and is used for deriving an electric signal of the anchor point connecting structure.
9. A packaging structure of a MEMS resonator device, characterized by being manufactured by a manufacturing method of a packaging structure of a MEMS resonator device as claimed in claims 1 to 8, comprising: a substrate layer, a MEMS resonant device, a cap layer, and a lead layer;
acquiring a first silicon wafer layer as a substrate layer;
acquiring a second silicon wafer layer as an MEMS resonance device, and bonding the first surface of the MEMS resonance device with the upper surface of the substrate layer; the surface, which is contacted with the substrate layer, of the second silicon wafer layer is a first surface, and the other surface, which is opposite to the first surface, is a second surface;
Acquiring a third silicon wafer layer as a cover plate layer, and bonding the first surface of the cover plate layer with the second surface of the MEMS resonant device; the surface, which is contacted with the MEMS resonance device, of the third silicon wafer layer is a first surface, and the other surface, which is opposite to the first surface, is a second surface;
and obtaining a fourth silicon wafer layer, carrying out deposition operation on the fourth silicon wafer layer to obtain a lead layer, and connecting the first surface of the lead layer with the second surface of the cover plate layer to obtain the packaging structure of the MEMS resonant device.
10. The package structure of a MEMS resonator device of claim 9 further comprising:
the substrate layer includes: a first insulating layer, a first silicon wafer layer;
the lead layer includes: a metal layer, and an electrically insulating layer.
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