CN116662239A - High-speed serial interface device - Google Patents

High-speed serial interface device Download PDF

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Publication number
CN116662239A
CN116662239A CN202310956869.2A CN202310956869A CN116662239A CN 116662239 A CN116662239 A CN 116662239A CN 202310956869 A CN202310956869 A CN 202310956869A CN 116662239 A CN116662239 A CN 116662239A
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China
Prior art keywords
transceiver
port
transformer
switch
bus
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Granted
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CN202310956869.2A
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CN116662239B (en
Inventor
谈树峰
刘银栋
房丽丽
魏江龙
左洋
杨丽丽
谢刚强
应子罡
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Beijing Tasson Science and Technology Co Ltd
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Beijing Tasson Science and Technology Co Ltd
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Priority to CN202310956869.2A priority Critical patent/CN116662239B/en
Publication of CN116662239A publication Critical patent/CN116662239A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Dc Digital Transmission (AREA)
  • Communication Control (AREA)

Abstract

The application provides a high-speed serial interface device, which relates to the technical field of digital information transmission, and comprises: the device comprises a first transceiver, a second transceiver, a transformer module and an independent power supply; the first transceiver is connected with the digital control module; the second transceiver is connected with the bus; the transformer module is arranged between the first transceiver and the second transceiver and is used for transmitting baseband data between the first transceiver and the second transceiver; the independent power supply is connected with the second transceiver and is used for supplying power to the second transceiver. The high-speed serial interface device provided by the application supplies power to the second transceiver through the independent power supply, so that the problem of primary and secondary isolation of a transformer connected with a cable is avoided, normal transmission of baseband data is ensured, and the transmission stability is improved.

Description

High-speed serial interface device
Technical Field
The present application relates to the field of digital information transmission technologies, and in particular, to a high-speed serial interface device.
Background
The bus structure is to mount all nodes on a bus. When the bus branch line is too long, bit width is easy to be offset, so that the receiving node receives errors, in order to ensure that the impedance is continuous by minimizing the branch length, the node device should be placed close to the interface, but the too short branch line limits the use of users.
The prior art adopts a method of pre-transceiver and digital control separation to solve the problem of limitation of branch line length, wherein two pairs of differential lines are used for supplying power by using a transformer center tap, but the method can cause a transformer isolation problem, and common mode interference from a cable can destroy the transceiver, so that baseband data cannot be normally transmitted.
Disclosure of Invention
The embodiment of the application provides a high-speed serial interface device which is used for solving the technical problem of poor stability of high-speed data transmission networking baseband data transmission in the prior art.
In a first aspect, an embodiment of the present application provides a high-speed serial interface device, including:
the device comprises a first transceiver, a second transceiver, a transformer module and an independent power supply;
the first transceiver is connected with the digital control module; the second transceiver is connected with the bus; the transformer module is arranged between the first transceiver and the second transceiver and is used for transmitting baseband data between the first transceiver and the second transceiver; the independent power supply is connected with the second transceiver and is used for supplying power to the second transceiver.
In some embodiments, the transformer module includes a first transformer and a second transformer;
wherein the first port of the first transformer is connected with the first transmitter output port of the first transceiver and with the first receiver input port of the first transceiver; the second port of the first transformer is connected with the second transmitter output port of the first transceiver and is connected with the second receiver input port of the first transceiver; the first transformer is connected with the second transformer; the first port of the second transformer is connected with the first transmitter input port of the second transceiver and is connected with the first receiver output port of the second transceiver; the second port of the second transformer is connected to the second transmitter input port of the second transceiver and to the second receiver output port of the second transceiver.
In some embodiments, the first port of the first transformer is connected to a first port of a first load resistor; the second port of the first transformer is connected with the first port of the second load resistor; the common port of the first load resistor and the second load resistor is connected with a first power supply voltage; the first power supply voltage is used for providing an output voltage to the first transceiver.
In some embodiments, a first switch is disposed between a first transmitter output port of the first transceiver and a first port of the first transformer; a second switch is arranged between a second transmitter output port of the first transceiver and a second port of the first transformer; the first switch and the second switch are turned on when the first transceiver transmits baseband data to the bus, and turned off when the first transceiver receives the baseband data transmitted by the bus.
In some embodiments, a first blocking capacitor is disposed between a first receiver input port of the first transceiver and a first port of the first transformer; a second blocking capacitor is arranged between the second receiver input port of the first transceiver and the second port of the first transformer.
In some embodiments, the first port of the second transformer is connected to the first port of the third load resistor; the second port of the second transformer is connected with the first port of the fourth load resistor; the common port of the third load resistor and the fourth load resistor is connected with a second power supply voltage; the second power supply voltage is used for providing an output voltage to the second transceiver.
In some embodiments, a third switch is disposed between the first receiver output port of the second transceiver and the first port of the second transformer; a fourth switch is arranged between the second receiver output port of the second transceiver and the second port of the second transformer; the third switch and the fourth switch are turned off when the second transceiver transmits baseband data to the bus, and turned on when the second transceiver receives the baseband data transmitted by the bus.
In some embodiments, a third blocking capacitor is disposed between the first transmitter input port of the second transceiver and the first port of the second transformer; a fourth blocking capacitor is arranged between the second transmitter input port of the second transceiver and the second port of the second transformer.
In some embodiments, a third transformer is provided between the second transceiver and the bus.
In some embodiments, a fifth switch is disposed between the first transmitter output port of the second transceiver and the first port of the third transformer; a sixth switch is arranged between the second transmitter output port of the second transceiver and the second port of the third transformer; the fifth switch and the sixth switch are turned on when the second transceiver transmits baseband data to the bus, and turned off when the second transceiver receives the baseband data transmitted by the bus.
The high-speed serial interface device provided by the application comprises the first transceiver, the second transceiver, the transformer module and an independent power supply, wherein the transformer module is arranged between the first transceiver and the second transceiver to transmit baseband data, and the independent power supply is used for supplying power to the second transceiver, so that the problem of primary and secondary isolation of a transformer connected with a cable is avoided, normal transmission of the baseband data is ensured, and the stability of transmission is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a high-speed serial interface device according to an embodiment of the present application;
FIG. 2 is a second schematic diagram of a high-speed serial interface device according to an embodiment of the present application;
FIG. 3 is a third schematic diagram of a high-speed serial interface device according to an embodiment of the present application.
Detailed Description
In order to increase the transmission rate and increase the transmission distance, the conventional high-speed data transmission networking generally carries out multicarrier modulation such as orthogonal frequency division multiplexing (Orthogonal Frequency Division Multiplexing, OFDM) on baseband data, even carries out carrier frequency conversion, and uses a radio frequency transceiver to transmit signals, which greatly increases the complexity of the high-speed data transmission networking.
The contradiction between the length of the branch line and the working frequency of the signal in the traditional bus type structure can be solved by adopting the front-end transceiver to drive the branch line, but the high-speed front-end transceiver is very close to the bus entrance, for power supply, two pairs of differential lines are adopted in the prior art, one pair is for receiving, the other pair is for transmitting, and the middle tap of the transformer is used for supplying power, but as the tap of the secondary of the transformer is connected with the power supply and the ground end of the primary chip of the transformer, the isolation of the primary and the secondary of the transformer is deteriorated, so that the common mode interference from the cable directly affects the power supply and the ground end of the primary chip of the transformer, thereby causing the damage of the transceiver and the failure of smooth transmission of baseband data.
Based on the technical problems, the embodiment of the application provides a high-speed serial interface device, which is characterized in that an independent power supply is additionally arranged to provide power for a second transceiver, so that the problem of transformer isolation is solved while power supply is ensured, and normal transmission of high-speed differential serial baseband data in networking is ensured.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Fig. 1 is a schematic structural diagram of a high-speed serial interface device according to an embodiment of the present application, as shown in fig. 1, the embodiment of the present application provides a high-speed serial interface device, which includes:
a first transceiver 100, a second transceiver 110, a transformer module 120, and an independent power supply 130;
wherein the first transceiver 100 is connected to a digital control module 140; the second transceiver 110 is connected to the bus 150; the transformer module 120 is disposed between the first transceiver 100 and the second transceiver 110, and is configured to transmit baseband data between the first transceiver 100 and the second transceiver 110; the independent power supply 130 is connected to the second transceiver 110 for supplying power to the second transceiver 110.
Specifically, the digital control module 140 includes a transmitting end and a receiving end, which are respectively used for transmitting high-speed differential serial baseband data and receiving high-speed differential serial baseband data.
The transmitter input port of the first transceiver 100 is connected to the transmit port of the digital control module 140 and the receiver output port of the first transceiver 100 is connected to the receive port of the digital control module 140.
The second transceiver 110 is connected to the bus 150. Wherein the transmitter output port and the receiver input port of the second transceiver 110 are connected to the bus 150.
The transformer module 120 may include a plurality of transformers and be connected by cables, and the transformer module 120 is used to transmit baseband data, such as high-speed differential serial baseband data, between the first transceiver 100 and the second transceiver 110.
In the embodiment of the application, four wires are adopted, wherein two wires are signal wires and two wires are power supply wires. The voltage of the independent power supply 130 supplies power to the second transceiver through one power supply cable, and the ground of the independent power supply 130 is connected with the ground terminal of the second transceiver through the other power supply cable. Here, the independent power supply 130 is isolated from the chip power supply of the first transceiver 100, and since the transformer has no tap connection, the isolation thereof is not deteriorated, and common mode interference from the cable is resisted.
In an embodiment of the present application, the first transceiver 100 and the second transceiver 110 may share two signal cables through a time division multiplexing switch.
For example, when the digital control module 140 transmits high-speed differential serial baseband data to the bus 150, the independent power supply 130 supplies power to the second transceiver 110 through two cables. The first transceiver 100 receives the high-speed differential serial baseband data from the digital control module 140, and then transmits the high-speed differential serial baseband data to the transformer module 120, which transmits the high-speed differential serial baseband data to the second transceiver 110, and the second transceiver 110 transmits the high-speed differential serial baseband data to the bus 150.
For another example, when the bus 150 transmits high-speed differential serial baseband data to the digital control module 140, the independent power supply 130 supplies power to the second transceiver 110 through two cables. The second transceiver 110 receives the high-speed differential serial baseband data from the independent power source 130, and transmits the high-speed differential serial baseband data to the transformer module 120, and the transformer module 120 transmits the high-speed differential serial baseband data to the first transceiver 100, and the first transceiver 100 transmits the high-speed differential serial baseband data to the digital control module 140 after receiving the high-speed differential serial baseband data.
The high-speed serial interface device provided by the embodiment of the application drives the branch cable by utilizing the front-end transceiver, so that the receiving signal of the high-speed serial interface device is not influenced by the length of the branch cable; the second transceiver is powered by the independent power supply, and as the transformer between the transceivers is not connected by a tap, the problem of primary and secondary isolation of the transformer of the front power supply system is avoided, and the common mode interference resistance is improved; in addition, the high-speed serial interface device is simple in wiring, and four wires are adopted, so that the problem of transformer isolation can be solved on the basis of not increasing the number of cables while the power supply problem is solved, and the compatibility of the high-speed serial interface device is improved.
In some embodiments, the transformer module includes a first transformer and a second transformer;
wherein the first port of the first transformer is connected with the first transmitter output port of the first transceiver and with the first receiver input port of the first transceiver; the second port of the first transformer is connected with the second transmitter output port of the first transceiver and is connected with the second receiver input port of the first transceiver; the first transformer is connected with the second transformer; the first port of the second transformer is connected with the first transmitter input port of the second transceiver and is connected with the first receiver output port of the second transceiver; the second port of the second transformer is connected to the second transmitter input port of the second transceiver and to the second receiver output port of the second transceiver.
Specifically, the transformer module comprises a first transformer and a second transformer, and the first transformer and the second transformer are connected through two cables.
In a transmission path, a first port of the first transformer is connected with a first transmitter output port of the first transceiver, and a second port of the first transformer is connected with a second transmitter output port of the first transceiver; the first port of the second transformer is connected with the first transmitter input port of the second transceiver, and the second port of the second transformer is connected with the second transmitter input port of the second transceiver.
In a receiving path, a first port of the first transformer is connected with a first receiver input port of the first transceiver, and a second port of the first transformer is connected with a second receiver input port of the first transceiver; the first port of the second transformer is connected with the first receiver output port of the second transceiver, and the second port of the second transformer is connected with the second receiver output port of the second transceiver.
In some embodiments, the first port of the first transformer is connected to a first port of a first load resistor; the second port of the first transformer is connected with the first port of the second load resistor; the common port of the first load resistor and the second load resistor is connected with a first power supply voltage; the first power supply voltage is used for providing an output voltage to the first transceiver.
Specifically, a first load resistor and a second load resistor are further connected between the first port and the second port of the first transformer, the first port of the first load resistor is connected with the first port of the first transformer, and the first port of the second load resistor is connected with the second port of the first transformer.
In the embodiment of the application, the second port of the first load resistor is the second port of the second load resistor, that is, the common terminal of the first load resistor and the second load resistor, and the common terminal is connected with the first power supply voltage, and the first power supply voltage is used for providing the output voltage for the first transceiver.
In some embodiments, a first switch is disposed between a first transmitter output port of the first transceiver and a first port of the first transformer; a second switch is arranged between a second transmitter output port of the first transceiver and a second port of the first transformer; the first switch and the second switch are turned on when the first transceiver transmits baseband data to the bus, and turned off when the first transceiver receives the baseband data transmitted by the bus.
Specifically, a switch is provided between the transmitter of the first transceiver and the first transformer in the transmission path, so as to realize the sharing of the cable through the time division multiplexing switch.
The first transmitter output port of the first transceiver is connected with the first port of the first transformer through a first switch, and the second transmitter output port of the first transceiver is connected with the second port of the first transformer through a second switch.
In order to realize cable sharing and ensure correct transmission of baseband data, the first switch and the second switch are turned on when the first transceiver transmits the baseband data to the bus, and turned off when the first transceiver receives the baseband data transmitted by the bus.
In some embodiments, a first blocking capacitor is disposed between a first receiver input port of the first transceiver and a first port of the first transformer; a second blocking capacitor is arranged between the second receiver input port of the first transceiver and the second port of the first transformer.
Specifically, a blocking capacitor is arranged between the receiver of the first transceiver and the first transformer in the receiving path.
The first receiver input port of the first transceiver is connected with the first port of the first transformer through a first blocking capacitor; the second receiver input port of the first transceiver is connected with the second port of the first transformer through a second blocking capacitor.
In some embodiments, the first port of the second transformer is connected to the first port of the third load resistor; the second port of the second transformer is connected with the first port of the fourth load resistor; the common port of the third load resistor and the fourth load resistor is connected with a second power supply voltage; the second power supply voltage is used for providing an output voltage to the second transceiver.
Specifically, a third load resistor and a fourth load resistor are further connected between the first port and the second port of the second transformer, the first port of the third load resistor is connected with the first port of the second transformer, and the first port of the fourth load resistor is connected with the second port of the second transformer.
In the embodiment of the present application, the second port of the third load resistor is the second port of the fourth load resistor, that is, the common terminal of the third load resistor and the fourth load resistor, and the common terminal is connected to the second power supply voltage, where the second power supply voltage is used to provide the output voltage for the second transceiver.
In some embodiments, a third switch is disposed between the first receiver output port of the second transceiver and the first port of the second transformer; a fourth switch is arranged between the second receiver output port of the second transceiver and the second port of the second transformer; the third switch and the fourth switch are turned off when the second transceiver transmits baseband data to the bus, and turned on when the second transceiver receives the baseband data transmitted by the bus.
Specifically, a switch is arranged between the receiver of the second transceiver and the second transformer in the transmission path, so as to realize the sharing of the cable through the time division multiplexing switch.
The first receiver output port of the second transceiver is connected with the first port of the second transformer through a third switch, and the second receiver output port of the second transceiver is connected with the second port of the second transformer through a fourth switch.
In order to realize cable sharing and ensure correct transmission of baseband data, the third switch and the fourth switch are turned on when the second transceiver transmits the baseband data to the bus, and turned off when the second transceiver receives the baseband data transmitted by the bus.
In some embodiments, a third blocking capacitor is disposed between the first transmitter input port of the second transceiver and the first port of the second transformer; a fourth blocking capacitor is arranged between the second transmitter input port of the second transceiver and the second port of the second transformer.
Specifically, a blocking capacitor is arranged between the receiver of the second transceiver and the second transformer in the receiving path.
The first transmitter input port of the second transceiver is connected with the first port of the second transformer through a third blocking capacitor; and a second transmitter input port of the second transceiver is connected with a second port of the second transformer through a fourth blocking capacitor.
In some embodiments, a third transformer is provided between the second transceiver and the bus.
Specifically, a third transformer is further provided between the second transceiver and the bus. The third transformer includes a first coil, a second coil, and a third coil.
The high-speed serial interface device provided by the embodiment of the application solves the problems of the output impedance matching of the transmitter and the input high impedance of the receiver by adding the third transformer between the second transceiver and the bus and selecting and adjusting the number of turns of the coil of the third transformer.
In some embodiments, a fifth switch is disposed between the first transmitter output port of the second transceiver and the first port of the third transformer; a sixth switch is arranged between the second transmitter output port of the second transceiver and the second port of the third transformer; the fifth switch and the sixth switch are turned on when the second transceiver transmits baseband data to the bus, and turned off when the second transceiver receives the baseband data transmitted by the bus.
Specifically, a switch is provided between the transmitter of the second transceiver and the third transformer in the transmission path, so as to realize sharing of the cable by the time division multiplexing switch.
The first transmitter output port of the second transceiver is connected with the first port of the third transformer through a fifth switch, and the second transmitter output port of the second transceiver is connected with the second port of the third transformer through a sixth switch.
In order to realize cable sharing and ensure correct transmission of baseband data, the fifth switch and the sixth switch are turned on when the second transceiver transmits the baseband data to the bus, and turned off when the second transceiver receives the baseband data transmitted by the bus.
The high-speed serial interface device provided by the application comprises the first transceiver, the second transceiver, the transformer module and an independent power supply, wherein the transformer module is arranged between the first transceiver and the second transceiver to transmit baseband data, and the independent power supply is used for supplying power to the second transceiver, so that the problem of primary and secondary isolation of a transformer connected with a cable is avoided, normal transmission of the baseband data is ensured, and the stability of transmission is improved.
The high-speed serial interface device provided in the above embodiments is further described below by way of specific examples:
example 1: fig. 2 is a second schematic diagram of a high-speed serial interface device according to an embodiment of the present application, and as shown in fig. 2, the workflow of the transmit path (terminating data to bus) of the branch circuit is as follows:
1. the digital control module port 1 and the port 2 send high-speed differential serial baseband data, the port 1 is a differential p-end, and the port 2 is a differential n-end.
2. The transceiver TR1 module port 1 and port 2 receive high-speed differential serial baseband data, the port 1 of TR1 is connected to the digital control module port 1, and the port 2 of TR1 is connected to the digital control module port 2.
3. The transceiver TR1 module ports 5 and 6 are respectively connected to the switches T1 and T2, wherein the terminals are turned on when transmitting data to the bus, and the terminals are turned off when receiving data from the bus, and transmit high-speed differential serial baseband data to the ports 1 and 2 of the transformer T1 through the transceivers T1 and T2 TR 1.
4. The load resistor R1 and the load resistor R2 are connected to the port 1 and the port 2 of the transformer T1, respectively, and the common termination power supply voltage VDC10 of the R1 and the R2, VDC10 provides an output voltage for the transmitter of the transceiver TR 1.
5. Port 3 and port 4 of transformer T1 are connected to port 3 and port 4 of transformer T2 by cables L1 and L2.
6. Port 1 and port 2 of the transformer T2 are connected to the left end of the blocking capacitor C3 and the left end of the blocking capacitor C4, respectively, and port 1 and port 2 of the transceiver TR2 module are connected to the right end of C3 and the right end of C4, respectively, and receive high-speed differential serial baseband data from port 1 and port 2 of the transformer T2.
7. Load resistor R3 and load resistor R4 are connected to port 1 and port 2, respectively, of transformer T2, and the common termination supply voltage VDC20, VDC20 of R3 and R4 provides an output voltage for the transmitter of transceiver TR 2.
8. The transceiver TR2 module ports 5 and 6 are respectively connected to the switch T5 and the switch T6, wherein the terminals are turned on when transmitting data to the bus, the terminals are turned off when receiving data from the bus, and the high-speed differential serial baseband data is transmitted to the port 1 and the port 2 of the transformer T3 through the transceivers T5 and T6 TR 2.
9. The high-speed differential serial baseband data is connected to buses bus_p and bus_n through port 5 and port 6 of transformer T3.
As shown in fig. 2, the workflow of the receive path of the branch circuit (the terminal receiving data from the bus) is as follows:
1. the digital control module port 3 and the port 4 receive high-speed differential serial baseband data, the port 3 is a differential p-end, and the port 4 is a differential n-end.
2. The transceiver TR1 module port 3 and port 4 transmit high-speed differential serial baseband data, the port 3 of TR1 is connected to the digital control module port 3, and the port 4 of TR1 is connected to the digital control module port 4.
3. The port 7 and the port 8 of the transceiver TR1 module are respectively connected with the left end of the blocking capacitor C1 and the left end of the blocking capacitor C2.
4. The right end of the blocking capacitor C1 and the right end of the blocking capacitor C2 are respectively connected to the port 1 and the port 2 of the transformer T1 and receive high-speed differential serial baseband data from the port 1 and the port 2 of the transformer T1.
5. The port 1 and the port 2 of the transformer T2 are respectively connected with the switches T3 and T4, wherein the terminals are disconnected when transmitting data to the bus, the terminals are turned on when receiving data from the bus, and the ports T3 and T4 are respectively connected to the ports 3 and 4 of the transceiver TR2 module.
6. The transceiver TR2 module ports 7 and 8 are connected to the ports 3 and 4 of the transformer T3, respectively.
7. Port 5 and port 6 of transformer T3 are connected to buses bus_p and bus_n, respectively, to receive high-speed differential serial baseband data.
Example 2: fig. 3 is a third schematic diagram of the high-speed serial interface device according to the embodiment of the present application, as shown in fig. 3, where two splitters share one digital control, and the high-speed serial interface device is used as a repeater to extend the bus, supporting the function of extending the master bus 150 to the slave bus 300, and supporting more branches and more flexible wiring.
The branching structure in fig. 3 is composed of a digital control module, transceivers (including TR11, TR21, TR12, and TR 22), transformers (including T11, T21, T31, and T12, T22, and T32), and switches (including T11 to T61, and T12 to T62).
The transformers T31 and T32 each include a first coil having N1 turns, a second coil having N2 turns, and a third coil having N3 turns.
The number of turns N1 and N3 of transformers T31 and T32 are selected so that the differential impedance of bus 100 ohms is transformed to the differential impedance of ports 1 and 2 of the transformers (T31 and T32) equal to the transmitter output impedance. The number of turns N2 and N3 of the transformers T31 and T32 are chosen so that the differential input impedance of the receiver is transformed to a high impedance (in the order of kohm) for the differential impedance of the ports 5 and 6 of the transformers (T31 and T32).
The high-speed serial interface device provided by the embodiment of the application drives the branch cable by utilizing the front-end transceiver, so that the receiving signal of the high-speed serial interface device is not influenced by the length of the branch cable; the second transceiver is powered by the independent power supply, and the transformer between the transceivers is not connected by a tap, so that the problem of primary and secondary isolation of the transformer of the pre-power supply system is avoided, the problem of intersymbol interference of signals caused by branch length is solved, and the common mode interference resistance is improved; in addition, the high-speed serial interface device is simple in wiring, and still adopts four wires, so that the problem of transformer isolation can be solved on the basis of not increasing the number of cables while the power supply problem is solved, the original wiring is compatible, and the compatibility of the high-speed serial interface device is improved.
It should be noted that the division of the units/modules in the above embodiments of the present application is merely a logic function division, and other division manners may be implemented in practice. In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
In addition, it should be noted that: the terms "first," "second," and the like in embodiments of the present application are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the application are capable of operation in sequences other than those illustrated or otherwise described herein, and that the "first" and "second" distinguishing between objects generally are not limited in number to the extent that the first object may, for example, be one or more.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, it is intended that the present application also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims (10)

1. A high-speed serial interface device, comprising:
the device comprises a first transceiver, a second transceiver, a transformer module and an independent power supply;
the first transceiver is connected with the digital control module; the second transceiver is connected with the bus; the transformer module is arranged between the first transceiver and the second transceiver and is used for transmitting baseband data between the first transceiver and the second transceiver; the independent power supply is connected with the second transceiver and is used for supplying power to the second transceiver.
2. The high-speed serial interface device of claim 1, wherein the transformer module comprises a first transformer and a second transformer;
wherein the first port of the first transformer is connected with the first transmitter output port of the first transceiver and with the first receiver input port of the first transceiver; the second port of the first transformer is connected with the second transmitter output port of the first transceiver and is connected with the second receiver input port of the first transceiver; the first transformer is connected with the second transformer; the first port of the second transformer is connected with the first transmitter input port of the second transceiver and is connected with the first receiver output port of the second transceiver; the second port of the second transformer is connected to the second transmitter input port of the second transceiver and to the second receiver output port of the second transceiver.
3. The high-speed serial interface device of claim 2, wherein the first port of the first transformer is connected to a first port of a first load resistor; the second port of the first transformer is connected with the first port of the second load resistor; the common port of the first load resistor and the second load resistor is connected with a first power supply voltage; the first power supply voltage is used for providing an output voltage to the first transceiver.
4. The high-speed serial interface device of claim 2, wherein a first switch is provided between a first transmitter output port of the first transceiver and a first port of the first transformer; a second switch is arranged between a second transmitter output port of the first transceiver and a second port of the first transformer; the first switch and the second switch are turned on when the first transceiver transmits baseband data to the bus, and turned off when the first transceiver receives the baseband data transmitted by the bus.
5. The high-speed serial interface device of claim 2, wherein a first blocking capacitor is disposed between a first receiver input port of the first transceiver and a first port of the first transformer; a second blocking capacitor is arranged between the second receiver input port of the first transceiver and the second port of the first transformer.
6. The high-speed serial interface device of claim 2, wherein the first port of the second transformer is connected to the first port of a third load resistor; the second port of the second transformer is connected with the first port of the fourth load resistor; the common port of the third load resistor and the fourth load resistor is connected with a second power supply voltage; the second power supply voltage is used for providing an output voltage to the second transceiver.
7. The high-speed serial interface device of claim 2, wherein a third switch is provided between the first receiver output port of the second transceiver and the first port of the second transformer; a fourth switch is arranged between the second receiver output port of the second transceiver and the second port of the second transformer; the third switch and the fourth switch are turned off when the second transceiver transmits baseband data to the bus, and turned on when the second transceiver receives the baseband data transmitted by the bus.
8. The high-speed serial interface device of claim 2, wherein a third blocking capacitor is disposed between the first transmitter input port of the second transceiver and the first port of the second transformer; a fourth blocking capacitor is arranged between the second transmitter input port of the second transceiver and the second port of the second transformer.
9. The high-speed serial interface device of claim 1, wherein a third transformer is disposed between the second transceiver and the bus.
10. The high-speed serial interface device of claim 9, wherein a fifth switch is provided between the first transmitter output port of the second transceiver and the first port of the third transformer; a sixth switch is arranged between the second transmitter output port of the second transceiver and the second port of the third transformer; the fifth switch and the sixth switch are turned on when the second transceiver transmits baseband data to the bus, and turned off when the second transceiver receives the baseband data transmitted by the bus.
CN202310956869.2A 2023-08-01 2023-08-01 High-speed serial interface device Active CN116662239B (en)

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Publication number Priority date Publication date Assignee Title
WO2008109329A1 (en) * 2007-03-02 2008-09-12 Rambus Inc. A bi-directional interface circuit having a switchable current-source bias
US20190280903A1 (en) * 2018-03-12 2019-09-12 Nxp B.V. Isolation circuit and method therefor
CN111162815A (en) * 2019-12-24 2020-05-15 深圳市优必选科技股份有限公司 Full-duplex communication circuit and full-duplex communication device
US20210250199A1 (en) * 2020-02-06 2021-08-12 Nxp B.V. Monolithic high-voltage transceiver connected to two different supply voltage domains
CN115695080A (en) * 2022-12-30 2023-02-03 北京国科天迅科技有限公司 Device for realizing high-speed serial data transmission
CN115695081A (en) * 2022-12-30 2023-02-03 北京国科天迅科技有限公司 Device for realizing high-speed serial data transmission

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008109329A1 (en) * 2007-03-02 2008-09-12 Rambus Inc. A bi-directional interface circuit having a switchable current-source bias
US20190280903A1 (en) * 2018-03-12 2019-09-12 Nxp B.V. Isolation circuit and method therefor
CN111162815A (en) * 2019-12-24 2020-05-15 深圳市优必选科技股份有限公司 Full-duplex communication circuit and full-duplex communication device
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CN115695080A (en) * 2022-12-30 2023-02-03 北京国科天迅科技有限公司 Device for realizing high-speed serial data transmission
CN115695081A (en) * 2022-12-30 2023-02-03 北京国科天迅科技有限公司 Device for realizing high-speed serial data transmission

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