CN115695081B - Device for realizing high-speed serial data transmission - Google Patents
Device for realizing high-speed serial data transmission Download PDFInfo
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- CN115695081B CN115695081B CN202211719628.8A CN202211719628A CN115695081B CN 115695081 B CN115695081 B CN 115695081B CN 202211719628 A CN202211719628 A CN 202211719628A CN 115695081 B CN115695081 B CN 115695081B
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Abstract
The invention relates to the technical field of digital information transmission, and provides a device for realizing high-speed serial data transmission, which comprises: a first transceiver, a second transceiver, and a first transformer module; the first transceiver is connected with the digital control module, and the second transceiver is connected with the first bus; the first transformer module is arranged between the first transceiver and the second transceiver, and is used for transmitting baseband data between the first transceiver and the second transceiver and supplying power to the second transceiver. The first transformer module is arranged between the first transceiver and the second transceiver, so that baseband data are transmitted between the first transceiver and the second transceiver, power is supplied to the second transceiver, and the distance between the digital control module and the first bus is flexibly determined through pre-emphasis processing and equalization processing of the data by the first transceiver, so that nodes for high-speed serial data transmission can be conveniently networked in a bus mode.
Description
Technical Field
The invention relates to the technical field of digital information transmission, in particular to a device for realizing high-speed serial data transmission.
Background
Serial data transmission refers to transmitting data to be transmitted in sequence according to bits, each bit of data occupies a fixed time length, and data interaction between nodes can be completed by using a few communication lines. Wherein the transmission rate of high-speed serial data transmission can reach hundred megabits per second.
In the prior art, high-speed serial data transmission usually adopts a point-to-point connection mode. When high-speed serial data transmission is required between a plurality of nodes, the nodes are networked by using a switch, which increases the complexity and cost of networking.
Disclosure of Invention
In order to solve the problems in the prior art, the present invention provides an apparatus for implementing high-speed serial data transmission, including:
a first transceiver, a second transceiver, and a first transformer module;
the first transceiver is connected with the digital control module, and the second transceiver is connected with the first bus;
the first transformer module is arranged between the first transceiver and the second transceiver, and is used for transmitting baseband data between the first transceiver and the second transceiver and supplying power to the second transceiver.
Optionally, the first transformer module includes a first transformer, a second transformer, a third transformer, and a fourth transformer;
the first transformer is respectively connected with the transmitter output port of the first transceiver and the third transformer, and the third transformer is connected with the transmitter input port of the second transceiver;
the second transformer is connected with the receiver input port of the first transceiver and the fourth transformer respectively, and the fourth transformer is connected with the receiver output port of the second transceiver.
Optionally, the first tap of the first transformer and the first tap of the second transformer are connected to a power supply terminal, and the first tap of the third transformer and the first tap of the fourth transformer are connected to a power supply port and a ground port of the second transceiver, respectively.
Optionally, a fifth transformer is arranged between the second transceiver and the first bus, and the fifth transformer comprises a first coil, a second coil and a third coil;
the first coil is connected with a transmitter output port of the second transceiver, the second coil is connected with a receiver input port of the second transceiver, and the third coil is connected with the first bus.
Optionally, a switch is provided between the first coil and the transmitter output port of the second transceiver, and the switch is turned on when the second transceiver transmits baseband data to the first bus, and turned off when the second transceiver receives baseband data on the first bus.
Optionally, a first impedance ratio between the first coil and the third coil is determined based on a differential impedance of the first bus and a transmitter output impedance of the second transceiver.
Optionally, a second impedance ratio between the second coil and the third coil is determined based on a receiver input impedance of the second transceiver.
Optionally, the impedance ratio of the first transformer, the second transformer, the third transformer and the fourth transformer is 1:1.
Optionally, the baseband data is differential serial baseband data.
Optionally, the apparatus further comprises:
a third transceiver, a fourth transceiver, a second transformer module, and a sixth transformer;
the third transceiver is connected with the digital control module, and the fourth transceiver is connected with a second bus through the sixth transformer;
the second transformer module is arranged between the third transceiver and the fourth transceiver, and is used for transmitting baseband data between the third transceiver and the fourth transceiver and supplying power to the fourth transceiver.
The device for realizing high-speed serial data transmission provided by the invention realizes the transmission of baseband data between the first transceiver and the second transceiver and the power supply of the second transceiver through the first transformer module arranged between the first transceiver and the second transceiver, flexibly determines the distance between the digital control module and the first bus through the pre-emphasis processing and the equalization processing of the data by the first transceiver, and can conveniently network nodes for carrying out high-speed serial data transmission in a bus mode.
Drawings
In order to more clearly illustrate the invention or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a device for implementing high-speed serial data transmission according to the present invention;
fig. 2 is a schematic structural diagram of a transceiver according to the present invention;
FIG. 3 is a schematic diagram of a device for implementing high-speed serial data transmission according to a second embodiment of the present invention;
FIG. 4 is a third schematic diagram of a device for implementing high-speed serial data transmission according to the present invention;
fig. 5 is a schematic diagram of a bus topology provided by the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Fig. 1 is a schematic structural diagram of an apparatus for implementing high-speed serial data transmission according to the present invention, as shown in fig. 1, the apparatus for implementing high-speed serial data transmission according to the present invention includes:
a first transceiver 100, a second transceiver 120, and a first transformer module 110;
wherein the first transceiver 100 is connected to the digital control module 130, and the second transceiver 120 is connected to the first bus 140;
the first transformer module 110 is disposed between the first transceiver 100 and the second transceiver 120, and is used to transmit baseband data between the first transceiver 100 and the second transceiver 120 and supply power to the second transceiver 120.
Specifically, the transmitter input port of the first transceiver 100 may be connected to the transmitting port of the digital control module 130, and the receiver output port may be connected to the receiving port of the digital control module 130, so as to form a bidirectional path for transmitting baseband data between the first transceiver 100 and the digital control module 130.
The transmitter output port and the receiver input port of the second transceiver 120 may be connected to the first bus 140, forming a bi-directional path for transmitting baseband data between the second transceiver 120 and the first bus 140.
In one embodiment, the second transceiver 120 is disposed near the first bus 140, so as to avoid the step phenomenon caused by the rising edge and the falling edge of the data during the transmission process due to the excessively long distance between the second transceiver 120 and the first bus 140. When the generated step is just near the logic recognition threshold value, the bit width is offset, so that the data of the receiving end is received in error.
The first transformer module 110 is disposed between the first transceiver 100 and the second transceiver 120, is connected to a transmitter output port and a receiver input port of the first transceiver 100, and is connected to a transmitter input port and a receiver output port of the second transceiver 120, so as to form a bidirectional path for transmitting baseband data between the first transceiver 100 and the first transformer module 110 and between the first transformer module 110 and the second transceiver 120. In addition, a power supply on the side of the first transceiver 100 supplies power to the second transceiver 120 through the first transformer module 110.
The first transceiver 100 performs pre-emphasis processing and equalization processing on the data by the transmitter and the receiver, so as to solve the problems of signal intersymbol interference and signal attenuation caused by too long distance between the first transceiver 100 and the second transceiver 120 and the problem of mutual limitation between the data transmission distance and the data transmission rate. Therefore, the distance between the first transceiver 100 and the second transceiver 120 can be flexibly determined according to the actual working position of the digital control module, and the first transceiver 100 and the second transceiver 120 are connected through the first transformer module 110 with corresponding lengths to form a bidirectional path for baseband data transmission. Meanwhile, the transmitted baseband data may be high-speed serial data.
In addition, when the distance between the first transceiver 100 and the second transceiver 120 is long, the power supply on the side of the first transceiver 100 can supply power to the second transceiver 120 remotely through the first transformer module 110, so that the first transceiver 120 can be prevented from being supplied with power independently, and the wiring difficulty is simplified.
When the digital control module 130 needs to transmit baseband data to the first bus 140, the first transceiver 100 receives the baseband data from the digital control module 130, pre-emphasizes the baseband data, transmits the baseband data to the first transformer module 110, and the first transformer module 110 transmits the processed baseband data to the second transceiver 120. After receiving the processed baseband data, the second transceiver 120 performs pre-emphasis processing on the processed baseband data again, and sends the pre-emphasis processed baseband data to the first bus 140.
When the baseband data on the first bus 140 needs to be transmitted to the digital control module 130, the second transceiver 120 receives the baseband data on the first bus 140, equalizes the baseband data, and transmits the baseband data to the first transformer module 110, and the first transformer module 110 transmits the processed baseband data to the first transceiver 100. After receiving the processed baseband data, the first transceiver 100 performs equalization processing on the processed baseband data again, and sends the processed baseband data to the data control module 130.
The device for realizing high-speed serial data transmission provided by the invention realizes the transmission of baseband data between the first transceiver and the second transceiver and the power supply of the second transceiver through the first transformer module arranged between the first transceiver and the second transceiver, flexibly determines the distance between the digital control module and the first bus through the pre-emphasis processing and the equalization processing of the data by the first transceiver, and can conveniently network nodes for carrying out high-speed serial data transmission in a bus mode.
In order to facilitate a clearer understanding of the technical solutions of the embodiments of the present invention, the transceivers in the embodiments of the present invention will be first described. The first transceiver 100 and the second transceiver 120, etc. may employ a transceiver structure described below.
Fig. 2 is a schematic structural diagram of a transceiver according to the present invention, and as shown in fig. 2, the transceiver includes a transmitter and a receiver.
The transmitter comprises a transmitter input circuit, a pre-emphasis circuit and a transmitter driving circuit which are connected in sequence. The transmitter input circuit is for receiving a signal. The pre-emphasis circuit is used for compensating the high frequency component of the signal. The transmitter driving circuit is used for transmitting signals.
The receiver comprises a receiver input circuit, an equalizing circuit, a gain adjusting circuit and a receiver driving circuit which are connected in sequence. The receiver input circuit is for receiving a signal. The equalization circuit is used for compensating high-frequency attenuation of the signal and improving the eye pattern quality of the signal. The gain adjusting circuit is used for adjusting the amplitude of the signal to enable the amplitude of the signal to meet the output requirement. The receiver driving circuit is used for transmitting signals.
Optionally, the first transformer module 110 includes a first transformer, a second transformer, a third transformer, and a fourth transformer;
wherein the first transformer is connected to the transmitter output port of the first transceiver 100 and the third transformer, and the third transformer is connected to the transmitter input port of the second transceiver 120;
the second transformer is connected to the receiver input port of the first transceiver 100 and the fourth transformer is connected to the receiver output port of the second transceiver 120, respectively.
Specifically, fig. 3 is a second schematic structural diagram of an apparatus for implementing high-speed serial data transmission according to the present invention, as shown in fig. 3, a first transformer T1, a second transformer T2, a third transformer T3 and a fourth transformer T4 are included between the transceiver TR1 (the first transceiver 100 in fig. 1) and the transceiver TR2 (the second transceiver 120 in fig. 1). The first transformer module 110 in fig. 1 is formed by connecting the first transformer T1 and the third transformer T3 and the second transformer T2 and the fourth transformer T4 through cables. The cable length may be flexibly determined according to the distance between the working position of the digital control module 130 and the first bus 140.
The first transformer T1 is connected to a transmitter output port of the transceiver TR1, the second transformer T2 is connected to a receiver input port of the transceiver TR1, the third transformer T3 is connected to a transmitter input port of the transceiver TR2, and the fourth transformer T4 is connected to a receiver output port of the transceiver TR2.
Optionally, the first tap of the first transformer and the first tap of the second transformer are connected to the power supply terminal, and the first tap of the third transformer and the first tap of the fourth transformer are connected to the power supply port and the ground port of the second transceiver 120, respectively.
Specifically, as shown in fig. 3, the turns of the coils at two sides of the first transformer T1 are N4 and n5+n6, respectively, and the first tap of the first transformer T1 is led out from the coil at one side of the first transformer T1 close to the cable, and the coil at one side close to the cable is divided into two parts of N5 and N6.
The turns of the coils at two sides of the second transformer T2 are N7 and N8 plus N9 respectively, a first tap of the second transformer T2 is led out from the coil at one side of the second transformer T2 close to the cable, and the coil at one side close to the cable is divided into two parts with the turns of N8 and the turns of N9.
The turns of the coils at the two sides of the third transformer T3 are N10 and N11+N12 respectively, a first tap of the third transformer T3 is led out from the coil at one side of the third transformer T3 close to the cable, and the coil at one side close to the cable is divided into two parts with the turns of N11 and the turns of N12.
The turns of the coils at the two sides of the fourth transformer T4 are N13 and N14+N15 respectively, the first tap of the fourth transformer T4 is led out from the coil at the side, close to the cable, of the fourth transformer T4, and the coil at the side, close to the cable, is divided into two parts with the turns of N14 and the turns of N15.
The first tap of the first transformer T1 and the first tap of the second transformer T2 may be connected to a power line and a ground line of the power supply terminal, respectively. The first tap of the third transformer T3 and the first tap of the fourth transformer T4 may be connected to the power port and the ground port of the transceiver TR2, respectively. For example, the first tap of the first transformer T1 may be connected to the power line of the power supply terminal, the first tap of the third transformer T3 may be connected to the power port of the transceiver TR2, the first tap of the second transformer T2 may be connected to the ground line of the power supply terminal, and the first tap of the fourth transformer T4 may be connected to the ground port of the transceiver TR 2; alternatively, the first tap of the first transformer T1 may be connected to the ground line of the power supply terminal, the first tap of the third transformer T3 may be connected to the ground port of the transceiver TR2, the first tap of the second transformer T2 may be connected to the power line of the power supply terminal, and the first tap of the fourth transformer T4 may be connected to the power port of the transceiver TR2.
After the first tap of the first transformer T1 and the first tap of the second transformer T2 are connected to the power supply terminal, the voltage may be transferred to the first tap of the third transformer T3 and the first tap of the fourth transformer T4 through the cable, so that the power supply of the transceiver TR2 by the first transformer module 110 may be realized.
In one embodiment, the first tap of the first transformer T1 is connected to the power port of the transceiver TR1 and the first tap of the second transformer T2 is connected to the ground port of the transceiver TR1. So that a single power supply can be implemented to simultaneously power both transceiver TR1 and transceiver TR2.
The lead-out positions of the first taps of the first, second, third and fourth transformers T1, T2, T3 and T4 need to satisfy the following conditions: n5/n4=n11/N10, n6/n4=n12/N10, n8/n7=n14/N13, and n9/n7=n15/N13, the equations all represent the coil turn ratio.
(n5+n6)/N4 is the voltage gain of the first transformer T1, N7/(n8+n9) is the voltage gain of the second transformer T2, N10/(n11+n12) is the voltage gain of the third transformer T3, and (n14+n15)/N13 is the voltage gain of the fourth transformer T4, so that the anti-interference capability of data transmission can be improved by positive gain.
Optionally, the impedance ratio of the first transformer, the second transformer, the third transformer and the fourth transformer is 1:1.
Specifically, as shown in fig. 3, the impedance ratio of the first transformer T1, the second transformer T2, the third transformer T3, and the fourth transformer T4 may be set to 1:1 so as not to gain baseband data transmitted on the cable.
Optionally, a fifth transformer is disposed between the second transceiver 120 and the first bus 140, and the fifth transformer includes a first coil, a second coil and a third coil;
wherein the first coil is connected to a transmitter output port of the second transceiver 120, the second coil is connected to a receiver input port of the second transceiver 120, and the third coil is connected to the first bus 140.
Specifically, as shown in fig. 3, in order to solve the problem of the transmitter input impedance matching of the transceiver TR2 and the problem of the receiver input high resistance, a fifth transformer T5 may be provided between the transceiver TR2 and the first bus 140. The fifth transformer T5 includes a first coil, a second coil, and a third coil. The number of turns of the first coil is N1, the number of turns of the second coil is N2, and the number of turns of the third coil is N3. The first coil is connected to the transmitter output port of the transceiver TR2, the second coil is connected to the receiver input port of the transceiver TR2, and the third coil is connected to the first bus 140.
Optionally, a first impedance ratio between the first coil and the third coil is determined based on the differential impedance of the first bus 140 and the transmitter output impedance of the second transceiver 120.
Specifically, by the ratio of N1 to N3, the impedance ratio between the first coil and the third coil can be changed, and a suitable impedance ratio can solve the problem of transmitter input impedance matching of the transceiver TR2. As shown in fig. 3, in one embodiment, the first impedance ratio between the first coil and the third coil may be determined from the differential impedance of the first bus 140 transformed to the differential impedance of ports 1 and 2 of the first coil being equal to the transmitter output impedance of the transceiver TR2.
Optionally, a second impedance ratio between the second coil and the third coil is determined based on the receiver input impedance of the second transceiver 120.
Specifically, by adjusting the ratio of N2 to N3, the impedance ratio between the second coil and the third coil can be changed, and a suitable impedance ratio can solve the problem of high impedance of the receiver input of the transceiver TR2. As shown in fig. 3, in one embodiment, the second impedance ratio between the second coil and the third coil may be determined based on the receiver differential input impedance of the transceiver TR2 being transformed to the differential impedance of the port 4 and the port 5 of the third coil to a kiloohm level (kohm level).
Optionally, a switch is provided between the first coil and the transmitter output port of the second transceiver 120, the switch being turned on when the second transceiver 120 transmits baseband data to the first bus 140 and turned off when the second transceiver 120 receives baseband data on the first bus 140.
In particular, as shown in fig. 3, a switch, such as switches T1 and T2, may be provided between the first coil and the transmitter output port of the transceiver TR2.
When the digital control module 130 needs to send baseband data to the first bus 140, the switch is turned on, the transceiver TR1 receives the baseband data from the digital control module 130, and sends the baseband data to the first transformer T1 after pre-emphasis processing, and the processed baseband data is transmitted to the transceiver TR2 through the first transformer T1 and the second transformer T2. After receiving the processed baseband data, the transceiver TR2 performs a pre-emphasis process on the processed baseband data again, and sends the pre-emphasis process to the first bus 140.
When the baseband data on the first bus 140 needs to be transmitted to the digital control module 130, the switch is turned off, the transceiver TR2 receives the baseband data on the first bus 140, equalizes the baseband data, and sends the baseband data to the fourth transformer T4, and the processed baseband data is transmitted to the transceiver TR1 through the fourth transformer T4 and the third transformer T3. After receiving the processed baseband data, the transceiver TR1 again equalizes the processed baseband data and sends the equalized data to the data control module 130.
Optionally, the baseband data is differential serial baseband data.
Specifically, the baseband data to be transmitted can be processed into differential baseband data with equal amplitude and opposite phase, and the differential baseband data are transmitted sequentially through differential lines according to the bits, so that the anti-interference capability of the data transmission process is further improved.
Optionally, the apparatus further includes: a third transceiver, a fourth transceiver, a second transformer module, and a sixth transformer;
wherein the third transceiver is connected with the digital control module 130, and the fourth transceiver is connected with the second bus through a sixth transformer;
the second transformer module is arranged between the third transceiver and the fourth transceiver and is used for transmitting baseband data between the third transceiver and the fourth transceiver and supplying power to the fourth transceiver.
Specifically, fig. 4 is a third schematic structural diagram of an apparatus for implementing high-speed serial data transmission according to the present invention, and as shown in fig. 4, the apparatus for implementing high-speed serial data transmission according to the present invention may further include a third transceiver TR3, a fourth transceiver TR4, a second transformer module formed by transformers T21, T22, T23, T24, and a sixth transformer T6.
The transmitter input port of the third transceiver TR3 may be connected to the transmitting port of the digital control module 130, and the receiver output port may be connected to the receiving port of the digital control module 130, so as to form a bidirectional path for transmitting baseband data between the third transceiver TR3 and the digital control module 130.
The transmitter output port and the receiver input port of the fourth transceiver TR4 may be connected to the second bus 400, forming a bidirectional path for transmitting baseband data between the fourth transceiver TR4 and the second bus 400.
The second transformer module is disposed between the third transceiver TR3 and the fourth transceiver TR4, is connected to the transmitter output port and the receiver input port of the third transceiver TR3, and is connected to the transmitter input port and the receiver output port of the fourth transceiver TR4, so as to form a bidirectional path for transmitting baseband data between the third transceiver TR3 and the second transformer module and between the second transformer module and the fourth transceiver TR 4. In addition, the power supply on the third transceiver TR3 side supplies power to the fourth transceiver TR4 through the second transformer module.
The device structure between the second bus 400 and the digital control module 130 may be configured according to the device structure between the first bus 140 and the digital control module 130, which may be the same or different.
Since the first bus 140 and the second bus 400 both form a bidirectional channel for baseband data transmission with the digital control module 130, bidirectional transmission of baseband data can also be performed between the first bus 140 and the second bus 400. That is, after including the third transceiver TR3, the fourth transceiver TR4, the second transformer module, and the sixth transformer T6, an apparatus for implementing high-speed serial data transmission according to the present invention may perform bidirectional transmission of baseband data between the first bus 140 and the second bus 400 as a repeater.
Fig. 5 is a schematic diagram of bus topology provided in the present invention, as shown in fig. 5, a plurality of buses (such as a master bus, a slave bus, and a secondary bus) may be networked by using a repeater (such as a repeater 11 and a repeater 21) formed by the above device, and the number of buses participating in the networking is not limited herein.
The operation flow of the apparatus shown in fig. 3 will be further described below by means of specific data transmission paths and reception paths.
(1) Transmission path
1. The digital control module port 1 and the port 2 send high-speed differential serial baseband data, the port 1 is a differential p-end, and the port 2 is a differential n-end.
2. Port 1 and port 2 of transceiver TR1 receive high-speed differential serial baseband data, port 1 being connected to digital control module port 1 and port 2 being connected to digital control module port 2.
3. Port 5 and port 6 of transceiver TR1 transmit high-speed differential serial baseband data to port 4 and port 5 of first transformer T1.
4. Port 1 and port 2 of the first transformer T1 are connected to port 1 and port 2 of the third transformer T3 by cables L1 and L2.
5. Port 4 and port 5 of the third transformer T3 are connected to port 1 and port 2 of the transceiver TR2.
6. Port 5 and port 6 of transceiver TR2 connect switches T1 and T2 (transmit time switch on, receive time switch off), transmitting high-speed differential serial baseband data to port 1 and port 2 of fifth transformer T5.
7. The high-speed differential serial baseband data is connected to the differential positive side (bus_p) and the differential negative side (bus_n) of the first BUS through ports 5 and 6 of the fifth transformer T5.
(2) Reception path
1. The digital control module port 3 and the port 4 receive high-speed differential serial baseband data, the port 3 is a differential p-end, and the port 4 is a differential n-end.
2. Port 3 and port 4 of transceiver TR1 transmit high-speed differential serial baseband data, port 3 being connected to digital control module port 3 and port 4 being connected to digital control module port 4.
3. The transceivers TR1, ports 7 and 8 receive high-speed differential serial baseband data, and are connected to ports 4 and 5 of the second transformer T2.
4. Port 1 and port 2 of the second transformer T2 are connected to port 1 and port 2 of the fourth transformer T4 by cables L3 and L4.
5. Port 4 and port 5 of the third transformer T3 are connected to port 3 and port 4 of the transceiver TR2.
6. Port 7 and port 8 of transceiver TR2 are connected to port 3 and port 4 of fifth transformer T5.
7. Port 5 and port 6 of the fifth transformer T5 are connected to bus_p and bus_n of the first BUS to receive the high-speed differential serial baseband data.
The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (9)
1. An apparatus for implementing high-speed serial data transmission, comprising:
a first transceiver, a second transceiver, and a first transformer module;
the first transceiver is connected with the digital control module, and the second transceiver is connected with the first bus;
the first transformer module is arranged between the first transceiver and the second transceiver, and is used for transmitting baseband data between the first transceiver and the second transceiver and supplying power to the second transceiver;
the first transformer module comprises a first transformer, a second transformer, a third transformer and a fourth transformer;
the first transformer is respectively connected with the transmitter output port of the first transceiver and the third transformer, and the third transformer is connected with the transmitter input port of the second transceiver;
the second transformer is connected with the receiver input port of the first transceiver and the fourth transformer respectively, and the fourth transformer is connected with the receiver output port of the second transceiver.
2. The apparatus for implementing high-speed serial data transmission according to claim 1, wherein the first tap of the first transformer and the first tap of the second transformer are connected to a power supply terminal, and the first tap of the third transformer and the first tap of the fourth transformer are connected to a power supply port and a ground port of the second transceiver, respectively.
3. The apparatus for implementing high-speed serial data transmission according to claim 1, wherein a fifth transformer is provided between the second transceiver and the first bus, the fifth transformer including a first coil, a second coil, and a third coil;
the first coil is connected with a transmitter output port of the second transceiver, the second coil is connected with a receiver input port of the second transceiver, and the third coil is connected with the first bus.
4. A device for high speed serial data transmission according to claim 3, wherein a switch is provided between the first coil and the transmitter output port of the second transceiver, said switch being turned on when the second transceiver transmits baseband data to the first bus and turned off when the second transceiver receives baseband data on the first bus.
5. The apparatus for implementing high-speed serial data transmission of claim 3, wherein a first impedance ratio between the first coil and the third coil is determined based on a differential impedance of the first bus and a transmitter output impedance of the second transceiver.
6. The apparatus for implementing high-speed serial data transmission of claim 3, wherein a second impedance ratio between the second coil and the third coil is determined based on a receiver input impedance of the second transceiver.
7. The apparatus for implementing high-speed serial data transmission according to claim 1, wherein the impedance ratio of the first transformer, the second transformer, the third transformer and the fourth transformer is 1:1.
8. The apparatus for implementing high-speed serial data transmission of claim 1, wherein the baseband data is differential serial baseband data.
9. The apparatus for implementing high-speed serial data transmission according to any one of claims 1 to 8, further comprising:
a third transceiver, a fourth transceiver, a second transformer module, and a sixth transformer;
the third transceiver is connected with the digital control module, and the fourth transceiver is connected with a second bus through the sixth transformer;
the second transformer module is arranged between the third transceiver and the fourth transceiver, and is used for transmitting baseband data between the third transceiver and the fourth transceiver and supplying power to the fourth transceiver.
Priority Applications (1)
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| CN116701276B (en) * | 2023-08-08 | 2024-01-09 | 北京国科天迅科技股份有限公司 | High-speed serial data transmission device with detachable tail end |
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