CN116668235B - Device for realizing serial data transmission - Google Patents
Device for realizing serial data transmission Download PDFInfo
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- CN116668235B CN116668235B CN202310956688.XA CN202310956688A CN116668235B CN 116668235 B CN116668235 B CN 116668235B CN 202310956688 A CN202310956688 A CN 202310956688A CN 116668235 B CN116668235 B CN 116668235B
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- 230000005540 biological transmission Effects 0.000 title claims abstract description 47
- 239000003990 capacitor Substances 0.000 claims description 26
- 238000010586 diagram Methods 0.000 description 24
- 238000000034 method Methods 0.000 description 6
- 238000003780 insertion Methods 0.000 description 4
- 230000037431 insertion Effects 0.000 description 4
- 230000002238 attenuated effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40169—Flexible bus arrangements
- H04L12/40176—Flexible bus arrangements involving redundancy
- H04L12/40182—Flexible bus arrangements involving redundancy by using a plurality of communication lines
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention provides a device for realizing serial data transmission, which relates to the technical field of digital information transmission, and comprises: a master node, at least one directional coupler, at least one power divider and at least one slave node; the main control node is connected with the bus; the first end and the second end of each directional coupler are connected with the bus; the third end of each directional coupler is connected with the main end of one power divider; each sub-end of the power divider is connected with a slave node. The invention utilizes the advantage of reducing the main path attenuation of the directional coupler to connect the first end and the second end of the directional coupler with the bus; the advantage of multiple expansion nodes of the power divider is utilized, the third end of the directional coupler is connected with the power divider, and the power divider is connected with the slave nodes, so that the number of the slave nodes is effectively expanded, and the power divider is very suitable for large-amount application of the number of the slave nodes.
Description
Technical Field
The invention relates to the technical field of digital information transmission, in particular to a device for realizing serial data transmission.
Background
The bus structure is characterized in that all nodes are hung on one bus, and the bus structure has the characteristics of low cost, flexible wiring and good expansibility. But all nodes are connected directly to the same bus, the furthest length available for the cables of the branch circuits may limit the highest operating frequency of the signal.
In the related art, the contradiction between the length of a branch line and the working frequency of a signal in the traditional bus type structure is solved by utilizing the branch isolation of the directional coupler.
But in practice the 2-port of the directional coupler brings about a gradual attenuation of the bus signal. As the number of slave nodes increases, two problems arise: first, the amplitude of the input signal of the last slave node is attenuated very little, and a high-gain amplifier is needed to compensate; second, the input signal of the first slave node and the input signal of the last slave node have very different amplitudes, which is beyond the input requirement range of the transceiver. This limits the number of slave nodes.
Disclosure of Invention
The invention provides a device for realizing serial data transmission, which is used for solving the defect of limited number of slave nodes in the prior art and realizing the expansion of the number of the slave nodes.
The invention provides a device for realizing serial data transmission, which comprises: a master node, at least one directional coupler, at least one power divider and at least one slave node;
the main control node is connected with a bus; the first end and the second end of each directional coupler are connected with the bus; the third end of each directional coupler is connected with the main end of one power divider; each sub-end of the power divider is connected with one slave node.
In some embodiments, when the buses are differential buses, the master control node is connected with two buses of the differential buses, a first end and a second end of each directional coupler are connected with two buses of the differential buses, and a third end of each directional coupler is connected with a main end of one power divider through a differential cable;
each branch end of the power divider comprises a first branch end and a second branch end, the first branch end of each branch end is connected with the first end of one slave node, and the second branch end of each branch end is connected with the second end of the slave node.
In some embodiments, when the bus is a single bus, the master control node is connected to the single bus, the first end and the second end of each directional coupler are connected to the single bus, and the third end of each directional coupler is connected to the main end of one power divider through a cable; each sub-end of the power divider is connected with one slave node.
In some embodiments, the apparatus further comprises: a switch module;
each sub-end of the power divider is connected with one slave node through the switch module; the switch module is used for controlling the on-off between the power divider and the slave node.
In some embodiments, when the buses are differential buses, the master control node is connected with two buses of the differential buses, a first end and a second end of each directional coupler are connected with two buses of the differential buses, and a third end of each directional coupler is connected with a main end of one power divider through a differential cable;
each sub-end of the power divider comprises a first sub-end and a second sub-end; a first sub-end of each sub-end is connected with a first end of one slave node through a first end and a second end of the switch module; the second of the branches is connected to the second of the slave nodes through a third port and a fourth port of the switch module.
In some embodiments, the switch module comprises: a first switching unit and a second switching unit;
a first end of the first switch unit is used as a first end of the switch module, and a second end of the first switch unit is used as a second end of the switch module; the first switch unit is used for controlling the on-off between the first branch end and the slave node;
the first end of the second switch unit is used as a third end of the switch module, and the second end of the second switch unit is used as a fourth end of the switch module; the second switch unit is used for controlling the on-off between the second branch end and the slave node.
In some embodiments, the first and second switching units are identical in structure;
the first switching unit includes: the first inverter, the first switch, the second switch, the first resistor and the first capacitor;
the input end of the first inverter is used for receiving a control signal; the input end of the first inverter is electrically connected with the control end of the first switch, and the output end of the first inverter is electrically connected with the control end of the second switch;
a first end of the first switch is used as a first end of the first switch unit, and a second end of the first switch is used as a second end of the first switch unit;
the first end of the second switch is connected with the first end of the first switch, and the second end of the second switch is grounded through the first resistor and the first capacitor.
In some embodiments, when the bus is a single bus, the master control node is connected to the single bus, the first end and the second end of each directional coupler are connected to the single bus, and the third end of each directional coupler is connected to the main end of one power divider through a cable; each sub-end of the power divider is connected with one slave node through a first end and a second end of the switch module.
In some embodiments, the switch module comprises: a third switching unit;
the first end of the third switch unit is used as the first end of the switch module, and the second end of the third switch unit is used as the second end of the switch module; and the third switch unit is used for controlling the on-off between the split end of the power divider and the slave node.
In some embodiments, the third switching unit includes: a third inverter, a fifth switch, a sixth switch, a third resistor and a third capacitor;
the input end of the third inverter is used for receiving a control signal; the input end of the third inverter is electrically connected with the control end of the fifth switch, and the output end of the third inverter is electrically connected with the control end of the sixth switch;
a first end of the fifth switch is used as a first end of the third switch unit, and a second end of the fifth switch is used as a second end of the third switch unit;
the first end of the sixth switch is connected with the first end of the fifth switch, and the second end of the sixth switch is grounded through the third resistor and the third capacitor.
The device for realizing serial data transmission provided by the invention has the advantages that the main path attenuation of the directional coupler is reduced, and the first end and the second end of the directional coupler are connected with the bus; the advantage of multiple expansion nodes of the power divider is utilized, the third end of the directional coupler is connected with the power divider, and the power divider is connected with the slave nodes, so that the number of the slave nodes is effectively expanded, and the power divider is very suitable for large-amount application of the number of the slave nodes.
Drawings
In order to more clearly illustrate the invention or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of an apparatus for implementing serial data transmission in the related art;
fig. 2 is a schematic structural diagram of an apparatus for implementing serial data transmission according to the present invention;
FIG. 3 is a schematic diagram of a second embodiment of an apparatus for implementing serial data transmission according to the present invention;
FIG. 4 is a schematic illustration of a node structure provided by the present invention;
FIG. 5 is a third schematic diagram of a device for implementing serial data transmission according to the present invention;
FIG. 6 is a schematic diagram of a second node structure according to the present invention;
FIG. 7 is a schematic diagram of a device for implementing serial data transmission according to the present invention;
FIG. 8 is a schematic diagram of a device for implementing serial data transmission according to the present invention;
FIG. 9 is a schematic diagram of a switch module according to the present invention;
Fig. 10 is a schematic structural view of a first switch unit and a second switch unit provided by the present invention;
FIG. 11 is a schematic diagram of a device for implementing serial data transmission according to the present invention;
FIG. 12 is a second schematic diagram of a switch module according to the present invention;
fig. 13 is a schematic structural diagram of a third switch unit provided by the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. The embodiments of the present invention and the features in the embodiments may be combined with each other without collision. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
It is further intended that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The term "at least one" in the present invention means one or more, and "a plurality" means two or more. The terms "first," "second," "third," "fourth," and the like in this disclosure, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
In embodiments of the invention, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "e.g." in an embodiment should not be taken as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a related art device for implementing serial data transmission. As shown in fig. 1, the master node is connected to the bus, the 1-port and 2-port of each directional coupler are connected to the bus, and the 3-port of each directional coupler is connected to one slave node. The master control node and the slave node are both composed of a digital control module and a transceiver.
In the related art, the contradiction between the length of a branch line and the working frequency of a signal in the traditional bus type structure is solved by utilizing the branch isolation degree of the directional coupler.
But in practice the 2-port of the directional coupler brings about a gradual attenuation of the bus signal. As the number of slave nodes increases, two problems arise: first, the amplitude of the input signal of the last slave node is attenuated very little, and a high-gain amplifier is needed to compensate; second, the input signal of the first slave node and the input signal of the last slave node have very different amplitudes, which is beyond the input requirement range of the transceiver. This limits the number of slave nodes.
In order to solve the above problems, the present invention provides a device for implementing serial data transmission, which implements efficient increase of the number of slave nodes.
Referring to fig. 2, fig. 2 is a schematic structural diagram of an apparatus for implementing serial data transmission according to the present invention. The device for realizing serial data transmission provided by the invention comprises: a master node 20, at least one directional coupler 30, at least one power divider 40 and at least one slave node 50;
The master node 20 is connected to the bus 10. The first end of the directional coupler 30 is an input end, the second end of the directional coupler 30 is an output end, and the third end of each directional coupler 30 is a coupled output end. The first and second ends of each directional coupler 30 are connected to the bus 10; the third end of each directional coupler 30 is connected to the main end of one power divider 40; each split end of the power divider 40 is connected to a slave node 50. The master control node controls all the slave nodes, the master control node transmits tasks and data to the slave nodes, and the slave nodes complete the tasks.
Specifically, the device for implementing serial data transmission includes M (M is equal to or greater than 1) directional couplers 30, where a first port and a second port of each directional coupler 30 are connected to the bus 10, and each directional coupler 30 may be connected to a Ni (i has a value range of 1,2,3, … …, M) power divider 40, and the specific connection manner is: the third terminal of the directional coupler 30 is connected to the main terminal of the power divider 40. The power divider 40 to which each directional coupler 30 is connected may be different.
The Ni power divider represents that 1 main end of the power divider 40 may be divided into Ni sub-ends, i.e. the Ni power divider may be connected to Ni slave nodes 50, i.e. each sub-end of the Ni power divider is connected to one slave node 50. The master node 20 is connected to the bus 10. The master node 20 and the slave node 50 are each comprised of a digital control module, transceiver and transformer.
For example, the first directional coupler 30 is connected to 2 power splitters, and the 2 power splitters may be connected to 2 slave nodes; the second directional coupler 30 is connected with 4 power dividers, and the 4 power dividers can be connected with 4 slave nodes; the third directional coupler 30 is connected with 8 power dividers, and the 8 power dividers can be connected with 8 slave nodes.
Assuming that 32 slave nodes are supported, the main path insertion loss of the directional coupler 30 is 1db, and the branching insertion loss is 10db. The main path loss is the power loss between the first end and the second end of the directional coupler 30, and the shunt path loss is the power loss between the first end and the third end of the directional coupler 30. Table 1 is a table of attenuation of the farthest slave node under the condition that the number of supported slave nodes is fixed, and as can be seen from table 1, the attenuation of the farthest slave node can be significantly reduced by using the power divider 40.
TABLE 1 attenuation Table of furthest Slave node under the condition that the number of supported Slave nodes is fixed
Assuming that the attenuation of the furthest slave node is 22db, the main path insertion loss of the directional coupler 30 is 1db, and the shunt insertion loss is 10db. Table 2 is a table of slave node numbers under the condition that the attenuation value of the farthest slave node is constant, and it can be seen from table 2 that more slave nodes can be supported by using the power divider 40 under the condition that the attenuation value of the farthest slave node is defined.
TABLE 2 slave node quantity table under the condition that the attenuation value of the furthest slave node is fixed
The device for realizing serial data transmission provided by the invention utilizes the advantage of reducing the main path attenuation of the directional coupler 30 to connect the first end and the second end of the directional coupler 30 with the bus 10; the advantage of more expansion nodes of the power divider 40 is utilized, the third end of the directional coupler 30 is connected with the power divider 40, and the power divider 40 is connected with the slave nodes 50, so that the number of the slave nodes 50 is effectively expanded, and the power divider is very suitable for large-scale application of the number of the slave nodes 50.
In some embodiments, where the bus 10 is a differential bus, the master node 20 connects two buses of the differential bus, the first end and the second end of each directional coupler 30 are connected to two buses of the differential bus, and the third end of each directional coupler 30 is connected to the main end of one power divider 40 through a differential cable;
each of the branch ends of the power divider 40 includes a first branch end and a second branch end; the first sub-end of each sub-end is connected with the first end of a slave node; the second of each of the sub-ends is connected to the second end of the slave node.
Specifically, referring to fig. 3, fig. 3 is a schematic diagram illustrating a second embodiment of an apparatus for implementing serial data transmission according to the present invention.
The master control node 20 has two ends, a first end of the master control node 20 is connected with one bus of the differential buses, and a second end of the master control node 20 is connected with the other bus of the differential buses.
The first end of each directional coupler 30 is connected to the two buses of the differential bus, respectively, and the second end of each directional coupler 30 is also connected to the two buses of the differential bus, respectively. After the second end of the last directional coupler 30 is connected to the two buses of the differential bus, a termination resistor is connected between the two buses of the differential bus.
The third end of each directional coupler 30 is connected to two main ends (main end p and main end n) of one power divider 40 by a differential cable.
As shown in fig. 3, the third end of the directional coupler 1 is connected to the main end P of the power divider 1 through a differential cable l1_p, and the third end of the directional coupler 1 is connected to the main end N of the power divider 1 through a differential cable l1_n.
Each of the sub-terminals of the power divider 40 includes a first sub-terminal (p-terminal) and a second sub-terminal (n-terminal), each sub-terminal being connected to one of the slave nodes, wherein the first sub-terminal is connected to the first terminal of the slave node, and the second sub-terminal is connected to the second terminal of the slave node 50.
Master node 20 is identical in structure to slave node 50. Referring to fig. 4, fig. 4 is a schematic diagram of a node structure according to the present invention.
Under the condition that the node transmits data, the port 1 of the digital control module is connected with the port 1 of the transceiver, and the port 2 of the digital control module is connected with the port 2 of the transceiver; port 5 of the transceiver is connected with port 1 of the transformer T1, and port 6 of the transceiver is connected with port 2 of the transformer T1; from port 3 of transformer T1 in the node, through the cable, connects the first of each of the branches of power divider 40, and port 4 of transformer T1 connects the second of each of the branches of power divider 40; port 3 and port 4 of transformer T1 in master node 20 are connected to the differential bus by cables.
The node sending path is as follows: the port 1 and the port 2 of the digital control module send high-speed differential serial baseband data, the port 1 of the digital control module is a differential p end, and the port 2 of the digital control module is a differential n end. Ports 1 and 2 of the transceiver receive the high-speed differential serial baseband data, the transceiver transmits the high-speed differential serial baseband data to ports 1 and 2 of the transformer T1 through ports 5 and 6, and ports 3 and 4 of the transformer T1 transmit the high-speed differential serial baseband data outwards.
Under the condition that the node receives data, the port 3 of the digital control module is connected with the port 3 of the transceiver, and the port 4 of the digital control module is connected with the port 4 of the transceiver; port 7 of the transceiver is connected with port 1 of the transformer T2, and port 8 of the transceiver is connected with port 2 of the transformer T2; the port 3 of the transformer T2 in the slave node is connected with the first branch end through a cable, and the port 4 of the transformer T2 is connected with the second branch end through a cable; port 3 and port 4 of transformer T2 in master node 20 are connected to the differential bus by cables.
The node receiving path is: port 3 and port 4 of transformer T2 receive high-speed differential serial baseband data from the outside, port 7 and port 8 of the transceiver receive high-speed differential serial baseband data from port 1 and port 2 of transformer T2, port 3 and port 4 of the digital control module receive high-speed differential serial baseband data from port 3 and port 4 of the transceiver, port 3 of the digital control module is the differential p-terminal, and port 4 of the digital control module is the differential n-terminal.
When the master node 20 is transmitting, the slave node 50 is receiving; when master node 20 is receiving, slave node 50 is transmitting.
In the device for realizing serial data transmission provided by the invention, when the bus 10 is a differential bus, serial data is transmitted between the master control node 20 and the slave node 50 through differential connection among the bus 10, the master control node 20, the directional coupler 30, the power divider 40 and the slave node 50.
In some embodiments, where the bus 10 is a single bus, the master node 20 is connected to the single bus, the first end and the second end of each directional coupler 30 are connected to the single bus, and the third end of each directional coupler 30 is connected to the main end of one power divider 40 through a cable; each split end of the power divider 40 is connected to a slave node.
Specifically, referring to fig. 5, fig. 5 is a third schematic structural diagram of a device for implementing serial data transmission according to the present invention. The master node 20 has one end through which the master node 20 is connected to a single bus.
The first end and the second end of each directional coupler 30 are connected with a single bus, after the second end of the last directional coupler 30 is connected with the single bus, the single bus is connected with one end of a terminal resistor, and the other end of the terminal resistor is grounded.
The third end of each directional coupler 30 is connected to the main end of one power divider 40 through a cable, and each sub-end of the power divider 40 is connected to one sub-node.
As shown in fig. 5, the third end of the directional coupler 1 is connected to the main end of the power divider 1 through a cable L1, the branch end 1 of the power divider 1 is connected to the slave node 1_1, and the branch end N1 of the power divider 1 is connected to the slave node 1_n1.
Master node 20 is identical in structure to slave node 50. Referring to fig. 6, fig. 6 is a schematic diagram of a second node structure according to the present invention.
Under the condition that the node transmits data, the port 1 of the digital control module is connected with the port 1 of the transceiver, and the port 2 of the digital control module is connected with the port 2 of the transceiver; port 5 of the transceiver is connected with port 1 of the transformer T3, and port 6 of the transceiver is connected with port 2 of the transformer T3; the port 3 of the transformer T3 in the slave node is connected with the branch end of the power divider 40 through a cable, and the port 4 of the transformer T3 is grounded; port 3 of transformer T3 in master node 20 is connected to the single bus by a cable, and port 4 of transformer T3 is grounded.
The node sending path is as follows: the port 1 and the port 2 of the digital control module send high-speed differential serial baseband data, the port 1 of the digital control module is a differential p end, and the port 2 of the digital control module is a differential n end. Ports 1 and 2 of the transceiver receive the high-speed differential serial baseband data, the transceiver transmits the high-speed differential serial baseband data to ports 1 and 2 of the transformer T3 through ports 5 and 6, and port 3 of the transformer T3 transmits the high-speed differential serial baseband data to the outside.
Under the condition that the node receives data, the port 3 of the digital control module is connected with the port 3 of the transceiver, and the port 4 of the digital control module is connected with the port 4 of the transceiver; port 7 of the transceiver is connected with port 1 of the transformer T4, and port 8 of the transceiver is connected with port 2 of the transformer T2; the port 3 of the transformer T4 in the slave node is connected with the branch end of the power divider 40 through a cable, and the port 4 of the transformer T4 is grounded; port 3 of transformer T4 in master node 20 is connected to the single bus by a cable, and port 4 of transformer T4 is grounded.
The node receiving path is: port 3 of the transformer T4 receives high-speed differential serial baseband data from the outside, port 7 and port 8 of the transceiver receive high-speed differential serial baseband data from port 1 and port 2 of the transformer T4, port 3 and port 4 of the digital control module receive high-speed differential serial baseband data from port 3 and port 4 of the transceiver, port 3 of the digital control module is a differential p-terminal, and port 4 of the digital control module is a differential n-terminal.
The device for realizing serial data transmission provided by the invention realizes serial data transmission between the master control node 20 and the slave node 50 through single-wire connection among the bus 10, the master control node 20, the directional coupler 30, the power divider 40 and the slave node 50 under the condition that the bus 10 is a single bus.
In some embodiments, the apparatus for implementing serial data transmission further comprises: a switch module 60;
each split end of the power divider 40 is connected with a slave node 50 through a switch module 60; the switch module 60 is used for controlling the on-off between the power divider 40 and the slave node 50.
Specifically, referring to fig. 7, fig. 7 is a schematic structural diagram of a device for implementing serial data transmission according to the present invention.
The master node 20 is connected to the bus 10. The first port and the second port of each directional coupler 30 are connected to the bus 10, the third terminal of each directional coupler 30 is connected to the main terminal of one power divider 40, and each sub-terminal of the power divider 40 is connected to one sub-node 50 through a switch module 60. The switch module 60 may control the on-off between the power divider 40 and the slave node 50.
As shown in fig. 7, the terminal 1 of the power divider 40 is connected to the slave node 1 through the switch module 1, and the terminal N of the power divider 40 is connected to the slave node N through the switch module N.
According to the device for realizing serial data transmission, the switch module 60 is arranged between each branch end of the power divider 40 and the slave node 50, and the switch module 60 is used for controlling the on-off between the power divider 40 and the slave node 50, so that the slave node can be safely increased.
In some embodiments, where the bus 10 is a differential bus, the master node 20 connects two buses of the differential bus, the first end and the second end of each directional coupler 30 are connected to two buses of the differential bus, and the third end of each directional coupler 30 is connected to the main end of one power divider 40 through a differential cable;
each of the branch ends of the power divider 40 includes a first branch end and a second branch end; the first of each of the branches is connected to the first end of a slave node through the first and second ends of the switch module 60; the second of each of the branches is connected to the second end of the slave node 50 through a third port and a fourth port of the switch module 60.
Specifically, referring to fig. 8, fig. 8 is a schematic diagram of a device for implementing serial data transmission according to the present invention.
The master control node 20 has two ends, a first end of the master control node 20 is connected with one bus of the differential buses, and a second end of the master control node 20 is connected with the other bus of the differential buses.
The first end of each directional coupler 30 is connected to the two buses of the differential bus, respectively, and the second end of each directional coupler 30 is also connected to the two buses of the differential bus, respectively. And after the second end of the last directional coupler is respectively connected with the two buses of the differential bus, connecting a termination resistor between the two buses of the differential bus.
The third end of each directional coupler 30 is connected to two main ends (main end p and main end n) of one power divider 40 by a differential cable.
Each of the sub-terminals of the power divider 40 includes a first sub-terminal (p-terminal) and a second sub-terminal (n-terminal), each sub-terminal being connected to one of the sub-nodes, wherein the first sub-terminal is connected to the first terminal of the sub-node through the first terminal and the second terminal of the switch module 60, and the second sub-terminal is connected to the second terminal of the sub-node through the third terminal and the fourth terminal of the switch module 60.
As shown in fig. 8, the tap 1_P is connected to one end of the slave node 1_1 through the ports 1 and 2 of the switch module 1_1, and the tap 1_N is connected to the other end of the slave node 1_1 through the ports 3 and 4 of the switch module 1_1.
In the device for realizing serial data transmission provided by the invention, when the bus 10 is a differential bus, the serial data is safely transmitted between the master control node 20 and the slave node 50 through differential connection among the bus 10, the master control node 20, the directional coupler 30, the power divider 40, the switch module 60 and the slave node 50.
In some embodiments, the switch module 60 includes: a first switching unit 601 and a second switching unit 602;
a first end of the first switching unit 601 serves as a first end of the switching module 60, and a second end of the first switching unit 601 serves as a second end of the switching module 60; the first switch unit 601 is configured to control on/off between the first split terminal and the slave node 50;
the first end of the second switching unit 602 is used as the third end of the switching module 60, and the second end of the second switching unit 602 is used as the fourth end of the switching module 60; the second switching unit 602 is used for controlling the on-off between the second terminal and the slave node 50.
Specifically, referring to fig. 9, fig. 9 is a schematic structural diagram of a switch module 60 according to the present invention. The switch module 60 includes: a first switching unit 601 and a second switching unit 602.
The first end of the first switching unit 601 serves as a first end of the switching module 60, and the second end of the first switching unit 601 serves as a second end of the switching module 60. Each first split end of the power divider 40 is connected to a first end of the slave node through a first switching unit 601 in the switching module 60. The first switching unit 601 may control on/off between the first split terminal of the power divider 40 and the slave node 50.
The first end of the second switching unit 602 serves as a third end of the switching module 60, and the second end of the second switching unit 602 serves as a fourth end of the switching module 60. Each second terminal of the power divider 40 is connected to a second terminal of the slave node through a second switching unit 602 in the switching module 60. The second switching unit 602 may control the on-off between the second terminal of the power divider 40 and the slave node 50.
Alternatively, the first switching unit 601 and the second switching unit 602 may be the same or different switching circuits including at least one switch therein.
In the device for realizing serial data transmission provided by the invention, under the condition that the bus 10 is a differential bus, on one hand, the power divider 40 and the slave node are connected through the first switch unit 601 and the second switch unit 602, so that differential connection between the power divider 40 and the slave node is realized; on the other hand, the on-off between the power divider 40 and the slave node 50 is controlled, which is beneficial for the subsequent safe transmission of serial data.
In some embodiments, the first switching unit 601 and the second switching unit 602 are identical in structure;
the first switching unit 601 includes: the first inverter D1, the first switch S1, the second switch S2, the first resistor R1 and the first capacitor C1;
The input end of the first inverter D1 is used for receiving a control signal; the input end of the first reverser D1 is electrically connected with the control end of the first switch S1, and the output end of the first reverser D1 is electrically connected with the control end of the second switch S2;
a first end of the first switch D1 serves as a first end of the first switch unit 601, and a second end of the first switch D1 serves as a second end of the first switch unit 601;
the first end of the second switch S2 is connected to the first end of the first switch S1, and the second end of the second switch S2 is grounded through the first resistor R1 and the first capacitor C1.
Specifically, referring to fig. 10, fig. 10 is a schematic structural diagram of a first switch unit 601 and a second switch unit 602 provided in the present invention.
The first switching unit 601 includes: the first inverter D1, the first switch S1, the second switch S2, the first resistor R1 and the first capacitor C1. Since the capacitor blocks direct current from alternating current, the first capacitor C1 can ground the passing alternating current signal.
The input end of the first inverter D1 receives a control signal ctrl, the input end of the first inverter D1 is electrically connected with the control end of the first switch S1, and the output end of the first inverter D1 is electrically connected with the control end of the second switch S2; the first end of the second switch S2 is connected with the first end of the first switch S1, and the second end of the second switch S2 is grounded through the first resistor R1 and the first capacitor C1; a first end of the first switch D1 serves as a first end of the first switch unit 601, and a second end of the first switch D1 serves as a second end of the first switch unit 601;
The on-states of the first switch S1 and the second switch S2 are controlled by a control signal ctrl. When the control signal ctrl is at a low level, the control terminal of the first switch S1 receives the low level, and the first switch S1 is turned off; after the control signal ctrl is inverted by the first inverter D1, the output terminal of the first inverter D1 outputs a high level, the control terminal of the second switch S2 receives the high level, and the second switch S2 is closed. In this case, the first terminal is disconnected from the slave node 50, and the first terminal is grounded via the first resistor R1 and the first capacitor C1.
If the first branch end is disconnected from the slave node 50, the first branch end is not grounded through the first resistor R1 and the first capacitor C1, so that the matching of the main end is affected, the signal reflection of the main end is caused, the signal integrity of the main end is affected, the matching of other branch ends is also affected, the signal reflection of other branch ends is caused, and the signal integrity of other branch ends is affected.
When the control signal ctrl is at a high level, the control end of the first switch S1 receives the high level, and the first switch S1 is closed; after the control signal ctrl is inverted by the first inverter D1, the output terminal of the first inverter D1 outputs a low level, the control terminal of the second switch S2 receives the low level, and the port of the second switch S2. In this case, the first split is conducted to the slave node 50.
The first switching unit 601 and the second switching unit 602 have the same structure. The second switching unit 602 includes: the second inverter D2, the third switch S3, the fourth switch S4, the second resistor R2 and the second capacitor C2. Since the capacitor blocks direct current from alternating current, the second capacitor C2 can ground the passing alternating current signal.
The input end of the second inverter D2 receives the control signal ctrl, the input end of the second inverter D2 is electrically connected with the control end of the third switch S3, and the output end of the second inverter D2 is electrically connected with the control end of the fourth switch S4; the first end of the fourth switch S4 is connected with the first end of the third switch S3, and the second end of the fourth switch S4 is grounded through the second resistor R2 and the second capacitor C2; the first terminal of the third switch S3 serves as the first terminal of the second switching unit 602, and the second terminal of the third switch S3 serves as the second terminal of the second switching unit 602.
The control signal ctrl controls the conducting states of the third switch S3 and the fourth switch S4, and the control principle is the same as that of the first switch S1 and the second switch S2, and will not be described herein.
Alternatively, the resistance values of the first resistor R1 and the second resistor R2 are matched with the impedance of the power divider 40. For example, the resistance values of the first resistor R1 and the second resistor R2 may be in the range of 。
Alternatively, the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 may be absorptive switches.
According to the device for realizing serial data transmission, when the node passage is disconnected, the first branch end and the second branch end are grounded through the resistor, so that the influence of connection mismatch of one branch end of the power divider 40 on other branch ports and main ports can be reduced.
In some embodiments, where the bus 10 is a single bus, the master node 20 is connected to the single bus, the first end and the second end of each directional coupler 30 are connected to the single bus, and the third end of each directional coupler 30 is connected to the main end of one power divider 40 through a cable; each of the branch terminals of the power divider 40 is connected to a slave node through a first terminal and a second terminal of the switching module 60.
Specifically, referring to fig. 11, fig. 11 is a schematic structural diagram of a device for implementing serial data transmission according to the present invention. The master node 20 has one end through which the master node 20 is connected to a single bus.
The first end and the second end of each directional coupler 30 are connected with a single bus, after the second end of the last directional coupler 30 is connected with the single bus, the single bus is connected with one end of a terminal resistor, and the other end of the terminal resistor is grounded.
The third end of each directional coupler 30 is connected to the main end of one power divider 40 through a cable, and each divided end of the power divider 40 is connected to a slave node through the first and second ends of the switch module 60.
As shown in fig. 11, the terminal 1 of the power divider 1 is connected to the slave node 1_1 through the port 1 and the port 2 of the switch module 1_1, and the terminal N1 of the power divider 1 is connected to the slave node 1_n1 through the port 1 and the port 2 of the switch module 1_N.
The device for realizing serial data transmission provided by the invention realizes safe serial data transmission between the master control node 20 and the slave node 50 through single-wire connection among the bus 10, the master control node 20, the directional coupler 30, the power divider 40, the switch module 60 and the slave node 50 under the condition that the bus 10 is a single bus.
In some embodiments, the switch module 60 includes: a third switching unit 603;
the first end of the third switching unit 603 serves as a first end of the switching module 60, and the second end of the third switching unit 603 serves as a second end of the switching module 60; the third switch unit 603 is used for controlling the on-off between the terminal of the power divider 40 and the slave node 50.
Specifically, referring to fig. 12, fig. 12 is a second schematic structural diagram of the switch module 60 according to the present invention. The switching module 60 includes a third switching unit 603.
The first end of the third switching unit 603 serves as a first end of the switching module 60, and the second end of the third switching unit 603 serves as a second end of the switching module 60. Each of the terminals of the power divider 40 is connected to a slave node through a third switching unit 603. The third switching unit 603 may control the on-off between the split terminal of the power divider 40 and the slave node 50.
Alternatively, the third switching unit 603 may be a switching circuit including at least one switch therein.
In the device for realizing serial data transmission provided by the invention, under the condition that the bus 10 is a single bus, on one hand, the third switch unit 603 is used for connecting the power divider 40 with the slave node, so that single-wire connection between the power divider 40 and the slave node is realized; on the other hand, the on-off between the power divider 40 and the slave node 50 is controlled, which is beneficial for the subsequent safe transmission of serial data.
In some embodiments, the third switching unit 603 includes: a third inverter D3, a fifth switch S5, a sixth switch S6, a third resistor R3, and a third capacitor C3;
the input end of the third inverter D3 is used for receiving the control signal; the input end of the third reverser D3 is electrically connected with the control end of the fifth switch S5, and the output end of the third reverser D3 is electrically connected with the control end of the sixth switch S6;
A first end of the fifth switch S5 serves as a first end of the third switching unit 603, and a second end of the fifth switch S5 serves as a second end of the third switching unit 603;
the first end of the sixth switch S6 is connected to the first end of the fifth switch, and the second end of the sixth switch S6 is grounded through the third resistor R3 and the third capacitor C3.
Specifically, referring to fig. 13, fig. 13 is a schematic structural diagram of a third switch unit 603 provided in the present invention.
The third switching unit 603 includes: a third inverter D3, a fifth switch S5, a sixth switch S6, a third resistor R3, and a third capacitor C3.
The input end of the third inverter D3 receives the control signal ctrl, the input end of the third inverter D3 is electrically connected with the control end of the fifth switch S5, and the output end of the third inverter D3 is electrically connected with the control end of the sixth switch S6; the first end of the sixth switch S6 is connected with the first end of the fifth switch S5, and the second end of the sixth switch S6 is grounded through a third resistor R3 and a third capacitor C3; a first end of the fifth switch S5 serves as a first end of the third switching unit 603, and a second end of the fifth switch S5 serves as a second end of the third switching unit 603;
the on states of the fifth switch S5 and the sixth switch S6 are controlled by a control signal ctrl. When the control signal ctrl is at a low level, the control terminal of the fifth switch S5 receives the low level, and the fifth switch S5 is turned off; after the control signal ctrl is inverted by the third inverter D3, the output terminal of the third inverter D3 outputs a high level, the control terminal of the sixth switch S6 receives the high level, and the sixth switch S6 is closed. In this case, the terminal of the power divider 40 is disconnected from the slave node 50, and the terminal of the power divider 40 is grounded via the third resistor R3 and the third capacitor C3.
If the branch end of the power divider 40 is disconnected from the slave node 50, the branch end of the power divider 40 is not grounded through the third resistor R3 and the third capacitor C3, so that the matching of the main end is affected, the signal reflection of the main end is caused, the signal integrity of the main end is affected, the matching of other branch ends is also affected, the signal reflection of other branch ends is caused, and the signal integrity of other branch ends is affected.
When the control signal ctrl is at a high level, the control end of the fifth switch S5 receives the high level, and the fifth switch S5 is closed; after the control signal ctrl is inverted by the third inverter D3, the output terminal of the third inverter D3 outputs a low level, the control terminal of the sixth switch S6 receives the low level, and the port of the second switch S2. In this case, the power divider 40 is connected between its branch terminal and the slave node 50.
Optionally, the resistance value of the third resistor R3 is matched to the impedance of the power divider 40. For example, the third resistor R3 may have a resistance value ranging from。
Alternatively, the fifth switch S5 and the sixth switch S6 may be absorption switches.
According to the device for realizing serial data transmission, when the node passage is disconnected, the branch ends of the power divider 40 are grounded through the resistor, so that the influence of connection mismatch of one branch end of the power divider 40 on other branch ports and main ports can be reduced.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (6)
1. An apparatus for implementing serial data transmission, comprising: a master node, at least one directional coupler, at least one power divider and at least one slave node;
the main control node is connected with a bus; the first end and the second end of each directional coupler are connected with the bus; the third end of each directional coupler is connected with the main end of one power divider; each sub-end of the power divider is connected with one slave node;
the apparatus further comprises: a switch module;
each sub-end of the power divider is connected with one slave node through the switch module; the switch module is used for controlling the on-off between the power divider and the slave node;
When the buses are single buses, the main control node is connected with the single buses, the first end and the second end of each directional coupler are connected with the single buses, and the third end of each directional coupler is connected with the main end of one power divider through a cable; each sub-end of the power divider is connected with one slave node through a first end and a second end of the switch module;
the switch module includes: a third switching unit;
the first end of the third switch unit is used as the first end of the switch module, and the second end of the third switch unit is used as the second end of the switch module; the third switch unit is used for controlling the on-off between the split end of the power divider and the slave node;
the third switching unit includes: a third inverter, a fifth switch, a sixth switch, a third resistor and a third capacitor;
the input end of the third inverter is used for receiving a control signal; the input end of the third inverter is electrically connected with the control end of the fifth switch, and the output end of the third inverter is electrically connected with the control end of the sixth switch;
a first end of the fifth switch is used as a first end of the third switch unit, and a second end of the fifth switch is used as a second end of the third switch unit;
The first end of the sixth switch is connected with the first end of the fifth switch, and the second end of the sixth switch is grounded through the third resistor and the third capacitor.
2. The apparatus for implementing serial data transmission according to claim 1, wherein, in the case that the buses are differential buses, the master node is connected to two buses of the differential buses, a first end and a second end of each of the directional couplers are connected to two buses of the differential buses, and a third end of each of the directional couplers is connected to a main end of one of the power splitters through a differential cable;
each branch end of the power divider comprises a first branch end and a second branch end, the first branch end of each branch end is connected with the first end of one slave node, and the second branch end of each branch end is connected with the second end of the slave node.
3. The apparatus for implementing serial data transmission according to claim 1, wherein, in the case that the bus is a single bus, the master node is connected to the single bus, the first end and the second end of each directional coupler are connected to the single bus, and the third end of each directional coupler is connected to the main end of one power divider through a cable; each sub-end of the power divider is connected with one slave node.
4. The apparatus for implementing serial data transmission according to claim 1, wherein, in the case that the buses are differential buses, the master node is connected to two buses of the differential buses, a first end and a second end of each of the directional couplers are connected to two buses of the differential buses, and a third end of each of the directional couplers is connected to a main end of one of the power splitters through a differential cable;
each sub-end of the power divider comprises a first sub-end and a second sub-end; a first sub-end of each sub-end is connected with a first end of one slave node through a first end and a second end of the switch module; the second of the branches is connected to the second of the slave nodes through a third port and a fourth port of the switch module.
5. The apparatus for implementing serial data transmission of claim 4, wherein the switching module comprises: a first switching unit and a second switching unit;
a first end of the first switch unit is used as a first end of the switch module, and a second end of the first switch unit is used as a second end of the switch module; the first switch unit is used for controlling the on-off between the first branch end and the slave node;
The first end of the second switch unit is used as a third end of the switch module, and the second end of the second switch unit is used as a fourth end of the switch module; the second switch unit is used for controlling the on-off between the second branch end and the slave node.
6. The apparatus for implementing serial data transmission according to claim 5, wherein the first switch unit and the second switch unit are identical in structure;
the first switching unit includes: the first inverter, the first switch, the second switch, the first resistor and the first capacitor;
the input end of the first inverter is used for receiving a control signal; the input end of the first inverter is electrically connected with the control end of the first switch, and the output end of the first inverter is electrically connected with the control end of the second switch;
a first end of the first switch is used as a first end of the first switch unit, and a second end of the first switch is used as a second end of the first switch unit;
the first end of the second switch is connected with the first end of the first switch, and the second end of the second switch is grounded through the first resistor and the first capacitor.
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