CN116647198A - power amplifier circuit - Google Patents
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- CN116647198A CN116647198A CN202310480785.6A CN202310480785A CN116647198A CN 116647198 A CN116647198 A CN 116647198A CN 202310480785 A CN202310480785 A CN 202310480785A CN 116647198 A CN116647198 A CN 116647198A
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The application provides a power amplifier circuit, which comprises a signal input end, an input matching network, a first transistor, an interstage matching network, a second transistor, an output matching network and a signal output end which are sequentially connected, wherein the input end of a second resonant circuit is connected with the first output end of a second bias circuit; the emitter of the second transistor is grounded, and the collector of the second transistor is respectively connected in series with a second inductor and is connected to a second power supply voltage and the input end of the output matching network; the power amplifier circuit further comprises a current limiting circuit, a first end of the current limiting circuit is connected with the input end of the interstage matching network, a second end of the current limiting circuit is connected with the input end of the second resonant circuit, and a third end of the current limiting circuit is connected with the second output end of the second biasing circuit. The power amplifier circuit can improve gain and efficiency and has high reliability.
Description
Technical Field
The application relates to the technical field of wireless communication, in particular to a power amplifier circuit.
Background
With the advent of the information age, wireless communication technology has been rapidly developed, and from cellular phones, wireless local area networks, bluetooth, etc., have become an integral part of social life and development. The progress of wireless communication technology has not been separated from the development of radio frequency circuits. As modern wireless communication systems evolve and evolve, so too does the requirements for data transmission rates and capabilities.
Currently, in the power amplifier of today's portable mobile communication devices, the distance between the base station and the mobile device may cause the output power of the power amplifier to increase or decrease. Therefore, a technique for suppressing linearity distortion is required in the process of increasing and decreasing the output power of the power amplifier, and the power consumption is reduced to a certain extent to improve the overall efficiency. In simple linear rf/microwave amplifier designs, S-parameter matching is typically used to maximize gain. It is also desirable that the gain and power consumption in the low power mode be as low as possible.
However, the gain and efficiency improvement effect of the power amplifier is poor, the reliability is low, and the application range is small.
Disclosure of Invention
Aiming at the defects in the prior art, the application provides a power amplifier circuit to solve the problems of poor gain and efficiency improving effect, low reliability and small application range of the existing power amplifier circuit.
In order to solve the technical problems, the application adopts the following technical scheme:
the embodiment of the application provides a power amplifier circuit, which comprises a signal input end, an input matching network, a first transistor, an interstage matching network, a second transistor, an output matching network and a signal output end which are sequentially connected, wherein the power amplifier circuit further comprises a first resonant circuit, a second resonant circuit, a first capacitor, a second capacitor, a first bias circuit for providing bias voltage for the first transistor and a second bias circuit for providing bias voltage for the second transistor;
the first end of the first capacitor is respectively connected with the output end of the input matching network and the first output end of the first resonant circuit, the second end of the first capacitor is respectively connected with the base electrode of the first transistor and the second output end of the first resonant circuit, and the input end of the first resonant circuit is connected with the output end of the first bias circuit; the emitter of the first transistor is grounded, the collector of the first transistor is connected with a first power supply voltage after being connected with a first inductor in series, and the collector of the first transistor is simultaneously connected with the input end of the inter-stage matching network;
the first end of the second capacitor is respectively connected with the output end of the interstage matching network and the first output end of the second resonant circuit, the second end of the second capacitor is respectively connected with the base electrode of the second transistor and the second output end of the second resonant circuit, and the input end of the second resonant circuit is connected with the first output end of the second bias circuit; the emitter of the second transistor is grounded, the collector of the second transistor is connected with a second power supply voltage after being connected with a second inductor in series, and the collector of the second transistor is simultaneously connected with the input end of the output matching network;
the power amplifier circuit further comprises a current limiting circuit, a first end of the current limiting circuit is connected with the input end of the interstage matching network, a second end of the current limiting circuit is connected with the input end of the second resonant circuit, and a third end of the current limiting circuit is connected with the second output end of the second biasing circuit.
Preferably, the power amplifier circuit further comprises a third transistor, a third capacitor, a third resonant circuit and a third bias circuit;
the first end of the third capacitor is respectively connected with the output end of the input matching network and the first output end of the third resonant circuit, the second end of the third capacitor is respectively connected with the base electrode of the third transistor and the second output end of the third resonant circuit, and the input end of the third resonant circuit is connected with the output end of the third bias circuit; and the collector of the third transistor is connected with the input end of the interstage matching network, and the emitter of the third transistor is grounded.
Preferably, the power amplifier circuit further comprises a fourth transistor, a fourth capacitor, a fourth resonant circuit and a fourth bias circuit;
the first end of the fourth capacitor is respectively connected with the output end of the inter-stage matching network and the first output end of the fourth resonant circuit, the second end of the fourth capacitor is respectively connected with the base electrode of the fourth transistor and the second output end of the fourth resonant circuit, and the input end of the fourth resonant circuit is connected with the output end of the fourth bias circuit; and the collector electrode of the fourth transistor is connected with the input end of the output matching network, and the emitter electrode of the fourth transistor is grounded.
Preferably, the first resonant circuit includes a fifth capacitor, a third inductor and a first resistor, wherein a first end of the fifth capacitor is used as a first output end of the first resonant circuit, a second end of the fifth capacitor is connected with a first end of the third inductor, a first end of the first resistor is used as a second output end of the first resonant circuit, and a second end of the third inductor and a second end of the first resistor are connected and jointly used as an input end of the first resonant circuit.
Preferably, the second resonant circuit includes a sixth capacitor, a fourth inductor and a second resistor, where a first end of the sixth capacitor is used as a first output end of the second resonant circuit, a second end of the sixth capacitor is connected to a first end of the fourth inductor, a first end of the second resistor is used as a second output end of the second resonant circuit, and a second end of the fourth inductor and a second end of the second resistor are connected together to be used as an input end of the second resonant circuit.
Preferably, the third resonant circuit includes a seventh capacitor, a fifth inductor and a third resistor, where a first end of the seventh capacitor is used as a first output end of the third resonant circuit, a second end of the seventh capacitor is connected to a first end of the fifth inductor, a first end of the third resistor is used as a second output end of the third resonant circuit, and a second end of the fifth inductor and a second end of the third resistor are connected together to serve as an input end of the third resonant circuit.
Preferably, the fourth resonant circuit includes an eighth capacitor, a sixth inductor and a fourth resistor, where a first end of the eighth capacitor is used as a first output end of the fourth resonant circuit, a second end of the eighth capacitor is connected to a first end of the sixth inductor, a first end of the fourth resistor is used as a second output end of the fourth resonant circuit, and a second end of the sixth inductor and a second end of the fourth resistor are connected together to be used as an input end of the fourth resonant circuit.
Preferably, the first bias circuit, the second bias circuit, the third bias circuit and the fourth bias circuit have the same structure;
the second bias circuit comprises a fifth transistor, a sixth transistor, a seventh transistor, a fifth resistor and a ninth capacitor;
the first end of the fifth resistor is used as the input end of the second bias circuit and is used for being connected with bias voltage, and the second end of the fifth resistor is connected with the collector electrode of the sixth transistor;
the collector of the fifth transistor is used for being connected with a bias power supply, the base of the fifth transistor is respectively connected with the collector of the sixth transistor and the first end of the ninth capacitor, and the emitter of the fifth transistor is used as the first output end of the second bias circuit;
the base electrode of the sixth transistor is connected with the collector electrode of the sixth transistor, and the emitter electrode of the sixth transistor is connected with the collector electrode of the seventh transistor;
the base of the seventh transistor is connected to the collector of the seventh transistor, and the emitter of the seventh transistor is connected to the second terminal of the ninth capacitor and commonly grounded.
Preferably, the current limiting circuit includes a sixth resistor, a seventh resistor, and an eighth transistor; the first end of the seventh resistor is used as the first end of the current limiting circuit, the second end of the seventh resistor is connected with the collector of the eighth transistor, the emitter of the eighth transistor is used as the second end of the current limiting circuit, the base of the eighth transistor is connected with the first end of the sixth resistor, and the second end of the sixth resistor is used as the third end of the current limiting circuit.
Compared with the related art, in the embodiment of the application, the first end of the first capacitor is respectively connected with the output end of the input matching network and the first output end of the first resonant circuit, the second end of the first capacitor is respectively connected with the base electrode of the first transistor and the second output end of the first resonant circuit, and the input end of the first resonant circuit is connected with the output end of the first bias circuit; the emitter of the first transistor is grounded, the collector of the first transistor is connected to the first power supply voltage after being connected in series with the first inductor, and the collector of the first transistor is simultaneously connected to the input end of the inter-stage matching network; the first end of the second capacitor is respectively connected with the output end of the interstage matching network and the first output end of the second resonant circuit, the second end of the second capacitor is respectively connected with the base electrode of the second transistor and the second output end of the second resonant circuit, and the input end of the second resonant circuit is connected with the output end of the second bias circuit; the emitter of the second transistor is grounded, the collector of the second transistor is connected with the second power supply voltage after being connected with the second inductor in series, and the collector of the second transistor is simultaneously connected with the input end of the output matching network. In this way, the first transistor and the second transistor are respectively resonated by the first resonant circuit and the second resonant circuit, so that the resonant frequency of the first transistor and the second transistor can be changed, the alternating current component of the bias current can be changed, and the gain compression and the deterioration of the distortion characteristic can be more accurately restrained. Meanwhile, in designing a Power Amplifier (PA), a technique of suppressing deterioration of linearity distortion and using different operation states of a first transistor and a second transistor are added to adjust gains of a high power mode and a low power mode of the amplifier and to enhance power added efficiency in the low power mode.
Drawings
The present application will be described in detail with reference to the accompanying drawings. The foregoing and other aspects of the application will become more apparent and more readily appreciated from the following detailed description taken in conjunction with the accompanying drawings. In the accompanying drawings:
FIG. 1 is a circuit diagram of a power amplifier circuit in an embodiment of the application;
FIG. 2 is a circuit diagram of a power amplifier circuit in an embodiment of the application;
FIG. 3 is a data diagram of efficiency and current in a low power mode of a prior art amplifier circuit;
fig. 4 is a data graph of efficiency and current in the low power mode of fig. 2.
The power amplifier circuit comprises 100 parts of a power amplifier circuit, 1 part of a signal input end, 2 parts of an input matching network, 3 parts of an interstage matching network, 4 parts of an output matching network, 5 parts of a signal output end, 6 parts of a first resonant circuit, 7 parts of a second resonant circuit, 8 parts of a third resonant circuit, 9 parts of a fourth resonant circuit, 10 parts of a first bias circuit, 11 parts of a second bias circuit, 12 parts of a third bias circuit, 13 parts of a fourth bias circuit, 14 parts of a current limiting circuit.
Detailed Description
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used in the description of the applications herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having" and any variations thereof in the description of the application and the claims and the description of the drawings above are intended to cover a non-exclusive inclusion. The terms first, second and the like in the description and in the claims or in the above-described figures, are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Referring to fig. 1-4, an embodiment of the present application provides a power amplifier circuit 100, which includes a signal input terminal 1 (RFIN), an input matching network 2, a first transistor Q1, an inter-stage matching network 3, a second transistor Q2, an output matching network 4, and a signal output terminal 5 (RFOUT) connected in sequence, where the power amplifier circuit 100 further includes a first resonant circuit 6, a second resonant circuit 7, a first capacitor C1, a second capacitor C2, a first bias circuit 10 for providing a bias voltage to the first transistor Q1, and a second bias circuit 11 for providing a bias voltage to the second transistor Q2.
The first end of the first capacitor C1 is connected to the output end of the input matching network 2 and the first output end of the first resonant circuit 6, the second end of the first capacitor C1 is connected to the base of the first transistor Q1 and the second output end of the first resonant circuit 6, the input end of the first resonant circuit 6 is connected to the first output end of the first bias circuit 10, the emitter of the first transistor Q1 is grounded, the collector of the first transistor Q1 is connected to the first power supply voltage VCC1 via the first inductor L1 in series, and the collector of the first transistor Q1 is connected to the input end of the inter-stage matching network 3.
A first end of the second capacitor C2 is connected to the output end of the inter-stage matching network 3 and the first output end of the second resonant circuit 7, a second end of the second capacitor C2 is connected to the base of the second transistor Q2 and the second output end of the second resonant circuit 7, and an input end of the second resonant circuit 7 is connected to the output end of the second bias circuit 11; the emitter of the second transistor Q2 is grounded, the collector of the second transistor Q2 is connected to the second power supply voltage VCC2 through the series connection second inductor L2, and the collector of the second transistor Q2 is simultaneously connected to the input end of the output matching network 4.
The first capacitor C1 and the second capacitor C2 function as a dc blocking function. The first inductor L1 and the second inductor L2 are used for preventing radio frequency signals from leaking to the first power supply voltage VCC1 and the second power supply voltage VCC2 respectively. The first bias circuit 10 and the second bias circuit 11 are configured to supply base voltages to the first transistor Q1 and the second transistor Q2, respectively; the first transistor Q1 and the second transistor Q2 are used to amplify the radio frequency signal.
In this way, the first transistor Q1 and the second transistor Q2 are respectively resonated by the first resonant circuit 6 and the second resonant circuit 7, and the resonant frequency thereof can be changed, so that the alternating current component of the bias current is changed, whereby the gain compression and the deterioration of the distortion characteristics can be suppressed more accurately. Meanwhile, in designing a Power Amplifier (PA), a technique of suppressing deterioration of linearity distortion and using different operating states of the first transistor Q1 and the second transistor Q2 are added to adjust gains of a high power mode and a low power mode of the amplifier and to enhance power added efficiency in the low power mode.
In this embodiment, the power amplifier circuit 100 further includes a current limiting circuit 14, a first end of the current limiting circuit 14 is connected to the input end of the inter-stage matching network 3, a second end of the current limiting circuit 14 is connected to the input end of the second resonant circuit 7, and a third end of the current limiting circuit 14 is connected to the base of the fifth transistor. When the second bias circuit 11 provides the bias voltage for the second transistor Q2, a part of the base circuit output by the second bias circuit 11 can be extracted by the current limiting circuit 14, so that the collector current of the second transistor Q2 can be correspondingly reduced, and further the effect of improving the efficiency is achieved.
In the present embodiment, the power amplifier circuit 100 further includes a third transistor Q3, a third capacitor C3, a third resonance circuit 8, and a third bias circuit 12. The first end of the third capacitor C3 is connected to the output end of the input matching network 2 and the first output end of the third resonant circuit 8, the second end of the third capacitor C3 is connected to the base of the third transistor Q3 and the second output end of the third resonant circuit 8, the input end of the third resonant circuit 8 is connected to the output end of the third bias circuit 12, the collector of the third transistor Q3 is connected to the input end of the inter-stage matching network 3, and the emitter of the third transistor Q3 is grounded.
In the present embodiment, the power amplifier circuit 100 further includes a fourth transistor Q4, a fourth capacitor C4, a fourth resonant circuit 9, and a fourth bias circuit 13; the first end of the fourth capacitor C4 is connected to the output end of the inter-stage matching network 3 and the first output end of the fourth resonant circuit 9, the second end of the fourth capacitor C4 is connected to the base of the fourth transistor Q4 and the second output end of the fourth resonant circuit 9, the input end of the fourth resonant circuit 9 is connected to the output end of the fourth bias circuit 13, the collector of the fourth transistor Q4 is connected to the input end of the output matching network 4, and the emitter of the fourth transistor Q4 is grounded.
Wherein the output matching network 4 is used for impedance matching so as to minimize the power transmission loss between the first transistor Q1 and the third transistor Q3; the inter-stage matching is to perform impedance matching between the first transistor Q1 and the third transistor Q3 of the front stage and the second transistor Q2 and the fourth transistor Q4 of the rear stage, so that the power output by the front stage can reach the rear stage more; the output matching is impedance matching between the second transistor Q2 and the fourth transistor Q4 to the output terminal so that the output power is maximized.
Specifically, when the power amplification circuit operates in the low power mode, the first bias circuit 10, the second bias circuit 11, the third bias circuit 12 and the fourth bias circuit 13 operate in different states, respectively, the first bias circuit 10 does not provide a voltage to the first transistor Q1, and the third bias circuit 12 provides a bias voltage to the third transistor Q3; the second bias circuit 11 does not provide a voltage to the second transistor Q2, and the fourth bias circuit 13 provides a bias voltage to the fourth transistor Q4, so that only the third transistor Q3 and the fourth transistor Q4 operate, and the gain in this mode is greatly reduced, and the overall efficiency is improved.
When the power amplifying circuit operates in the high power mode, the first bias circuit 10, the second bias circuit 11, the third bias circuit 12 and the fourth bias circuit 13 respectively operate in different states, the first bias circuit 10 provides bias voltage to the first transistor Q1, the second bias circuit 11 provides voltage to the second transistor Q2, and the third bias circuit 12 provides bias voltage to the third transistor Q3; the fourth bias circuit 13 supplies a bias voltage to the fourth transistor Q4 so that all four transistors are operated, so that the amplifier can maximize the gain.
Of course, the four transistors Q1-Q4 described above may be combined in either a low power mode or a high power mode to meet the requirement of no gain. For example, the first transistor Q1 is operated, the second transistor Q2 is operated, the third transistor Q3 is not operated, and the fourth transistor Q4 is not operated, so that the purpose of high gain can be achieved. Alternatively, the first transistor Q1 is not operated, the second transistor Q2 is operated, the third transistor Q3 is operated, the fourth transistor Q4 is not operated, and the purposes of low gain and efficiency compromise can be achieved, and the like.
The transistor is formed of a bipolar transistor such as a heterojunction bipolar transistor (HBT: heterojunction Bipolar Transistor). The transistor may be formed of other transistors such as a field effect transistor (MOSFET: metal oxide semiconductor FieldEffect Transistor, metal oxide semiconductor field effect transistor). In this case, the base, collector, and emitter may be replaced with a gate, drain, and source, respectively.
The first transistor Q1, the second transistor Q2, the third transistor Q3 and the fourth transistor Q4 may be one transistor or may be formed by connecting several transistors in parallel, which is not strictly limited herein, and is completely determined by the area of the transistors after the design simulation.
In this embodiment, the first resonant circuit 6 includes a fifth capacitor C5, a third inductor L3, and a first resistor R1, where a first end of the fifth capacitor C5 is used as a first output end of the first resonant circuit 6, a second end of the fifth capacitor C5 is connected to the first end of the third inductor L3, a first end of the first resistor R1 is used as a second output end of the first resonant circuit 6, and a second end of the third inductor L3 and a second end of the first resistor R1 are connected and jointly used as an input end of the first resonant circuit 6.
In this embodiment, the second resonant circuit 7 includes a sixth capacitor C6, a fourth inductor L4, and a second resistor R2, where a first end of the sixth capacitor C6 is used as a first output end of the second resonant circuit 7, a second end of the sixth capacitor C6 is connected to the first end of the fourth inductor L4, a first end of the second resistor R2 is used as a second output end of the second resonant circuit 7, and a second end of the fourth inductor L4 and a second end of the second resistor R2 are connected together to be used as an input end of the second resonant circuit 7.
In this embodiment, the third resonant circuit 8 includes a seventh capacitor C7, a fifth inductor L5, and a third resistor R3, where a first end of the seventh capacitor C7 is used as a first output end of the third resonant circuit 8, a second end of the seventh capacitor C7 is connected to the first end of the fifth inductor L5, a first end of the third resistor R3 is used as a second output end of the third resonant circuit 8, and a second end of the fifth inductor L5 and a second end of the third resistor R3 are connected together to be used as an input end of the third resonant circuit 8.
In this embodiment, the fourth resonant circuit 9 includes an eighth capacitor C8, a sixth inductor L6, and a fourth resistor R4, where a first end of the eighth capacitor C8 is used as a first output end of the fourth resonant circuit 9, a second end of the eighth capacitor C8 is connected to the first end of the sixth inductor L6, a first end of the fourth resistor R4 is used as a second output end of the fourth resonant circuit 9, and a second end of the sixth inductor L6 and a second end of the fourth resistor R4 are connected together to be used as an input end of the fourth resonant circuit 9.
Specifically, the fifth capacitor C5, the sixth capacitor C6, the seventh capacitor C7, and the eighth capacitor C8 are regarded as open structures with respect to the dc component, and are regarded as short-circuit conduction with respect to the ac component. Thus, the first bias circuit 10, the second bias circuit 11, the third bias circuit 12, and the fourth bias circuit 13 can be caused to flow to the base of the first transistor Q1, the base of the second transistor Q2, the base of the third transistor Q3, and the base of the fourth transistor Q4, respectively, and the ac component of the bias current of the base of the first transistor Q1, the base of the second transistor Q2, the base of the third transistor Q3, and the base of the fourth transistor Q4 flows to the bases of the transistors efficiently through the first capacitor C1 and the fifth capacitor C5, the second capacitor C2 and the sixth capacitor C6, the third capacitor C3 and the seventh capacitor C7, and the fourth capacitor C4 and the eighth capacitor C8, respectively. It is possible to effectively suppress gain compression of an amplifier and suppress deterioration of distortion characteristics of the amplifier.
Specifically, by properly connecting the fifth capacitor C5, the sixth capacitor C6, the seventh capacitor C7, and the eighth capacitor C8 in series to the third inductor L3, the fourth inductor L4, the fifth inductor L5, and the sixth inductor L6, respectively, to form a resonant circuit, the resonant frequency thereof can be changed, and the ac component of the bias current can be changed, thereby more pseudo-accurately suppressing deterioration of gain compression and distortion characteristics.
The first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 are respectively used for ballasting the first resonant circuit 6, the second resonant circuit 7, the third resonant circuit 8 and the fourth resonant circuit 9, and are used for improving the thermal stability of the corresponding first transistor Q1, the second transistor Q2, the third transistor Q3 and the fourth transistor Q4.
In this embodiment, the first bias circuit 10, the second bias circuit 11, the third bias circuit 12, and the fourth bias circuit 13 have the same structure.
The second bias circuit 11 includes a fifth transistor Q11, a sixth transistor Q12, a seventh transistor Q13, a fifth resistor R7, and a ninth capacitor C11.
A first end of the fifth resistor R7 is used as an input end of the second bias circuit 11 for connecting the bias voltage Vreg2, and a second end of the fifth resistor R7 is connected to the collector of the sixth transistor Q12.
The collector of the fifth transistor Q11 is configured to be connected to a bias power supply VBAT, the base of the fifth transistor Q11 is respectively connected to the collector of the sixth transistor Q12 and the first end of the ninth capacitor, and the emitter of the fifth transistor Q11 is used as the first output end of the second bias circuit 11.
The base of the sixth transistor Q12 is connected to the collector of the sixth transistor Q12, and the emitter of the sixth transistor Q12 is connected to the collector of the seventh transistor Q13.
The base of the seventh transistor Q13 is connected to the collector of the seventh transistor Q13, and the emitter of the seventh transistor Q13 is connected to the second terminal of the ninth capacitor C11 and is commonly grounded.
In this embodiment, the first bias circuit 10 includes a resistor R5, a transistor Q6, a transistor Q7, and a capacitor C9.
In this embodiment, the third bias circuit 12 includes a resistor R6, a transistor Q8, a transistor Q9, a transistor Q10, and a capacitor C10.
In this embodiment, the fourth bias circuit 13 includes a resistor R8, a transistor Q14, a transistor Q15, a transistor Q17, and a capacitor C12. Since the first bias circuit 10, the second bias circuit 11, the third bias circuit 12 and the fourth bias circuit 13 have the same structure. The circuit is the same as the second bias circuit 11 and the technical effects produced are the same and will not be described here.
In the present embodiment, the current limiting circuit 14 includes a sixth resistor R9, a seventh resistor R10, and an eighth transistor Q16; the first end of the seventh resistor R10 is used as the first end of the current limiting circuit 14, the second end of the seventh resistor R10 is connected to the collector of the eighth transistor Q16, the emitter of the eighth transistor Q16 is used as the second end of the current limiting circuit 14, the base of the eighth transistor Q16 is connected to the first end of the sixth resistor R9, and the second end of the sixth resistor R9 is used as the third end of the current limiting circuit 14.
Specifically, one end of the seventh resistor R10 of the current limiting circuit 14 is connected to the collector of the first transistor Q1, and the other end is connected to the collector of Q16; one end of the sixth resistor R9 is connected with the base electrode of the Q11, and the other end of the sixth resistor R9 is connected with the base electrode of the eighth transistor Q16; an emitter of the eighth transistor Q16 is connected with the fourth inductor L4, the second resistor R2 and an emitter of the fifth transistor Q11;
in most practical use cases, the first power supply voltage VCC1 and the second power supply voltage VCC2 are connected to the battery together, so that the first power supply voltage VCC1 and the second power supply voltage VCC2 may change in voltage at the same time; when the voltages of the first power supply voltage VCC1 and the second power supply voltage VCC2 are lower than the base voltage of the second transistor Q2, the voltage at the C node is reduced by the seventh resistor R10 and then reaches the collector voltage of the eighth transistor Q16, which is lower than the first power supply voltage VCC1, the emitter of the eighth transistor Q16 is connected to the base of the second transistor Q2 by the second resistor R2, so that the emitter voltage of the eighth transistor Q16 is higher than the voltage of the second power supply voltage VCC2 and is higher than the collector voltage of the eighth transistor Q16, i.e., the voltage at the point E is higher than the voltage at the point C, and since the voltage at the point B is generated by clamping the sixth transistor Q12 and the seventh transistor Q13, the voltage at the point B is higher than the voltage at the point E, the base-collector of the eighth transistor Q16 is forward biased, and the voltage at the point E is higher than the voltage at the point C, so that the current flows from the emitter to the collector, i.e., the current flows to the point C; therefore, when the bias voltage is provided to the second transistor Q2, the bias circuit 3 of the fifth transistor Q11 will draw a part of the base current at the point E by the current limiting circuit 14, so that the collector current of the second transistor Q2 will be correspondingly reduced, thereby achieving the effect of improving the efficiency.
When the voltages of the first power supply voltage VCC1 and the second power supply voltage VCC2 are higher than the base voltage of the second transistor Q2, the eighth transistor Q16 is in a normal amplifying state, the current at the point B is split and then is sent to the base of the fifth transistor Q11, and the current at the point E is sent to the base of the eighth transistor Q16 after being sent to the sixth resistor R9, so that the current after reaching the point E is less than that of the current-free circuit, and the base current of the second transistor Q2 of the whole circuit is not greatly affected.
In this embodiment, fig. 3 is a data diagram of efficiency and current in the low power mode without adding the amplifier circuit of fig. 1 of the present application. FIG. 4 is a data diagram of efficiency and current in a low power mode of the amplifier circuit of FIG. 2 with the addition of a circuit limiting circuit; it can be seen that the efficiency of the power amplifier added with the current limiting circuit 14 is improved by 2%, the current is reduced by 14mA, and the current limiting circuit 14 really plays an important role.
It should be noted that the above embodiments described above with reference to the drawings are only for illustrating the present application and not for limiting the scope of the present application, and it should be understood by those skilled in the art that modifications or equivalent substitutions to the present application are intended to be included in the scope of the present application without departing from the spirit and scope of the present application. Furthermore, unless the context indicates otherwise, words occurring in the singular form include the plural form and vice versa. In addition, unless specifically stated, all or a portion of any embodiment may be used in combination with all or a portion of any other embodiment.
Claims (9)
1. The power amplifier circuit comprises a signal input end, an input matching network, a first transistor, an interstage matching network, a second transistor, an output matching network and a signal output end which are sequentially connected, and is characterized by further comprising a first resonant circuit, a second resonant circuit, a first capacitor, a second capacitor, a first bias circuit for providing bias voltage for the first transistor and a second bias circuit for providing bias voltage for the second transistor;
the first end of the first capacitor is respectively connected with the output end of the input matching network and the first output end of the first resonant circuit, the second end of the first capacitor is respectively connected with the base electrode of the first transistor and the second output end of the first resonant circuit, and the input end of the first resonant circuit is connected with the output end of the first bias circuit; the emitter of the first transistor is grounded, the collector of the first transistor is connected with a first power supply voltage after being connected with a first inductor in series, and the collector of the first transistor is simultaneously connected with the input end of the inter-stage matching network;
the first end of the second capacitor is respectively connected with the output end of the interstage matching network and the first output end of the second resonant circuit, the second end of the second capacitor is respectively connected with the base electrode of the second transistor and the second output end of the second resonant circuit, and the input end of the second resonant circuit is connected with the first output end of the second bias circuit; the emitter of the second transistor is grounded, the collector of the second transistor is connected with a second power supply voltage after being connected with a second inductor in series, and the collector of the second transistor is simultaneously connected with the input end of the output matching network;
the power amplifier circuit further comprises a current limiting circuit, a first end of the current limiting circuit is connected with the input end of the interstage matching network, a second end of the current limiting circuit is connected with the input end of the second resonant circuit, and a third end of the current limiting circuit is connected with the second output end of the second biasing circuit.
2. The power amplifier circuit of claim 1, further comprising a third transistor, a third capacitor, a third resonant circuit, and a third bias circuit;
the first end of the third capacitor is respectively connected with the output end of the input matching network and the first output end of the third resonant circuit, the second end of the third capacitor is respectively connected with the base electrode of the third transistor and the second output end of the third resonant circuit, and the input end of the third resonant circuit is connected with the output end of the third bias circuit; and the collector of the third transistor is connected with the input end of the interstage matching network, and the emitter of the third transistor is grounded.
3. The power amplifier circuit of claim 2, further comprising a fourth transistor, a fourth capacitor, a fourth resonant circuit, and a fourth bias circuit;
the first end of the fourth capacitor is respectively connected with the output end of the inter-stage matching network and the first output end of the fourth resonant circuit, the second end of the fourth capacitor is respectively connected with the base electrode of the fourth transistor and the second output end of the fourth resonant circuit, and the input end of the fourth resonant circuit is connected with the output end of the fourth bias circuit; and the collector electrode of the fourth transistor is connected with the input end of the output matching network, and the emitter electrode of the fourth transistor is grounded.
4. The power amplifier circuit of claim 1, wherein the first resonant circuit comprises a fifth capacitor, a third inductor, and a first resistor, the first end of the fifth capacitor being the first output of the first resonant circuit, the second end of the fifth capacitor being connected to the first end of the third inductor, the first end of the first resistor being the second output of the first resonant circuit, the second end of the third inductor and the second end of the first resistor being connected and together being the input of the first resonant circuit.
5. The power amplifier circuit of claim 1, wherein the second resonant circuit comprises a sixth capacitor, a fourth inductor, and a second resistor, a first end of the sixth capacitor being a first output of the second resonant circuit, a second end of the sixth capacitor being connected to the first end of the fourth inductor, a first end of the second resistor being a second output of the second resonant circuit, a second end of the fourth inductor and a second end of the second resistor being connected together as an input of the second resonant circuit.
6. A power amplifier circuit according to claim 3, wherein the third resonant circuit comprises a seventh capacitor, a fifth inductor and a third resistor, the first end of the seventh capacitor being the first output of the third resonant circuit, the second end of the seventh capacitor being connected to the first end of the fifth inductor, the first end of the third resistor being the second output of the third resonant circuit, the second end of the fifth inductor and the second end of the third resistor being connected together as the input of the third resonant circuit.
7. A power amplifier circuit according to claim 3, wherein the fourth resonant circuit comprises an eighth capacitor, a sixth inductor and a fourth resistor, the first end of the eighth capacitor being the first output of the fourth resonant circuit, the second end of the eighth capacitor being connected to the first end of the sixth inductor, the first end of the fourth resistor being the second output of the fourth resonant circuit, the second end of the sixth inductor and the second end of the fourth resistor being connected together as the input of the fourth resonant circuit.
8. The power amplifier circuit of claim 3, wherein the first bias circuit, the second bias circuit, the third bias circuit, and the fourth bias circuit are identical in structure;
the second bias circuit comprises a fifth transistor, a sixth transistor, a seventh transistor, a fifth resistor and a ninth capacitor;
the first end of the fifth resistor is used as the input end of the second bias circuit and is used for being connected with bias voltage, and the second end of the fifth resistor is connected with the collector electrode of the sixth transistor;
the collector of the fifth transistor is used for being connected with a bias power supply, the base of the fifth transistor is respectively connected with the collector of the sixth transistor and the first end of the ninth capacitor, and the emitter of the fifth transistor is used as the first output end of the second bias circuit;
the base electrode of the sixth transistor is connected with the collector electrode of the sixth transistor, and the emitter electrode of the sixth transistor is connected with the collector electrode of the seventh transistor;
the base of the seventh transistor is connected to the collector of the seventh transistor, and the emitter of the seventh transistor is connected to the second terminal of the ninth capacitor and commonly grounded.
9. The power amplifier circuit of claim 8, wherein the current limiting circuit comprises a sixth resistor, a seventh resistor, and an eighth transistor; the first end of the seventh resistor is used as the first end of the current limiting circuit, the second end of the seventh resistor is connected with the collector of the eighth transistor, the emitter of the eighth transistor is used as the second end of the current limiting circuit, the base of the eighth transistor is connected with the first end of the sixth resistor, and the second end of the sixth resistor is used as the third end of the current limiting circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310480785.6A CN116647198A (en) | 2023-04-28 | 2023-04-28 | power amplifier circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310480785.6A CN116647198A (en) | 2023-04-28 | 2023-04-28 | power amplifier circuit |
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| CN116647198A true CN116647198A (en) | 2023-08-25 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117728781A (en) * | 2024-02-10 | 2024-03-19 | 深圳飞骧科技股份有限公司 | Power amplifier |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117728781A (en) * | 2024-02-10 | 2024-03-19 | 深圳飞骧科技股份有限公司 | Power amplifier |
| CN117728781B (en) * | 2024-02-10 | 2024-04-26 | 深圳飞骧科技股份有限公司 | Power amplifier |
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