CN116645998A - Built-in self-test monitoring device and method for solid state disk - Google Patents
Built-in self-test monitoring device and method for solid state disk Download PDFInfo
- Publication number
- CN116645998A CN116645998A CN202310531244.1A CN202310531244A CN116645998A CN 116645998 A CN116645998 A CN 116645998A CN 202310531244 A CN202310531244 A CN 202310531244A CN 116645998 A CN116645998 A CN 116645998A
- Authority
- CN
- China
- Prior art keywords
- solid state
- state disk
- test
- upper computer
- monitoring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000007787 solid Substances 0.000 title claims abstract description 272
- 238000012360 testing method Methods 0.000 title claims abstract description 175
- 238000012806 monitoring device Methods 0.000 title claims abstract description 91
- 238000000034 method Methods 0.000 title claims abstract description 42
- 238000012544 monitoring process Methods 0.000 claims abstract description 117
- 238000004891 communication Methods 0.000 claims abstract description 42
- 230000002159 abnormal effect Effects 0.000 claims abstract description 35
- 230000005856 abnormality Effects 0.000 claims abstract description 18
- 238000001514 detection method Methods 0.000 claims abstract description 5
- 238000006243 chemical reaction Methods 0.000 claims description 13
- 238000003780 insertion Methods 0.000 claims description 2
- 230000037431 insertion Effects 0.000 claims description 2
- 238000002955 isolation Methods 0.000 abstract description 8
- 238000010586 diagram Methods 0.000 description 10
- 230000006870 function Effects 0.000 description 8
- 230000008569 process Effects 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 238000013403 standard screening design Methods 0.000 description 4
- RVCKCEDKBVEEHL-UHFFFAOYSA-N 2,3,4,5,6-pentachlorobenzyl alcohol Chemical compound OCC1=C(Cl)C(Cl)=C(Cl)C(Cl)=C1Cl RVCKCEDKBVEEHL-UHFFFAOYSA-N 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 240000007651 Rubus glaucus Species 0.000 description 1
- 235000011034 Rubus glaucus Nutrition 0.000 description 1
- 235000009122 Rubus idaeus Nutrition 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004171 remote diagnosis Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000012956 testing procedure Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Debugging And Monitoring (AREA)
Abstract
The invention relates to the field of built-in self-test of solid state disks, and particularly discloses a built-in self-test monitoring device and method of a solid state disk, wherein a disk slot is used for plugging a solid state disk to be tested; the solid state disk monitoring module is connected with the corresponding hard disk slot and monitors the testing state of the inserted solid state hardware to be tested; the controller module is respectively connected with the communication interface and each solid state disk detection module, acquires a related state acquisition command issued by the upper computer through the communication interface, acquires a test state of the solid state disk to be tested from the corresponding solid state disk detection module according to the related state acquisition command, and feeds the test state back to the upper computer through the communication interface; and simultaneously, responding to the abnormality of the solid state disk to be detected, controlling the abnormal power failure of the solid state disk to be detected, and transmitting the abnormality information to the upper computer. The invention automatically monitors the built-in self-test of the solid state disk, realizes the automatic isolation of timely alarm and dangerous conditions, improves the efficiency of the built-in self-test operation, optimizes the test and improves the test productivity.
Description
Technical Field
The invention relates to the field of built-in self-test of solid state disks, in particular to a built-in self-test monitoring device and method of a solid state disk.
Background
With the rapid improvement of the performance of the server, the storage performance of the server is one of the bottlenecks of the server, so that the server is matched with a high-performance SSD (solid state disk) to become a mainstream mode gradually. The more powerful the performance, the more strict the production quality requirements, and the more refined test links are needed to be taken into account. For example, commercial grade SSDs have incorporated more stringent testing procedures after PCBA production. Wherein the BIST (technique for embedding relevant functional circuits in a circuit for providing a self-test function at the time of design) test is an indispensable test stage after the PCBA is manufactured.
The BIST test stage needs to power on the hard disk inserted into the corresponding interface, the hard disk automatically enters the BIST test after the power on, however, the traditional operation is basically in manual observation operation, for example, the related technology adopts offline manual operation, some SSDs are inevitably abnormal in the BIST test, the abnormality can be detected only when the line inspection is performed, the time can be found after the abnormality occurs for a long time or all SSDs are tested, thus the efficiency is low, the effective positioning is slow, the application rate of the jig is low, the test cost is high, and when the abnormal disk is in a dangerous state, such as large current appears on the abnormal disk, the whole jig test is influenced, even the temperature is ultrahigh, the abnormal SSDs cannot be manually inserted into the system in time for processing, and a certain risk is caused to the test.
Disclosure of Invention
In order to solve the problems, the invention provides a built-in self-test monitoring device and method for a solid state disk, which automatically monitor built-in self-tests of the solid state disk, realize automatic isolation of timely alarming and dangerous situations, improve the efficiency of built-in self-test operation of the solid state disk, optimize the test and improve the test productivity.
In a first aspect, the present invention provides a built-in self-test monitoring device for a solid state disk, including a plurality of disk slots, a plurality of solid state disk monitoring modules, a controller module and a communication interface; the number of the hard disk slots is the same as that of the solid state disk monitoring modules, and the hard disk slots are in one-to-one correspondence with the solid state disk monitoring modules;
hard disk slot: the device is used for being inserted into the solid state disk to be tested;
the solid state disk monitoring module: the method comprises the steps of connecting with corresponding hard disk slots, and monitoring the test state of the inserted solid-state hardware to be tested;
and a controller module: the system comprises a communication interface, a solid state disk detection module, a communication interface, a state acquisition command and a state feedback module, wherein the communication interface is used for acquiring a related state acquisition command issued by an upper computer; and simultaneously, responding to the abnormality of the solid state disk to be detected, controlling the abnormal power failure of the solid state disk to be detected, and transmitting the abnormality information to the upper computer.
In an optional implementation manner, the monitoring device further comprises an upper computer control interface, and the upper computer control interface is respectively connected with the controller module and each solid state disk monitoring module;
correspondingly, the controller module responds to the related gating instruction issued by the upper computer and acquired from the upper computer control interface, and gates the corresponding solid state disk monitoring module according to the related gating instruction, so that the gated solid state disk monitoring module is communicated with the upper computer, and the monitored test state is sent to the upper computer.
In an alternative embodiment, the upper computer control interface includes a first universal asynchronous receiver/transmitter signal pin, a second universal asynchronous receiver/transmitter signal pin, and a bus signal pin;
the monitoring device also comprises a bus control module; the solid state disk monitoring module comprises a universal asynchronous receiver-transmitter control unit and a bus control unit;
the first universal asynchronous receiver/transmitter signal pin of the upper computer control interface is connected with the universal asynchronous receiver/transmitter control unit of each solid state disk monitoring module, and the bus signal pin is connected with the bus control unit of each solid state disk monitoring module through the bus control module;
and a second general asynchronous transceiver signal pin of the upper computer control interface is connected with the controller module.
In an alternative embodiment, the upper computer control interface further comprises a chip selection enabling signal pin, and the chip selection enabling signal pin is connected with the controller module.
In an alternative embodiment, the communication interface is a universal serial bus interface;
the monitoring device also comprises a mode conversion module and an interconnection universal asynchronous receiver-transmitter module;
the communication interface is connected with the mode conversion module, the mode conversion module is connected with the controller module, and the mode conversion module is connected with a second general asynchronous transceiver signal pin of the upper computer control interface.
In an alternative embodiment, the monitoring device further comprises a power interface; the solid state disk monitoring module further comprises a power supply monitoring unit;
the power interface is connected with the power monitoring units of the solid state disk monitoring modules, and obtains power from the external power supply component to supply power to the solid state disk monitoring modules.
In an alternative embodiment, the monitoring device further comprises a system power supply module and an upper computer power supply interface;
the system power supply module is used for supplying power to other parts except the solid state disk monitoring module on the monitoring device, and the upper computer power supply interface is used for supplying power to the upper computer.
In an alternative embodiment, the monitoring device further comprises a display interface;
the display interface is connected with the controller module and displays the test state on the external display device.
In a second aspect, the present invention provides a method for monitoring a built-in self-test of a solid state disk, which is executed by the monitoring device described in any one of the above, and includes the following steps:
responding to the insertion of the slot position of the hard disk into the solid state disk to be tested and electrifying, and monitoring the test state of the solid state disk to be tested;
responding to a state acquisition command sent by the upper computer, and sending the monitored testing state of the corresponding solid state disk to be tested to the upper computer according to the identification information of the solid state disk to be tested contained in the state acquisition command;
responding to a gating command sent by an upper computer, gating an interface corresponding to the solid state disk to be tested according to the identification information of the solid state disk to be tested contained in the gating command, and directly acquiring the testing state of the solid state disk to be tested by the upper computer;
and responding to the detected abnormality of the solid state disk, controlling the abnormal solid state disk to be detected to be powered off, and transmitting the abnormality information to the upper computer.
In a third aspect, the present invention provides a method for monitoring a built-in self-test of a solid state disk, which is executed by an upper computer, and includes the following steps:
transmitting a status acquisition command to any one of the monitoring devices described above;
receiving the testing state of the solid state disk to be tested fed back by the monitoring device;
sending a gating command to the monitoring device;
directly acquiring the test state of the selected solid state disk to be tested;
and receiving the abnormal information sent by the monitoring device.
Compared with the prior art, the built-in self-test monitoring device and method for the solid state disk have the following beneficial effects: the method comprises the steps of setting a solid state disk monitoring module, a controller module and a communication interface, automatically monitoring the testing state of the solid state disk to be tested by the solid state disk monitoring module, and feeding back the testing state to an upper computer by the controller module through the communication interface, thereby automatically monitoring the built-in self-test of the solid state disk in real time. The invention automatically monitors the built-in self-test of the solid state disk, realizes the automatic isolation of timely alarming and dangerous situations, improves the efficiency of the built-in self-test operation of the solid state disk, optimizes the test and improves the test productivity.
Drawings
For a clearer description of embodiments of the invention or of the prior art, the drawings that are used in the description of the embodiments or of the prior art will be briefly described, it being apparent that the drawings in the description below are only some embodiments of the invention, and that other drawings can be obtained from them without inventive effort for a person skilled in the art.
Fig. 1 is a schematic block diagram of a built-in self-test monitoring device for a solid state disk according to an embodiment of the present invention.
Fig. 2 is a schematic block diagram of a built-in self-test monitoring device for a solid state disk according to a second embodiment of the present invention.
Fig. 3 is a schematic block diagram of a built-in self-test monitoring device for a solid state disk according to a third embodiment of the present invention.
FIG. 4 is a schematic diagram of a connection structure between an upper computer and a plurality of monitoring devices.
Fig. 5 is a flow chart of a method for monitoring a built-in self-test of a solid state disk according to a fourth embodiment of the present invention.
Fig. 6 is a flow chart of a method for monitoring built-in self-test of a solid state disk according to a fifth embodiment of the present invention.
Fig. 7 is a schematic structural diagram of a terminal according to a sixth embodiment of the present invention.
Detailed Description
In order to better understand the aspects of the present invention, the present invention will be described in further detail with reference to the accompanying drawings and detailed description. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
The following explains key terms appearing in the present invention.
BIST: during design, related functional circuits are implanted in the circuit to provide a self-test function, so that the dependency of device testing on Automatic Test Equipment (ATE) is reduced, and the circuit is named as a built-in self-test technology.
SSD: solid State Disk, solid State Disk.
UART: universal Asynchronous Receiver/Transmitter, universal asynchronous receiver Transmitter.
USB: universal Serial Bus, universal serial bus.
I2C: an integrated circuit bus.
SFF-8639 interface: conventional U.2 hard disk interfaces.
PCBA: printed Circuit Board Assembly, a printed circuit board is assembled.
Example 1
Fig. 1 is a schematic block diagram of a built-in self-test monitoring device for a solid state disk according to a first embodiment of the present invention, where, as shown in fig. 1, the monitoring device includes a plurality of disk slots, a plurality of solid state disk monitoring modules, a controller module, and a communication interface.
The number of the hard disk slots is the same as that of the solid state disk monitoring modules and corresponds to the solid state disk monitoring modules one by one.
Hard disk slot: the socket is used for being inserted into the solid state disk to be tested.
The solid state disk monitoring module: and the device is connected with the corresponding hard disk slot, and monitors the test state of the inserted solid-state hardware to be tested.
And a controller module: the system comprises a communication interface, a solid state disk detection module, a communication interface, a state acquisition command and a state feedback module, wherein the communication interface is used for acquiring a related state acquisition command issued by an upper computer; and simultaneously, responding to the abnormality of the solid state disk to be detected, controlling the abnormal power failure of the solid state disk to be detected, and transmitting the abnormality information to the upper computer.
During testing, the communication interface is connected with the upper computer and communicated with the controller module. The solid state disk to be tested is inserted into the hard disk slot, and BIST test is automatically performed after power-on. The solid state disk monitoring module obtains the testing state of the inserted solid state hardware to be tested. The controller module obtains the testing state of each solid state disk to be tested from each solid state disk monitoring module. When a state acquisition command issued by the upper computer is received, the solid state disk identification to be detected contained in the state acquisition command is analyzed, the target solid state disk to be detected is further positioned, and the test state of the target solid state disk to be detected is fed back to the upper computer, so that a tester does not need to observe manually, and the automatic acquisition of the test state is realized. Meanwhile, the controller module monitors whether the solid state disk to be detected is abnormal or not through the solid state disk monitoring module, and when the solid state disk to be detected is abnormal, the solid state disk monitoring module controls the abnormal solid state disk to be detected to be powered off and transmits abnormal information to the upper computer, so that a tester can acquire the abnormal information in time and process the abnormal information in time.
The built-in self-test monitoring device for the solid state disk is provided with a solid state disk monitoring module, a controller module and a communication interface, the solid state disk monitoring module automatically monitors the test state of the solid state disk to be tested, and the controller module feeds the test state back to the upper computer through the communication interface to automatically monitor the built-in self-test of the solid state disk in real time. The invention automatically monitors the built-in self-test of the solid state disk, realizes the automatic isolation of timely alarming and dangerous situations, improves the efficiency of the built-in self-test operation of the solid state disk, optimizes the test and improves the test productivity.
Example two
Fig. 2 is a schematic block diagram of a built-in self-test monitoring device for a solid state disk according to a second embodiment of the present invention, where, as shown in fig. 2, the monitoring device includes a plurality of disk slots, a plurality of solid state disk monitoring modules, a controller module, a communication interface, and an upper computer control interface.
The number of the hard disk slots is the same as that of the solid state disk monitoring modules and corresponds to the solid state disk monitoring modules one by one.
The hard disk slot is connected with the solid state disk monitoring modules, each solid state disk monitoring module is connected with the controller module, and the controller module is respectively connected with the communication interface and the upper computer control interface.
The hard disk slot is used for plugging a solid state disk to be tested; and the solid state disk monitoring module monitors the testing state of the inserted solid state hardware to be tested. The controller module acquires the testing state of the solid state disk to be tested from the solid state disk monitoring module, responds to the abnormality of the solid state disk to be tested, controls the abnormal solid state disk to be tested to be powered off, and transmits the abnormality information to the upper computer.
The communication interface and the upper computer control interface are used for being connected with an upper computer, and meanwhile, the upper computer control interface is also connected with each solid state disk monitoring module.
The controller module is communicated with the upper computer through a communication interface and an upper computer control interface, and has two communication modes: the first mode is that the upper computer sends a state acquisition command to the controller module through the communication interface, and the controller module feeds back the acquired test state of the solid state disk to be tested to the upper computer; the second mode is that the upper computer sends related gating instructions issued by the upper computer to the controller module through the upper computer control interface, the controller module responds to the related gating instructions issued by the upper computer obtained from the upper computer control interface, and gates the corresponding solid state disk monitoring modules according to the related gating instructions, so that the gated solid state disk monitoring modules are communicated with the upper computer, and the monitored test state is sent to the upper computer. The gating instruction comprises a solid state disk identifier to be gated to be detected, the controller module analyzes the solid state disk identifier to be detected contained in the gating instruction, and then positions the solid state disk to be detected to a target solid state disk to be detected, and gates the target solid state disk to be detected, so that the target solid state disk to be detected is communicated with the upper computer. In the second mode, the upper computer directly acquires the test state of the target solid state disk to be tested.
In an alternative embodiment, the upper computer control interface includes a first universal asynchronous receiver signal pin, a second universal asynchronous receiver signal pin, and a bus signal pin. Correspondingly, the solid state disk monitoring module comprises a universal asynchronous transceiver control unit and a bus control unit, and the monitoring device is also provided with the bus control module.
The first universal asynchronous receiver/transmitter signal pin of the upper computer control interface is connected with the universal asynchronous receiver/transmitter control unit of each solid state disk monitoring module, and the bus signal pin is connected with the bus control unit of each solid state disk monitoring module through the bus control module; and a second general asynchronous transceiver signal pin of the upper computer control interface is connected with the controller module.
The bus control module plays a role in avoiding the collision of I2C of each hard disk slot position, and is controlled by the controller module to play a role in accurately accessing the solid state disk with the target slot position. And the universal asynchronous transceiver control unit and the bus control unit of the solid state disk monitoring module are used for controlling the universal asynchronous transceiver interface and the bus interface corresponding to the hard disk slot to work so as to avoid access conflict.
During testing, the communication interface and the upper computer control interface are connected with the upper computer and are communicated with the controller module. The solid state disk to be tested is inserted into the hard disk slot, and BIST test is automatically performed after power-on. The solid state disk monitoring module obtains the testing state of the inserted solid state hardware to be tested. The controller module obtains the testing state of each solid state disk to be tested from each solid state disk monitoring module. When a state acquisition command issued by the upper computer is received through the communication interface, the to-be-tested solid state disk identification contained in the state acquisition command is analyzed, the to-be-tested solid state disk is further positioned to the target to-be-tested solid state disk, and the test state of the target to-be-tested solid state disk is fed back to the upper computer, so that a tester does not need to observe manually, and the automatic acquisition of the test state is realized. Meanwhile, the controller module monitors whether the solid state disk to be detected is abnormal or not through the solid state disk monitoring module, and when the solid state disk to be detected is abnormal, the solid state disk monitoring module controls the abnormal solid state disk to be detected to be powered off and transmits abnormal information to the upper computer, so that a tester can acquire the abnormal information in time and process the abnormal information in time. When a gating instruction sent by the upper computer through a second general asynchronous transceiver signal pin of the upper computer control interface is received, analyzing the identifier of the solid state disk to be tested contained in the gating instruction, positioning the solid state disk to be tested to the target solid state disk to be tested, gating the target solid state disk to be tested, enabling the target solid state disk to be tested to be communicated with the upper computer, and directly acquiring the testing state of the target solid state disk to be tested by the upper computer.
The built-in self-test monitoring device for the solid state disk is provided with a solid state disk monitoring module, a controller module and a communication interface, the solid state disk monitoring module automatically monitors the test state of the solid state disk to be tested, and the controller module feeds the test state back to the upper computer through the communication interface to automatically monitor the built-in self-test of the solid state disk in real time. The invention automatically monitors the built-in self-test of the solid state disk, realizes the automatic isolation of timely alarming and dangerous situations, improves the efficiency of the built-in self-test operation of the solid state disk, optimizes the test and improves the test productivity.
Example III
Fig. 3 is a schematic block diagram of a built-in self-test monitoring device for a solid state disk according to a third embodiment of the present invention, where, as shown in fig. 3, the monitoring device includes a plurality of disk slots, a plurality of solid state disk monitoring modules, a controller module, a universal serial bus interface, an upper computer control interface, a bus control module, a mode conversion module, and an interconnection universal asynchronous receiver-transmitter module.
The number of the hard disk slots is the same as that of the solid state disk monitoring modules and corresponds to the solid state disk monitoring modules one by one.
The hard disk slot is connected with the solid state disk monitoring modules, each solid state disk monitoring module is connected with the controller module, the controller module is respectively connected with the interconnection universal asynchronous receiver-transmitter module and the upper computer control interface, the interconnection universal asynchronous receiver-transmitter module is connected with the mode conversion module, and the mode conversion module is connected with the universal serial bus interface.
The upper computer control interface comprises a first universal asynchronous receiver-transmitter signal pin, a second universal asynchronous receiver-transmitter signal pin, a bus signal pin and a chip selection enabling signal pin; the solid state disk monitoring module comprises a universal asynchronous transceiver control unit and a bus control unit.
The first universal asynchronous receiver/transmitter signal pin of the upper computer control interface is connected with the universal asynchronous receiver/transmitter control unit of each solid state disk monitoring module, and the bus signal pin is connected with the bus control unit of each solid state disk monitoring module through the bus control module. And a second general asynchronous transceiver signal pin of the upper computer control interface is connected with the interconnection general asynchronous transceiver module. The chip selection enabling signal pin of the upper computer control interface is connected with the controller module.
During testing, the universal serial bus interface and the upper computer control interface are respectively connected with the upper computer. The hard disk slot is inserted into the solid state disk to be tested.
Universal serial bus interface: and the test state interaction between the controller module and the upper computer is realized.
And a mode conversion module: the conversion of the universal asynchronous receiver-transmitter signal and the universal serial bus signal is realized.
Interconnecting universal asynchronous receiver-transmitter modules: and receiving a control signal of the controller module to select the working direction of the module and control the data transmission direction of the module.
The bus control module plays a role in avoiding the I2C conflict of each hard disk slot position, and is controlled by the controller module to play a role in accurately accessing the solid state disk with the target slot position. And the universal asynchronous transceiver control unit and the bus control unit of the solid state disk monitoring module are used for controlling the universal asynchronous transceiver interface and the bus interface corresponding to the hard disk slot to work so as to avoid access conflict.
The monitoring device also comprises a power interface, a system power supply module and an upper computer power supply interface. Correspondingly, the solid state disk monitoring module further comprises a power supply monitoring unit.
The power interface is connected with the power monitoring units of the solid state disk monitoring modules, and obtains power from the external power supply component to supply power to the solid state disk monitoring modules. When the solid state disk is in BIST operation, the solid state disk has high power, so that the power supply is required to meet the requirements of a plurality of disk slots and extra power supply of the system. One PSU power supply may be configured for each monitoring device.
The power supply monitoring unit of the solid state disk monitoring module monitors the power supply condition of the disk slot in real time and feeds monitoring information back to the controller module for the controller module to judge the test state. Meanwhile, the power-off can be controlled instantaneously when the accident happens, so that accidental dangerous operation is avoided.
The system power supply module is used for supplying power to other parts except the solid state disk monitoring module on the monitoring device, and the upper computer power supply interface is used for supplying power to the upper computer. The system power supply module is a downlink power supply end of the power interface.
The monitoring device is also provided with a display interface, and the display interface is connected with the controller module and displays the testing state on external display equipment for a tester to check on site.
In an alternative embodiment, the hard disk slots may be SFF-8639 interfaces, with 22 hard disk slots configured on each monitoring device.
During testing, the universal serial bus interface and the upper computer control interface are connected with the upper computer and are communicated with the controller module. The solid state disk to be tested is inserted into the hard disk slot, and BIST test is automatically performed after power-on. The solid state disk monitoring module obtains the testing state of the inserted solid state hardware to be tested. The controller module obtains the testing state of each solid state disk to be tested from each solid state disk monitoring module. When a state acquisition command issued by the upper computer is received through the universal serial bus interface, the identifier of the solid state disk to be tested contained in the state acquisition command is analyzed, the solid state disk to be tested is further positioned to the target solid state disk to be tested, and the test state of the target solid state disk to be tested is fed back to the upper computer, so that a tester does not need to observe manually, and the automatic acquisition of the test state is realized. Meanwhile, the controller module monitors whether the solid state disk to be detected is abnormal or not through the solid state disk monitoring module, and when the solid state disk to be detected is abnormal, the solid state disk monitoring module controls the abnormal solid state disk to be detected to be powered off and transmits abnormal information to the upper computer, so that a tester can acquire the abnormal information in time and process the abnormal information in time. When a gating instruction sent by the upper computer through a second general asynchronous transceiver signal pin of the upper computer control interface is received, analyzing the identifier of the solid state disk to be tested contained in the gating instruction, positioning the solid state disk to be tested to the target solid state disk to be tested, gating the target solid state disk to be tested, enabling the target solid state disk to be tested to be communicated with the upper computer, and directly acquiring the testing state of the target solid state disk to be tested by the upper computer.
In order to realize simultaneous monitoring of more solid state disk BIST tests, an upper computer can be connected with a plurality of monitoring devices at the same time, and fig. 4 is a schematic diagram of a connection structure of the upper computer and the plurality of monitoring devices, wherein each monitoring device is provided with a PSU power supply, so that power supply of each monitoring device is ensured to be sufficient. Each monitoring device is interconnected, the interconnection can be realized through an upper computer control interface, and only a first monitoring device is connected with an upper computer, namely, the plurality of monitoring devices are controlled by one upper computer. It should be noted that, the upper computer control interface includes a chip selection enabling signal pin, and the monitoring device is gated by using the pin signal, so that the testing devices monitored by the monitoring devices can be circularly and sequentially obtained. The upper computer is connected to the network through the network cable, and any node in the network environment can realize access and control of the board card under the authorized condition, thereby realizing the purpose of remote diagnosis.
The built-in self-test monitoring device for the solid state disk is provided with a solid state disk monitoring module, a controller module and a communication interface, the solid state disk monitoring module automatically monitors the test state of the solid state disk to be tested, and the controller module feeds the test state back to the upper computer through the communication interface to automatically monitor the built-in self-test of the solid state disk in real time. The invention automatically monitors the built-in self-test of the solid state disk, realizes the automatic isolation of timely alarming and dangerous situations, improves the efficiency of the built-in self-test operation of the solid state disk, optimizes the test and improves the test productivity.
Example IV
The embodiment of the built-in self-test monitoring device for the solid state disk is described in detail above, and the built-in self-test monitoring device for the solid state disk based on the embodiment of the invention also provides a built-in self-test monitoring method for the solid state disk corresponding to the monitoring device.
Fig. 5 is a schematic flow chart of a method for monitoring a built-in self-test of a solid state disk according to a fourth embodiment of the present invention, where the method is executed by the monitoring device according to the above embodiment, as shown in fig. 5, and the method includes the following steps.
S1, responding to the fact that the slot positions of the hard disks are inserted into the solid state disk to be tested, powering on, and monitoring the testing state of the solid state disk to be tested.
And S2, responding to a state acquisition command sent by the upper computer, and sending the monitored testing state of the corresponding solid state disk to be tested to the upper computer according to the identification information of the solid state disk to be tested contained in the state acquisition command.
And S3, responding to the received gating command sent by the upper computer, gating the interface corresponding to the solid state disk to be tested according to the identification information of the solid state disk to be tested contained in the gating command, and directly obtaining the testing state of the solid state disk to be tested by the upper computer.
And S4, controlling the abnormal solid state disk to be tested to be powered off in response to the detected abnormality of the solid state disk to be tested, and transmitting abnormality information to the upper computer.
The method for monitoring the built-in self-test of the solid state disk is based on the device for monitoring the built-in self-test of the solid state disk, so that the specific implementation of the method can be seen from the foregoing example parts of the device for monitoring the built-in self-test of the solid state disk, and therefore, the specific implementation of the method can be referred to the description of the corresponding examples of the parts and will not be described herein.
In addition, since the built-in self-test monitoring method of the solid state disk is based on the built-in self-test monitoring device of the solid state disk, the function of the built-in self-test monitoring device corresponds to that of the built-in self-test monitoring device of the solid state disk, and the description is omitted here.
Example five
The embodiments of the built-in self-test monitoring device and the corresponding monitoring method for the solid state disk are described in detail above, and the built-in self-test monitoring device and the monitoring method for the solid state disk described based on the embodiments of the invention also provide a built-in self-test monitoring method for the solid state disk, which corresponds to the monitoring device and is executed by an upper computer.
Fig. 6 is a schematic flow chart of a method for monitoring a built-in self-test of a solid state disk according to a fifth embodiment of the present invention, where the method is executed by the monitoring device according to the above embodiment, as shown in fig. 6, and the method includes the following steps.
SS1, sends status acquisition command to the monitoring device.
The monitoring device is the monitoring device described in the above embodiment.
And SS2, receiving the test state of the solid state disk to be tested fed back by the monitoring device.
And SS3, sending a gating command to the monitoring device.
And SS4, directly acquiring the test state of the selected solid state disk to be tested.
And SS5, receiving the abnormal information sent by the monitoring device.
The upper computer can select raspberry pie, and of course, other types of computer equipment, terminals and the like can also be used.
The method for monitoring the built-in self-test of the solid state disk is based on the device for monitoring the built-in self-test of the solid state disk, so that the specific implementation of the method can be seen from the foregoing example parts of the device for monitoring the built-in self-test of the solid state disk, and therefore, the specific implementation of the method can be referred to the description of the corresponding examples of the parts and will not be described herein.
In addition, since the built-in self-test monitoring method of the solid state disk is based on the built-in self-test monitoring device of the solid state disk, the function of the built-in self-test monitoring device corresponds to that of the built-in self-test monitoring device of the solid state disk, and the description is omitted here.
Example six
Fig. 7 is a schematic structural diagram of a terminal according to an embodiment of the present invention, including: a processor, a memory and a communication unit. The processor is used for realizing the following steps when a self-test monitoring program is built in the solid state disk stored in the memory:
sending a state acquisition command to the monitoring device;
receiving the testing state of the solid state disk to be tested fed back by the monitoring device;
sending a gating command to the monitoring device;
directly acquiring the test state of the selected solid state disk to be tested;
and receiving the abnormal information sent by the monitoring device.
The invention automatically monitors the built-in self-test of the solid state disk, realizes the automatic isolation of timely alarming and dangerous situations, improves the efficiency of the built-in self-test operation of the solid state disk, optimizes the test and improves the test productivity.
The terminal comprises a processor, a memory and a communication unit. The components may communicate via one or more buses, and it will be appreciated by those skilled in the art that the configuration of the server as shown in the drawings is not limiting of the invention, as it may be a bus-like structure, a star-like structure, or include more or fewer components than shown, or may be a combination of certain components or a different arrangement of components.
The memory may be implemented by any type of volatile or nonvolatile memory terminal or combination thereof, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk, among others, for storing instructions for execution by the processor. The execution instructions in the memory, when executed by the processor, enable the terminal to perform some or all of the steps in the method embodiments described below.
The processor is a control center of the memory terminal, connects various parts of the entire electronic terminal using various interfaces and lines, and executes various functions of the electronic terminal and/or processes data by running or executing software programs and/or modules stored in the memory, and invoking data stored in the memory. The processor may be comprised of an integrated circuit (Integrated Circuit, simply referred to as an IC), for example, a single packaged IC, or may be comprised of a plurality of packaged ICs connected to the same function or different functions. For example, the processor 310 may include only a central processing unit (Central Processing Unit, simply CPU). In the embodiment of the invention, the CPU can be a single operation core or can comprise multiple operation cores.
And the communication unit is used for establishing a communication channel so that the storage terminal can communicate with other terminals. Receiving user data sent by other terminals or sending the user data to other terminals.
Example seven
The invention also provides a computer storage medium, which can be a magnetic disk, an optical disk, a read-only memory (ROM) or a random access memory (random access memory, RAM) and the like.
The computer storage medium stores a built-in self-test monitoring program of the solid state disk, and the built-in self-test monitoring program of the solid state disk realizes the following steps when being executed by a processor:
sending a state acquisition command to the monitoring device;
receiving the testing state of the solid state disk to be tested fed back by the monitoring device;
sending a gating command to the monitoring device;
directly acquiring the test state of the selected solid state disk to be tested;
and receiving the abnormal information sent by the monitoring device.
The invention automatically monitors the built-in self-test of the solid state disk, realizes the automatic isolation of timely alarming and dangerous situations, improves the efficiency of the built-in self-test operation of the solid state disk, optimizes the test and improves the test productivity.
It will be apparent to those skilled in the art that the techniques of embodiments of the present invention may be implemented in software plus a necessary general purpose hardware platform. Based on such understanding, the technical solution in the embodiments of the present invention may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium such as a U-disc, a mobile hard disc, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk or an optical disk, etc. various media capable of storing program codes, including several instructions for causing a computer terminal (which may be a personal computer, a server, or a second terminal, a network terminal, etc.) to execute all or part of the steps of the method described in the embodiments of the present invention.
In the several embodiments provided by the present invention, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The foregoing disclosure is merely illustrative of the preferred embodiments of the invention and the invention is not limited thereto, since modifications and variations may be made by those skilled in the art without departing from the principles of the invention.
Claims (10)
1. The built-in self-test monitoring device for the solid state disk is characterized by comprising a plurality of disk slots, a plurality of solid state disk monitoring modules, a controller module and a communication interface; the number of the hard disk slots is the same as that of the solid state disk monitoring modules and corresponds to the solid state disk monitoring modules one by one;
hard disk slot: the device is used for being inserted into the solid state disk to be tested;
the solid state disk monitoring module: the method comprises the steps of connecting with corresponding hard disk slots, and monitoring the test state of the inserted solid-state hardware to be tested;
and a controller module: the system comprises a communication interface, a solid state disk detection module, a communication interface, a state acquisition command and a state feedback module, wherein the communication interface is used for acquiring a related state acquisition command issued by an upper computer; and simultaneously, responding to the abnormality of the solid state disk to be detected, controlling the abnormal power failure of the solid state disk to be detected, and transmitting the abnormality information to the upper computer.
2. The built-in self-test monitoring device of the solid state disk of claim 1, further comprising an upper computer control interface, wherein the upper computer control interface is respectively connected with the controller module and each solid state disk monitoring module;
correspondingly, the controller module responds to the related gating instruction issued by the upper computer and acquired from the upper computer control interface, and gates the corresponding solid state disk monitoring module according to the related gating instruction, so that the gated solid state disk monitoring module is communicated with the upper computer, and the monitored test state is sent to the upper computer.
3. The built-in self-test monitoring device of claim 2, wherein the upper computer control interface comprises a first universal asynchronous receiver-transmitter signal pin, a second universal asynchronous receiver-transmitter signal pin, and a bus signal pin;
the monitoring device also comprises a bus control module; the solid state disk monitoring module comprises a universal asynchronous receiver-transmitter control unit and a bus control unit;
the first universal asynchronous receiver/transmitter signal pin of the upper computer control interface is connected with the universal asynchronous receiver/transmitter control unit of each solid state disk monitoring module, and the bus signal pin is connected with the bus control unit of each solid state disk monitoring module through the bus control module;
and a second general asynchronous transceiver signal pin of the upper computer control interface is connected with the controller module.
4. The built-in self-test monitoring device of claim 3, wherein the upper computer control interface further comprises a chip select enable signal pin, the chip select enable signal pin being connected to the controller module.
5. The built-in self-test monitoring device of claim 4, wherein the communication interface is a universal serial bus interface;
the monitoring device also comprises a mode conversion module and an interconnection universal asynchronous receiver-transmitter module;
the communication interface is connected with the mode conversion module, the mode conversion module is connected with the controller module, and the mode conversion module is connected with a second general asynchronous transceiver signal pin of the upper computer control interface.
6. The built-in self-test monitoring device of claim 5, further comprising a power interface; the solid state disk monitoring module further comprises a power supply monitoring unit;
the power interface is connected with the power monitoring units of the solid state disk monitoring modules, and obtains power from the external power supply component to supply power to the solid state disk monitoring modules.
7. The built-in self-test monitoring device of claim 6, further comprising a system power module and an upper computer power interface;
the system power supply module is used for supplying power to other parts except the solid state disk monitoring module on the monitoring device, and the upper computer power supply interface is used for supplying power to the upper computer.
8. The built-in self-test monitoring device of claim 7, further comprising a display interface;
the display interface is connected with the controller module and displays the test state on the external display device.
9. A method for monitoring a built-in self test of a solid state disk, which is performed by the monitoring device of any one of claims 1 to 8, comprising the steps of:
responding to the insertion of the slot position of the hard disk into the solid state disk to be tested and electrifying, and monitoring the test state of the solid state disk to be tested;
responding to a state acquisition command sent by the upper computer, and sending the monitored testing state of the corresponding solid state disk to be tested to the upper computer according to the identification information of the solid state disk to be tested contained in the state acquisition command;
responding to a gating command sent by an upper computer, gating an interface corresponding to the solid state disk to be tested according to the identification information of the solid state disk to be tested contained in the gating command, and directly acquiring the testing state of the solid state disk to be tested by the upper computer;
and responding to the detected abnormality of the solid state disk, controlling the abnormal solid state disk to be detected to be powered off, and transmitting the abnormality information to the upper computer.
10. The built-in self-test monitoring method for the solid state disk is characterized by being executed by an upper computer and comprising the following steps of:
transmitting a status acquisition command to the monitoring device of any one of claims 1-8;
receiving the testing state of the solid state disk to be tested fed back by the monitoring device;
sending a gating command to the monitoring device;
directly acquiring the test state of the selected solid state disk to be tested;
and receiving the abnormal information sent by the monitoring device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310531244.1A CN116645998A (en) | 2023-05-11 | 2023-05-11 | Built-in self-test monitoring device and method for solid state disk |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310531244.1A CN116645998A (en) | 2023-05-11 | 2023-05-11 | Built-in self-test monitoring device and method for solid state disk |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116645998A true CN116645998A (en) | 2023-08-25 |
Family
ID=87622214
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310531244.1A Pending CN116645998A (en) | 2023-05-11 | 2023-05-11 | Built-in self-test monitoring device and method for solid state disk |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116645998A (en) |
-
2023
- 2023-05-11 CN CN202310531244.1A patent/CN116645998A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106055438B (en) | The method and system of memory bar exception on a kind of quick positioning mainboard | |
| EP1881331B1 (en) | Testing device, diagnostic program, and diagnostic method | |
| US20130268708A1 (en) | Motherboard test device and connection module thereof | |
| CN115210589A (en) | Chip testing device and testing method | |
| US20080262759A1 (en) | System and method for testing information handling system components | |
| CN111858197A (en) | Device, system and method for supporting multiple SSD tests | |
| US11828787B2 (en) | Eye diagram capture test during production | |
| CN112269120A (en) | Interface signal loop test method and device, computer equipment and storage medium | |
| CN111831495A (en) | Production automation test method and system | |
| CN109656756B (en) | Multi-core CPU board debugging method and device and mobile storage medium | |
| CN113268386B (en) | System software and authentication level principle debugging system for prototype | |
| CN113391965A (en) | Universal test device and test method for aviation bus | |
| CN107766198B (en) | Server mainboard monitoring system | |
| CN111290891B (en) | Computer system and method for testing computer system | |
| CN116645998A (en) | Built-in self-test monitoring device and method for solid state disk | |
| CN110018934A (en) | A kind of system and method based on server master board quick diagnosis power-on error | |
| CN115421028A (en) | Testing machine, testing system and testing method | |
| US11703936B2 (en) | Master-slave interchangeable power supply device and host thereof, master-slave interchangeable power supply method and computer-readable storage medium thereof | |
| CN102377593A (en) | Network management card test device and method | |
| CN114019357A (en) | Management method of test pin of logic processing module and related assembly | |
| CN110874293A (en) | Hot plug testing device | |
| CN210181591U (en) | Power-on time sequence detection device | |
| CN220671580U (en) | Test platform, jig and system for server board card | |
| US20070259569A1 (en) | Device and Method for Generating Predetermined Signal Patterns | |
| CN114414261B (en) | Vehicle test bed and vehicle test method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: 215100 Building 9, No.1 guanpu Road, Guoxiang street, Wuzhong Economic Development Zone, Suzhou City, Jiangsu Province Applicant after: Suzhou Yuannao Intelligent Technology Co.,Ltd. Address before: 215100 Building 9, No.1 guanpu Road, Guoxiang street, Wuzhong Economic Development Zone, Suzhou City, Jiangsu Province Applicant before: SUZHOU LANGCHAO INTELLIGENT TECHNOLOGY Co.,Ltd. |
|
| CB02 | Change of applicant information | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20230920 Address after: No. 48 Guihui Avenue, Wangwu Village, Xiaomeng Street Office, Economic Development Zone, Guiyang City, Guizhou Province, 550000 Applicant after: Guiyang Inspur Intelligent Technology Co.,Ltd. Address before: 215100 Building 9, No.1 guanpu Road, Guoxiang street, Wuzhong Economic Development Zone, Suzhou City, Jiangsu Province Applicant before: Suzhou Yuannao Intelligent Technology Co.,Ltd. |
|
| TA01 | Transfer of patent application right |