CN116623288A - Epitaxial wafer and preparation method and application thereof - Google Patents
Epitaxial wafer and preparation method and application thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 27
- 230000006911 nucleation Effects 0.000 claims abstract description 121
- 238000010899 nucleation Methods 0.000 claims abstract description 116
- 150000004767 nitrides Chemical class 0.000 claims abstract description 108
- 239000000758 substrate Substances 0.000 claims abstract description 39
- 239000002131 composite material Substances 0.000 claims abstract description 16
- 238000003780 insertion Methods 0.000 claims description 70
- 230000037431 insertion Effects 0.000 claims description 70
- 238000010438 heat treatment Methods 0.000 claims description 69
- 238000000034 method Methods 0.000 claims description 63
- 239000002243 precursor Substances 0.000 claims description 53
- 239000012298 atmosphere Substances 0.000 claims description 15
- 238000005530 etching Methods 0.000 claims description 10
- 238000009830 intercalation Methods 0.000 claims description 5
- 230000001681 protective effect Effects 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 239000013078 crystal Substances 0.000 abstract description 16
- 239000010410 layer Substances 0.000 description 371
- 230000008569 process Effects 0.000 description 45
- 235000012431 wafers Nutrition 0.000 description 42
- 239000000463 material Substances 0.000 description 17
- 239000011777 magnesium Substances 0.000 description 15
- 229910052581 Si3N4 Inorganic materials 0.000 description 13
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 13
- 238000000137 annealing Methods 0.000 description 11
- 239000007789 gas Substances 0.000 description 10
- 238000010586 diagram Methods 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 9
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical group C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 9
- 230000000052 comparative effect Effects 0.000 description 8
- 238000011065 in-situ storage Methods 0.000 description 8
- 229910052749 magnesium Inorganic materials 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 8
- 238000009826 distribution Methods 0.000 description 7
- 229910052594 sapphire Inorganic materials 0.000 description 7
- 239000010980 sapphire Substances 0.000 description 7
- 229910052582 BN Inorganic materials 0.000 description 6
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 6
- 230000007547 defect Effects 0.000 description 6
- -1 magnesium nitride Chemical class 0.000 description 6
- AJSTXXYNEIHPMD-UHFFFAOYSA-N triethyl borate Chemical compound CCOB(OCC)OCC AJSTXXYNEIHPMD-UHFFFAOYSA-N 0.000 description 6
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 4
- 239000000460 chlorine Substances 0.000 description 4
- 238000011066 ex-situ storage Methods 0.000 description 4
- 238000011049 filling Methods 0.000 description 4
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 4
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 4
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 3
- 229910052801 chlorine Inorganic materials 0.000 description 3
- 239000011651 chromium Substances 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 230000002687 intercalation Effects 0.000 description 3
- 230000006798 recombination Effects 0.000 description 3
- 238000011160 research Methods 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- CXOWYMLTGOFURZ-UHFFFAOYSA-N azanylidynechromium Chemical compound [Cr]#N CXOWYMLTGOFURZ-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000010348 incorporation Methods 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- WGYKZJWCGVVSQN-UHFFFAOYSA-N propylamine Chemical compound CCCN WGYKZJWCGVVSQN-UHFFFAOYSA-N 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- 238000002441 X-ray diffraction Methods 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 239000012300 argon atmosphere Substances 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- YBRBMKDOPFTVDT-UHFFFAOYSA-N tert-butylamine Chemical compound CC(C)(C)N YBRBMKDOPFTVDT-UHFFFAOYSA-N 0.000 description 1
- MNWRORMXBIWXCI-UHFFFAOYSA-N tetrakis(dimethylamido)titanium Chemical compound CN(C)[Ti](N(C)C)(N(C)C)N(C)C MNWRORMXBIWXCI-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/183—Epitaxial-layer growth characterised by the substrate being provided with a buffer layer, e.g. a lattice matching layer
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/186—Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
- C30B29/403—AIII-nitrides
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
- C30B29/403—AIII-nitrides
- C30B29/406—Gallium nitride
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Metallurgy (AREA)
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- Chemical Kinetics & Catalysis (AREA)
- Inorganic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The invention provides an epitaxial wafer and a preparation method and application thereof, wherein the epitaxial wafer comprises a substrate, a nitride nucleation layer, a composite layer and an epitaxial layer which are sequentially laminated; the nitride nucleation layer is of a 3-dimensional island structure; the composite layer comprises at least two insert layers and at least two roughened layers which are alternately stacked along a direction away from the substrate. According to the invention, at least two insert layers and at least two roughened layers are arranged between the nitride nucleation layer and the epitaxial layer, so that the epitaxial wafer with high crystal quality is obtained.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to an epitaxial wafer and a preparation method and application thereof.
Background
The GaN-based semiconductor material has the characteristics of high forbidden bandwidth, high critical breakdown electric field, high carrier saturation migration speed, high thermal conductivity, direct band gap and the like, and has great application prospect in the fields of high-temperature, high-frequency, high-power microelectronic devices and high-performance optoelectronic devices. However, since the nitride semiconductor material is generally heteroepitaxial on a heterogeneous substrate such as sapphire or SiC, dislocation or defect is generated due to lattice constant and thermal mismatch between different materials, and extends upwards along with growth of an epitaxial layer, the dislocation is represented as a non-radiative recombination center when the device works, and meanwhile, leakage current is increased as a leakage channel, so that the device is rapidly aged, the working efficiency and the service life of the device are affected, and application of the device in the field of semiconductor electronics is restricted.
For many years, researchers have largely explored to improve the crystal quality of nitride epitaxy, and lateral epitaxial growth techniques have been widely used to reduce the dislocation density of nitride films, wherein the growth quality of nitride epitaxial layers can be greatly improved by using microstructure mask techniques; in addition, in order to overcome the defects of overlong ex-situ growth time, complicated process and the like, a great deal of research reports on in-situ deposition of an intercalation growth technology exist, but the technology is limited to the process research of an intercalation monolayer, so that the intercalation process still has a great research and application space.
Therefore, how to efficiently utilize the process of the insertion layer, so as to effectively improve the crystal quality of the epitaxial wafer, is a technical problem to be solved currently.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide an epitaxial wafer and a preparation method and application thereof. According to the invention, at least two insert layers and at least two roughened layers are arranged between the nitride nucleation layer and the epitaxial layer, so that the epitaxial wafer with high crystal quality is obtained.
In order to achieve the aim of the invention, the invention adopts the following technical scheme:
in a first aspect, the invention provides an epitaxial wafer, which comprises a substrate, a nitride nucleation layer, a composite layer and an epitaxial layer which are sequentially stacked;
the nitride nucleation layer is of a 3-dimensional island structure;
the composite layer comprises at least two insert layers and at least two roughened layers which are alternately stacked along a direction away from the substrate.
According to the invention, at least two insert layers and at least two roughened layers are arranged between the nitride nucleation layer and the epitaxial layer, so that the epitaxial wafer with high crystal quality is obtained.
In the invention, the nitride nucleation layer is of a 3-dimensional island structure and is used for providing nucleation centers of the nucleation layer for material growth on the substrate, and the subsequent growth process is based on the nucleation centers of the nucleation layer for growth, so that the nitride nucleation layer is a base of epitaxial layer growth, and dislocation steering in the epitaxial layer growth process can be realized on the base.
The kind of the nitride nucleation layer is not limited in the present invention, and may be GaN, alGaN, alN, alGaInN, inN, alInN, or the like, for example.
The kind of roughened layer is not limited in the present invention, and may be GaN, alGaN, alN, alGaInN, inN, alInN, or the like, for example.
The invention is not limited to the type of the epitaxial layer, which is an epitaxial layer made of a third generation wide bandgap semiconductor material, and may be GaN, alGaN, alN, alGaInN, inN, alInN, or the like, for example.
As a preferable technical scheme, the composite layer includes a first insertion layer, a first roughened layer, a second insertion layer, and a second roughened layer that are sequentially stacked along a direction away from the substrate.
Preferably, the first insert layer is a mesh-like structure.
In the invention, the first insertion layer is a grid structure, and the grid structure is hollow and is used for the growth of the subsequent coarsening layer and the epitaxial layer. The first insertion layer mainly plays a role of nucleation restriction, and corresponds to the nitride nucleation layer of the 3-dimensional island-shaped structure one by one.
Preferably, the first insertion layer is disposed on the nitride nucleation layer.
Preferably, the first roughened layer is a 3-dimensional island structure.
Preferably, the first roughened layer is disposed on the first interposer layer and corresponds to the nitride nucleation layer one by one.
In the invention, the first coarsening layer grows in 3 dimensions by taking the nucleation center of the nitride nucleation layer as a base point, so that an island-shaped structure is formed, and a foundation is provided for bit steering in the epitaxial layer growth process.
Preferably, the second insertion layer is a mesh-like structure.
Preferably, the second insertion layer is disposed on a surface of the first roughened layer and a surface of the substrate between adjacent nitride nucleation layers.
Preferably, the second roughened layer is a 3-dimensional island structure.
Preferably, the second roughened layer is disposed on the second interposer layer.
In the invention, the main function of the second insertion layer is to coarsen the surface of the first coarsening layer and the area of the substrate surface between the adjacent nitride nucleation layers, and divide the surface of the first coarsening layer and the surface of the substrate into a grid structure. In addition, the second insertion layer can play a role of patterning the substrate, delay the merging process of epitaxial layer growth, enable dislocation to be fully turned in the area, and effectively improve the crystal quality of the epitaxial layer. In addition, the 3-dimensional island-shaped structure is formed in the growth process of the second coarsening layer, meanwhile, the 3-dimensional island-shaped structure distribution is formed on the surface of the second insertion layer, dislocation in the first coarsening layer is shielded from extending towards the epitaxial layer, dislocation in the subsequent epitaxial layer is enabled to be more fully turned in the growth process, and the dislocation cannot extend towards the top of the epitaxial layer.
In the invention, the main function of the second roughened layer is to form the roughened nucleation point on the second insertion layer, so that the epitaxial layer merging rate of the top area of the nitride nucleation layer and the area between the gaps of the nitride nucleation layer can be delayed at the same time, the dislocation turning probability in the epitaxial layer growing process is increased, and the crystal quality of the epitaxial layer is further improved.
As a preferable embodiment, the thickness of the nitride nucleation layer is 5-200nm, for example, 5nm, 10nm, 30nm, 50nm, 70nm, 90nm, 110nm, 130nm, 150nm, 170nm, 190nm or 200nm, etc.
In the invention, if the thickness of the nitride nucleation layer is too thin, enough nucleation centers of the nucleation layer cannot be provided, and uneven distribution of the nucleation centers of the nucleation layer is easily caused, so that uneven distribution of epitaxial layer thickness is caused, and a high-quality epitaxial wafer cannot be obtained; if the thickness of the nitride nucleation layer is too thick, too many nucleation centers of the nucleation layer are easily caused, and the incorporation rate of the nitride epitaxial layer is accelerated by the too many nucleation centers, so that dislocation is not turned over, and a high-quality epitaxial wafer cannot be formed.
Preferably, the thickness of the first roughened layer is 100-1000nm, for example, 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm or 1000nm, etc.
Preferably, the thickness of the second roughened layer is 20-200nm, for example, 20nm, 40nm, 60nm, 80nm, 100nm, 120nm, 140nm, 160nm, 180nm or 200nm, etc.
Preferably, the thickness of the nitride epitaxial layer is 1-10 μm, and may be, for example, 1 μm, 3 μm, 5 μm, 7 μm, 9 μm, 10 μm, or the like.
In a second aspect, the present invention provides a method for preparing an epitaxial wafer according to the first aspect, the method comprising the steps of:
(1) Growing a nitride nucleation layer on a substrate;
(2) Alternately growing at least two insert layers and at least two roughened layers on the nitride nucleation layer to obtain a composite layer;
(3) And growing an epitaxial layer on the composite layer to obtain the epitaxial wafer.
The preparation method provided by the invention is suitable for epitaxial growth of large-size substrates. In addition, the invention avoids the defects of overlong ex-situ growth time, complex process and the like, provides a new application technology for in-situ mask growth, and is beneficial to the mass production of semiconductor products.
As a preferable embodiment of the present invention, the insertion layer includes any one of a silicon nitride insertion layer, a magnesium nitride insertion layer, a boron nitride insertion layer, a titanium nitride insertion layer, and a chromium nitride insertion layer.
As a preferred embodiment of the present invention, the step (2) includes:
and sequentially growing a first insert layer, a first coarsening layer, a second insert layer and a second coarsening layer on the nitride nucleation layer.
As a preferred embodiment of the present invention, the growing of the first insertion layer includes:
(a) Under a first set condition, a first precursor source is introduced for t1;
(b) And continuously introducing the first precursor source and simultaneously introducing the second precursor source for t2 to obtain the first insertion layer.
Preferably, the material of the first insertion layer is nitride.
In the process of growing the first insertion layer, the first insertion layer and the nitride nucleation layer have lower adhesiveness, so that nitride is formed at nucleation points, and finally adjacent nitrides are connected through growth bonds to form the first insertion layer.
Preferably, in the first setting condition, the temperature is 500-1000 ℃, for example, 500 ℃, 600 ℃, 700 ℃, 800 ℃, 900 ℃, 1000 ℃, or the like, and the pressure is 50-750torr, for example, 50torr, 100torr, 200torr, 300torr, 400torr, 500torr, 600torr, 700torr, 750torr, or the like.
Preferably, t1 is 15-95s, for example, 15s, 20s, 30s, 40s, 50s, 60s, 70s, 80s, 90s or 95s, etc.
Preferably, the first precursor source includes any one of a Si source, a Mg source, a B source, a Ti source, or a Cr source.
The invention is not limited in the kind of Si source, and may be, for example, siH 4 Etc.; the kind of the Mg source is not limited, and exemplary may be magnesium dipentahydrate (Cp 2 Mg), etcThe method comprises the steps of carrying out a first treatment on the surface of the The type of the B source is not limited, and for example, triethyl borate (TEB) and the like are exemplified; the kind of Ti source is not limited, and may be TDMAT or the like, and the kind of Cr source is not limited, and may be CrCl 3 Etc.
In the invention, as the heteroepitaxial growth dislocation mainly originates from the interface of the nitride nucleation layer and the substrate, and forms higher dislocation extension on the surface of the nitride nucleation layer, the first precursor source is introduced in advance, and the characteristic that the dislocation attracts impurity atoms is utilized, so that nucleation points can be provided for the subsequent growth of the first insertion layer.
Preferably, the flow rate of the first precursor source is 5-500sccm, for example, 5sccm, 10sccm, 50sccm, 100sccm, 200sccm, 300sccm, 400sccm, or 500sccm, etc.
Preferably, t2 is 20-180s, for example, 20s, 40s, 60s, 80s, 100s, 120s, 140s, 160s or 180s, etc.
Preferably, the second precursor source comprises any one of an N source, a P source, or an As source.
Preferably, the N source comprises NH 3 Any of t-butylamine, n-propylamine, or dimethylwell.
Preferably, the P source comprises PH 3 Or TPB.
Preferably, the As source comprises AsH 3 Or TPA.
Preferably, the flow rate of the second precursor source is 2-200slm, for example, may be 2slm, 5slm, 7slm, 10slm, 30slm, 50slm, 70slm, 90slm, 110slm, 130slm, 150slm or 200slm, etc.
As a preferred technical solution of the present invention, the method further includes: and stopping introducing the first precursor source before the first roughened layer grows on the surface of the first insertion layer, and performing heat treatment on the substrate on which the first insertion layer grows.
Preferably, the heat treatment mode includes a first heat treatment and a second heat treatment.
In the invention, the nitride buffer layer is recrystallized at the bottom of the grid unit of the first insertion layer through the first heat treatment under the limitation of the grid of the first insertion layer, and in the recrystallization process, the nitride buffer layer forms a plurality of three-dimensional island nucleation points, the island nucleation points are redistributed and condensed into big islands, and finally a three-dimensional island-shaped nitride nucleation center is formed; in the second heat treatment process, nitride three-dimensional nucleation points which are positioned at the periphery of the three-dimensional island-shaped nitride nucleation centers and fail to recrystallize and nucleate are removed, large three-dimensional island-shaped nitride nucleation centers are formed at the bottom of the grid of the first insertion layer, and in addition, the subsequent coarsening layer can reach the maximum in the longitudinal height through the second heat treatment process, so that dislocation diversion can be carried out on the epitaxial layer in a more time during growth, and the high-quality epitaxial layer is obtained. Preferably, the temperature of the first heat treatment is 950-1150 ℃, for example, 950 ℃, 1000 ℃, 1050 ℃, 1100 ℃, 1150 ℃ or the like.
In the invention, if the temperature of the first heat treatment is too low, the heat treatment is insufficient, so that the subsequent first roughened layers are distributed too densely, and the epitaxial layers are combined and accelerated in the growth process; if the temperature of the first heat treatment is too high, the first roughened layer is excessively dispersed, so that the epitaxial layer is difficult to obtain an epitaxial layer with a flat surface in the growth process.
Preferably, the time of the first heat treatment is 5 to 300s, for example, 5s, 10s, 50s, 100s, 150s, 200s, 250s or 300s, etc.
Preferably, the temperature of the second heat treatment is 700-1200 ℃, for example, 700 ℃, 800 ℃, 900 ℃, 1000 ℃, 1100 ℃, 1200 ℃, or the like.
In the present invention, if the temperature of the second heat treatment is too low, the nitride which fails to crystallize and nucleate in the nitride nucleation layer is difficult to be completely removed; if the temperature of the second heat treatment is too high, the nitride which causes nucleation crystallization in the nitride nucleation layer is removed, so that the temperature is too low or too high, the optimal nucleation center distribution of the nucleation layer cannot be obtained, the epitaxial layer combination process is affected, and the epitaxial layer with better crystal quality cannot be obtained.
Preferably, the time of the second heat treatment is 2 to 60s, and may be, for example, 2s, 5s, 10s, 15s, 20s, 25s, 30s, 35s, 40s, 45s, 50s, 55s, or 60s, etc.
Preferably, the growing of the first roughened layer includes:
and under a second set condition, growing the first coarsened layer on the first inserted layer.
In the invention, the first coarsening layer grows by taking the nucleation center of the nitride nucleation layer with a three-dimensional island-shaped structure as a nucleation point. The epitaxial wafer presents higher brightness and ESD yield, which indicates that more dislocation is turned in the growth process of the roughened layer and does not extend in the growth direction, so that the non-radiative recombination and leakage channels of the epitaxial wafer are effectively reduced; meanwhile, in the growth process of the roughened layer process, the lateral epitaxial growth of the material is more uniform, and different stress areas are easier to reach similar stress states through interaction.
Preferably, in the second setting condition, the temperature is 900-1100 ℃, for example, 900 ℃, 950 ℃, 1000 ℃, 1050 ℃, 1100 ℃ or the like, and the pressure is 50-750torr, for example, 50torr, 100torr, 200torr, 300torr, 400torr, 500torr, 600torr, 700torr, 750torr or the like.
As a preferred embodiment of the present invention, the growing of the second insertion layer includes:
and under a third set condition, introducing a third precursor source and a fourth precursor source, and growing the second insert layer on the first roughened layer for t3.
Preferably, in the third setting condition, the temperature is 500-1000 ℃, for example, 500 ℃, 600 ℃, 700 ℃, 800 ℃, 900 ℃, 1000 ℃, or the like; the pressure is 50-750torr, for example, 50torr, 150torr, 250torr, 350torr, 450torr, 550torr, 650torr, 750torr, etc.
Preferably, t3 is 60-300s, for example, 60s, 100s, 150s, 200s, 250s or 300s, etc.
Preferably, the third precursor source includes any one of a Si source, a Mg source, a B source, a Ti source, or a Cr source.
Preferably, the flow rate of the third precursor source is 5-500sccm, for example, 5sccm, 10sccm, 50sccm, 100sccm, 200sccm, 300sccm, 400sccm, or 500sccm, etc.
Preferably, the fourth precursor source comprises any one of an N source, a P source, or an As source.
Preferably, the flow rate of the fourth precursor source is 2-200slm, for example, may be 2slm, 5slm, 7slm, 10slm, 30slm, 50slm, 70slm, 90slm, 110slm, 130slm, 150slm or 200slm, etc.
Preferably, the method further comprises: and carrying out third heat treatment on the first roughened layer before introducing the third precursor source and the fourth precursor source.
In the third heat treatment process, the invention not only enlarges the space between the bottoms of the nitride nucleation layers of the 3-dimensional island structure, but also removes the first coarsening layer formed at the adjacent grid boundaries of the first insertion layer, increases the distance between the bottoms of the adjacent coarsening layers, ensures that the coarsening layer reaches the maximum in the longitudinal height, and can prolong the time of filling the coarsening layer in the growth process of the epitaxial layer, so that the epitaxial layer has more dislocation steering and the crystal quality of the epitaxial layer is improved.
Preferably, the temperature of the third heat treatment is 700-1200 ℃, for example, 700 ℃, 800 ℃, 900 ℃, 1000 ℃, 1100 ℃, 1200 ℃, or the like.
In the invention, if the temperature of the third heat treatment is too low, the first roughened layer formed at the adjacent grid boundary of the first insertion layer cannot be sufficiently removed; if the temperature of the third heat treatment is too high, a part of the first roughened layer corresponding to the nitride nucleation layer one by one is removed. Therefore, the too high or too low temperature of the third heat treatment can affect the distance between the bottoms of the adjacent roughened layers, and further reduce the time for filling the roughened layers with the epitaxial layers in the growth process, so that dislocation of the epitaxial layers cannot be fully turned, and the crystal quality of the epitaxial layers is reduced. Preferably, the time of the third heat treatment is 10 to 100s, for example, 10s, 20s, 30s, 40s, 50s, 60s, 70s, 80s, 90s or 100s, etc.
Preferably, the growing of the second roughened layer includes:
and under a fourth set condition, growing the second coarsening layer on the second inserting layer.
Preferably, in the fourth setting condition, the temperature is 900-1100 ℃, for example, 900 ℃, 950 ℃, 1000 ℃, 1050 ℃, 1100 ℃ or the like, and the pressure is 50-750torr, for example, 50torr, 100torr, 200torr, 300torr, 400torr, 500torr, 600torr, 700torr, 750torr or the like.
Preferably, the growing of the epitaxial layer includes:
and under a fifth set condition, growing the epitaxial layer on the second coarsening layer.
Preferably, in the fifth setting condition, the temperature is 1050-1200 ℃, for example 1050 ℃, 1100 ℃, 1150 ℃, 1200 ℃, or the like, and the pressure is 100-600torr, for example 100torr, 200torr, 300torr, 400torr, 500torr, 600torr, or the like.
As a preferable technical scheme of the invention, the preparation method comprises the following steps:
growing a nitride nucleation layer of 5-200nm on said substrate at a temperature of 500-1000 ℃ and a pressure of 50-750 torr;
(ii) growing a first intercalating layer on said nitride nucleation layer in an atmosphere of a protective gas, the specific steps comprising:
(a1) Introducing a first precursor source with the flow rate of 5-500sccm for 15-95s under the conditions of the temperature of 500-1000 ℃ and the pressure of 50-750 torr;
(b1) Continuously introducing the first precursor source, and simultaneously introducing a second precursor source with the flow of 2-200slm for 20-180s to obtain the first insertion layer;
(iii) stopping the supply of the first precursor source and performing a heat treatment on the substrate on which the first insertion layer is grown, comprising the specific steps of:
(a2) Performing a first heat treatment at 950-1150 ℃ and 50-750torr for 5-300s;
(b2) In the atmosphere of etching gas, performing a second heat treatment to etch the nitride nucleation layer, wherein the temperature is 700-1200 ℃ and the time is 2-60s;
(IV) growing a first roughened layer with the thickness of 100-1000nm under the conditions that the temperature is 900-1100 ℃ and the pressure is 50-750 torr;
(V) performing third heat treatment in an etching gas atmosphere to etch the first roughened layer, wherein the temperature is 700-1200 ℃ and the time is 10-100s; then, under the conditions of the temperature of 500-1000 ℃ and the pressure of 50-750torr, a third precursor source with the flow of 5-500sccm and a fourth precursor source with the flow of 2-200slm are introduced, and a second insertion layer is grown for 60-300s;
(VI) growing a second roughened layer with the thickness of 20-200nm under the conditions that the temperature is 900-1100 ℃ and the pressure is 50-750 torr; and then growing an epitaxial layer with the thickness of 1-10 mu m under the conditions of the temperature of 1050-1200 ℃ and the pressure of 100-600torr to obtain the epitaxial wafer.
The specific type of the protective gas is not limited in the present invention, and may be, for example, nitrogen or argon. The specific kind of the etching gas is not limited in the present invention, and may be exemplified by hydrogen, hydrogen chloride, chlorine, or the like.
In a third aspect, the present invention provides an electronic device comprising an epitaxial wafer according to the first aspect.
The numerical ranges recited herein include not only the recited point values, but also any point values between the recited numerical ranges that are not recited, and are limited to, and for the sake of brevity, the invention is not intended to be exhaustive of the specific point values that the recited range includes.
Compared with the prior art, the invention has the following beneficial effects:
according to the invention, at least two insert layers and at least two roughened layers are arranged between the nitride nucleation layer and the epitaxial layer, so that the epitaxial wafer with high crystal quality is obtained.
Drawings
Fig. 1 is a schematic structural diagram of an epitaxial wafer prepared in example 1 of the present invention.
FIG. 2 is a schematic diagram of the growth of a GaN nucleation layer in step (1) of example 1 of the present invention.
FIG. 3 is a schematic diagram showing the structure of the heat-treated material in step (3) of example 1 of the present invention.
Fig. 4 is a schematic diagram of growing a first GaN rough layer in step (4) of embodiment 1 of the invention.
Fig. 5 is a schematic diagram of the growth of a second silicon nitride insert layer in step (5) of example 1 of the present invention.
Fig. 6 is a schematic diagram of growing a second GaN rough layer in step (6) of embodiment 1 of the invention.
Fig. 7 is a schematic diagram showing dislocation diversion during epitaxial layer growth in example 1 of the present invention.
Fig. 8 is a schematic view of an epitaxial wafer prepared in comparative example 1 of the present invention.
Wherein, 1-substrate; a 2-nitride nucleation layer; 3-a composite layer; 31-a first interposer; 32-a first roughened layer; 33-a second insertion layer; 34-a second roughened layer; 4-an epitaxial layer; 5-third roughened layer.
Detailed Description
The technical scheme of the invention is further described by the following specific embodiments. It will be apparent to those skilled in the art that the examples are merely to aid in understanding the invention and are not to be construed as a specific limitation thereof.
Example 1
Referring to fig. 1, fig. 1 is a schematic structural diagram of an epitaxial wafer prepared in embodiment 1 of the present invention, where the epitaxial wafer includes a substrate 1, a nitride nucleation layer 2, a composite layer 3 and an epitaxial layer 4 that are sequentially stacked.
The nitride nucleation layer 2 is of a 3-dimensional island structure, and the thickness of the nitride nucleation layer 2 is 100nm; the composite layer 3 includes at least two interposed layers and at least two roughened layers alternately stacked in a direction away from the substrate 1; the thickness of the epitaxial layer 4 is 5 μm.
In a specific embodiment, as shown in fig. 1, the composite layer 3 includes first interposer layers 31, first roughened layers 32, second interposer layers 33, and second roughened layers 34 alternately stacked in a direction away from the substrate 1.
The first insertion layer 31 is a mesh-like structure, and the first insertion layer 31 is disposed on the nitride nucleation layer 2. The first roughened layer 32 is of a 3-dimensional island structure, and the first roughened layer 32 is arranged on the first insertion layer 31 and corresponds to the nitride nucleation layer 2 one by one; the thickness of first roughened layer 32 was 500nm. The second interposer 33 is a grid structure, and the second interposer 33 is disposed on the surface of the first roughened layer 32 and the surface of the substrate 1 between the adjacent nitride nucleation layers 2. The second roughened layer 34 is a 3-dimensional island structure, the second roughened layer 34 is disposed on the second interposer layer 33, and the thickness of the second roughened layer 34 is 100nm.
It is understood that the material of the first and second insertion layers 31 and 33 may be any one of silicon nitride, magnesium nitride, boron nitride, titanium nitride, or chromium nitride.
The embodiment also provides a preparation method of the epitaxial wafer, which comprises the following steps:
and (I) growing a nitride nucleation layer 22 on the substrate 1 at a temperature of 500-1000 ℃ and a pressure of 50-750 torr.
(II) growing a first insertion layer 31 on the nitride nucleation layer 22 in an atmosphere of a protective gas, comprising the steps of:
(a1) And (3) introducing a first precursor source with the flow rate of 5-500sccm for 15-95s under the conditions of the temperature of 500-1000 ℃ and the pressure of 50-750 torr.
(b1) And continuously introducing the first precursor source, and simultaneously introducing the second precursor source with the flow of 2-200slm for 20-180s to obtain the first insertion layer 31.
The protective gas being an inert gas, e.g. N 2 Or Ar 2 . The material of the first interposed layer 31 may be silicon nitride, and for convenience of description, the first interposed layer 31 of which material is silicon nitride is referred to as a first silicon nitride interposed layer.
(III) stopping the supply of the first precursor source and performing a heat treatment on the substrate 1 on which the first insertion layer 31 is grown, comprising the specific steps of:
(a2) The first heat treatment is carried out at 950-1150 deg.c and 50-750torr for 5-300s.
(b2) And in the atmosphere of etching gas, performing second heat treatment to etch the nitride nucleation layer 2, wherein the temperature is 700-1200 ℃ and the time is 2-60s.
The etching gas can be H 2 、Cl 2 Or HCl.
(IV) growing the first roughened layer 32 with the thickness of 100-1000nm under the conditions that the temperature is 900-1100 ℃ and the pressure is 50-750 torr.
The material of first roughened layer 32 may be GaN, and for convenience of description, first roughened layer 32 of GaN is referred to as a first GaN roughened layer.
(V) performing a third heat treatment in an etching gas atmosphere to etch the first roughened layer 32 at 700-1200 ℃ for 10-100s; then, under the conditions of the temperature of 500-1000 ℃ and the pressure of 50-750torr, a third precursor source with the flow rate of 5-500sccm and a fourth precursor source with the flow rate of 2-200slm are introduced, and the second insert layer 33 is grown for 60-300s.
The material of the second interposer 34 may be silicon nitride, and for convenience of description, the second interposer 34 of which the material is silicon nitride is referred to as a second silicon nitride interposer.
(VI) growing a second roughened layer 34 with the thickness of 20-200nm under the conditions that the temperature is 900-1100 ℃ and the pressure is 50-750 torr; and then growing an epitaxial layer 4 with the thickness of 1-10 mu m at the temperature of 1050-1200 ℃ and the pressure of 100-600torr to obtain the epitaxial wafer.
The material of the epitaxial layer 4 may be GaN, and for convenience of description, the epitaxial layer 4 of which material is GaN is referred to as a GaN epitaxial layer.
The invention realizes the high-quality nitride epitaxial layer by combining the coarsening layer in-situ mask and the two etching processes, avoids the defects of overlong ex-situ growth time, complicated process and the like, provides a new application technology of the in-situ mask, realizes the perfect combination of the in-situ mask growth and the nitride epitaxial layer growth technology, and has great significance for the mass production process of nitride semiconductor products.
In a specific embodiment, the epitaxial wafer is grown by using an MOCVD epitaxial growth technology, which specifically includes the following steps:
(1) A GaN nucleation layer was grown on a sapphire substrate at a temperature of 750 c and a pressure of 400torr, the structure of which is shown in fig. 2.
When growing GaN nucleation layer, ga source is trimethyl gallium and N source is NH 3 。
(2) Growing a first silicon nitride insert layer on the GaN nucleation layer in a nitrogen atmosphere, wherein the method comprises the following specific steps:
(a1) Introducing SiH with flow rate of 250sccm under the conditions of 750 ℃ and 400torr pressure 4 The time was 55s.
(b1) Continuous SiH supply 4 Simultaneously introducing NH with flow rate of 100slm 3 And obtaining the first silicon nitride insertion layer with the time of 100 s.
(3) Stopping the SiH supply 4 The sapphire substrate with the first silicon nitride insertion layer is subjected to heat treatment, and the structure after heat treatment is shown in fig. 3, and the specific steps include:
(a2) The first heat treatment was performed at 1050℃and 400torr for 150s.
(b2) In a hydrogen atmosphere, a second heat treatment was performed to etch the GaN nucleation layer at 1000 ℃ for 30s.
(4) The first GaN roughened layer was grown at 1000 c and 400torr pressure, and the structure is shown in fig. 4.
When the first GaN roughened layer is grown, the Ga source is trimethyl gallium, and the N source is NH 3 。
(5) In a hydrogen atmosphere, performing third heat treatment to etch the first GaN roughened layer, wherein the temperature is 1000 ℃ and the time is 50s; then, under the conditions of 750 ℃ and 500torr pressure, 250sccm of SiH was introduced 4 And NH with flow rate of 100slm 3 A second silicon nitride interposer was grown for 180s, with the structure shown in fig. 5.
(6) And growing a second GaN roughened layer under the conditions of 1000 ℃ and 400torr pressure, wherein the structure of the second GaN roughened layer is shown in figure 6.
When growing the second GaN coarsening layer, the Ga source is trimethyl gallium, and the N source is NH 3 。
(7) The GaN epitaxial layer was grown to a thickness of 2 μm at 1100℃under a pressure of 350 torr.
Fig. 7 is a schematic view showing dislocation diversion occurring during the epitaxial layer growth in the present embodiment, and it is understood that dislocation diversion occurs in the epitaxial layer in the horizontal direction as indicated by the broken line in the figure, without extending toward the surface of the epitaxial layer.
Example 2
The present embodiment provides an epitaxial wafer, and the structure of the epitaxial wafer is the same as that of the epitaxial wafer in embodiment 1, and is not described herein, and the difference is that: in this embodiment, the thickness of the nitride nucleation layer is 10nm, the thickness of the first roughened layer is 100nm, the thickness of the second roughened layer is 20nm, and the thickness of the epitaxial layer is 1 μm.
The embodiment also provides a preparation method of the epitaxial wafer, which comprises the following steps:
(1) A GaN nucleation layer was grown on a sapphire substrate at a temperature of 500 c and a pressure of 100 torr.
When growing GaN nucleation layer, ga source is trimethyl gallium and N source is NH 3 。
(2) Growing a first boron nitride insertion layer on the GaN nucleation layer in an argon atmosphere, wherein the method comprises the following specific steps:
(a1) Introducing a first precursor source (namely TEB) with the flow rate of 50sccm under the conditions of the temperature of 500 ℃ and the pressure of 100torr for 95s;
(b1) Continuously introducing TEB and simultaneously introducing NH with the flow rate of 50slm 3 And obtaining the first boron nitride insertion layer at 150 s.
(3) Stopping introducing the TEB, and performing heat treatment on the sapphire substrate with the first boron nitride insertion layer, wherein the method specifically comprises the following steps of:
(a2) The first heat treatment was performed at 950℃and a pressure of 100torr for 250s.
(b2) In a chlorine atmosphere, a second heat treatment was performed to etch the GaN nucleation layer at a temperature of 700 ℃ for 60s.
(4) And growing the first GaN roughened layer under the conditions of the temperature of 900 ℃ and the pressure of 100 torr.
When the first GaN roughened layer is grown, the Ga source is trimethyl gallium, and the N source is NH 3 。
(5) In a chlorine atmosphere, performing third heat treatment to etch the first roughened layer, wherein the temperature is 700 ℃ and the time is 100s; then under the conditions of 500 ℃ and 100torr pressure, TEB with 50sccm flow rate and NH with 50slm flow rate are introduced 3 And growing a second boron nitride insertion layer for 300s.
(6) And growing the second GaN roughened layer under the conditions of the temperature of 900 ℃ and the pressure of 100 torr.
When growing the second GaN coarsening layer, the Ga source is trimethyl gallium, and the N source is NH 3 。
(7) The GaN epitaxial layer was grown at 1050℃and 100 torr.
Example 3
The present embodiment provides an epitaxial wafer, and the structure of the epitaxial wafer is the same as that of the epitaxial wafer in embodiment 1, and is not described herein, and the difference is that: in this embodiment, the thickness of the nitride nucleation layer is 200nm, the thickness of the first roughened layer is 1000nm, the thickness of the second roughened layer is 200nm, and the thickness of the epitaxial layer is 10 μm.
The embodiment also provides a preparation method of the epitaxial wafer, which comprises the following steps:
(1) And growing a GaN nucleation layer on the sapphire substrate at the temperature of 1000 ℃ and the pressure of 700 torr.
When growing GaN nucleation layer, ga source is trimethyl gallium and N source is NH 3 。
(2) Growing a first magnesium nitride insertion layer on the GaN nucleation layer in a nitrogen atmosphere, wherein the method comprises the following specific steps:
(a1) Introducing a first precursor source (Cp) at a flow rate of 500sccm at a temperature of 1000deg.C and a pressure of 700torr 2 Mg), time 15s;
(b1) Continuous introduction of Cp 2 Mg, simultaneously introducing NH with flow of 200slm 3 The time was 20s, and a first magnesium nitride insertion layer was obtained.
(3) Stopping Cp charging 2 Mg, carrying out heat treatment on the sapphire substrate with the first magnesium nitride insertion layer, wherein the specific steps comprise:
(a2) Performing a first heat treatment at 1150 ℃ and 700torr for 50s;
(b2) In a hydrogen chloride atmosphere, a second heat treatment is performed to etch the GaN nucleation layer at 1200 ℃ for 5s.
(4) And growing the first GaN roughened layer under the conditions of the temperature of 1100 ℃ and the pressure of 700 torr.
When the first GaN roughened layer is grown, the Ga source is trimethyl gallium, and the N source is NH 3 。
(5) In a hydrogen chloride atmosphere, performing third heat treatment to etch the first GaN roughened layer, wherein the temperature is 1200 ℃ and the time is 10s; then under the conditions of 1000 ℃ and 700torr pressure, cp with flow rate of 500sccm is introduced 2 Mg and NH with flow of 200slm 3 A second magnesium nitride interlayer was grown for 60s.
(6) And growing the second GaN roughened layer under the conditions of the temperature of 1100 ℃ and the pressure of 700 torr.
When growing the second GaN coarsening layer, the Ga source is trimethyl gallium, and the N source is NH 3 。
(7) And growing the GaN epitaxial layer under the conditions of 1200 ℃ and 600torr pressure.
Example 4
This example differs from example 1 in that the thickness of the nitride nucleation layer is 1nm.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Example 5
This example differs from example 1 in that the thickness of the nitride nucleation layer is 250nm.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Example 6
This example differs from example 1 in that step (a 2) is not performed, i.e., the first heat treatment is not performed.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Example 7
This example differs from example 1 in that step (b 2) is not performed, i.e., the second heat treatment is not performed.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Example 8
The present embodiment is different from embodiment 1 in that the third heat treatment in step (5) is not performed, but the second insertion layer is grown directly on the first roughened layer.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Example 9
This example differs from example 1 in that between step (6) and step (7), the following steps are performed: and (3) after the second roughened layer is grown, performing thermal annealing at the temperature of 1200 ℃ for 30s.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Example 10
This example differs from example 1 in that the temperature of the first heat treatment is 900 ℃.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Example 11
This example differs from example 1 in that the temperature of the first heat treatment is 1200 ℃.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Example 12
This example differs from example 1 in that the temperature of the second heat treatment is 600 ℃.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Example 13
This example differs from example 1 in that the temperature of the second heat treatment is 1300 ℃.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Example 14
This example differs from example 1 in that the temperature of the third heat treatment is 600 ℃.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Example 15
This example differs from example 1 in that the temperature of the third heat treatment is 1300 ℃.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Comparative example 1
The present comparative example is different from example 1 in that the third roughened layer 5 having a thickness of 600nm was grown directly on the nitride nucleation layer 2, i.e., steps (2) to (6) were not performed, and a schematic diagram of the produced epitaxial wafer is shown in fig. 8.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Comparative example 2
This comparative example differs from example 1 in that only one insert layer and one roughened layer were grown on the nitride nucleation layer, i.e., steps (5) and (6) were not performed.
The remaining preparation methods and parameters remain the same as in example 1 and are not described in detail here.
Performance testing
The epitaxial wafers prepared in examples 1-15 and comparative examples 1-2 were fabricated into LED chips, which specifically included the following steps: an n-type GaN layer with the thickness of 3 mu m, an InGaN quantum well layer with the thickness of 3nm, a light-emitting layer formed by a GaN quantum barrier layer with the thickness of 12nm and a p-type GaN layer with the thickness of 200nm are sequentially grown on the GaN epitaxial layer, wherein the InGaN quantum well layer and the GaN quantum barrier layer in the light-emitting layer are periodically overlapped for 6 periods in a circulating mode.
The above chips were subjected to an X-ray diffraction (XRD) test, and brightness and electrostatic discharge (Electrostatic Discharge, ESD) yield performance test of the chips, and the test results are shown in table 1.
TABLE 1
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Analysis:
as can be seen from the table, the preparation of the high-quality epitaxial layer is realized by combining the coarsening layer in-situ mask with the two etching processes, compared with the epitaxial wafer prepared by the conventional process, the epitaxial wafer has higher crystal quality, and simultaneously has higher brightness and ESD yield, which indicates that more dislocation is turned in the coarsening layer growth process, does not extend to the growth direction, the non-radiative recombination and leakage channels of the LED epitaxial wafer are reduced, and the dislocation density of the epitaxial wafer prepared by the invention can be reduced by more than 30 percent; meanwhile, in the growth process of the roughened layer process, the lateral epitaxial growth of the material is more uniform, and different stress areas are easier to reach similar stress states through interaction, so that the epitaxial wafer has lower stress and is suitable for epitaxial growth of large-size substrates; in addition, the invention overcomes the defects of overlong ex-situ growth time, complex process and the like, provides a new application technology of an in-situ mask, realizes perfect combination of in-situ mask growth and nitride epitaxial layer growth technology, and has great significance for the mass production process of semiconductor products.
As can be seen from comparison of the data obtained in examples 1 and 4-5, if the thickness of the nitride nucleation layer is too thin, sufficient nucleation centers cannot be provided to cause uneven distribution of nucleation centers of the nucleation layer, thereby resulting in uniform epitaxial layer thickness distribution; if the thickness of the nitride nucleation layer is too thick, too many nucleation centers are created, which can accelerate the incorporation rate of the nitride epitaxial layer, resulting in less dislocation diversion. In any case, high quality epitaxial wafers cannot be formed.
As can be seen from comparison of the data results of examples 1 and examples 6-8, if the first thermal anneal is not performed, the nucleation centers of the nitride nucleation layer are too dense, resulting in too many nucleation centers that would accelerate the merging rate of the nitride epitaxial layer, resulting in less dislocation diversion; if the second thermal annealing is not performed, a large amount of nitride which fails to crystallize and nucleate exists in the nitride nucleation layer, so that the combination is accelerated in the growth process of the nitride epitaxial layer; if the third thermal annealing is not performed, a large number of first roughened layers formed at the adjacent grid boundaries of the first insert layers exist, so that the distance between the bottoms of the adjacent roughened layers is influenced, the time for filling the roughened layers with the epitaxial layers in the growth process is reduced, dislocation steering cannot be fully achieved, and the crystal quality of the epitaxial layers is reduced.
As can be seen from comparison of the data results of the embodiment 1 and the embodiment 9, if the thermal annealing is performed after the second roughened layer is grown, the second roughened layer is etched, on one hand, the second roughened layer in the area above the nitride nucleation layer is etched to cause the epitaxial lamination of the nitride to be accelerated, dislocation is not fully turned, on the other hand, the second roughened layer is etched, and a thicker epitaxial layer process is required to be matched to obtain a flat surface, so that the third annealing process is not provided, and the process window of the epitaxial layer can be effectively expanded while the crystal quality of the nitride epitaxial layer is improved.
As can be seen from comparison of the data results of examples 1 and examples 10 to 11, if the temperature of the first thermal annealing is too high, the first roughened layer is excessively distributed and dispersed, so that it is difficult to obtain a nitride epitaxial layer with a flat surface in the growth process of the nitride epitaxial layer; if the temperature of the first thermal annealing is too low, the heat treatment is insufficient, so that the grown first roughened layers are distributed too densely, and the merging is accelerated in the growth process of the nitride epitaxial layers. In summary, it is difficult to obtain a high quality nitride epitaxial layer at either too high or too low a first thermal annealing temperature.
As can be seen from comparison of the data obtained in examples 1 and examples 12-13, if the temperature of the second thermal anneal is too high, the nucleation crystallized nitride in the nitride nucleation layer is removed; if the temperature of the second thermal anneal is too low, the nitride in the nitride nucleation layer that fails to crystallize and nucleate is difficult to completely remove. Therefore, too high or too low a second thermal annealing temperature may result in a non-optimal nucleation center distribution of the nucleation layer, affecting the nitride epitaxial layer bonding process, and thus failing to obtain optimal nitride epitaxial layer crystal quality.
As can be seen from comparison of the data results of examples 1 and examples 14 to 15, if the temperature of the third thermal annealing is too high, a part of the first nitride roughened layer is removed; if the temperature of the third thermal annealing is too low, the first roughened layer formed at the boundary of the adjacent grids of the first insert layer cannot be sufficiently removed, so that the distance between the bottoms of the adjacent roughened layers is affected, the time for filling the roughened layer with the epitaxial layer in the growth process is reduced, the dislocation steering cannot be sufficiently achieved, and the crystal quality of the epitaxial layer is reduced.
As can be seen from the comparison of the data results of example 1 and comparative example 1, compared with the epitaxial wafer prepared by the conventional technology, more dislocation is turned in the growth process of the roughened layer, the dislocation density of the epitaxial wafer can be reduced by more than 30% without extending in the growth direction.
As is clear from comparison of the data results of example 1 and comparative example 2, if only one insertion layer and one roughened layer were grown on the nitride nucleation layer. In the subsequent nitride epitaxial layer growth process, dislocation steering is insufficient compared with the coarsening structure dislocation steering of the invention, so that more dislocation steering can not be realized to realize self annihilation, and the epitaxial wafer performance is poor.
The applicant states that the process of the invention is illustrated by the above examples, but the invention is not limited to, i.e. does not mean that the invention must be carried out in dependence on the above process steps. It should be apparent to those skilled in the art that any modification of the present invention, equivalent substitution of selected raw materials, addition of auxiliary components, selection of specific modes, etc. fall within the scope of the present invention and the scope of disclosure.
Claims (10)
1. The epitaxial wafer is characterized by comprising a substrate, a nitride nucleation layer, a composite layer and an epitaxial layer which are sequentially stacked;
the nitride nucleation layer is of a 3-dimensional island structure;
the composite layer comprises at least two insert layers and at least two roughened layers which are alternately stacked along a direction away from the substrate.
2. The epitaxial wafer of claim 1, wherein the composite layer comprises a first interposer, a first roughened layer, a second interposer, and a second roughened layer stacked in order along a direction away from the substrate;
preferably, the first insertion layer is a grid structure;
preferably, the first insertion layer is disposed on the nitride nucleation layer;
Preferably, the first roughened layer is of a 3-dimensional island structure;
preferably, the first roughened layer is arranged on the first insertion layer and corresponds to the nitride nucleation layer one by one;
preferably, the second insertion layer is a grid structure;
preferably, the second insertion layer is disposed on a surface of the first roughened layer and a surface of the substrate between adjacent nitride nucleation layers;
preferably, the second roughened layer is of a 3-dimensional island structure;
preferably, the second roughened layer is disposed on the second interposer layer.
3. Epitaxial wafer according to claim 2, characterized in that the thickness of the nitride nucleation layer is 5-200nm;
preferably, the thickness of the first roughened layer is 100-1000nm;
preferably, the thickness of the second roughened layer is 20-200nm;
preferably, the thickness of the epitaxial layer is 1-10 μm.
4. A method of producing an epitaxial wafer according to any one of claims 1 to 3, characterized in that the method comprises the steps of:
(1) Growing a nitride nucleation layer on a substrate;
(2) Alternately growing at least two insert layers and at least two roughened layers on the nitride nucleation layer to obtain a composite layer;
(3) And growing an epitaxial layer on the composite layer to obtain the epitaxial wafer.
5. The method of claim 4, wherein step (2) comprises:
and sequentially growing a first insert layer, a first coarsening layer, a second insert layer and a second coarsening layer on the nitride nucleation layer.
6. The method of claim 5, wherein the growing of the first interposer layer comprises:
(a) Under a first set condition, a first precursor source is introduced for t1;
(b) Continuously introducing the first precursor source and simultaneously introducing the second precursor source for t2 to obtain the first insertion layer;
preferably, in the first setting condition, the temperature is 500-1000 ℃ and the pressure is 50-750torr;
preferably, t1 is 15-95s;
preferably, the first precursor source includes any one of a Si source, a Mg source, a B source, a Ti source, or a Cr source;
preferably, the flow rate of the first precursor source is 5-500sccm
Preferably, t2 is 20-180s;
preferably, the second precursor source comprises any one of an N source, a P source, or an As source;
preferably, the flow rate of the second precursor source is 2-200slm.
7. The method of manufacturing according to claim 6, further comprising: stopping introducing the first precursor source before the first roughened layer grows on the surface of the first insertion layer, and performing heat treatment on the substrate on which the first insertion layer grows;
preferably, the heat treatment mode comprises a first heat treatment and a second heat treatment;
preferably, the temperature of the first heat treatment is 950-1150 ℃;
preferably, the time of the first heat treatment is 5-300s;
preferably, the temperature of the second heat treatment is 700-1200 ℃;
preferably, the time of the second heat treatment is 2-60s;
preferably, the growing of the first roughened layer includes:
growing the first roughened layer on the first insertion layer under a second set condition;
preferably, in the second setting condition, the temperature is 900-1100 ℃ and the pressure is 50-750torr.
8. The method of any one of claims 5-7, wherein the growing of the second insertion layer comprises:
under a third set condition, a third precursor source and a fourth precursor source are introduced, and the second insertion layer grows on the first roughened layer for a time t3;
Preferably, in the third setting condition, the temperature is 500-1000 ℃ and the pressure is 50-750torr;
preferably, t3 is 60-300s;
preferably, the third precursor source includes any one of a Si source, a Mg source, a B source, a Ti source, or a Cr source;
preferably, the flow rate of the third precursor source is 5-500sccm;
preferably, the fourth precursor source comprises any one of an N source, a P source, or an As source;
preferably, the flow rate of the fourth precursor source is 2-200slm;
preferably, the method further comprises: performing third heat treatment on the first roughened layer before introducing the third precursor source and the fourth precursor source;
preferably, the temperature of the third heat treatment is 700-1200 ℃;
preferably, the time of the third heat treatment is 10-100s;
preferably, the growing of the second roughened layer includes:
growing the second roughened layer on the second insertion layer under a fourth set condition;
preferably, in the fourth setting condition, the temperature is 900-1100 ℃ and the pressure is 50-750torr;
preferably, the growing of the epitaxial layer includes:
growing the epitaxial layer on the second coarsening layer under a fifth setting condition;
Preferably, in the fifth setting condition, the temperature is 1050-1200 ℃ and the pressure is 100-600torr.
9. The preparation method according to any one of claims 4 to 8, characterized in that the preparation method comprises the steps of:
growing a nitride nucleation layer of 5-200nm on said substrate at a temperature of 500-1000 ℃ and a pressure of 50-750 torr;
(ii) growing a first intercalating layer on said nitride nucleation layer in an atmosphere of a protective gas, the specific steps comprising:
(a1) Introducing a first precursor source with the flow rate of 5-500sccm for 15-95s under the conditions of the temperature of 500-1000 ℃ and the pressure of 50-750 torr;
(b1) Continuously introducing the first precursor source, and simultaneously introducing a second precursor source with the flow of 2-200slm for 20-180s to obtain the first insertion layer;
(iii) stopping the supply of the first precursor source and performing a heat treatment on the substrate on which the first insertion layer is grown, comprising the specific steps of:
(a2) Performing a first heat treatment at 950-1150 ℃ and 50-750torr for 5-300s;
(b2) In the atmosphere of etching gas, performing a second heat treatment to etch the nitride nucleation layer, wherein the temperature is 700-1200 ℃ and the time is 2-60s;
(IV) growing a first roughened layer with the thickness of 100-1000nm under the conditions that the temperature is 900-1100 ℃ and the pressure is 50-750 torr;
(V) performing third heat treatment in an etching gas atmosphere to etch the first roughened layer, wherein the temperature is 700-1200 ℃ and the time is 10-100s; then, under the conditions of the temperature of 500-1000 ℃ and the pressure of 50-750torr, a third precursor source with the flow of 5-500sccm and a fourth precursor source with the flow of 2-200slm are introduced, and a second insertion layer is grown for 60-300s;
(VI) growing a second roughened layer with the thickness of 20-200nm under the conditions that the temperature is 900-1100 ℃ and the pressure is 50-750 torr; and then growing an epitaxial layer with the thickness of 1-10 mu m under the conditions of the temperature of 1050-1200 ℃ and the pressure of 100-600torr to obtain the epitaxial wafer.
10. An electronic device comprising the epitaxial wafer of any one of claims 1-3.
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