CN116613980A

CN116613980A - Soft start discharge circuit

Info

Publication number: CN116613980A
Application number: CN202210117714.5A
Authority: CN
Inventors: 刘家昌
Original assignee: Kunda Computer Technology Kunshan Co Ltd; Mitac Computing Technology Corp
Current assignee: Kunda Computer Technology Kunshan Co Ltd; Mitac Computing Technology Corp
Priority date: 2022-02-08
Filing date: 2022-02-08
Publication date: 2023-08-18

Abstract

A soft start discharging circuit comprises a soft start circuit, a discharging circuit and a control circuit. The soft start circuit is coupled to a DC voltage source for buffering a DC power generated when the DC voltage source is started. The control circuit is coupled to the soft start circuit. The discharging circuit is coupled to the soft start circuit and the control circuit for removing the residual voltage in the soft start circuit when the soft start discharging circuit is turned off.

Description

Soft start discharge circuit

[ field of technology ]

The present disclosure relates to a discharge circuit, and more particularly to a soft start discharge circuit.

[ background Art ]

Soft start (Soft start) circuits are often disposed in load circuits, wherein the Soft start circuit is used for generating a protection effect to prevent the load circuit from being damaged due to an excessively large dc power generated when a dc voltage source is started. However, the conventional soft start circuit only focuses on reducing the dc power supply, and does not consider that the load circuit is damaged due to residual power in the soft start circuit when the dc voltage supply is turned off.

Therefore, there is a need for a soft start circuit with a fast discharging function, so that the soft start circuit can be rapidly discharged when the dc voltage source is turned off, so as to avoid damage to the load circuit caused by residual power left in the soft start circuit.

[ invention ]

The invention aims to provide a soft start circuit with a rapid discharging function.

In order to solve the above technical problems, the soft start discharging circuit of the present invention comprises a soft start circuit, a control circuit and a discharging circuit. The soft start circuit is coupled to a DC voltage source and used for buffering a DC power source generated when the DC voltage source is started. The control circuit is coupled to the soft start circuit. The discharging circuit is coupled to the soft start circuit and the control circuit for removing the residual voltage in the soft start circuit when the soft start discharging circuit is turned off. The soft start circuit comprises a first resistor, a second resistor, a first capacitor and a first transistor, wherein the first transistor is provided with a first control end, a first output end and a first output end. One end of the first resistor is coupled to the DC voltage source. One end of the second resistor is coupled to the other end of the first resistor, and the other end of the second resistor is grounded. One end of the first capacitor is coupled to the DC voltage source, and the other end of the first capacitor is coupled between the first resistor and the second resistor. The first control end is coupled between the first resistor and the second resistor, and the first output end is coupled with the direct current voltage source. The control circuit comprises a third resistor and a second transistor, wherein the second transistor is provided with a second control end, a second input end and a second output end. One end of the third resistor is coupled to the first output end, the second control end is coupled between the first resistor and the second resistor, the second input end is coupled to the other end of the third resistor, and the second output end is grounded. The discharging circuit comprises a third transistor, a fourth resistor, a fifth resistor and a fourth transistor, wherein the third transistor is provided with a third control end, a third input end and a third output end, and the fourth transistor is provided with a fourth control end, a fourth input end and a fourth output end. The third control terminal is coupled between the third resistor and the second input terminal, and the third output terminal is grounded. One end of the fourth resistor is coupled to the third input terminal. One end of the fifth resistor is coupled to the first output end, and the other end of the fifth resistor is coupled to the other end of the fourth resistor. The fourth control terminal is coupled between the fourth resistor and the fifth resistor, the fourth input terminal is coupled to the first output terminal, and the fourth output terminal is grounded.

Preferably, the control circuit further includes a second capacitor and a sixth resistor. One end of the second capacitor is coupled between the first resistor and the second resistor. One end of the sixth resistor is coupled to the other end of the second capacitor, and the other end of the sixth resistor is coupled to the second control terminal.

Preferably, the resistance value of the first resistor is equal to the resistance value of the second resistor.

Preferably, the first transistor is an N-type mosfet.

Preferably, the second transistor is selected from an NPN bipolar junction transistor or an N-type metal oxide semiconductor field effect transistor.

Preferably, the third transistor is an N-type metal oxide semiconductor field effect transistor.

Preferably, the resistance value of the fourth resistor is smaller than the resistance value of the fifth resistor.

Preferably, the smaller the resistance value of the fourth resistor is, the better the discharging effect of the discharging circuit is; the larger the resistance value of the fourth resistor is, the poorer the discharging effect of the discharging circuit is.

Preferably, the fourth transistor is selected from a PNP bipolar junction transistor or a P-type metal oxide semiconductor field effect transistor.

Preferably, the discharging circuit discharges through the third transistor and/or discharges through the fourth transistor.

Compared with the prior art, the soft start circuit is coupled with the direct current voltage source and used for buffering the direct current power supply generated when the direct current voltage source is started, the control circuit is coupled with the soft start circuit, the discharging circuit is coupled with the soft start circuit and the control circuit and used for removing residual voltage in the soft start circuit when the soft start discharging circuit is closed, so that the direct current voltage source can rapidly discharge the soft start circuit when the direct current voltage source is closed, and the damage to the load circuit caused by residual electricity left in the soft start circuit is avoided.

[ description of the drawings ]

FIG. 1 is a block diagram of a soft start discharge circuit according to one embodiment of the present invention.

FIG. 2 is a circuit schematic of a soft start discharge circuit according to one embodiment of the present disclosure.

FIG. 3 is a schematic circuit diagram (one) of a soft start discharge circuit according to another embodiment of the present disclosure.

FIG. 4 is a schematic circuit diagram (II) of a soft start discharge circuit according to another embodiment of the present invention.

FIG. 5 is a schematic circuit diagram of a soft start discharge circuit according to another embodiment of the present invention.

FIG. 6 is a flow chart illustrating the operation of the soft start discharge circuit when the DC voltage source is turned on according to one embodiment of the present invention.

FIG. 7 is a flow chart illustrating the operation of the soft start discharge circuit during the power-off process of the DC voltage source according to one embodiment of the present invention.

Fig. 8 is a waveform diagram of a current flowing through the third transistor when the discharging circuit discharges according to an embodiment of the present invention.

Fig. 9 is a waveform diagram of a current flowing through the third transistor when the discharging circuit discharges according to another embodiment of the present invention.

FIG. 10 is a graph showing current flowing from the load circuit when the discharge circuit discharges according to one embodiment of the present invention.

FIG. 11 is a graph showing current flowing from the load circuit when the discharge circuit discharges according to another embodiment of the present invention.

[ detailed description ] of the invention

In the following description, numerous practical details are set forth to illustrate certain embodiments of the present invention, but are not intended to limit the scope of the claims.

Referring to fig. 1, fig. 1 is a block diagram of an embodiment of a soft start discharge circuit 10. In some embodiments, the soft-start discharge circuit 10 is applied to a motherboard or a circuit board of various types of electronic devices (such as a computer host, a notebook computer, a smart phone/tablet or a game console, etc.), wherein the soft-start discharge circuit 10 is used to receive an internal/external power source of the electronic device. As shown in fig. 1, the soft start discharging circuit 10 includes a soft start circuit 100, a control circuit 110 and a discharging circuit 120, wherein the soft start circuit 100 is coupled to a dc voltage source VDC, the dc voltage source VDC outputs a dc power, the soft start discharging circuit 10 receives the dc power to operate, the control circuit 110 is coupled to the soft start circuit 100, and the discharging circuit 120 is coupled to the soft start circuit 100 and the control circuit 110. The structure and function of each of the soft start circuit 100, the control circuit 110, and the discharge circuit 120 will be explained in detail below, and the arrangement manner therebetween will be explained.

Referring to fig. 2, fig. 2 is a circuit diagram of an embodiment of a soft start discharging circuit 10. As shown in fig. 2, the soft start circuit 100 includes a first resistor R1, a second resistor R2, a first capacitor C1, and a first transistor T1, wherein the first transistor T1 has a first control terminal, a first input terminal, and a first output terminal. In some embodiments, one end of the first resistor R1 is coupled to the dc voltage source VDC, one end of the second resistor R2 is coupled to the other end of the first resistor R1, the other end of the second resistor R2 is grounded, one end of the first capacitor C1 is coupled to the dc voltage source VDC, the other end of the first resistor R1 and the one end of the second resistor R2 are commonly coupled to the other end of the first capacitor C1, and the other end of the first resistor R1 and the one end of the second resistor R2 are commonly coupled to the first control end of the first transistor T1, that is, the other end of the first capacitor C1 is coupled to the first control end of the first transistor T1, and the first input end of the first transistor T1 is coupled to the dc voltage source VDC, that is, the first input end of the first transistor T1 is coupled to the one end of the first capacitor C1.

In some embodiments, the soft start circuit 100 is configured to buffer the instant large fluctuation of the dc power supply when the dc voltage source VDC is started, wherein the first resistor R1 and the second resistor R2 are a voltage dividing resistor set, the first capacitor C1 is configured to buffer the instant large fluctuation of the dc power supply when the dc voltage source VDC is started or when the dc power supply is unstable, and the first transistor T1 is configured to output the dc power supply generated when the dc voltage source VDC is started to the control circuit 110. In some embodiments, the resistance of the first resistor R1 is not equal to the resistance of the second resistor R2, and in other embodiments, the resistance of the first resistor R1 is equal to the resistance of the second resistor R2, wherein the resistance of the first resistor R1 and the resistance of the second resistor R2 are not 0. For example, the resistance of the first resistor R1 and the resistance of the second resistor R2 are both 100 kiloohms (kΩ). A more detailed description of the components of the soft start circuit 100 will be described below.

As shown in fig. 2, the control circuit 110 includes a third resistor R3 and a second transistor T2, wherein the second transistor T2 has a second control terminal, a second input terminal and a second output terminal. In some embodiments, one end of the third resistor R3 is coupled to the first output end of the first transistor T1, the second control end of the second transistor T2 is coupled to the first control end of the first transistor T1, that is, the first resistor R1 and the second resistor R2 are coupled together to the second control end of the second transistor T2, the second input end of the second transistor T2 is coupled to the other end of the third resistor R3, and the second output end of the second transistor T2 is grounded.

In some embodiments, the control circuit 110 is configured to control the soft-start discharging circuit 10 to discharge, wherein the third resistor R3 is a Pull-up resistor (Pull-up resistor), and the second transistor T2 is configured to control the discharging circuit 120 of the soft-start discharging circuit 10 to discharge. In some embodiments, the third resistor R3 has a resistance of 340 kiloohms (kΩ) or greater. A more detailed description of the various components of the control circuit 110 will be described below.

As shown in fig. 2, the discharging circuit 120 includes a third transistor T3, a fourth resistor R4, a fifth resistor R5, and a fourth transistor T4, wherein the third transistor T3 has a third control terminal, a third input terminal, and a third output terminal, and the fourth transistor T4 has a fourth control terminal, a fourth input terminal, and a fourth output terminal. In some embodiments, the third resistor R3 is commonly coupled to the second input terminal of the second transistor T2 and the third control terminal of the third transistor T3, the third output terminal of the third transistor T3 is grounded, one terminal of the fourth resistor R4 is coupled to the fourth control terminal of the fourth transistor T4, the other terminal of the fourth resistor R4 is coupled to the third input terminal of the third transistor T3, one terminal of the fifth resistor R5 is coupled to the first output terminal of the first transistor T1, the other terminal of the fifth resistor R5 is coupled to the one terminal of the fourth resistor R4, that is, the one terminal of the fourth resistor R4 and the other terminal of the fifth resistor R5 are commonly coupled to the fourth control terminal of the fourth transistor T4, the fourth input terminal of the fourth transistor T4 is coupled to the first output terminal of the first transistor T1, and the fourth output terminal of the fourth transistor T4 is grounded. In some embodiments, the circuit output terminal VOUT of the soft-start discharging circuit 10 is located at the fourth input terminal of the fourth transistor T4, where the circuit output terminal VOUT is connected to the load circuit 200 to supply the power required by the load circuit to operate, where the resistance value of the third resistor R3 is greater than the resistance value of the first resistor R1, and the resistance value of the third resistor R3 is greater than the equivalent resistance value of the fourth resistor R4 and the fifth resistor R5 in series, that is, the resistance value of the third resistor R3 is greater than the sum of the resistance value of the fourth resistor R4 and the resistance value of the fifth resistor R5 (r3 > r4+r5).

In some embodiments, the discharging circuit 120 is used for discharging the soft start circuit 100, wherein the third transistor T3 and the fourth transistor T4 are used for discharging, the fourth resistor R4 is a Pull-down resistor (Pull-down resistor), the resistance value of the fourth resistor R4 is equal to or greater than 0 ohm (Ω), and the fifth resistor R5 is a Pull-up resistor. In some embodiments, the resistance of the fourth resistor R4 is less than the resistance of the fifth resistor R5 (R4 < R5). For example, the resistance value of the fourth resistor R4 is 22 or 1000 ohms (Ω), the resistance value of the fifth resistor R5 is 100 kiloohms (kΩ), in some embodiments, the fourth resistor R4 is a fixed resistance value resistor, in other embodiments, the fourth resistor R4 is a variable resistor, or the fourth resistor R4 is a switchable resistance value resistor switching circuit (not shown) formed by a switch and a plurality of resistors each having different fixed resistance values, that is, the resistance switching circuit is an equivalent circuit of the fourth resistor R4, wherein the switch may be a mechanical switch, for example, a jumper, a dip switch, or other mechanically controlled switch, the switch may also be an electronic circuit switchable switch, for example, a relay (relay), a multi-stage switch, or the like, and if the switch is an electronic switch, the control terminal of the switch may be designed as any controller on an electrical connection circuit board, for example, a microcontroller (Micro Controller Unit), a central processing unit (3824), a CPU (35 d), a complex logic device for enabling the control of the fourth resistor to be implemented by the CPU (35 d) or the like, and the control circuit may be programmed by the CPU (CPU) to be programmed to the controller. A more detailed description of the components of discharge circuit 120 is described below.

Referring to fig. 3, fig. 3 is a circuit diagram of another embodiment of the soft start discharging circuit 10. As shown in fig. 3, the control circuit 110 further includes a second capacitor C2 and a sixth resistor R6. In some embodiments, one end of the second capacitor C2 is coupled to the first control end of the first transistor T1, that is, the other end of the first resistor R1 and the end of the second resistor R2 are commonly coupled to the end of the second capacitor C2, and one end of the sixth resistor R6 is coupled to the other end of the second capacitor C2, and the other end of the sixth resistor R6 is coupled to the second control end of the second transistor T2, where the second capacitor C2 and the sixth resistor R6 are used to protect the control circuit 110 to prevent the second transistor T2 from being burned out due to excessive transient fluctuation generated when the dc power source VDC is started or when the dc power source is unstable.

In some embodiments, the first transistor T1 is a P-type metal oxide semiconductor field effect transistor (PMOS), wherein the first control terminal of the first transistor T1 corresponds to the Gate (Gate) of the PMOS, the first input terminal of the first transistor T1 corresponds to the Source (Source) of the PMOS, and the first output terminal of the first transistor T1 corresponds to the Drain (Drain) of the PMOS. In some embodiments, the PMOS is used as a switch, wherein when the gate of the PMOS is at a relatively low potential, that is, when the gate Voltage (VG) of the PMOS is at a relatively low potential relative to the source Voltage (VS) of the PMOS that overcomes a corresponding threshold voltage (Vth) of a transistor, the PMOS is turned on such that an on-current flows from the source of the PMOS to the drain of the PMOS; when the gate Voltage (VG) of the PMOS is at a relatively high potential relative to the source Voltage (VS) of the PMOS, which is not able to overcome the threshold voltage (Vth) of the transistor, the PMOS is turned off so that the on current cannot flow from the source of the PMOS to the drain of the PMOS, wherein the threshold voltage of the transistor corresponds to different voltage values according to the material of the transistor, and the threshold voltage (Vth) of the transistor is generally between 0V and 3V (0 < Vth < 3V). In some embodiments, the first transistor T1 may also be an NPN bipolar junction transistor (NPN BJT), and the first control terminal corresponds to a Base (Base) of the PNP BJT, the first input terminal corresponds to an Emitter (Emitter) of the PNP BJT, the first output terminal corresponds to a Collector (Collector) of the PNP BJT, and the like, and the electronic component, the circuit module, or the chip of the first input terminal and the first output terminal is turned on when the voltage of the first control terminal is smaller than the first input terminal.

In some embodiments, the second transistor T2 is an NPN bipolar junction transistor (NPN BJT), wherein the second control terminal of the second transistor T2 corresponds to a Base (Base) of the NPN BJT, the second input terminal of the second transistor T2 corresponds to a Collector (Collector) of the NPN BJT, and the second output terminal of the second transistor T2 corresponds to an Emitter (Emitter) of the NPN BJT. In some embodiments, the NPN BJT is used as a switch, wherein when the base of the NPN BJT is at a relatively high potential relative to the emitter that overcomes a corresponding transistor threshold voltage (Vth) that is between 0V and 3V (0 < Vth < 3V) according to the material of the transistor, the NPN BJT is turned on to enable an on-current to flow from the collector of the NPN BJT to the emitter of the NPN BJT; when the base of the NPN BJT is at a relatively low potential relative to the emitter that cannot overcome the transistor threshold voltage (Vth), the NPN BJT is turned off such that the on current cannot flow from the collector of the NPN BJT to the emitter of the NPN BJT.

In some embodiments, the third transistor T3 is an NMOS, wherein the third control terminal of the third transistor T3 corresponds to the gate of the NMOS, the third input terminal of the third transistor T3 corresponds to the drain of the NMOS, and the third output terminal of the third transistor T3 corresponds to the source of the NMOS, that is, when the gate Voltage (VG) of the NMOS is at a relatively high potential with respect to the source Voltage (VS) of the NMOS that overcomes a threshold voltage (Vth) of the corresponding transistor, the NMOS is turned on to allow a conduction current to flow from the drain of the NMOS to the source of the NMOS; when the gate Voltage (VG) of the NMOS is at a relatively low potential relative to the source Voltage (VS) of the NMOS, which is not able to overcome the threshold voltage (Vth) of the transistor, the NMOS is turned off so that the on current cannot flow from the source of the NMOS to the drain of the NMOS, wherein the threshold voltage of the transistor corresponds to different voltage values according to the material of the transistor, and the threshold voltage (Vth) of the transistor is generally between 0V and 3V (0 < Vth < 3V). In some embodiments, the third transistor T3 is an NPN bipolar junction transistor (NPN BJT), wherein the third control terminal of the third transistor T3 corresponds to a Base (Base) of the NPN BJT, the third input terminal of the third transistor T3 corresponds to a Collector (Collector) of the NPN BJT, and the third output terminal of the third transistor T3 corresponds to an Emitter (Emitter) of the NPN BJT.

In some embodiments, the fourth transistor T4 is a PNP bipolar junction transistor (PNP BJT), wherein the fourth control terminal of the fourth transistor T4 corresponds to the Base (Base) of the PNP BJT, the fourth input terminal of the fourth transistor T4 corresponds to the Emitter (Emitter) of the PNP BJT, and the fourth output terminal of the fourth transistor T4 corresponds to the Collector (Collector) of the PNP BJT. In some embodiments, the PNP BJT is configured to operate as a switch, wherein when a base voltage of the PNP BJT is at a relatively low potential that overcomes a threshold voltage (Vth) of a corresponding transistor relative to an emitter voltage, the PNP BJT is turned on such that an on current flows from the emitter of the PNP BJT to the collector of the PNP BJT; when the base voltage of the PNP BJT is at a relatively high potential relative to the emitter voltage, which cannot overcome a corresponding transistor threshold voltage (Vth), the PNP BJT is turned off so that the on current cannot flow from the emitter of the PNP BJT to the collector of the PNP BJT, wherein the transistor threshold voltage corresponds to different voltage values according to the material of the transistor, and the general transistor threshold voltage (Vth) is between 0V and 3V (0 < Vth < 3V).

Referring to fig. 4 and 5, fig. 4 and 5 are schematic diagrams illustrating different embodiments of the soft start discharging circuit 10. As shown in fig. 4 and 5, in some embodiments, the second transistor T2 is an NMOS, wherein the second control terminal of the second transistor T2 corresponds to the gate of the NMOS, the second input terminal of the second transistor T2 corresponds to the drain of the NMOS, and the second output terminal of the second transistor T2 corresponds to the source of the NMOS.

As shown in fig. 4 and 5, in some embodiments, the fourth transistor T4 is a P-type metal oxide semiconductor field effect transistor (PMOS), wherein the fourth control terminal of the fourth transistor T4 corresponds to the Gate (Gate) of the PMOS, the fourth input terminal of the fourth transistor T4 corresponds to the Source (Source) of the PMOS, and the fourth output terminal of the fourth transistor T4 corresponds to the Drain (Drain) of the PMOS. In some embodiments, the PMOS is used as a switch, wherein when the gate of the PMOS is at a relatively low potential, the PMOS is turned on such that an on-current flows from the source of the PMOS to the drain of the PMOS; when the gate of the PMOS is at a relatively high potential, the PMOS is turned off so that the on-current cannot flow from the source of the PMOS to the drain of the PMOS.

For convenience in explaining the operation of the soft start discharging circuit 10 during the start-up and shut-down of the dc voltage source VDC, the voltage values at the connection points in the following embodiments will be described in terms of a relatively high voltage and a relatively low voltage compared between the terminals of the transistors, wherein the relatively high voltage and the relatively low voltage are concepts of the relative voltage values, not the absolute voltage values.

Referring to fig. 6, fig. 6 is a flowchart illustrating the operation of the soft start discharging circuit 10 when the dc voltage source VDC is turned on. As shown in fig. 6, in some embodiments, when the dc voltage source VDC is started, the dc voltage source VDC generates a dc voltage having a high potential and a dc characteristic, the first connection point N1 is at a high potential, the second connection point N2 is affected by the voltage dividing effect of the first resistor R1 and the second resistor R2, so that the first control terminal of the first transistor T1 is at a relatively low potential with respect to the first input terminal of the first transistor T1, and the second control terminal of the second transistor T2 connected to the second connection point N2 is at a relatively high potential due to the grounding of the second output terminal of the second transistor T2, so that the second transistor T2 is also at a conductive state, and the third connection point N3 is affected by the first connection point N1 and is at a high potential (step S10). It should be noted that, even if the second transistor T2 is in the on state, the dc power supply does not run off from the second transistor T2 because the resistance value of the third resistor R3 is extremely large, so that the third connection point N3 is still at a high potential. Then, since the second transistor T2 is in the on state and the second output terminal of the second transistor T2 is grounded (i.e. the reference voltage with the lowest voltage 0V of the soft start discharging circuit 10 is relatively low), the fourth connection point N4 is influenced by the third connection point N3 to be at a high level, so that the third control terminal of the third transistor T3 connected to the second input terminal of the second transistor T2 is also at a relatively low level with respect to the third input terminal of the third transistor T3, and the third transistor T3 is in the off state, so that the current is not lost from the third transistor T3 (step S20). Then, since the third transistor T3 is turned off and the fourth connection point N4 is at a high voltage, the fourth control terminal of the fourth transistor T4 and the fourth input terminal of the fourth transistor T4 are both affected by the fourth connection point N4 and cannot overcome a threshold voltage corresponding to the fourth transistor T4, so that the fourth transistor T4 is turned off. At this time, the fourth input terminal of the fourth transistor T4 is at a high voltage level due to the fourth connection point N4, and since the fourth transistor T4 is in the off state, the current is not lost from the fourth transistor T4 (step S30). Finally, the output VOUT of the circuit coupled to the fourth input of the fourth transistor T4 is at a high voltage level, so as to supply power to the load circuit connected to the output VOUT.

Referring to fig. 7, fig. 7 is a flowchart showing the operation of the soft start discharging circuit 10 during the shutdown process of the dc voltage source VDC. As shown in fig. 7, in some embodiments, when the dc voltage source VDC is turned off, the dc voltage source VDC stops generating the dc voltage source with the dc voltage characteristic, and the first connection point N1 is at a relatively low potential close to the reference voltage of 0V, which is the lowest potential of all the voltage values on the soft-start discharging circuit 10, and the second connection point N2 is also at a relatively low potential close to the reference voltage of 0V due to the voltage dividing effect of the first resistor R1 and the second resistor R2. Since the second connection point N2 is at a low level, the first control terminal of the first transistor T1 is at a relatively high level with respect to the first input terminal of the first transistor T1, which cannot overcome the threshold voltage of the corresponding transistor, and the second control terminal of the second transistor T2 is at a relatively low level with respect to the second input terminal of the second transistor T2, which also turns off the second transistor T2, the third connection point N3 and the fourth connection point N4 will briefly maintain a high level (i.e. a residual power) (step S40). Then, the third connection point N3 and the fourth connection point N4 still maintain the high voltage, and since the second transistor T2 is turned off and the third connection point N3 is at the high voltage, the second input terminal of the second transistor T2 is pulled up to the high voltage by the third resistor R3, so that the third control terminal of the third transistor T3 connected to the second input terminal of the second transistor T2 is at the relatively high voltage with respect to the grounded third output terminal of the third transistor T3, and the third transistor T3 is turned on, so that the residual power from the load or other electronic components with power storage capability is transferred to the grounded third output terminal of the third transistor T3 for discharging (step S50). Then, since the third transistor T3 is in an on state, the fourth control terminal of the fourth transistor T4 connected to the ground through the fourth resistor R4 is pulled down to be close to the reference voltage of 0V by the influence of the ground of the fourth resistor R4, the fourth control terminal of the fourth transistor T4 is at a relatively low potential with respect to the fourth input terminal of the fourth transistor T4, and the fourth transistor T4 is in an on state, so that the residual power transmitted from the load or other electronic components with power storage capability is transmitted to the fourth output terminal of the fourth transistor T4 connected to the ground for discharging (step S60). Finally, the discharging circuit 120 discharges through the channel formed by the turned-on third transistor T3 and/or fourth transistor T4, so that the current of the fourth connection point N4 is lost from the third transistor T3 and/or fourth transistor T4 to be converted into a low potential (step S70). That is, when the soft start discharging circuit 10 finishes the discharging of the residual power of the load circuit, even if the fourth connection point N4 is converted to the low level of the 0V reference voltage, the circuit output terminal VOUT at the fourth control terminal of the fourth transistor T4 is still at the low level of the 0V reference voltage.

In some embodiments, the resistance of the fourth resistor R4 is much smaller than the resistance of the fifth resistor R5, wherein the definition of "the resistance of the fourth resistor R4 is much smaller than the resistance of the fifth resistor R5" is that the resistance of the fourth resistor R4 is at least 100 times smaller than the resistance of the fifth resistor R5. For example, assuming that the resistance of the fifth resistor R5 is 100 kiloohms (kΩ), the resistance of the fourth resistor R4 is less than or equal to 1000 ohms (Ω). The advantage of the resistance value of the fourth resistor R4 being far smaller than that of the fifth resistor R5 is that the fourth control terminal of the fourth transistor T4 can be pulled down to a low potential by the influence of the fourth resistor R4 more effectively, so that the on-current of the fourth transistor T4 is larger, and the fourth transistor T4 can be discharged more effectively.

Referring to fig. 8 and fig. 9, fig. 8 and fig. 9 respectively show waveforms of the current flowing through the third transistor T3 when the discharging circuit 120 discharges in different embodiments of the soft start discharging circuit 10. As shown in fig. 8 and 9, in some embodiments, when the resistance of the fourth resistor R4 is 22 ohms (Ω) and the resistance of the fifth resistor R5 is 100 kiloohms (kΩ), the current flowing through the third transistor T3 is about 2.4 amps (a). In contrast, when the resistance value of the fourth resistor R4 is 1000 ohms (Ω) and the resistance value of the fifth resistor R5 is 100 kiloohms (kΩ), the current flowing through the third transistor T3 is about 730 milliamps (mA). Therefore, the smaller the resistance value of the fourth resistor R4, the better the discharging effect of the discharging circuit 120; the larger the resistance value of the fourth resistor R4 is, the poorer the discharging effect of the discharging circuit 120 is.

As shown in fig. 1, in some embodiments, the discharging circuit 120 of the soft start discharging circuit 10 is coupled to an external load circuit 200, wherein the discharging circuit 120 is further configured to discharge the load circuit 200 to avoid residual power in the load circuit 200. Referring to fig. 10 and 11, fig. 10 and 11 respectively show waveforms of current flowing from the load circuit 200 when the discharge circuit 120 discharges in different embodiments of the soft start discharge circuit 10. As shown in fig. 10 and 11, in some embodiments, when the resistance of the fourth resistor R4 is 22 ohms (Ω) and the resistance of the fifth resistor R5 is 100 kiloohms (kΩ), the current drawn from the load circuit 200 is about 6.3 amps (a). In contrast, when the resistance value of the fourth resistor R4 is 1000 ohms (Ω) and the resistance value of the fifth resistor R5 is 100 kiloohms (kΩ), the current drawn from the load circuit 200 is about 3.5 amps (a). Therefore, the soft start discharging circuit 10 can effectively drain the residual power in the load circuit 200 through the discharging circuit 120, and further illustrates that the discharging effect of the discharging circuit 120 is better when the resistance value of the fourth resistor R4 is smaller; the larger the resistance value of the fourth resistor R4 is, the poorer the discharging effect of the discharging circuit 120 is.

The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the invention is subject to the protection scope of the claims.

Claims

1. A soft start discharge circuit comprising:

a soft start circuit, adapted to be coupled to a dc voltage source for buffering a dc power generated when the dc voltage source is started, the soft start circuit comprising:

one end of the first resistor is coupled with the direct-current voltage source;

a second resistor having one end coupled to the other end of the first resistor and the other end grounded;

one end of the first capacitor is coupled with the direct-current voltage source, and the other end of the first capacitor is coupled between the first resistor and the second resistor; and

the first transistor is provided with a first control end, a first input end and a first output end, wherein the first control end is coupled between the first resistor and the second resistor, and the first input end is coupled with the direct-current voltage source;

a control circuit coupled to the soft start circuit, the control circuit comprising:

one end of the third resistor is coupled with the first output end; and

the second transistor is provided with a second control end, a second input end and a second output end, wherein the second control end is coupled between the first resistor and the second resistor, the second input end is coupled with the other end of the third resistor, and the second output end is grounded; and

a discharging circuit coupled to the soft start circuit and the control circuit, the discharging circuit comprising:

a third transistor having a third control terminal, a third input terminal and a third output terminal, wherein the third control terminal is coupled between the third resistor and the second input terminal, and the third output terminal is grounded;

a fourth resistor, one end of which is coupled with the third input end;

a fifth resistor having one end coupled to the first output end and the other end coupled to the other end of the fourth resistor; and

the fourth transistor is provided with a fourth control end, a fourth input end and a fourth output end, wherein the fourth control end is coupled between the fourth resistor and the fifth resistor, the fourth input end is coupled with the first output end, and the fourth output end is grounded.

2. The soft start discharge circuit of claim 1, wherein the control circuit further comprises:

one end of the second capacitor is coupled between the first resistor and the second resistor; and

a sixth resistor having one end coupled to the other end of the second capacitor and the other end coupled to the second control terminal.

3. The soft start discharge circuit of claim 1, wherein the first resistor has a resistance equal to a resistance of the second resistor.

4. The soft-start discharge circuit of claim 1, wherein the first transistor is an N-type mosfet.

5. The soft start discharge circuit of claim 1, wherein the second transistor is selected from an NPN bipolar junction transistor or an N-type metal oxide semiconductor field effect transistor.

6. The soft-start discharge circuit of claim 1, wherein the third transistor is an N-type mosfet.

7. The soft start discharge circuit of claim 1, wherein the fourth resistor has a resistance less than a resistance of the fifth resistor.

8. The soft start discharge circuit of claim 7, wherein the smaller the resistance of said fourth resistor, the better the discharge effect of said discharge circuit; when the resistance value of the fourth resistor is larger, the discharging effect of the discharging circuit is worse.

9. The soft start discharge circuit of claim 1, wherein the fourth transistor is selected from a PNP bipolar junction transistor or a pmos field effect transistor.

10. The soft start discharge circuit of claim 1, wherein the discharge circuit discharges through the third transistor and/or the fourth transistor.