CN116576841A - Hemispherical gyro full angle control system and method based on double-frequency carrier wave scheme - Google Patents
Hemispherical gyro full angle control system and method based on double-frequency carrier wave scheme Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01C—MEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
- G01C19/00—Gyroscopes; Turn-sensitive devices using vibrating masses; Turn-sensitive devices without moving masses; Measuring angular rate using gyroscopic effects
- G01C19/56—Turn-sensitive devices using vibrating masses, e.g. vibratory angular rate sensors based on Coriolis forces
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01C—MEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
- G01C19/00—Gyroscopes; Turn-sensitive devices using vibrating masses; Turn-sensitive devices without moving masses; Measuring angular rate using gyroscopic effects
- G01C19/56—Turn-sensitive devices using vibrating masses, e.g. vibratory angular rate sensors based on Coriolis forces
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Abstract
The invention discloses a hemispherical gyroscope full angle control system and method based on a double-frequency carrier wave scheme, which adopts a double-frequency carrier wave excitation/readout scheme. In this scheme, two high-frequency carriers with different frequencies are used to transmit the datax、yThe static driving force signals in the direction are modulated and then act on the circumferential exciting electrode of the gyroscope, so that two axial vibration signals are transmitted on signal frequency bands which are not interfered with each other. At this time, the spherical shell of the harmonic oscillator is equivalent to a common capacitor polar plate, so that a front-end amplifier is adopted to read out two axial modulation signals from the harmonic oscillator, and the two axial modulation signals are sent into a subsequent circuit for filtering and demodulation processing, so that the displacement information of each axial direction can be obtained. Due to coming fromx、yThe two axial detection signals are read out by the same circuit, thereby inhibiting the asymmetry of the electrodes in each direction andx、yand detecting errors caused by asymmetry of parameters of the analog circuit. The system realizes the full angle output function of the hemispherical resonator gyroscope and has very good performanceHigh practical value.
Description
Technical Field
The invention belongs to the technical field of hemispherical resonator gyro control, and particularly relates to a hemispherical resonator gyro full angle control system and method based on a double-frequency carrier scheme.
Background
As a solid fluctuation gyroscope, the micro hemispherical resonator gyroscope has the advantages of simple structure, high precision, high reliability, strong disturbance rejection capability and the like, and has wide application in the fields of resource exploration, strategic guidance, aerospace and the like. The full-angle control mode of the hemispherical resonator gyro is a rate integration working mode, can directly output the current precession angle, has larger angle measurement bandwidth and has high research value.
However, the design difficulty of the measurement and control system of the full-angle mode is greatly increased due to the complexity of the control principle. According to the hemispherical resonator kinematics principle and the laboratory prior art condition, a set of digital measurement and control system is researched and realized aiming at the full angle control mode of the hemispherical resonator gyro, and the realized full angle measurement and control system of the hemispherical resonator gyro can realize the function of detecting the physical space rotation angle in real time by reading the vibration angle.
Disclosure of Invention
In order to solve the problems, the invention discloses a hemispherical resonator gyro full angle control system based on a dual-frequency carrier scheme, which takes Zynq SoC as a main control core, adopts a dual-frequency carrier excitation/readout scheme, and researches and realizes a set of digital measurement and control circuit system; the system realizes the full angle output function of the hemispherical resonator gyroscope and provides a new research thought for improving the full angle mode control precision of the hemispherical resonator gyroscope.
In order to achieve the above purpose, the technical scheme of the invention is as follows:
a hemispherical resonator gyro full angle control system based on a double-frequency carrier scheme comprises a front end excitation/readout module, a signal processing module and a rear end loop control module; the front-end excitation/readout circuit adopts a dual-frequency carrier modulation scheme, reads out signals from a public polar plate, enters a signal processing module after being amplified, uses carrier demodulation and filtering to obtain x-axis displacement signals and y-axis displacement signals, and is demodulated into a low-frequency variable c by a phase-locked loop signal x 、s x 、c y 、s y And E, Q, L and theta are obtained through combination operation and are sent to a rear end loop control module, control quantities corresponding to the output of an amplitude loop, a quadrature loop, a phase loop and a precession angle are obtained through PI control, corresponding control force is obtained through PI control and is coupled with carrier waves and direct current voltage, and finally the control force is applied to an x-plane and y-plane external excitation electrode in real time, so that closed loop control of the system is completed.
The front-end circuit comprises a front-end excitation circuit and a front-end amplifying circuit, wherein the front-end excitation circuit converts a voltage signal output by the DAC into a proper electrostatic driving force and applies the proper electrostatic driving force to the excitation electrode after being modulated by a carrier wave, and the front-end amplifying circuit is responsible for amplifying a weak voltage signal from a harmonic oscillator reading end into a magnitude which can be picked up by the ADC chip as undistorted as possible.
The excitation method based on the dual-frequency carrier is to track the excitation signal f on the resonance frequency in the x-axis and y-axis directions x 、f y Modulated onto a high frequency carrier of a different frequency. The carrier wave and the exciting force are coupled and modulated through an adder circuit to obtain a modulated high-frequency alternating current signal, the modulated high-frequency alternating current signal is inverted through an inverter to obtain an inverted high-frequency alternating current signal, the inverted high-frequency alternating current signal is coupled with direct current voltages in the corresponding axial directions to obtain electrostatic force signals Vx+, vx-, vy+ and Vy-on the two axial electrodes, and the electrostatic force signals are respectively applied to positive and negative exciting electrodes on the x and y axes to form differential push-pull driving.
The front-end amplifying circuit is used for converting physical signals of gyroscope vibration into electric signals through the change of the plate capacitance, namely, extracting readout signals output by the gyroscope instrument head. Since the vibration signal on the spherical shell is extremely weak, the amplifying circuit also needs to have a high enough gain level and a high enough signal-to-noise ratio so as to facilitate the smooth reading of the subsequent analog-to-digital conversion circuit, and a charge amplifier is generally adopted to achieve the aim. The invention uses the charge amplifier with the T-shaped resistance-capacitance network, the charge amplifier of the T-shaped resistance-capacitance network changes the first-order high-pass filtering characteristic of the common charge amplifier into the two-order high-pass filtering characteristic, has higher noise suppression capability in a low frequency section, and improves the signal to noise ratio of high-frequency signal detection.
The beneficial effects of the invention are as follows:
according to the hemispherical resonator gyro full angle control system based on the dual-frequency carrier scheme, a dual-frequency carrier excitation/reading mode is adopted for the full angle control mode of the hemispherical resonator gyro according to the hemispherical resonator kinematics principle, and a set of digital measurement and control circuit system is researched and realized. The system realizes the full-angle output function of the hemispherical resonator gyroscope and has high practical value.
Drawings
FIG. 1 is a diagram of a hemispherical resonator gyroscope full angle control system designed by the invention;
FIG. 2 is a block diagram of a gyroscope embedded system based on a ZynqSoC of the present invention;
fig. 3 is a flowchart of a PS-side signal calculation procedure according to the present invention.
Detailed Description
The present invention is further illustrated in the following drawings and detailed description, which are to be understood as being merely illustrative of the invention and not limiting the scope of the invention.
The present invention employs a dual-frequency carrier excitation/readout scheme. In the scheme, the electrostatic driving force signals in the x and y directions are modulated by using two high-frequency carriers with different frequencies and then act on the circumferential exciting electrode of the gyroscope, so that two axial vibration signals propagate on signal frequency bands which are not interfered with each other. At this time, the spherical shell of the harmonic oscillator is equivalent to a common capacitor polar plate, so that a front-end amplifier is adopted to read out two axial modulation signals from the harmonic oscillator, and the two axial modulation signals are sent into a subsequent circuit for filtering and demodulation processing, so that the displacement information of each axial direction can be obtained. As the detection signals from the x and y directions are read out by the same circuit, the asymmetry of the electrodes in each direction and the error caused by the asymmetry of the parameters of the analog circuit for x and y detection are restrained.
The implementation process of the invention mainly comprises the following steps:
step one: signal flow and hardware module partitioning are determined. After the read-out signals obtained on the spherical shell of the harmonic oscillator are processed by a front-end circuit, the read-out signals are collected by a high-speed ADC chip and transmitted to the PL end of Zynq, two paths of high-frequency carrier signals adopted in modulation are demodulated for the read-out signals, and then the two paths of signals are subjected to band-pass filtering processing to obtain displacement change signals in the x and y directions working at the resonant frequency. At this time, the resonance frequency tracking signal generated by the phase-locked loop (PLL) is further demodulated for the displacement signal, four low-frequency variables are transmitted from the PL end to the PS end through the AXI bus, and a series of parameter calculation is performed to obtain E, Q, L which are respectively associated to the amplitude control loop, the quadrature control loop and the PLL phase tracking loop, so as to obtain the control force f as 、f qc The precession angle theta calculated by combining the parameter solution is orthogonally decomposed to the x and y axes and then passes through AXI totalLine returns to PL end, receives modulation of phase-locked loop reference signal to obtain AC control force f x And f y The high-frequency carrier wave is modulated by the low-speed DAC output and the high-frequency carrier wave corresponding to the high-speed DAC output, and is loaded on the excitation electrode, so that closed-loop control is realized. In addition to the above modules, a separate DAC chip is required to be responsible for outputting the dc and quadrature voltages in real time.
Step two: and dividing work according to the characteristics of the PS end and the PL end. The PL end is responsible for processing high-frequency, parallel and high-time-requirement work, namely driving, signal transceiving, filtering and demodulation of peripheral equipment, and the PS end is responsible for extracting parameters such as E, Q, L and the like, controlling PI parameters, and communicating with an upper computer. When the PL terminal communicates with the PS terminal, the x and y axis detection signals are demodulated and filtered by the PL terminal to generate c by defining the register address on the bus x 、s x 、c y 、s y The signals are stored in an input register of the AXI4 bus for reading signals by the PS end, and the calculated control signals are registered in an output register for generating control force after being read by the PL end. According to the idea, an IP core with an AXI bus is designed, an input port comprises an input clock, reset and data from a PL terminal, and an output port outputs the solved parameters to an FPGA of the PL terminal.
Step three: and building peripheral driving hardware logic. Firstly, the main peripheral modules of the system are a digital-to-analog converter and an analog-to-digital converter, which are bridges for communicating the digital system and the gyroscope head. For the driving of the high-speed ADC and the DAC, the parallel port communication is adopted, so that the data of the ADC input data bus is only required to be read into a register under the synchronization of a clock, or the data in the register is only required to be transferred to the output data bus connected with the DAC. However, for the 20-bit high-precision DAC11001B outputting the control force, an SPI serial data communication mode is adopted, so that a communication protocol module needs to be written to complete its control. The DAC driving logic code is built according to the timing requirements,
step four: de-carrier demodulation of read signal (to obtain x, y displacement signals), read signal filtering (CIC, FIR), displacement signal multiplication demodulation (to obtain low frequency variable c) x 、s x 、c y 、s y ). The read-out signals of the spherical shell of the harmonic oscillator are collected and transmitted to the FPGA by the ADC after passing through the front-end analog amplifier and the analog filter, and are separated into signals in the x-axis direction and the y-axis direction after demodulation of the two carriers, and are respectively filtered. When filtering, the CIC filter of the first stage filters out a part of high-frequency signals and simultaneously carries out downsampling on the signals, the downsampling is carried out to the sampling frequency suitable for the work of the FIR filter, then the downsampling is carried out through the CIC filter of the first stage, and the sampling rate is increased to be consistent with the sampling rate of the phase-locked loop signals so as to carry out next stage delay variable demodulation. The whole flow needs strict sampling time sequence control, so hardware logic is used for realizing the ZynqPL terminal.
Step five: the signal generates a logic design. In the dual-frequency carrier scheme, two types of sine wave signals need to be continuously output, one is two paths of high-frequency carrier signals, and the frequency of the two paths of high-frequency carrier signals is fixed; the other is a phase-locked loop signal for tracking the resonance frequency of the gyroscope, and the synchronization with the vibration state of the harmonic oscillator is ensured through the adjustment of the PI controller. The module is realized by using a PL terminal with better time synchronism. The method is realized by adopting a table look-up mode to generate a ROM table of the sine signal in advance, then calling a BlockRAM resource in the FPGA as a memory of ROM table data, and realizing continuous output of the sine signal in a mode of continuously increasing addresses. The carrier signal is a sine wave with a fixed frequency, so that the increment of the address is constant, but the phase-locked loop signal for tracking the resonance frequency needs to continuously adjust the frequency, so that the increment of the address is controlled by PI. Finally, the digital quantity of the signal output is output to the DAC and converted into the required analog voltage signal.
Step six: and (5) completing the design of the PL end logic function. After the control modules of the logic part are designed, the top layer module is designed to call each division module and instantiate, each instantiation is equivalent to multiplexing the module once in the system, the function is similar to the function in the software language, and the function modules are mutually connected to form a complete FPGA on-chip hardware logic system by the top layer module. And encapsulating the whole system to obtain an IP core of the PL end, wherein the PL end control logic IP core not only inputs clock signals and reset signal lines from the outside, but also comprises signal lines bound with FPGA pins of the control peripheral equipment, and a bus port for exchanging data with the AXI bus control IP core. Finally, establishing a Block design in a new engineering of Vivado, adding a Zynq body IP core, carrying out basic configuration on Zynq according to hardware conditions, adding an AXI bus IP core and an encapsulated PL end IP core into a design, clicking an automatic connection option, automatically generating a matched interconnection module by a system, using a reset signal generated by a PS end as global reset, using a 100MHz clock signal generated by an internal phase-locked loop of the PS end as a PL end clock, further completing time sequence constraint and pin constraint, and finally generating a bit stream file.
Step seven: and finishing the PS-end software programming. Fig. 3 shows a flow of signal calculation by the PS end, after various parameters are configured at power-on, the PS end enters a loop to wait for an interrupt signal from the PL end, and when four low-frequency variables are updated, the PS end triggers an interrupt, and enters an interrupt service routine to start a signal calculation flow. Firstly, the PS end obtains the low-frequency variable transmitted by the current PL end from an AXI bus register, then solves E, Q, L, S, R five important parameters, further enters an incremental PI controller of a phase-locked, amplitude and quadrature control loop, calculates the current vibration type precession angle, and finally synthesizes and decomposes the amplitude and quadrature control force to the x-AXIs and the y-AXIs. In addition, the PS end is also responsible for transmitting important data information to the upper computer through the UART port in real time, and the upper computer program can analyze and process the data after collecting and storing the important data information.
It should be noted that the foregoing merely illustrates the technical idea of the present invention and is not intended to limit the scope of the present invention, and that a person skilled in the art may make several improvements and modifications without departing from the principles of the present invention, which fall within the scope of the claims of the present invention.
Claims (10)
1. A hemispherical resonator gyro full angle control system based on a double-frequency carrier scheme is characterized in that: the device comprises a front-end excitation/readout module, a signal processing module and a rear-end loop control module; the front-end excitation/readout circuit adopts double-frequency carrier modulationAfter the signals are read out from the public polar plate and amplified, the signals enter a signal processing module, the signals are demodulated and filtered by using carrier waves to obtain x and y axial displacement signals, and the x and y axial displacement signals are demodulated into a low-frequency variable c by a phase-locked loop signal x 、s x 、c y 、s y And E, Q, L and theta are obtained through combination operation and are sent to a rear end loop control module, control quantities corresponding to the output of an amplitude loop, a quadrature loop, a phase loop and a precession angle are obtained through PI control, corresponding control force is obtained through PI control and is coupled with carrier waves and direct current voltage, and finally the control force is applied to an x-plane and y-plane external excitation electrode in real time, so that closed loop control of the system is completed.
2. The hemispherical resonator gyro full angle control system based on the dual-frequency carrier scheme as claimed in claim 1, wherein: the front-end circuit comprises a front-end excitation circuit and a front-end amplifying circuit, wherein the front-end excitation circuit converts a voltage signal output by the DAC into a proper electrostatic driving force and applies the proper electrostatic driving force to the excitation electrode after being modulated by a carrier wave, and the front-end amplifying circuit is responsible for amplifying a weak voltage signal from a harmonic oscillator reading end into a magnitude which can be picked up by the ADC chip as undistorted as possible.
3. The control method of the hemispherical resonator gyro full angle control system based on the dual-frequency carrier scheme as claimed in claim 1, wherein the control method comprises the following steps: the method comprises the following steps:
step one: determining signal flow and hardware module division;
step two: dividing work according to the characteristics of the PS end and the PL end;
step three: setting up peripheral driving hardware logic;
step four: carrying out carrier removal demodulation on the read signal to obtain x and y displacement signals;
filtering the read signal;
multiplying and demodulating the displacement signal to obtain a low-frequency variable c x 、s x 、c y 、s y ；
Step five: generating a logic design by a signal;
step six: completing the design of the logic function of the PL end;
step seven: and finishing the PS-end software programming.
4. The hemispherical resonator gyro full angle control method based on the dual-frequency carrier scheme according to claim 3, wherein the method comprises the following steps: the first step is as follows:
after the read-out signals obtained on the spherical shell of the harmonic oscillator are processed by a front-end circuit, the read-out signals are collected and transmitted to the PL end of Zynq through a high-speed ADC chip, the read-out signals are demodulated by two paths of high-frequency carrier signals adopted during modulation, and then the two paths of signals are subjected to band-pass filtering processing to obtain x and y axial displacement change signals working at the resonant frequency; at this time, the resonance frequency tracking signal generated by the phase-locked loop is further demodulated for the displacement signal, four low-frequency variables are transmitted from the PL end to the PS end through the AXI bus, and E, Q, L obtained by the calculation is respectively associated with the amplitude control loop, the quadrature control loop and the PLL phase tracking loop to obtain the control force f as 、f qc The precession angle theta calculated by combining the parameter solution is orthogonally decomposed to the x and y axes, and then is transmitted back to the PL end through the AXI bus, and the modulation of the phase-locked loop reference signal is received to obtain alternating current control force f x And f y The high-frequency carrier wave is modulated by the low-speed DAC output and the high-frequency carrier wave corresponding to the high-speed DAC output, and is loaded on the excitation electrode, so that closed-loop control is realized.
5. The hemispherical resonator gyro full angle control method based on the dual-frequency carrier scheme according to claim 3, wherein the method comprises the following steps: the second step is as follows:
the PL terminal is responsible for processing high-frequency, parallel and high-time-sequence-requirement work, namely, driving, signal transceiving and filtering demodulation of peripheral equipment, the PS terminal is responsible for carrying out complex floating point operation, when the PL terminal is communicated with the PS terminal, through defining register addresses on a bus, x-axis detection signals and y-axis detection signals are generated after the demodulation and filtering of the PL terminal x 、s x 、c y 、s y Storing the signals into an input register of an AXI4 bus for reading the signals by a PS end, registering the calculated control signals into an output register for generating control force after reading by a PL end; design with AXI Total according to this ideaThe input port comprises an input clock, a reset and data from the PL terminal, and the output port outputs the calculated parameters to the FPGA of the PL terminal.
6. The hemispherical resonator gyro full angle control method based on the dual-frequency carrier scheme according to claim 3, wherein the method comprises the following steps: the third step is as follows:
the peripheral module of the system is a digital-to-analog converter and an analog-to-digital converter, which are bridges for communicating the digital system and the gyroscope head; for the driving of the high-speed ADC and the DAC, the parallel port communication is adopted, so that the data of the ADC input data bus is only required to be read into a register under the synchronization of a clock, or the data in the register is required to be transferred to an output data bus connected with the DAC; for the 20-bit high-precision DAC11001B outputting the control force, an SPI serial data communication mode is adopted, so that a communication protocol module is required to complete the control of the SPI serial data communication mode.
7. The hemispherical resonator gyro full angle control method based on the dual-frequency carrier scheme according to claim 3, wherein the method comprises the following steps: the fourth step is as follows:
the read-out signals of the spherical shell of the harmonic oscillator are collected and transmitted to the FPGA by the ADC after passing through the front-end analog amplifier and the analog filter, and are separated into signals in the x-axis direction and the y-axis direction after demodulation of two carriers, and are respectively filtered; the CIC filter of the first stage filters out a part of high-frequency signals and simultaneously carries out downsampling on the signals, the downsampling is carried out to the sampling frequency suitable for the work of the FIR filter, then the downsampling is carried out through the CIC filter of the first stage, and the sampling rate is increased to be consistent with the sampling rate of the phase-locked loop signals so as to carry out next-stage delay variable demodulation; the time sequence control of the whole flow sampling is realized by using hardware logic at the ZynqPL end.
8. The hemispherical resonator gyro full angle control method based on the dual-frequency carrier scheme according to claim 3, wherein the method comprises the following steps: the fifth step is as follows:
in the dual-frequency carrier scheme, two types of sine wave signals need to be continuously output, one is two paths of high-frequency carrier signals, and the frequency of the two paths of high-frequency carrier signals is fixed; the other is a phase-locked loop signal for tracking the resonance frequency of the gyroscope, and the synchronization with the vibration state of the harmonic oscillator is ensured through the adjustment of the PI controller; the module is realized by using a PL terminal with good time synchronism; the method is realized by adopting a table look-up mode to generate a ROM table of the sine signal in advance, then invoking a BlockRAM resource in the FPGA as a memory of ROM table data, and realizing continuous output of the sine signal in a mode of continuously increasing addresses; the carrier signal is sine wave with fixed frequency, so that the increment of the address is constant, but the phase-locked loop signal for tracking the resonant frequency needs to continuously adjust the frequency, so that the increment of the address is controlled by PI; finally, the digital quantity of the signal output is output to the DAC and converted into the required analog voltage signal.
9. The hemispherical resonator gyro full angle control method based on the dual-frequency carrier scheme according to claim 3, wherein the method comprises the following steps: the sixth step is as follows:
after the control modules of the logic part are designed, a top layer module is designed to call each division module and instantiate, wherein each instantiation is equivalent to multiplexing the module once in the system and is similar to the function of a function in a software language, and the function of the top layer module is that the function modules are mutually connected to form a complete FPGA on-chip hardware logic system; the whole system is packaged to obtain an IP core of a PL end, and the PL end control logic IP core not only inputs clock signals and reset signal lines from the outside, but also comprises signal lines bound with FPGA pins of a control peripheral device, wherein the bus ports exchange data with an AXI bus control IP core; finally, establishing a Block design in a new engineering of Vivado, adding a Zynq body IP core, carrying out basic configuration on Zynq according to hardware conditions, adding an AXI bus IP core and an encapsulated PL end IP core into a design, clicking an automatic connection option, automatically generating a matched interconnection module by a system, using a reset signal generated by a PS end as global reset, using a 100MHz clock signal generated by an internal phase-locked loop of the PS end as a PL end clock, further completing time sequence constraint and pin constraint, and finally generating a bit stream file.
10. The hemispherical resonator gyro full angle control method based on the dual-frequency carrier scheme according to claim 3, wherein the method comprises the following steps: the seventh step is as follows:
after various parameters are configured during starting, entering a loop to wait for an interrupt signal from a PL end, triggering the interrupt when four low-frequency variables are updated, and entering an interrupt service routine to start a signal calculation flow; firstly, a PS end obtains a low-frequency variable transmitted by a current PL end from an AXI bus register, then calculates E, Q, L, S, R five important parameters, further enters an incremental PI controller of a phase-locked, amplitude and quadrature control loop, calculates a current vibration type precession angle, and finally synthesizes and decomposes amplitude and quadrature control forces to the x-AXIs and the y-AXIs; in addition, the PS end also transmits important data information to the upper computer through the UART port in real time, and the upper computer program can analyze and process the data after collecting and storing the data.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117833935A (en) * | 2024-03-05 | 2024-04-05 | 成都航天通信设备有限责任公司 | Signal frequency conversion processing system and method based on FPGA |
| CN117968653A (en) * | 2024-03-28 | 2024-05-03 | 中国船舶集团有限公司第七〇七研究所 | Method and system for calculating angle of resonance gyro based on closed loop |
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2023
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117833935A (en) * | 2024-03-05 | 2024-04-05 | 成都航天通信设备有限责任公司 | Signal frequency conversion processing system and method based on FPGA |
| CN117833935B (en) * | 2024-03-05 | 2024-05-07 | 成都航天通信设备有限责任公司 | Signal frequency conversion processing method based on FPGA |
| CN117968653A (en) * | 2024-03-28 | 2024-05-03 | 中国船舶集团有限公司第七〇七研究所 | Method and system for calculating angle of resonance gyro based on closed loop |
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