CN116565992A - EOC current setting circuit, related chip and electronic equipment - Google Patents
EOC current setting circuit, related chip and electronic equipment Download PDFInfo
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- CN116565992A CN116565992A CN202210670930.2A CN202210670930A CN116565992A CN 116565992 A CN116565992 A CN 116565992A CN 202210670930 A CN202210670930 A CN 202210670930A CN 116565992 A CN116565992 A CN 116565992A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/007—Regulation of charging or discharging current or voltage
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00302—Overcharge protection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00304—Overcurrent protection
Abstract
The embodiment of the application provides an EOC current setting circuit, a related chip and an electronic device, wherein the circuit can comprise: the constant-current circuit, the constant-voltage circuit, the control circuit and the current regulation circuit, wherein the second input end of the control circuit is used for inputting n driving signals, the first output end of the current regulation circuit is connected with the first input end of the constant-current circuit, the second output end of the current regulation circuit is respectively connected with the second input end of the constant-current circuit and the first input end of the constant-voltage circuit, the third output end of the current regulation circuit is connected with the second input end of the constant-voltage circuit, and the second output end of the constant-current circuit is connected with the fourth input end of the control circuit. The control circuit controls the driving voltage of the constant voltage circuit or the constant current circuit through n driving signals, voltage signals output by the constant current circuit and an enable signal EN. In the constant-current and constant-voltage charging process, the driving voltage is increased to reduce the mismatch ratio of the EOC current threshold, improve the precision of the EOC current threshold and further improve the charging effect of the battery.
Description
Technical Field
The application relates to the technical field of LEDs, in particular to an EOC current setting circuit, a related chip and electronic equipment.
Background
In a battery charging power management chip, voltage and current that would charge a battery are defined in order to prevent the battery from being overcharged. The method of current limiting includes End of charge (EOC) protection and over-current protection circuits (Over Current Protection, OCP). In EOC protection, a power tube and a sampling tube charged by a battery are kept at constant sizes, so that the charging current and the sampling current have a fixed proportion, and the charging current is turned off according to expectations through judgment of the sampling current.
In the linear charging power management of a battery, the charging current in the constant voltage charging stage is gradually decreased, and when it is decreased to a certain value, the charging current is turned off in order to protect the battery. If the ratio of the battery charging Constant Current (CC) value to the EOC value is fixed, the CC value is reduced, or the ratio of the CC value to the EOC value is increased, the CC value is unchanged, so that the EOC current threshold is reduced, and the problem of poor EOC current precision is caused.
Disclosure of Invention
The embodiment of the application provides an EOC current setting circuit, a related chip and electronic equipment, which can improve the EOC current threshold precision and further improve the battery charging effect.
In a first aspect, an EOC current setting circuit provided in this embodiment of the present application includes a constant current circuit, a constant voltage circuit, a control circuit, and a current adjustment circuit, where an input end of the current adjustment circuit is connected to VDD, a first input end of the control circuit is connected to an enable signal EN, a second input end of the control circuit is connected to n driving signals, an output end of the control circuit is connected to a control end of the current adjustment circuit, a first output end of the current adjustment circuit is connected to a first input end of the constant current circuit, a second output end of the current adjustment circuit is respectively connected to a second input end of the constant current circuit and a first input end of the constant voltage circuit, a third output end of the current adjustment circuit is connected to a second input end of the constant voltage circuit, both the first output end of the constant current circuit and the first output end of the constant voltage circuit are connected to a third input end of the control circuit, a second output end of the constant current circuit is connected to a fourth input end of the control circuit, and n is a positive integer;
The control circuit is used for controlling the driving voltage of the constant voltage circuit or the constant current circuit according to a first signal, the n driving signals and the enabling signal EN so as to reduce the mismatch ratio of an EOC current threshold, and the first signal is a voltage signal output by a second output end of the constant current circuit.
In a second aspect, embodiments of the present application provide a chip including the EOC current setting circuit of the first aspect.
In a third aspect, an embodiment of the present application provides an electronic device, where the electronic device includes the EOC current setting circuit described in the first aspect or the chip described in the second aspect.
The EOC current setting circuit comprises a constant current circuit, a constant voltage circuit, a control circuit and a current adjusting circuit, wherein the input end of the current adjusting circuit is connected with VDD, the first input end of the control circuit is connected with an enable signal EN, the second input end of the control circuit is connected with n driving signals, the output end of the control circuit is connected with the control end of the current adjusting circuit, the first output end of the current adjusting circuit is connected with the first input end of the constant current circuit, the second output end of the current adjusting circuit is respectively connected with the second input end of the constant current circuit and the first input end of the constant voltage circuit, the third output end of the current adjusting circuit is connected with the second input end of the constant voltage circuit, the first output end of the constant current circuit and the first output end of the constant voltage circuit are both connected with the third input end of the control circuit, and the second output end of the constant current circuit is connected with the fourth input end of the control circuit. In this application, the control circuit controls the driving voltage of the constant voltage circuit or the constant current circuit by n driving signals, the voltage signal output from the constant current circuit, and the enable signal EN. In the constant-current and constant-voltage charging process, the driving voltage is increased to reduce the mismatch ratio of the EOC current threshold, improve the precision of the EOC current threshold and further improve the charging effect of the battery.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an EOC current setting circuit according to an embodiment of the present application;
FIG. 2 is a schematic diagram of another EOC current setting circuit according to an embodiment of the present application;
fig. 3 is a schematic diagram of a current adjustment circuit 400 according to an embodiment of the present disclosure;
FIG. 4 is a schematic structural diagram of a basic current mirror according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of a constant current circuit 100 according to an embodiment of the present application;
fig. 6 is a schematic diagram of a structure of a constant voltage circuit 200 provided in an embodiment of the present application;
fig. 7 is a schematic diagram of a structure of another constant voltage circuit 200 provided in an embodiment of the present application;
fig. 8 is a schematic structural diagram of a control circuit 300 according to an embodiment of the present disclosure;
fig. 9 is a schematic structural diagram of another EOC current setting circuit according to an embodiment of the present application.
Detailed Description
For better understanding of the technical solutions of the present application by those skilled in the art, the technical solutions of the embodiments of the present application are clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art without the exercise of inventive faculty, are intended to be within the scope of protection of the present application based on the description of the embodiments herein.
The terms first, second and the like in the description and in the claims of the present application and in the above-described figures, are used for distinguishing between different objects and not for describing a particular sequential order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, software, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
Embodiments of the present application will be described with reference to the accompanying drawings, in which the crossing points of intersecting conductors have dots to indicate that the conductors are connected, and the non-dots at the crossing points indicate that the conductors are not connected.
In the linear charging power management of a battery, the charging current in the constant voltage charging stage is gradually decreased, and when it is decreased to a certain value, the charging current is turned off in order to protect the battery. If the ratio of the battery charging Constant Current (CC) value to the EOC value is fixed, the CC value is reduced, or if the ratio of the CC value to the EOC value is increased, the CC value is unchanged, the EOC current threshold is reduced, and as the charging current is reduced, the gate-source voltage of the transistor approaches the threshold voltage, and the mismatch of the threshold voltage causes the mismatch of current sampling, so that the charging current is turned off too early or too late. The battery is in a pseudo-saturated state due to the fact that the charging current is turned off too early, so that the endurance capacity of the battery is weakened; too late shutdown of the charging current can cause overcharge of the battery, damage to the battery can be easily caused, and safety accidents can be caused.
Currently, more and more users require a small EOC current to achieve high accuracy to ensure that the battery is truly full. However, in the battery charging management process, if the constant current value is far greater than the EOC current value, the protection battery overcharge measure may fail or the value of the EOC current may deviate greatly from the expected value, so that the good protection purpose may not be achieved.
In order to solve the above problems, the application provides an EOC current setting circuit, which controls the driving voltage of a constant voltage circuit through a control circuit, and increases the driving voltage of the constant voltage circuit in the constant current and constant voltage charging process, thereby reducing the mismatch ratio of an EOC current threshold, improving the precision of the EOC current threshold, and further improving the battery charging effect.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an EOC current setting circuit according to an embodiment of the present application. As shown in fig. 1, the EOC current setting circuit includes a constant current circuit 100, a constant voltage circuit 200, a control circuit 300, and a current adjustment circuit 400.
The input end of the current adjustment circuit 400 is connected to VDD, the first input end of the control circuit 300 is connected to an enable signal EN, the second input end of the control circuit 300 is connected to n driving signals, the output end of the control circuit 300 is connected to the control end of the current adjustment circuit 400, the first output end of the current adjustment circuit 400 is connected to the first input end of the constant current circuit 100, the second output end of the current adjustment circuit 400 is respectively connected to the second input end of the constant current circuit 100 and the first input end of the constant voltage circuit 200, the third output end of the current adjustment circuit 400 is connected to the second input end of the constant voltage circuit 200, the first output end of the constant current circuit 100 and the first output end of the constant voltage circuit 200 are both connected to the third input end of the control circuit 300, the second output end of the constant current circuit 100 is connected to the fourth input end of the control circuit 300, and n is a positive integer.
Optionally, the control circuit 300 is configured to control the driving voltages of the constant voltage circuit 200 or the constant current circuit 100 by using a first signal, the n driving signals, and the enable signal EN to reduce a mismatch ratio of an EOC current threshold, where the first signal is a voltage signal output by a second output terminal of the constant current circuit 100.
As shown in fig. 2, the EOC current setting circuit further includes the driving circuit 500, and an output terminal of the driving circuit 500 is connected to a first input terminal of the control circuit 300, for generating n driving signals to be transmitted to the control circuit 300 to control the driving voltage of the constant voltage circuit 200 or the constant current circuit 100.
In this embodiment of the present application, the control circuit 300 controls the driving voltage of the constant voltage circuit 200 or the constant current circuit 100 according to n driving signals, an enabling signal, a first output terminal of the constant voltage circuit 200, and voltage signals output by the first output terminal and the second output terminal of the constant current circuit 100, so as to ensure the precision of the EOC current threshold when the constant current is changed and to increase the driving voltage of the constant voltage circuit 200, reduce the mismatch ratio of the EOC current threshold, and improve the precision of the EOC current threshold when the constant current is changed and the constant current demand is unchanged and the EOC current threshold is reduced.
Optionally, as shown in fig. 3, the current adjustment circuit 400 includes n current mirrors, each including a fourth transistor Q4, a fifth transistor Q5, and a sixth transistor Q6, where n is a positive integer greater than 2;
the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor in each current mirror are P-channel MOS transistors. And the fourth transistor Q4, the fifth transistor Q5, the sixth transistor Q6 in each current mirror have a size ratio b:1: b is c, and both b and c are positive integers greater than 1.
Optionally, the gate of each fourth transistor Q4, the gate of each fifth transistor Q5, and the gate of each sixth transistor Q6 are all connected to the control terminal of the current adjustment circuit 400, the source of each fourth transistor Q4, the source of each fifth transistor Q5, and the source of each sixth transistor Q6 are all connected to the input terminal of the current adjustment circuit 400, the drain of each fourth transistor Q4 is connected to the third output terminal of the current adjustment circuit 400, the drain of each fifth transistor Q5 is connected to the first output terminal of the current adjustment circuit 400, and the drain of each sixth transistor Q6 is connected to the second output terminal of the current adjustment circuit 400.
In the embodiment of the present application, the values of b and c may be preset by the user, for example, b=c=10 according to factors such as the area, precision, power consumption, and the like of the transistor. The control circuit 300 controls the on or off of the fourth transistor Q4, the fifth transistor Q5 and the sixth transistor Q6 in the current mirror to reduce the total size of the transistors in the current adjustment circuit 400 (the total size of the fourth transistor Q4 and the sixth transistor Q6 are reduced), so as to increase the driving voltage of the constant voltage circuit 200 or the constant current circuit 100, so that the current mirror error before the fourth transistor Q4 and the sixth transistor Q6 or the current mirror error before the fifth transistor Q5 and the sixth transistor Q6 in each current mirror in the current adjustment circuit 400 is reduced, thereby reducing the mismatch ratio of the EOC current threshold, improving the EOC current threshold precision, and further improving the battery charging effect.
As shown in fig. 4, fig. 4 is a schematic structural diagram of a basic current mirror according to an embodiment of the present application. Wherein the transistor MP1 and the transistor MP2 constitute a size ratio of 1: k, and transistors MP1 and MP2 are both P-channel MOS transistors. The method is characterized in that the method is obtained according to the relation of the square law of the MOS transistor current:
I ref ＝1/2*μ p Cox(W/L) 1 *(V gs -V th1 )2*(1+λ 1 V ds1 ) (1)
I o ＝1/2*μ p Cox(W/L) 2 *(V gs -V th2 )2*(1+λ 2 V ds2 ) (2)
Wherein I is ref For the reference current of the current mirror, I o For the output current lambda of the current mirror 1 Is the modulation factor of transistor MP1, lambda 2 Is the modulation factor of transistor MP2, where μ p Is carrier mobility, is constant, cox is dielectric constant of insulating layer, (W/L) 1 Is the ratio of the channel width to the channel length of the transistor MP1, (W/L) 2 V is the ratio of the channel width to the channel length of the transistor MP2 gs Is MOS tube gate source voltage, V th 1 is the threshold voltage of the transistor MP1, V th2 Is the threshold voltage of transistor MP2, V ds1 Is the drain-source voltage of the transistor MP1, V ds2 Is the drain and source of transistor MP2A voltage.
Due to the output current I o Is mainly related to the width-to-length ratio W/L of the MOS transistor channel, the threshold voltage V th Drain-source voltage V ds And the effect of mismatch. If the aspect ratio mismatch of transistor MP2 is delta (W/L) 2 Threshold voltage mismatch of DeltaV th Drain-source voltage V ds Mismatch of DeltaV ds Based on the ratio of the dimensions of the transistor MP1 and the transistor MP2, it is possible to obtain:
(W/L) 2 ＝k*(W/L) 1 +Δ(W/L) 2 (3)
ΔV th ＝V th1 -V th2 (4)
Δ(λV ds )＝λ 1 V ds1 -λ 2 V ds2 ＝λ 1 (V ds1 -V ds2 ) +(λ 1 -λ 2 )V ds2 ＝λ 1 ΔV ds +(λ 1 -λ 2 )V ds2 (5)
the mismatch ratio of the output current Io can be deduced from the formulas (1) to (5) as follows:
ΔI o /(k*I ref )＝I o /(k*I ref )-1
＝[1+Δ(W/L) 2 /k/(W/L) 1 ][1+ΔV th /(V gs1 -V th1 )]2*[1-Δ(λV ds )/(1+λ 1 V ds1 )]-1 (6)
as can be seen from formula (6), the aspect ratio Δ (W/L) 2 Mismatch, drain-source voltage mismatch DeltaV ds Are all equal to the output current I o Is linear with respect to the mismatch ratio of (a) and (V) th And output current I o Is a square relationship to the mismatch ratio of I o The effect of mismatch should be taken as a first consideration. Meanwhile, when the transistor MP1 and the transistor MP2 have the same channel length, the modulation factor lambda 1 ＝λ 2 . Therefore, if the aspect ratio of the transistor MP2 is large, the aspect ratio mismatch is negligible. Based on this, formula (6) can be simplified as:
ΔI o /(k*I ref )＝[1-ΔV ds /(1+λ 1 V ds1 )]*[1+ΔV th /(V gs1 -V th1 )]2-1 (7)
if V ds Mismatch is eliminated and equation (7) can be further reduced to:
ΔI o /(k*I ref )＝[1+ΔV th /(V gs1 -V th1 )]2-1 (8)
thus, in the present embodiment, during the constant current charging phase, the output current I of each current mirror in the current regulation circuit 400 bat The mismatch ratio (of constant current) is: ΔI bat /(b*c*I s_cc )＝[1+ΔV th /(V gs5 -V th5 )]2-1, wherein said V gs5 At the voltage of the fifth transistor Q5, V th5 Is the threshold voltage of the fifth transistor Q5, deltaV th For the threshold voltage mismatch of the sixth transistor Q6, the I s_cc Is the sense current on the fifth transistor Q5. In the constant voltage charging phase, the output current I of each current mirror in the current regulation circuit 400 bat The mismatch ratio (of constant current) is: ΔI bat /(c*I s_eoc )＝[1+ΔV th /(V gs4 -V th4 )]2-1, wherein V gs4 The V is gs4 At the voltage of the fourth transistor Q4, V th4 Is the threshold voltage of the fourth transistor Q4, deltaV th For the threshold voltage mismatch of the sixth transistor Q6, the I s_eoc Is the sense current on the fourth transistor Q4.
Alternatively, as shown in fig. 5, the constant current circuit 100 includes a first operational amplifier U1, a second operational amplifier, U2, a first transistor Q1, a first diode D1, and a first resistor R1.
The first transistor Q1 is a P-channel MOS transistor. The negative input end of the first operational amplifier U1 is respectively connected with the first input end of the constant current circuit 100 and the source electrode of the first transistor Q1, the positive input end of the first operational amplifier U1 is connected with the second input end of the constant current circuit 100, the output end of the first operational amplifier U1 is connected with the grid electrode of the first transistor Q1, the drain electrode of the first transistor Q1 is respectively connected with one end of the first resistor R1, the positive input end of the second operational amplifier U2 and the second output end of the constant current circuit 100, the other end of the first resistor R1 is grounded, the negative input end of the second operational amplifier U2 is connected with the first reference voltage Vrefcc, the output end of the second operational amplifier U2 is connected with the anode of the first diode D1, and the cathode of the first diode D1 is connected with the first output end of the constant current circuit 100.
In a specific implementation, in the constant current charging stage, the first operational amplifier U1 compares drain voltages of the fifth transistor Q5 and the sixth transistor Q6, adjusts the gate voltage of the first transistor Q1, so that Vds of the fifth transistor Q5 and the sixth transistor Q6 are equal, and mismatch of Vds is eliminated.
Wherein, when the first transistor Q1 is in the on state, the second operational amplifier U2 detects the input CC detection current I s_cc Compare with a set Vrefcc/R1, where Vrefcc is a predetermined first reference voltage. The first output end voltage is used for adjusting the grid voltages of the fifth transistor Q5 and the sixth transistor Q6, so that the first input end voltage of the first resistor R1 is ensured to be equal to the first reference voltage Vrefcc, and I is realized bat The current is constant, i.e. constant current. Wherein the constant current I bat_cc May be changed by adjusting the first reference voltage Vrefcc.
Therefore, as can be seen from fig. 3, the constant current I output from the constant current circuit 100 bat_cc The method comprises the following steps:
I bat_cc ＝b*c*I s_cc ＝b*c*Vrefcc/R1 (9)
as can be seen from the formula (9), the constant current I output from the constant current circuit 100 bat_cc The error is mainly due to input offset of the first and second operational amplifiers U1 and U2 and current mirror error between the fifth and sixth transistors Q5 and Q6. In which the offset of the first and second operational amplifiers U1 and U2 can be solved by self-design, thus the constant current I bat_cc The error is mainly affected by the mirror error of the current mirror. From equation (7), it can be seen that the actual constant current I is due to the mismatch of the current mirror bat_cc ' is:
I bat_cc ’＝(b*c*Vrefcc/R1)*[1-ΔV ds /(1+λ 5 V ds5 )]*[1+ΔV th /(V gs5 -V th5 )] 2 (10)
wherein the lambda is 5 For the modulation factor of the fifth transistor Q5, said V ds5 Is the drain-source voltage of the fifth transistor Q5. The clamping action of the first operational amplifier U1 causes ΔV ds ＝V ds5 -V ds6 =0, so the constant current mismatch depends only on the threshold voltage mismatch Δv th . After the formula (10) is simplified, the constant current I bat_cc ' can be expressed as:
I bat_cc ’＝(b*c*Vrefcc/R1)*[1+ΔV th /(V gs5 -V th5 )] 2 (11)
alternatively, as shown in fig. 6, fig. 6 is a schematic structural diagram of a constant voltage circuit 200 according to an embodiment of the present application. As shown in fig. 6, the constant voltage circuit 200 includes a third operational amplifier U3, a fourth operational amplifier U4, a second transistor Q2, a second resistor R2, a third resistor R3, a fourth resistor R4, and a second diode D2.
The second transistor Q2 is a P-channel MOS transistor. The negative input end of the third operational amplifier U3 is respectively connected to the second input end of the constant voltage circuit 200 and the source electrode of the second transistor Q2, the positive input end of the third operational amplifier U3 is respectively connected to the first input end of the constant voltage circuit 200 and one end of the third resistor R3, the output end of the third operational amplifier U3 is connected to the gate electrode of the second transistor Q2, the drain electrode of the second transistor Q2 is connected to one end of the second resistor R2, the other end of the second resistor R2 is grounded, the other end of the third resistor R3 is respectively connected to one end of the fourth resistor R4 and the positive input end of the fourth operational amplifier U4, the other end of the fourth resistor R4 is grounded, the negative input end of the fourth operational amplifier U4 is connected to the second reference voltage Vrefcv, the output end of the fourth operational amplifier U4 is connected to the anode electrode of the second diode D2, and the other end of the second diode D2 is connected to the first output end of the constant voltage circuit 200.
As shown in fig. 7, the constant voltage circuit 200 further includes a sixth operational amplifier U6, wherein a negative input terminal of the sixth operational amplifier U6 is connected to one end of the second resistor R2 and a drain electrode of the second transistor Q2, a positive input terminal of the sixth operational amplifier U6 is connected to the fourth reference voltage Vrefeoc, an output terminal of the sixth operational amplifier U6 is connected to the second output terminal of the constant voltage circuit 200, and the sixth operational amplifier U6 is configured to instruct the constant current output by the EOC current setting circuit to decrease to the EOC current threshold.
The second output terminal of the constant voltage circuit 200 may be connected to an external component, which may be a circuit or a component other than the EOC current setting circuit. When the sixth operational amplifier U6 outputs a high level, the external component can know that the charging current of the current battery is already reduced to the EOC current threshold in the process of reducing the charging current, and at this time, a larger deviation occurs in the detection of the EOC current threshold, and effective measures are taken to improve the accuracy of the EOC current threshold so as to avoid too late or too early closing of the charging current.
For example, in the constant voltage stage, when the voltage at the first end of the first resistor R1 is lower than the reference voltage vrefcc_low as the charging current decreases, the control circuit 300 controls the on number of n current mirrors under the enabling condition of the enable signal EN, so as to reduce the total size of the fourth transistor Q4, the fifth transistor Q5 and the sixth transistor Q6, improve the EOC current threshold precision, and further improve the battery charging effect.
In the constant voltage charging phase, the battery charging current gradually decreases, and the detection current I of the fourth transistor Q4 in the current mirror s_eoc According to the size proportion 1: c mirror the current I on the sixth transistor Q6 in the current mirror bat . Thus when I s_eoc <When Vrefeoc/R2 is detected, the sixth operational amplifier U6 outputs a high level to represent I bat Below the EOC threshold. At this time EOC current threshold I bat_eoc The method comprises the following steps:
I bat_eoc ＝c*I s_eoc ＝c*Vrefeoc/R2 (12)
wherein EOC current threshold I bat_eoc By adjusting vrefaoc. From equation (7), it can be seen that due to the current mirror mismatch, the actual EOC current threshold I bat_eoc ' can be expressed as:
I bat_eoc ’＝(c*Vrefeoc/R2)*[1-ΔV ds /(1+λ 4 V ds4 )]*[1+ΔV th /(V gs4 -V th4 )] 2 (13)
wherein the lambda is 4 For the modulation factor of the fourth transistor Q4, the V ds4 Is the drain-source voltage of the fourth transistor Q4. The clamping action of the third operational amplifier U3 causes ΔV ds ＝V ds4 -V ds6 =0, so EOC current threshold mismatch depends only on threshold mismatch Δv th . After the formula (13) is simplified, EOC current threshold I bat_eoc ' is:
I bat_eoc ’＝(c*Vrefeoc/R2)*[1+ΔV th /(V gs4 -V th4 )] 2 (14)
optionally, as shown in fig. 8, fig. 8 is a schematic structural diagram of a control circuit 300 according to an embodiment of the present application. As shown in fig. 8, the control circuit 300 includes a fifth operational amplifier U5, n seventh transistors Q7, n transfer gates tg, n NAND gates NAND, m NOT gates NOT, and n-m NOR gates NOR, where m is a positive integer smaller than n.
The n seventh transistors Q7 are P-channel MOS transistors. The negative input end of the fifth operational amplifier U5 is connected to the third input end of the control circuit 300, the positive input end of the fifth operational amplifier U5 is connected to the third reference voltage vrefcc_low, the output ends of the fifth operational amplifier U5 are respectively connected to the first input ends of the n-m NOR gates, the first input ends of the n NAND gates are respectively connected to the first input end of the control circuit 300, the second input ends of the n NAND gates are respectively connected to the second input end of the control circuit 300, the output ends of the first m NAND gates are respectively connected to the input ends of the m NAND gates NOT, the output ends of the rear n-m NAND gates are respectively connected to the second input ends of the n-m NOR gates, the output ends of the m NAND gates NOT and the output ends of the n-m NOR gates are respectively connected to the gates of the n seventh transistor Q7 and the control gates of the n transmission gates, the output ends of the n seventh transistor Q7 are respectively connected to the output ends of the n seventh transistor Q300, and the output ends of the n seventh transistor tg are respectively connected to the output ends of the n seventh transistor Q300.
It should be noted that the current adjustment circuit 400 includes n control terminals. The control circuit 300 includes n output terminals, each output terminal is connected to a control terminal of the current adjustment circuit 400, that is, the n output terminals of the control circuit 300 are in one-to-one correspondence with the n control terminals of the current adjustment circuit 400, and each output terminal of the control circuit 300 controls on or off of the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor Q6 in one current mirror, so as to control the total size of the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor Q6.
The second input terminal of the control circuit 300 is connected to n driving signals cc_set output by the driving circuit 500. The driving circuit 500 may set a constant current value of battery charging by setting a value of the driving signal cc_set. Specifically, the driving circuit may store in advance a mapping relationship between values of n driving signals cc_set and constant current values, for example, if the constant current is required to be set to 100mA, only the first driving signal cc_set1 may be set to a high level according to the mapping relationship, and the rest driving signals are all set to a low level, so that a current mirror controlled by cc_set1 is in an on state, and the constant current of the battery current is controlled to be 100mA; if the constant current is required to be set to 200mA, only the first driving signal cc_set1 and the second driving signal cc_set2 may be set to high level according to the mapping relation, and the rest driving signals are all set to low level, so that the current mirrors controlled by cc_set1 and cc_set2 are in an on state, and the constant current of the battery current is controlled to 200mA. Or when the constant current is required to be set to 100mA, only the first driving signal cc_set1 can be set to be high level according to the mapping relation, and the rest driving signals are all set to be low level, so that the current mirror controlled by cc_set1 is in an on state, and the constant current of the battery current is controlled to be 100mA; if the constant current is required to be set to 200mA, only the second driving signal cc_set2 may be set to a high level according to the mapping relationship, and the rest driving signals are all set to a low level, so that the current mirror controlled by cc_set2 is in an on state, and the constant current of the battery current is controlled to be 200mA.
Wherein, when the battery charging current is larger in the constant current stage, the threshold mismatch delta V th Cause I bat Is smaller in mismatch of I bat The precision is very high. For example, if mu p Cox is 100. Mu.A/V 2 Aspect ratio (W/L) of a sixth transistor Q6 in the current mirror 6 10000/1, threshold mismatch of DeltaV th = ±30mV. Wherein the constant current I of the constant current stage bat_cc Taking b=c=10 for hundreds of milliamperes to several amperes, if a constant current value I is required bat_cc When=1a, the fifth transistor Q5 in the current mirror has a width to length ratio of 100/1, and detects the current I s_eoc =10ma, thereby resulting in a driving voltage V gs5 -V th5 ＝1.414V，I bat_cc The mismatch ratio of (1) is-4.2% -4.3%, and the actual I is bat_cc 0.958A to 1.043A, which is equal to the required constant current value I bat_cc =1a is not much different, I bat The precision is higher.
When the charging current is larger in the constant voltage stage, similar to the constant current stage, I bat With high accuracy, as can be seen from the formulas (1) - (2) and (14), the driving voltage V decreases with the decrease of the charging current gs4 -V th4 Will also decrease, the threshold mismatch will cause an increase in the current mirror error between the fourth transistor Q4 and the sixth transistor Q6, I bat And the mismatch of the (c) is larger, so that the precision of EOC current threshold detection is poor. For example, the ratio of the EOC current threshold to the constant current is 1: l=1: 100, then I bat_eoc 10mA, corresponding I s_eoc The size of the fourth transistor Q4 is 1000/1, and the driving voltage V can be calculated according to the formula (1), the formula (2) and the formula (14) gs4 -V th4 ＝141.42mV，I bat_eoc The mismatch ratio is-37.9-46.9%, I bat_eoc ' is 6.21 mA-14.69 mA, and the EOC current detection accuracy is higher. If the ratio of the EOC current threshold to the constant current is kept unchanged, the constant current is reduced from 1A to200mA, then I bat_eoc ＝2mA，I s_eoc =0.2ma, V can be calculated gs4 -V th4 = 63.25mV at this time I bat_eoc The mismatch ratio is-72.4-117.4%, I bat_eoc ' is 0.552 mA-4.348 mA, and EOC current detection accuracy is poor. If the ratio of the EOC current threshold to the constant current becomes 1:1000, then I bat_eoc 1mA, the detection current is I s_eoc The driving voltage V can be calculated by =100deg.A gs4 -V th4 ＝44.72mV，I bat_eoc The mismatch ratio is-89.2% -179.2%, I bat_eoc ' is 10.8 mu A-2.792 MA, and EOC current detection accuracy is poor. At a threshold maximum mismatch (DeltaV th >V gs4 -V th4 ) In the case of (a), even the sense current I will occur s_eoc I is not reduced to the detection current threshold bat It has been reduced to 0 and the detection result is erroneously characterized as the battery charge current is still not zero and has not been reduced to the EOC current threshold.
Therefore, during constant-current and constant-voltage charging, if the EOC current threshold to constant current maintains the ratio 1: l is unchanged, L >1, and when the constant current requirement becomes smaller, the EOC current threshold becomes smaller correspondingly, and at the moment, the EOC current accuracy becomes poor. To solve this problem, the present application sets n current mirrors, and when the enable signal EN is enabled, the voltage signal output by the constant voltage circuit 200 controls n seventh transistors Q7, n transmission gates tg, and n driving signals cc_set, and according to the constant current requirement, the control circuit 300 controls the number of turned-on current mirrors in the current adjustment circuit 400, so as to adjust the size of the transistors, so as to ensure the precision of the EOC current threshold when the constant current is changed under the condition that the ratio of the EOC current threshold to the constant current is unchanged.
For example, if the ratio of EOC current threshold to constant current is 1: l=1: 100 remains unchanged, when the constant current is reduced from 1A to 200mA, then I bat_eoc ＝2mA，I s_eoc =0.2 mA. The driving voltage V can be calculated when the total size of the sixth transistor Q6 in the current adjusting circuit 400 is reduced to 2000/1 and the total size of the fourth transistor Q4 is reduced to 200/1 by controlling the turn-on number of the seventh transistor Q7 through n driving signals cc_set gs4 -V th4 ＝200mV，I bat_eo The c loss proportion is-27.8% -32.3%, I bat_eoc ' is 1.444mA to 2.646mA. Comparing with-72.4 to 117.4 percent of I in the scheme bat_eoc The EOC current accuracy is remarkably improved by adding n current mirrors.
Further, in the constant current stage and the constant voltage and large current stage, the charging current is larger, I bat Is smaller. If the ratio of constant current to EOC current threshold, L:1 becomes larger, and under the same constant current requirement, the EOC current threshold becomes smaller, so that the EOC current accuracy becomes worse. To solve the problem, the present application sets an intermediate current threshold I for the charging current through the fifth operational amplifier U5 during the constant voltage phase charging current reduction process mid The I is mid Can be expressed as:
I mid ＝b*c*Vrefcc_low/R2 (15)
wherein I is mid The size of (c) may be changed by adjusting vrefcc_low. When the charging current I bat <I mid The control circuit 300 can control the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor Q5 of the ith through nth current mirrors in the current adjustment circuit 400 to be turned off, so that the fourth transistor Q4 and the sixth transistor Q6 of the current adjustment circuit 400 are reduced in total size, and the driving voltage V is based on the square-law relationship gs4 -V th4 The current mirror error between the fourth transistor Q4 and the sixth transistor Q6 is reduced by increasing, so that the accuracy of EOC current threshold detection is improved, and the high-accuracy setting of EOC current is realized.
For example, if the constant current I is to be bat_cc 1/10 of the value =1a as intermediate current threshold I mid The EOC current threshold is still 1mA. When the charging current is lower than 100mA, the control circuit 300 turns off most of the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor Q6 in the current adjusting circuit 400, and the total width-to-length ratio of the fourth transistor Q4 is set to W/l=40/1. With decreasing charging current, the driving voltage V gs4 -V th4 And correspondingly decreases. When I bat When decreasing to EOC current threshold, I s_eoc Drive voltage v=100 μa gs4 -V th4 ＝223.61mV，I bat_eoc The electricity loss ratio is-25.0% -28.6%, I bat_eoc ' 750 mu A-1.286 mA, compared with the above-mentioned I with the mismatch ratio of-89.2% -179.2% bat_eoc The method for introducing the intermediate current threshold through the fifth operational amplifier U5 can remarkably improve the precision of EOC current.
Further, a plurality of intermediate current thresholds can be reasonably set, so that the sizes of the fourth transistor Q4 and the sixth transistor Q6 are further reduced, and the precision of the EOC current threshold is further improved.
Optionally, the size of the fourth transistor in the ith current mirror is smaller than the size of the fourth transistor in the (i+1) th current mirror, the size of the fifth transistor in the ith current mirror is smaller than the size of the fifth transistor in the (i+1) th current mirror, the size of the sixth transistor in the (i) th current mirror is smaller than the size of the sixth transistor in the (i+1) th current mirror, and the i is a positive integer smaller than n.
In the present application, if the ratio of the EOC current threshold to the constant current is kept unchanged, when the constant current requirement becomes smaller, n driving signals cc_set may be set according to the constant current requirement to control the total size of the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor Q6 in the current mirror, so as to control the size of the driving voltage, so as to provide the precision of the EOC current threshold.
Wherein, there is a mapping relation between the value of the n driving signals cc_set and the constant current value, and the size of the transistor in the ith current mirror is smaller than the size of the transistor in the (i+1) th current mirror in the present application, so when the ratio of the EOC current threshold to the constant current is unchanged, the constant current requirement is smaller, and/or when the ratio of the constant current to the EOC current threshold is L: when 1 is larger and the constant current requirement is the same, the transistors in the following current mirror can be preferentially in the cut-off state, so that the total size of the fourth transistor Q4, the fifth transistor Q5 and the sixth transistor Q6 in the current regulating circuit 400 can be reduced, and the EOC current precision is improved.
It should be noted that, the first reference voltage Vrefcc, the second reference voltage Vrefcv, the third reference voltage vrefaoc, and the fourth reference voltage vrefaoc_low in the present application may be preset according to requirements, and specific values thereof may be determined according to actual application scenarios, which are not limited in the embodiments of the present application.
Optionally, the fourth transistor, the fifth transistor and the sixth transistor in at least one current mirror among the n current mirrors are all in an on state.
In the embodiment of the present application, the fourth transistor, the fifth transistor and the sixth transistor in at least one of the n current mirrors in the current adjustment circuit 400 are all in a conductive state, so that the battery can be charged in a constant-current charging state or a constant-voltage charging state.
When the enable signal EN is enabled, n driving signals cc_set are set according to the constant current requirement, at least one driving signal cc_set in the n driving signals cc_set is at a high level, so that the fourth transistor, the fifth transistor and the sixth transistor in at least one current mirror in the n current mirrors are all in a conducting state, and a constant voltage and constant current function is provided for the battery.
As shown in fig. 9, fig. 9 is a schematic structural diagram of another EOC current setting circuit according to an embodiment of the present application. As shown, the second input terminal of the first NAND gate NAND in the control circuit 300 may be connected to VDD, the first Q7 is non-conductive, the first transmission gate tg is conductive, and thus the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor of the first current mirror in the current adjusting circuit 400 are all in a conductive state, so as to be a battery constant-current constant-voltage charging circuit.
Specifically, the battery charging process includes a constant current charging phase and a constant voltage charging phase. During the constant current charging phase, I bat The current is large and constant, the current of the sixth transistor Q6 is sampled by the fifth transistor Q5 in the current mirror, and then flows through the first resistor R1 to generate voltage, and the voltage is compared with the first reference voltage Vrefcc to control the current regulating circuit 400 The gate voltages of the fourth, fifth and sixth transistors Q4, Q5 and Q6. Wherein the first operational amplifier U1 is used for clamping, which equalizes the drain voltages of the fifth transistor Q5 and the sixth transistor Q6, thereby eliminating V of the sixth transistor Q6 ds Mismatch by comparing the drain voltages of the fifth and sixth transistors Q5, Q6 to adjust the gate voltage of the first transistor Q1.
In the constant voltage stage, the fourth operational amplifier U4 adjusts the gate voltages of the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor Q6 by comparing the voltage at the upper end of the fourth resistor R4 with the second reference voltage Vrefcv, thereby realizing a constant voltage. In the constant voltage process, the charging current gradually decreases, the fourth transistor Q4 and the fifth transistor Q5 are all sampling the current of the sixth transistor Q6, and when the voltage generated by the current of the fifth transistor Q5 flowing through the first resistor R1 decreases below the fourth reference voltage vrefcc_low, the fifth operational amplifier U5 outputs a high level, and the n-m fourth transistors Q4, the fifth transistor Q5 and the sixth transistor Q6 are all in the off state after control. Wherein the third operational amplifier U3 is used in combination with the second transistor Q2 for clamping. After the last n-m fourth, fifth and sixth transistors Q4, Q5 and Q6 are in the off state in the constant voltage stage, the total size of the fourth and sixth transistors Q4 and Q6 in the current regulating circuit 400 becomes smaller, V gs -V th The difference becomes larger until I bat Reduced to a value approaching the EOC current threshold, V gs -V th Are not too small, thereby improving EOC detection accuracy.
It should be noted that, the second input terminal of any one NAND gate NAND of the n NAND gates NAND in the control circuit 300 in the present application may be connected to VDD, so that the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor of one current mirror in the current adjusting circuit 400 are all in an on state, thereby being a battery constant current constant voltage charging circuit.
It can be seen that the EOC current setting circuit provided in this embodiment of the present application includes a constant current circuit, a constant voltage circuit, a control circuit, a driving circuit and a current adjusting circuit, where an output end of the control circuit is connected to a control end of the current adjusting circuit, a first output end and a second output end of the current adjusting circuit are respectively connected to a first input end and a second input end of the constant current circuit, a second output end and a third output end of the current adjusting circuit are respectively connected to a first input end and a second input end of the constant voltage circuit, and a first output end and a second output end of the constant voltage circuit are respectively connected to a third input end and a fourth input end of the control circuit; according to the method, the driving voltage of the constant voltage circuit is controlled by the control circuit according to the first signal, the second signal and the enable signal EN, and in the constant-current constant-voltage charging process, the driving voltage of the constant voltage circuit is increased, so that the mismatch ratio of an EOC current threshold is reduced, the EOC current threshold precision is improved, and the battery charging effect is improved.
It should be understood that references to "at least one" in embodiments of the present application mean one or more, and "a plurality" means two or more. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a alone, a and B together, and B alone, wherein a, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b, or c may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or plural.
The embodiment of the application also provides a chip, which comprises the EOC current setting circuit shown in any one of the above figures 1-7.
The embodiment of the application also provides electronic equipment, which comprises the EOC current setting circuit or the chip.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
In several embodiments provided herein, it should be understood that the disclosed EOC current setting circuit may be implemented in other ways. For example, the EOC current setting circuit embodiments described above are merely illustrative, as other components of the circuits described above may be used with other components of the same functionality. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, circuits or components, which may be in electrical or other forms.
In addition, each circuit in each embodiment of the present application may be integrated in one circuit board, each circuit may exist alone, or two or more circuits may be integrated in one circuit board.
The foregoing has outlined rather broadly the embodiments of the present application, and detailed description of the principles and embodiments of the present application have been provided herein with the application of specific examples, the above examples being provided solely to assist in the understanding of the present application and its core ideas; meanwhile, as those skilled in the art will have modifications in the specific embodiments and application scope in accordance with the ideas of the present application, the present description should not be construed as limiting the present application in view of the above.
Claims (10)
1. An EOC current setting circuit is characterized in that,
the EOC current setting circuit comprises a constant current circuit, a constant voltage circuit, a control circuit and a current adjusting circuit, wherein the input end of the current adjusting circuit is connected with VDD, the first input end of the control circuit is connected with an enable signal EN, the second input end of the control circuit is used for inputting n driving signals,
the output end of the control circuit is connected with the control end of the current regulation circuit, the first output end of the current regulation circuit is connected with the first input end of the constant current circuit, the second output end of the current regulation circuit is respectively connected with the second input end of the constant current circuit and the first input end of the constant voltage circuit, the third output end of the current regulation circuit is connected with the second input end of the constant voltage circuit, the first output end of the constant current circuit and the first output end of the constant voltage circuit are both connected with the third input end of the control circuit, the second output end of the constant current circuit is connected with the fourth input end of the control circuit, and n is a positive integer;
the control circuit is used for controlling the driving voltage of the constant voltage circuit or the constant current circuit according to a first signal, the n driving signals and the enabling signal EN so as to reduce the mismatch ratio of an EOC current threshold, and the first signal is a voltage signal output by a second output end of the constant current circuit.
2. The circuit of claim 1, wherein the constant current circuit comprises a first operational amplifier, a second operational amplifier, a first transistor, a first diode, and a first resistor;
the negative input end of the first operational amplifier is respectively connected with the first input end of the constant current circuit and the source electrode of the first transistor, the positive input end of the first operational amplifier is connected with the second input end of the constant current circuit, the output end of the first operational amplifier is connected with the grid electrode of the first transistor, the drain electrode of the first transistor is respectively connected with one end of the first resistor, the positive input end of the second operational amplifier and the second output end of the constant current circuit, the other end of the first resistor is grounded, the negative input end of the second operational amplifier is connected with a first reference voltage, the output end of the second operational amplifier is connected with the anode of the first diode, and the cathode of the first diode is connected with the first output end of the constant current circuit.
3. The circuit of claim 1, wherein the constant voltage circuit comprises a third operational amplifier, a fourth operational amplifier, a second transistor, a second resistor, a third resistor, a fourth resistor, and a second diode;
The negative input end of the third operational amplifier is respectively connected with the second input end of the constant voltage circuit and the source electrode of the second transistor, the positive input end of the third operational amplifier is respectively connected with the first input end of the constant voltage circuit and one end of the third resistor, the output end of the third operational amplifier is connected with the grid electrode of the second transistor, the drain electrode of the second transistor is connected with one end of the second resistor, the other end of the second resistor is grounded, the other end of the third resistor is respectively connected with one end of the fourth resistor and the positive input end of the fourth operational amplifier, the other end of the fourth resistor is grounded, the negative input end of the fourth operational amplifier is connected with the second reference voltage, the output end of the fourth operational amplifier is connected with the anode of the second diode, and the cathode of the second diode is connected with the first output end of the constant voltage circuit.
4. The circuit of claim 1, wherein the current regulation circuit comprises n current mirrors, each current mirror comprising a fourth transistor, a fifth transistor, and a sixth transistor, the n being a positive integer greater than 2;
The grid electrode of each fourth transistor, the grid electrode of each fifth transistor and the grid electrode of each sixth transistor are all connected with the control end of the current regulating circuit, the source electrode of each fourth transistor, the source electrode of each fifth transistor and the source electrode of each sixth transistor are all connected with the input end of the current regulating circuit, the drain electrode of each fourth transistor is connected with the third output end of the current regulating circuit, the drain electrode of each fifth transistor is connected with the first output end of the current regulating circuit, and the drain electrode of each sixth transistor is connected with the second output end of the current regulating circuit.
5. The circuit of claim 4, wherein the fourth transistor, the fifth transistor, and the sixth transistor in each current mirror have a size ratio b 1: b is c, and both b and c are positive integers greater than 1.
6. The circuit of claim 5, wherein a size of the fourth transistor in an ith current mirror is smaller than a size of the fourth transistor in an i+1th current mirror, a size of the fifth transistor in the ith current mirror is smaller than a size of the fifth transistor in the i+1th current mirror, a size of the sixth transistor in the ith current mirror is smaller than a size of the sixth transistor in the i+1th current mirror, and i is a positive integer smaller than n.
7. The circuit of any of claims 4-6, wherein the control circuit comprises a fifth operational amplifier, n seventh transistors, n transmission gates, n nand gates, m nor gates, and n-m nor gates, the m being a positive integer less than the n;
the negative input end of the fifth operational amplifier is connected with the third input end of the control circuit, the positive input end of the fifth operational amplifier is connected with a third reference voltage, the output end of the fifth operational amplifier is respectively connected with the first input ends of the n-m NOR gates, the first input ends of the n NAND gates are respectively connected with the first input end of the control circuit, the second input ends of the n NAND gates are respectively connected with the second input end of the control circuit, the output ends of the first m NAND gates are respectively connected with the input ends of the m NOR gates, the output ends of the last n-m NAND gates are respectively connected with the second input ends of the n-m NOR gates, the output ends of the m NAND gates and the output ends of the n-m NOR gates are respectively connected with the gates of the n seventh transistors and the control ends of the n transmission gates, the input ends of the n transmission gates are respectively connected with the fourth input ends of the control circuit, and the output ends of the n seventh transistors are respectively connected with the drain electrodes of the n seventh transistors.
8. The circuit of claim 3, wherein the constant voltage circuit further comprises a sixth operational amplifier, a negative input terminal of the sixth operational amplifier is connected to one terminal of the second resistor and a drain electrode of the second transistor, a positive input terminal of the sixth operational amplifier is connected to a fourth reference voltage, an output terminal of the sixth operational amplifier is connected to an external component, and the sixth operational amplifier is used for indicating that the constant current output by the EOC current setting circuit is reduced to the EOC current threshold.
9. A chip comprising the EOC current setting circuit according to any one of claims 1-8.
10. An electronic device comprising the EOC current setting circuit according to any one of claims 1-8 or the chip according to claim 9.
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| CN115220387B (en) * | 2022-09-15 | 2022-11-29 | 成都市易冲半导体有限公司 | Wide-range high-precision linear charging current control method |
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| JPH08272467A (en) * | 1995-03-31 | 1996-10-18 | Mitsubishi Electric Corp | Substrate electric potential generation circuit |
| JP5211866B2 (en) * | 2008-06-06 | 2013-06-12 | ミツミ電機株式会社 | Current control circuit |
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| CN101931255B (en) * | 2010-09-29 | 2012-09-26 | 无锡中星微电子有限公司 | Charging management circuit |
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| CN111934404B (en) * | 2020-10-15 | 2021-01-29 | 北京思凌科半导体技术有限公司 | Charging circuit |
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2023
- 2023-01-28 WO PCT/CN2023/073507 patent/WO2023143487A1/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| CN114142578A (en) | 2022-03-04 |
| CN114142578B (en) | 2022-04-26 |
| WO2023143487A1 (en) | 2023-08-03 |
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