CN116525642A - Display panel, preparation method of display panel and display device - Google Patents
Display panel, preparation method of display panel and display device Download PDFInfo
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- CN116525642A CN116525642A CN202310813051.5A CN202310813051A CN116525642A CN 116525642 A CN116525642 A CN 116525642A CN 202310813051 A CN202310813051 A CN 202310813051A CN 116525642 A CN116525642 A CN 116525642A
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- 238000002360 preparation method Methods 0.000 title abstract description 5
- 230000006835 compression Effects 0.000 claims abstract description 116
- 238000007906 compression Methods 0.000 claims abstract description 116
- 239000000758 substrate Substances 0.000 claims abstract description 109
- 230000005540 biological transmission Effects 0.000 claims abstract description 19
- 230000005525 hole transport Effects 0.000 claims description 25
- 238000004519 manufacturing process Methods 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 15
- 238000005530 etching Methods 0.000 claims description 14
- 230000000149 penetrating effect Effects 0.000 claims description 12
- 239000007769 metal material Substances 0.000 claims description 8
- 230000007423 decrease Effects 0.000 claims description 7
- 238000003475 lamination Methods 0.000 claims description 2
- 230000006798 recombination Effects 0.000 abstract description 9
- 238000005215 recombination Methods 0.000 abstract description 9
- 239000010410 layer Substances 0.000 description 163
- 239000000463 material Substances 0.000 description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 230000009286 beneficial effect Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 239000012790 adhesive layer Substances 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 230000008439 repair process Effects 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
Abstract
The disclosure relates to the technical field of display, and in particular relates to a display panel, a preparation method of the display panel and a display device. The display panel includes: the pixel array substrate comprises a Micro-LED device, a superconducting layer and a first conductive compression part, wherein the Micro-LED device is arranged on a substrate, the Micro-LED device comprises a hole transmission layer, the superconducting layer comprises a first end protruding upwards and a second end protruding downwards, the first end is connected with the first conductive compression part, and the second end is embedded into the hole transmission layer; the driving substrate comprises a second conductive compression part, and when the driving substrate is bonded with the pixel array substrate, the second conductive compression part and the first conductive compression part are aligned and pressed. According to the technical scheme, the concentration of electrons and holes injected into the edge of the Micro-LED device is reduced, so that non-radiative recombination at the edge of the Micro-LED device is reduced, and the luminous efficiency of the Micro-LED device is improved.
Description
Technical Field
The disclosure relates to the technical field of display, and in particular relates to a display panel, a preparation method of the display panel and a display device.
Background
The Micro light emitting diode (Micro Light Emitting Diode, micro-LED) display technology refers to a display technology in which self-luminous Micro-scale LEDs are used as light emitting pixel units, and the light emitting pixel units are assembled on a driving panel to form a high-density LED array. Micro-LED chip has the characteristics of small size, high integration level, high self-luminescence and stability, and the like, and has larger advantages in the aspects of brightness, resolution, contrast, energy consumption, service life, response speed, thermal stability, and the like compared with a liquid crystal display (Liquid Crystal Display, LCD) and an organic light emitting diode (Organic Micro Light Emitting Diode, OLED).
At present, for manufacturing independent Micro-LED devices, a dry etching mode is adopted to realize the manufacturing of the Micro-LED devices. And the dry etching is to remove the target object by adopting an ion source bombardment mode, which can cause damage to the side wall of the Micro-LED device, so that electron hole pairs in the Micro-LED device are subjected to non-radiative recombination at the place, and the luminous efficiency of the Micro-LED device is reduced. In particular, as Micro-LEDs get smaller in size, the non-radiative recombination duty cycle described above gets heavier, resulting in a larger power duty cycle for losses.
Disclosure of Invention
In order to solve the above technical problems or at least partially solve the above technical problems, the present disclosure provides a display panel, a manufacturing method of the display panel, and a display device, which are beneficial to reducing the concentration of electrons and holes injected into the edge of a Micro-LED device, thereby reducing non-radiative recombination at the edge of the Micro-LED device, and improving the light emitting efficiency of the Micro-LED device.
In a first aspect, the present disclosure provides a display panel, comprising:
the pixel array substrate comprises a Micro-LED device, a superconducting layer and a first conductive compression part, wherein the Micro-LED device is arranged on a substrate, the Micro-LED device comprises a hole transmission layer, the superconducting layer comprises a first end protruding upwards and a second end protruding downwards, the first end is connected with the first conductive compression part, and the second end is embedded into the hole transmission layer;
the driving substrate is bonded with the pixel array substrate and comprises a second conductive compression part, and when the driving substrate is bonded with the pixel array substrate, the second conductive compression part and the first conductive compression part are aligned and pressed;
wherein the resistance of the superconductive layer decreases with increasing pressure.
In some embodiments, the first conductive compression section includes a first compression section and a second compression section, the first compression section being connected between the second compression section and the superconducting layer, a longitudinal projected dimension of the first compression section being smaller than a longitudinal projected dimension of the second compression section.
In some embodiments, the top of the second compression portion is protruded, and the protruding height is 5-10 nm.
In some embodiments, the pixel array substrate further includes a first insulating layer disposed at a side of the Micro-LED device.
In some embodiments, the pixel array substrate further includes a buffer layer covering a side of the superconducting layer.
In some embodiments, the buffer layer has a lateral length that is greater than a lateral length of the first conductive compression section.
In a second aspect, the present disclosure further provides a method for manufacturing a display panel, including:
preparing a pixel array substrate; the pixel array substrate comprises a Micro-LED device, a superconducting layer and a first conductive compression part, wherein the Micro-LED device is arranged on the substrate and comprises a hole transmission layer, the superconducting layer comprises a first end protruding upwards and a second end protruding downwards, the first end is connected with the first conductive compression part, and the second end penetrates through the hole transmission layer; the resistance of the superconductive layer decreases with increasing pressure;
preparing a driving substrate and bonding the driving substrate with the pixel array substrate; the driving substrate comprises a second conductive compression part, and the second conductive compression part and the first conductive compression part are in counterpoint lamination.
In some embodiments, preparing a pixel array substrate includes:
preparing an epitaxial layer, wherein the epitaxial layer comprises an electron transport layer, a light-emitting layer and a hole transport layer which are arranged on a substrate;
etching the epitaxial layer to form a Micro-LED device;
covering a first insulating layer on the side edge of the Micro-LED device, and etching the hole transport layer to form a first pit;
forming a superconducting layer on the hole transport layer, the superconducting layer including an upwardly convex first end and a downwardly convex second end, the second end being located within the first pit;
covering a buffer layer on the superconducting layer, and etching part of the buffer layer to form a second pit penetrating to the first end of the superconducting layer;
forming a second insulating layer on one surface of the Micro-LED device on the substrate;
forming a third pit penetrating to the first end of the superconducting layer on the second insulating layer;
filling a metal material into the third pit to form a first compression part, and covering a third insulating layer on the first compression part and the second insulating layer;
and forming a fourth pit penetrating to the first compression part on the third insulating layer, and filling a metal material into the fourth pit to form a second compression part.
In some embodiments, preparing a drive substrate includes:
providing a driving circuit board;
and forming a second conductive compression part on one surface of the driving circuit board corresponding to the position of the first conductive compression part so as to prepare the driving substrate.
In a third aspect, the present disclosure also provides a display device comprising a display panel as described in the first aspect.
The display panel provided by the embodiment of the disclosure comprises: the pixel array substrate comprises a Micro-LED device, a superconducting layer and a first conductive compression part, wherein the Micro-LED device is arranged on a substrate, the Micro-LED device comprises a hole transmission layer, the superconducting layer comprises a first end protruding upwards and a second end protruding downwards, the first end is connected with the first conductive compression part, and the second end is embedded into the hole transmission layer; the driving substrate comprises a second conductive compression part, and when the driving substrate is bonded with the pixel array substrate, the second conductive compression part and the first conductive compression part are aligned and pressed. Therefore, when the driving substrate is bonded with the pixel array substrate, the second conductive compression part and the first conductive compression part are aligned and pressed, and the superconducting material resistance of the middle area of the superconducting layer tends to be zero by utilizing the characteristic that the larger the pressure is, the more the resistance is approaching zero, so that the superconducting material resistance of the edge areas of the left side and the right side of the superconducting layer is larger than that of the middle area. Meanwhile, the hole transmission layer adopts a mode that the middle part is thin and the two sides are thick, so that the resistance difference between the middle area and the edge area of the hole transmission layer is larger, the current transmitted by the first conductive compression part is more concentrated in the middle area of the Micro-LED device, the concentration of electrons and holes injected into the edge of the Micro-LED device is reduced, the non-radiative recombination at the edge of the Micro-LED device is reduced, and the luminous efficiency of the Micro-LED device is improved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.
In order to more clearly illustrate the embodiments of the present disclosure or the solutions in the prior art, the drawings that are required for the description of the embodiments or the prior art will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the disclosure;
fig. 2 is a schematic structural diagram of a pixel array substrate according to an embodiment of the disclosure;
fig. 3 is a schematic flow chart of a method for manufacturing a display panel according to an embodiment of the disclosure;
fig. 4 is a schematic flow chart of a method for manufacturing a pixel array substrate according to an embodiment of the disclosure;
fig. 5 is a specific manufacturing process diagram of a pixel array substrate according to an embodiment of the disclosure.
Detailed Description
In order that the above objects, features and advantages of the present disclosure may be more clearly understood, a further description of aspects of the present disclosure will be provided below. It should be noted that, without conflict, the embodiments of the present disclosure and features in the embodiments may be combined with each other.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure, but the present disclosure may be practiced otherwise than as described herein; it will be apparent that the embodiments in the specification are only some, but not all, embodiments of the disclosure.
The display panel provided by the embodiment of the disclosure is beneficial to reducing the concentration of electrons and holes injected to the edge of the Micro-LED device, so that the non-radiative recombination at the edge of the Micro-LED device is reduced, and the luminous efficiency of the Micro-LED device is improved.
The following describes an exemplary method for manufacturing a display panel, and a display device according to embodiments of the present disclosure with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the disclosure, and fig. 2 is a schematic structural diagram of a pixel array substrate according to an embodiment of the disclosure. Referring to fig. 1 and 2, the display panel 10 includes: a pixel array substrate 11, the pixel array substrate 11 including a Micro-LED device 13, a superconducting layer 14 and a first conductive compression part 15 disposed on a substrate 12, the Micro-LED device including a hole transport layer 131, the superconducting layer including a first end 16 protruding upward and a second end 17 protruding downward, the first end 16 being connected to the first conductive compression part 15, the second end 17 being embedded in the hole transport layer 131; the driving substrate 18, the driving substrate 18 includes a second conductive compression portion 19, and when the driving substrate 18 is bonded to the pixel array substrate 11, the second conductive compression portion 19 and the first conductive compression portion 15 are aligned and pressed.
Specifically, the Micro-LED device 13 is prepared on the substrate 12, and the Micro-LED device 13 includes a hole transport layer 131, a light emitting layer 132, and an electron transport layer 133 in this order from top to bottom.
The superconductive layer 14 is arranged to comprise an upwardly convex first end 16 and a downwardly convex second end 17. The first end 16 protruding upward is connected to the first conductive compressed portion 15, and the second end 17 protruding downward is embedded in the hole transport layer 131. Wherein the resistance of the superconductive layer 14 decreases with increasing pressure.
When the driving substrate 18 is bonded to the pixel array substrate 11, the second conductive compression portion 19 and the first conductive compression portion 15 are aligned and pressed, and the characteristic that the greater the pressure, the more the resistance approaches zero can be utilized for the superconducting layer 14, so that the superconducting material resistance of the middle region 014 (i.e. the protruding ends except for the left and right sides of the superconducting layer 14) of the superconducting layer 14 tends to zero, and thus the superconducting material resistance of the edge regions of the left and right sides of the superconducting layer 14 is greater than that of the middle region. Meanwhile, the hole transport layer 131 adopts a mode that the middle is thin and the two sides are thick, so that the difference of resistances between the middle area and the edge area of the hole transport layer 131 is larger, the current transported by the first conductive compression part 15 is more concentrated in the middle area 014, the concentration of electrons and holes injected into the edge of the Micro-LED device 13 is reduced, non-radiative recombination at the edge of the Micro-LED device 13 is reduced, and the luminous efficiency of the Micro-LED device 13 is improved.
The display panel provided by the embodiment of the disclosure comprises: the pixel array substrate comprises a Micro-LED device, a superconducting layer and a first conductive compression part, wherein the Micro-LED device is arranged on a substrate, the Micro-LED device comprises a hole transmission layer, the superconducting layer comprises a first end protruding upwards and a second end protruding downwards, the first end is connected with the first conductive compression part, and the second end is embedded into the hole transmission layer; the driving substrate comprises a second conductive compression part, and when the driving substrate is bonded with the pixel array substrate, the second conductive compression part and the first conductive compression part are aligned and pressed. Therefore, when the driving substrate is bonded with the pixel array substrate, the second conductive compression part and the first conductive compression part are aligned and pressed, and the superconducting material resistance of the middle area of the superconducting layer tends to be zero by utilizing the characteristic that the larger the pressure is, the more the resistance is approaching zero, so that the superconducting material resistance of the edge areas of the left side and the right side of the superconducting layer is larger than that of the middle area. Meanwhile, the hole transmission layer adopts a mode that the middle part is thin and the two sides are thick, so that the resistance difference between the middle area and the edge area is larger, the current transmitted by the first conductive compression part is more concentrated in the middle area of the Micro-LED device, the concentration of electrons and holes injected into the edge of the Micro-LED device is reduced, the non-radiative recombination at the edge of the Micro-LED device is reduced, and the luminous efficiency of the Micro-LED device is improved.
In some embodiments, as shown in fig. 1 and 2, the first conductive compression part 15 includes a first compression part 151 and a second compression part 152, the first compression part 151 is connected between the second compression part 152 and the superconducting layer 14, and a longitudinal projection size of the first compression part 151 is smaller than a longitudinal projection size of the second compression part 152.
Specifically, the longitudinal projection size of the second compression portion 152 is set to be larger than the longitudinal projection size of the first compression portion 151, and when the driving substrate 18 is bonded to the pixel array substrate 11, the second compression portion 152 contacts the second conductive compression portion 19, so that the pressure after the bonding of the driving substrate 18 to the pixel array substrate 11 is transmitted to the middle region 014 of the superconducting layer 14.
In some embodiments, as shown in fig. 1 and 2, the top of the second compression portion 152 is protruded, and the protrusion height h is 5-10 nm.
Specifically, when the second compression portion 152 is prepared, the top of the second compression portion 152 protrudes outside the pixel array substrate 11, and the protruding height h is 5-10 nm, so that after the second compression portion 152 is bonded with the first conductive compression portion 15, due to the SiO of the driving substrate 18 and the large area of the pixel array substrate 11 2 -SiO 2 Is subjected to compressive stress such that the intermediate region014, the superconducting material resistance tends to 0.
In some embodiments, as shown in fig. 2, the pixel array substrate 11 further includes a first insulating layer 01, and the first insulating layer 01 is disposed at a side of the Micro-LED device 13.
Specifically, the first insulating layer 01 is formed on the side of the Micro-LED device 13, which is advantageous to prevent conduction between the electron transport layer 133 and the hole transport layer 131 due to other factors, and to repair damage to the side wall, i.e., the edge region, of the Micro-LED device 13 that has just been etched.
As shown in fig. 2, the pixel array substrate 11 further includes a second insulating layer 02 and a third insulating layer 03. Wherein the materials constituting the first insulating layer 01, the second insulating layer 02, and the third insulating layer 03 include silicon dioxide.
In some embodiments, with continued reference to fig. 1, the pixel array substrate further includes a buffer layer 20, the buffer layer 20 covering the sides of the superconductive layer 14.
Specifically, buffer layer 20 is covered on the side, i.e., edge, of superconducting layer 14. The buffer layer 20 includes an organic adhesive layer, and the stress at the side edge of the superconducting layer 14 is greatly buffered and transferred to the second insulating layer 02 by using the organic adhesive layer, so that the stress conducted at the side edge region of the superconducting layer 14 is smaller. This corresponds to an increase in the electrical resistance of the side regions of the superconducting layer 14, so that the superconducting material resistance is greater in the edge regions of the superconducting layer 14 than in the middle region.
In some embodiments, as shown in FIG. 2, the lateral length of buffer layer 20l 2 Greater than the lateral length of the first conductive compression section 15l 1 . In this manner, the stresses at the sides, i.e., edges, of the superconductive layer 14 are advantageously greatly relieved.
The disclosure also provides a method for manufacturing the display panel. Fig. 3 is a flow chart of a method for manufacturing a display panel according to an embodiment of the disclosure. As shown in fig. 3, the manufacturing method of the display panel includes the following steps:
s301, preparing a pixel array substrate; the pixel array substrate comprises a Micro-LED device, a superconducting layer and a first conductive compression part, wherein the Micro-LED device is arranged on the substrate and comprises a hole transmission layer, the superconducting layer comprises a first end protruding upwards and a second end protruding downwards, the first end is connected with the first conductive compression part, and the second end penetrates through the hole transmission layer; the resistance of the superconductive layer decreases with increasing pressure.
Specifically, in this step, the Micro-LED device 13 is prepared on the substrate 12, and the Micro-LED device 13 includes the hole transport layer 131, the light emitting layer 132, and the electron transport layer 133 in this order from top to bottom. The superconductive layer 14 is arranged to comprise an upwardly convex first end 16 and a downwardly convex second end 17. The first end 16 protruding upward is connected to the first conductive compressed portion 15, and the second end 17 protruding downward is embedded in the hole transport layer 131. Wherein the resistance of the superconductive layer 14 decreases with increasing pressure.
S302, preparing a driving substrate and bonding the driving substrate with a pixel array substrate; the driving substrate comprises a second conductive compression part, and the second conductive compression part and the first conductive compression part are aligned and pressed.
Specifically, in this step, the driving substrate 18 is prepared, and the driving substrate 18 and the pixel array substrate 11 are bonded. When the driving substrate 18 is bonded to the pixel array substrate 11, the second conductive compression portion 19 and the first conductive compression portion 15 are aligned and pressed, and the characteristic that the greater the pressure, the more the resistance approaches zero can be utilized for the superconducting layer 14, so that the superconducting material resistance of the middle region 014 (i.e. the protruding ends except for the left and right sides of the superconducting layer 14) of the superconducting layer 14 tends to zero, and thus the superconducting material resistance of the edge regions of the left and right sides of the superconducting layer 14 is greater than that of the middle region. Meanwhile, the hole transport layer 131 adopts a mode that the middle is thin and the two sides are thick, so that the difference of resistances between the middle area and the edge area of the hole transport layer 131 is larger, the current transported by the first conductive compression part 15 is more concentrated in the middle area 014, the concentration of electrons and holes injected into the edge of the Micro-LED device 13 is reduced, non-radiative recombination at the edge of the Micro-LED device 13 is reduced, and the luminous efficiency of the Micro-LED device 13 is improved.
In some embodiments, fig. 4 is a schematic flow chart of a method for manufacturing a pixel array substrate according to an embodiment of the disclosure. As shown in fig. 4, the preparation of the pixel array substrate includes the steps of:
s401, preparing an epitaxial layer, wherein the epitaxial layer comprises an electron transport layer, a light emitting layer and a hole transport layer which are arranged on a substrate.
Specifically, fig. 5 is a specific manufacturing process diagram of a pixel array substrate according to an embodiment of the present disclosure. As shown in S501 in fig. 5, a substrate 12 is provided, and an electron transport layer 133, a light emitting layer 132, and a hole transport layer 131 are sequentially covered on the substrate 12 to prepare an epitaxial layer 21.
S402, etching the epitaxial layer to form the Micro-LED device.
Specifically, as shown in S502 in fig. 5, the epitaxial layer 21 is etched to form a Micro-LED device 13 in the shape shown in the figure. Wherein the Micro-LED device 13 shown in S402 has a trapezoid shape.
S403, covering the first insulating layer on the side edge of the Micro-LED device, and etching the hole transport layer to form a first pit.
Specifically, as shown in S503 of fig. 5, an insulating material such as silicon dioxide is coated on the Micro-LED device 13 by, but not limited to, a coating method to form a first insulating layer 01 on the side of the Micro-LED device 13. The first insulating layer 01 is formed on the side edge of the Micro-LED device 13, which is beneficial to preventing conduction between the electron transport layer 133 and the hole transport layer 131 due to other factors, and can repair the damage of the side wall of the Micro-LED device 13 formed by etching. In addition, the hole transport layer 131 of the Micro-LED device 13 is partially etched, and the first pits 22 are formed in the etched hole transport layer 131.
S404, forming a superconducting layer on the hole transport layer, wherein the superconducting layer comprises a first end protruding upwards and a second end protruding downwards, and the second end is located in the first pit.
Specifically, as shown in S504 in fig. 5, a superconducting layer 14 is prepared on the hole transport layer 131 of the Micro-LED device 13, the superconducting layer 14 including an upwardly convex first end 16 and a downwardly convex second end 17. Wherein the downwardly protruding second end 17 is located within the first recess 22.
S405, covering the buffer layer on the superconducting layer, and etching part of the buffer layer to form a second pit penetrating to the first end of the superconducting layer.
Specifically, as shown in S505 of fig. 5, covering the superconducting layer 14 with an organic gel layer material to form the buffer layer 20 on the superconducting layer 14, etching the buffer layer 20 on the first end 16 of the superconducting layer 14 protruding upward may form the second pit 23 penetrating to the first end 16 of the superconducting layer 14.
It will be appreciated that the superconducting layer 14 is covered with the organic glue layer material entirely, so that the buffer layer 20 is covered on both the first insulating layer 01 and the substrate 12, and then the buffer layer 20 in other areas is removed by etching or the like, so that only the buffer layer 20 in the position shown in S505 remains.
S406, forming a second insulating layer on one surface of the Micro-LED device on the substrate.
Specifically, as shown in S506 in fig. 5, the entire surface of the substrate 12 on which the Micro-LED device 13 is formed is covered with an insulating material such as silicon dioxide to form the second insulating layer 02.
S407, forming a third pit penetrating to the first end of the superconducting layer on the second insulating layer.
Specifically, as shown in S507 of fig. 5, a portion of the second insulating layer 02 is removed by etching or the like to form a third pit 24 penetrating to the first end 16 of the superconducting layer 14.
S408, filling a metal material into the third pit to form a first compression part, and covering the first compression part and the second insulating layer with a third insulating layer.
Specifically, as shown in S508 in fig. 5, a metal material is filled in the third pit 24 to prepare the first compressed portion 151 in the third pit 24, and then an insulating material such as silicon dioxide is covered on the first compressed portion 151 and the second insulating layer 02 to form the third insulating layer 03.
S409, forming a fourth pit penetrating to the first compression part on the third insulating layer, and filling a metal material into the fourth pit to form a second compression part.
Specifically, as shown in S509 in fig. 5, first, the fourth pit 25 penetrating to the first compressed portion 151 is formed on the third insulating layer 03 by etching or the like; subsequently, a metal material is filled in the fourth recess 25 to prepare the second compressed portion 152 corresponding to the fourth recess 25. Wherein the first compression part 151 and the second compression part 152 form a first conductive compression part 15 as shown in fig. 1.
Thus, the pixel array substrate according to the embodiment of the present disclosure may be prepared through the process shown in fig. 5.
In some embodiments, preparing a drive substrate includes:
providing a driving circuit board;
and forming a second conductive compression part on one surface of the driving circuit board corresponding to the position of the first conductive compression part so as to prepare the driving substrate.
Specifically, referring to fig. 1, the driving circuit board 018 is provided first, and then the second conductive compressed portion 19 is prepared on one side of the driving circuit board 018 to prepare the driving substrate 18.
The second conductive compression portion 19 is disposed corresponding to the position of the first conductive compression portion 15, and when the driving substrate 18 is bonded to the pixel array substrate 11, the second conductive compression portion 19 and the first conductive compression portion 15 can be aligned and pressed. The second conductive compressed portion 19 is connected to an internal circuit of the driving circuit board 018 (not shown in fig. 1).
On the basis of the above embodiments, the embodiments of the present disclosure further provide a display device, which includes the display panel according to the above embodiments, so that the display device has the same or similar beneficial effects, which are not described herein.
It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.
The above is merely a specific embodiment of the disclosure to enable one skilled in the art to understand or practice the disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A display panel, comprising:
the pixel array substrate comprises a Micro-LED device, a superconducting layer and a first conductive compression part, wherein the Micro-LED device is arranged on a substrate, the Micro-LED device comprises a hole transmission layer, the superconducting layer comprises a first end protruding upwards and a second end protruding downwards, the first end is connected with the first conductive compression part, and the second end is embedded into the hole transmission layer;
the driving substrate is bonded with the pixel array substrate and comprises a second conductive compression part, and the second conductive compression part and the first conductive compression part are aligned and pressed;
wherein the resistance of the superconductive layer decreases with increasing pressure.
2. The display panel of claim 1, wherein the first conductive compression portion comprises a first compression portion and a second compression portion, the first compression portion being connected between the second compression portion and the superconducting layer, a longitudinal projected dimension of the first compression portion being smaller than a longitudinal projected dimension of the second compression portion.
3. The display panel according to claim 2, wherein the top of the second compression portion is protruded, and the protruded height is 5-10 nm.
4. The display panel of claim 1, wherein the pixel array substrate further comprises a first insulating layer disposed on a side of the Micro-LED device.
5. The display panel according to claim 1, wherein the pixel array substrate further comprises a buffer layer covering a side of the superconducting layer.
6. The display panel of claim 5, wherein a lateral length of the buffer layer is greater than a lateral length of the first conductive compressed portion.
7. A method for manufacturing a display panel, comprising:
preparing a pixel array substrate; the pixel array substrate comprises a Micro-LED device, a superconducting layer and a first conductive compression part, wherein the Micro-LED device is arranged on the substrate and comprises a hole transmission layer, the superconducting layer comprises a first end protruding upwards and a second end protruding downwards, the first end is connected with the first conductive compression part, and the second end penetrates through the hole transmission layer; the resistance of the superconductive layer decreases with increasing pressure;
preparing a driving substrate and bonding the driving substrate with the pixel array substrate; the driving substrate comprises a second conductive compression part, and the second conductive compression part and the first conductive compression part are in counterpoint lamination.
8. The method of manufacturing a display panel according to claim 7, wherein manufacturing a pixel array substrate comprises:
preparing an epitaxial layer, wherein the epitaxial layer comprises an electron transport layer, a light-emitting layer and a hole transport layer which are arranged on a substrate;
etching the epitaxial layer to form a Micro-LED device;
covering a first insulating layer on the side edge of the Micro-LED device, and etching the hole transport layer to form a first pit;
forming a superconducting layer on the hole transport layer, the superconducting layer including an upwardly convex first end and a downwardly convex second end, the second end being located within the first pit;
covering a buffer layer on the superconducting layer, and etching part of the buffer layer to form a second pit penetrating to the first end of the superconducting layer;
forming a second insulating layer on one surface of the Micro-LED device on the substrate;
forming a third pit penetrating to the first end of the superconducting layer on the second insulating layer;
filling a metal material into the third pit to form a first compression part, and covering a third insulating layer on the first compression part and the second insulating layer;
and forming a fourth pit penetrating to the first compression part on the third insulating layer, and filling a metal material into the fourth pit to form a second compression part.
9. The method of manufacturing a display panel according to claim 7, wherein manufacturing the driving substrate comprises:
providing a driving circuit board;
and forming a second conductive compression part on one surface of the driving circuit board corresponding to the position of the first conductive compression part so as to prepare the driving substrate.
10. A display device comprising the display panel according to any one of claims 1-6.
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