CN116519157A - Temperature sensor, manufacturing method thereof, semiconductor device and chip - Google Patents
Temperature sensor, manufacturing method thereof, semiconductor device and chip Download PDFInfo
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- CN116519157A CN116519157A CN202310552063.7A CN202310552063A CN116519157A CN 116519157 A CN116519157 A CN 116519157A CN 202310552063 A CN202310552063 A CN 202310552063A CN 116519157 A CN116519157 A CN 116519157A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 239000010410 layer Substances 0.000 claims abstract description 233
- 150000002500 ions Chemical class 0.000 claims abstract description 92
- 239000000758 substrate Substances 0.000 claims abstract description 83
- 229910052751 metal Inorganic materials 0.000 claims abstract description 42
- 239000002184 metal Substances 0.000 claims abstract description 42
- 239000011229 interlayer Substances 0.000 claims abstract description 33
- 238000002955 isolation Methods 0.000 claims description 52
- 238000000151 deposition Methods 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 20
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 229920005591 polysilicon Polymers 0.000 claims description 10
- 238000000059 patterning Methods 0.000 claims description 6
- 238000001514 detection method Methods 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 11
- 239000003990 capacitor Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
- G01K7/01—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using semiconducting elements having PN junctions
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
- G01K7/01—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using semiconducting elements having PN junctions
- G01K7/015—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using semiconducting elements having PN junctions using microstructures, e.g. made of silicon
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- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The embodiment of the application provides a temperature sensor, a manufacturing method thereof, a semiconductor device and a chip. The temperature sensor includes: the device comprises a substrate, an epitaxial layer, a first contact area, an interlayer dielectric layer and a metal layer; the substrate and the epitaxial layer are doped with a first type of ions; the epitaxial layer is formed on the surface of the substrate; the first contact region is formed on the surface of the epitaxial layer and extends from the surface of the epitaxial layer to the inside of the epitaxial layer; the first contact region is doped with ions of a second type; the first type of ions are of opposite polarity to the second type of ions; and an interlayer dielectric layer and a metal layer are sequentially stacked on one side of the surface of the epitaxial layer. Therefore, the first contact area is arranged between the metal layer and the substrate, the doping types of the first contact area and the substrate are different, namely a PN junction is connected between the metal layer and the substrate, and the current working temperature of the circuit element can be determined according to the corresponding relation between the bias voltage of the PN junction and the temperature, so that the accurate detection of the working temperature of the circuit element is realized.
Description
Technical Field
The embodiment of the application relates to the technical field of semiconductors, in particular to a temperature sensor, a manufacturing method thereof, a semiconductor device and a chip.
Background
With the development of semiconductor technology and the trend toward miniaturization of circuit elements, various types of passive circuit elements, such as resistors, inductors, capacitors, etc., and active circuit elements, such as diodes, triodes, field effect transistors, etc., may be integrated on a semiconductor wafer.
In some application scenarios, it is desirable to accurately detect the temperature of the circuit element, for example, in some applications, the discrete transistor is relatively sensitive to temperature, and the temperature of the discrete transistor during operation is required to be monitored to avoid the problem of breakdown of the device.
However, in the related art, there has not been a temperature sensor capable of monitoring the operating temperature of a discrete transistor.
Disclosure of Invention
In view of the above, embodiments of the present application provide a temperature sensor, a manufacturing method thereof, a semiconductor device, and a chip, capable of realizing accurate detection of an operating temperature of a circuit element.
In a first aspect, embodiments of the present application provide a temperature sensor, including: the device comprises a substrate, an epitaxial layer, a first contact area, an interlayer dielectric layer and a metal layer;
the substrate and the epitaxial layer are doped with a first type of ions; the epitaxial layer is formed on the surface of the substrate; the first contact region is formed on the surface of the epitaxial layer and extends from the surface of the epitaxial layer to the inside of the epitaxial layer;
the first contact region is doped with ions of a second type; the first type of ions are of opposite polarity to the second type of ions; and an interlayer dielectric layer and a metal layer are sequentially stacked on one side of the surface of the epitaxial layer.
In some embodiments, the temperature sensor further comprises:
the well region is formed on the surface of the epitaxial layer and extends from the surface of the epitaxial layer to the inside of the epitaxial layer;
the first contact region is formed on the surface of the well region and extends from the surface of the well region to the inside of the well region;
the well region is doped with ions of a second type and the doping concentration in the well region is less than the doping concentration in the first contact region.
In some embodiments, the temperature sensor further comprises:
the two isolation structures are formed on the surface of the epitaxial layer and extend from the surface of the epitaxial layer to the inside of the epitaxial layer; two isolation structures are located on opposite sides of the well region.
In some embodiments, the temperature sensor further comprises:
the second contact region is formed on the surface of the epitaxial layer and extends from the surface of the epitaxial layer to the inside of the epitaxial layer; the second contact region is positioned at one side of one of the isolation structures opposite to the well region;
the second contact region is doped with ions of the first type and the doping concentration in the second contact region is greater than the doping concentration in the epitaxial layer.
In some embodiments, the temperature sensor further comprises:
the polysilicon resistor is formed on one side surface of the isolation structure, which is far away from the epitaxial layer, and extends from the surface of the isolation structure to the inside of the isolation structure.
In some embodiments, the first type is P-type and the second type is N-type.
In some embodiments, the first type is N-type and the second type is P-type.
In some embodiments, the isolation structure is a deep trench isolation DT structure.
In a second aspect, an embodiment of the present application further provides a method for manufacturing a temperature sensor, including:
providing a substrate; the substrate is doped with ions of a first type;
depositing an epitaxial layer on a substrate, the epitaxial layer being doped with a first type of ions;
sequentially injecting a well region and a first contact region on the epitaxial layer; the well region and the first contact region are doped with ions of a second type, and the doping concentration in the first contact region is greater than that in the well region; the first type of ions are of opposite polarity to the second type of ions;
depositing an interlayer medium on the epitaxial layer and forming a contact hole;
and depositing a metal layer on the interlayer dielectric, and patterning the metal layer.
In some embodiments, after depositing the epitaxial layer on the substrate, the method further comprises:
forming an isolation groove on the epitaxial layer;
growing an oxide layer in the isolation groove;
polysilicon is deposited over the oxide layer.
In some embodiments, after sequentially implanting the well region and the first contact region on the epitaxial layer, the method further comprises:
implanting a second contact region on the epitaxial layer; the second contact region is doped with ions of the first type; the doping concentration in the second contact region is greater than the doping concentration in the epitaxial layer.
In a third aspect, embodiments of the present application provide a semiconductor device, including: any one of the temperature sensors provided in the first aspect.
In a fourth aspect, embodiments of the present application provide a chip, including: any one of the temperature sensors provided in the first aspect.
In the technical scheme of this application embodiment, temperature sensor includes: the device comprises a substrate, an epitaxial layer, a first contact area, an interlayer dielectric layer and a metal layer; the substrate and the epitaxial layer are doped with a first type of ions; the epitaxial layer is formed on the surface of the substrate; the first contact region is formed on the surface of the epitaxial layer and extends from the surface of the epitaxial layer to the inside of the epitaxial layer; the first contact region is doped with ions of a second type; the first type of ions are of opposite polarity to the second type of ions; and an interlayer dielectric layer and a metal layer are sequentially stacked on one side of the surface of the epitaxial layer. Therefore, the first contact area is arranged between the metal layer and the substrate, the doping types of the first contact area and the substrate are different, namely a PN junction is connected between the metal layer and the substrate, and the current working temperature of the circuit element can be determined according to the corresponding relation between the bias voltage of the PN junction and the temperature, so that the accurate detection of the working temperature of the circuit element is realized.
The foregoing description is only an overview of the technical solutions of the embodiments of the present application, and may be implemented according to the content of the specification, so that the technical means of the embodiments of the present application can be more clearly understood, and the following detailed description of the present application will be presented in order to make the foregoing and other objects, features and advantages of the embodiments of the present application more understandable.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a temperature sensor according to an embodiment of the present application;
FIGS. 2A-2C are schematic structural views illustrating various process steps of a temperature sensor according to an embodiment of the present disclosure;
FIG. 3 is a schematic structural diagram of another temperature sensor according to an embodiment of the present disclosure;
FIG. 4 is a schematic structural diagram of another temperature sensor according to an embodiment of the present disclosure;
FIGS. 5A-5B are schematic structural views illustrating various process steps of another temperature sensor according to an embodiment of the present disclosure;
FIG. 6 is a schematic structural diagram of another temperature sensor according to an embodiment of the present disclosure;
FIG. 7 is a flowchart of a method for manufacturing a temperature sensor according to an embodiment of the present disclosure;
FIG. 8 is a flowchart of another method for manufacturing a temperature sensor according to an embodiment of the present disclosure;
fig. 9 is a flowchart of a method for manufacturing a temperature sensor according to an embodiment of the present application.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used in the description of the applications herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having" and any variations thereof in the description and claims of the present application and in the description of the drawings are intended to cover a non-exclusive inclusion.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of the phrase "an embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
The term "and/or" is herein merely an association relationship describing an associated object, meaning that there may be three relationships, e.g., a and/or B, may represent: there are three cases, a, B, a and B simultaneously. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
The azimuth terms appearing in the following description are all directions shown in the drawings, and do not limit the specific structure of the satellite antenna of the present application. For example, in the description of the present application, the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are merely for convenience in describing the present application and simplifying the description, and do not indicate or imply that the device or element being referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present application.
Furthermore, the terms first, second and the like in the description and in the claims of the present application or in the above-described figures, are used for distinguishing between different objects and not for describing a particular sequential order, and may be used to expressly or implicitly include one or more such features.
In the description of the present application, unless otherwise indicated, the meaning of "plurality" means two or more (including two), and similarly, "plural sets" means two or more (including two).
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "coupled" are to be construed broadly, e.g., the terms "connected" or "coupled" of a mechanical structure may refer to a physical connection, e.g., the physical connection may be a fixed connection, e.g., by a fastener, such as a screw, bolt, or other fastener; the physical connection may also be a detachable connection, such as a snap-fit or snap-fit connection; the physical connection may also be an integral connection, such as a welded, glued or integrally formed connection. "connected" or "connected" of circuit structures may refer to physical connection, electrical connection or signal connection, for example, direct connection, i.e. physical connection, or indirect connection through at least one element in the middle, so long as circuit communication is achieved, or internal communication between two elements; signal connection may refer to signal connection through a medium such as radio waves, in addition to signal connection through a circuit. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art in a specific context.
In order to better understand the technical solutions of the present application, the following description will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a temperature sensor according to an embodiment of the present application, and as shown in fig. 1, a temperature sensor 100 includes: substrate 10, epitaxial layer 110, first contact region 120, interlayer dielectric layer 130, and metal layer 140.
Wherein the substrate 10 and the epitaxial layer 110 are doped with ions of a first type; the first contact region 120 is doped with ions of a second type; the first type of ions is of opposite polarity to the second type of ions. The epitaxial layer 110 is formed on the surface of the substrate 10; the first contact region 120 is formed on the surface of the epitaxial layer 110 and extends from the surface of the epitaxial layer 110 to the inside of the epitaxial layer 110; an interlayer dielectric layer 130 and a metal layer 140 are sequentially stacked on one side of the surface of the epitaxial layer 110.
The first type of ions may be, for example, P-type ions, such as boron, gallium, indium, etc., or N-type ions, such as phosphorus, arsenic, etc. The second type of ion may be an N-type ion or a P-type ion. If the first type of ions is N-type ions, the substrate 10 is an N-type substrate 10, and the epitaxial layer 110 is an N-type epitaxial layer 110; correspondingly, the second type of ions is P-type ions, and the first contact region 120 is a P-type first contact region 120. If the first type of ions is P-type ions, the substrate 10 is a P-type substrate 10 and the epitaxial layer 110 is a P-type epitaxial layer 110; correspondingly, the second type of ions is N-type ions, and the first contact region 120 is an N-type first contact region 120. The structure of the temperature sensor 100 will be exemplarily described by taking the first type of ion as an N-type ion and the second type of ion as a P-type ion.
As shown in fig. 2A, a substrate 10 is provided, wherein N-type ions are doped in the substrate 10, the substrate 10 is the N-type substrate 10, and an epitaxial layer 110 is deposited on one side surface of the substrate 10, and the N-type ions are doped in the epitaxial layer 110, so that the epitaxial layer 110 is the N-type epitaxial layer 110. P-type ions are implanted in a surface of epitaxial layer 110 on a side remote from substrate 10. The P-type ions are diffused from the surface of the epitaxial layer 110 toward the inside of the epitaxial layer 110, and the region where the P-type ions are diffused forms a first contact region 120, i.e., an N-type first contact region 120, and the depth of the first contact region 120 is smaller than the thickness of the epitaxial layer 110, as shown in fig. 2B.
In this way, the substrate 10 and the first contact area 120 form a PN junction, and a current is input from the point a of the first contact area 120 and output from the point C of the substrate 10, and according to the corresponding relationship between the bias voltage and the temperature of the PN junction, the current operating temperature of the circuit element can be determined according to the voltage between the point a and the point C, so as to realize accurate detection of the operating temperature of the circuit element.
In other embodiments, a P-type substrate 10 may be provided, a P-type epitaxial layer 110 is deposited on a side surface of the P-type substrate 10, N-type ions are implanted into a side surface of the P-type epitaxial layer 110 away from the substrate 10, an N-type first contact region 120 is formed in a region where the N-type ions diffuse, and a PN junction is formed between the N-type first contact region 120 and the substrate 10.
As shown in fig. 2C, an interlayer dielectric layer 130 is deposited on a surface of the epitaxial layer 110, which is far away from the substrate 10, and a projection of the interlayer dielectric layer 130 on a plane of the substrate 10 coincides with a projection of the substrate 10. The interlayer dielectric layer 130140 can be silicon oxide, silicon nitride, or other materials known to those skilled in the art, and is not limited thereto.
A metal layer 140 is deposited on the surface of the interlayer dielectric layer 130, which is far away from the epitaxial layer 110, and the projection of the metal layer 140 on the plane of the substrate 10 coincides with the projection of the substrate 10. The first contact area 120 is provided with a first connection point, the substrate 10 is provided with a second connection point, the first connection point and the second connection point are respectively led out through a metal hole and a metal wire, the first connection point is connected with the input end of the temperature sensor 100, and the second connection point is connected with the output end of the temperature sensor 100.
In this embodiment of the application, the temperature sensor includes: the device comprises a substrate, an epitaxial layer, a first contact area, an interlayer dielectric layer and a metal layer; the substrate and the epitaxial layer are doped with a first type of ions; the epitaxial layer is formed on the surface of the substrate; the first contact region is formed on the surface of the epitaxial layer and extends from the surface of the epitaxial layer to the inside of the epitaxial layer; the first contact region is doped with ions of a second type; the first type of ions are of opposite polarity to the second type of ions; and an interlayer dielectric layer and a metal layer are sequentially stacked on one side of the surface of the epitaxial layer. Therefore, the first contact area is arranged between the metal layer and the substrate, the doping types of the first contact area and the substrate are different, namely a PN junction is connected between the metal layer and the substrate, and the current working temperature of the circuit element can be determined according to the corresponding relation between the bias voltage of the PN junction and the temperature, so that the accurate detection of the working temperature of the circuit element is realized.
In some embodiments, fig. 3 is a schematic structural diagram of another temperature sensor 100 according to the embodiment of the present application, and fig. 3 is a schematic structural diagram of the temperature sensor 100 according to the embodiment shown in fig. 2, where the temperature sensor 100 further includes: the well region 150 is formed on the surface of the epitaxial layer 110, and extends from the surface of the epitaxial layer 110 to the inside of the epitaxial layer 110. The first contact region 120 is formed on the surface of the well region 150 and extends from the surface of the well region 150 to the inside of the well region 150; the well region 150 is doped with ions of the second type, and the doping concentration in the well region 150 is smaller than the doping concentration in the first contact region 120.
Illustratively, the substrate 10 is an N-type substrate 10, the epitaxial layer 110 is an N-type epitaxial layer 110, P-type ions are implanted into a surface region of the epitaxial layer 110 prior to forming the first contact region 120, and a P-type well region 150 is formed in a region where the P-type ions diffuse. P-type ions are injected into the surface area of the P-type well region 150, the P-type ions diffuse from the surface of the P-type well region 150 to the inside of the P-type well region 150 to form a first contact region 120, and the doping concentration of the first contact region 120 is larger than that of the well region 150, so that the well region 150 is lightly doped with P-type, and the first contact region 120 is heavily doped with P-type. The first contact region 120 may be electrically connected to the well region 150 through a metal hole and a metal wire, and the reverse withstand voltage of the temperature sensor 100 may be adjusted by adjusting the doping concentration of the well region 150.
In other embodiments, the substrate 10 may be a P-type substrate 10, the epitaxial layer 110 is a P-type epitaxial layer 110, the well region 150 is an N-type well region 150, and the first contact region 120 is heavily doped N-type.
In this embodiment of the present application, the temperature sensor further includes a well region formed on a surface of the epitaxial layer through the well region and extending from the surface of the epitaxial layer to an interior of the epitaxial layer, and the first contact region is formed on a surface of the well region and extending from the surface of the well region to the interior of the well region. The well region is doped with ions of a second type, the doping concentration in the well region is smaller than that in the first contact region, and the reverse withstand voltage value of the temperature sensor can be adjusted by adjusting the doping concentration of the well region.
In some embodiments, fig. 4 is a schematic structural diagram of still another temperature sensor 100 provided in the embodiments of the present application, and fig. 4 is a schematic structural diagram of the temperature sensor 100 according to the embodiment shown in fig. 3, where the temperature sensor 100 may further include: two isolation structures 160.
Two isolation structures 160 are formed on the surface of the epitaxial layer 110 and extend from the surface of the epitaxial layer 110 to the inside of the epitaxial layer 110; two isolation structures 160 are located on opposite sides of the well region 150.
Illustratively, the substrate 10 is an N-type substrate 10, the epitaxial layer 110 is an N-type epitaxial layer 110, and the well 150 is a P-type well 150. As shown in fig. 5A, the surface of the epitaxial layer 110 on which the well region 150 is disposed is etched to form two isolation trenches 161, which are located on opposite sides of the well region 150. Oxide 162 is filled along the bottom and side walls of the two isolation trenches 161, respectively, until the oxide 162 fills the entire isolation trench 161, thereby forming an isolation structure 160, and the surface of the isolation structure 160 is flush with the surface of the side of the substrate 10 where the well region 150 is provided. Illustratively, both isolation structures 160 may be DTI structures formed based on a deep trench isolation (Deep Trench Isolation, DTI) process.
Illustratively, the temperature sensor 100 may further include a polysilicon resistor 170, the polysilicon resistor 170 being deposited on a surface of the oxide 162 on a side remote from the isolation structure 160, as shown in fig. 5B.
In other embodiments, the substrate 10 may be a P-type substrate 10, the epitaxial layer 110 is a P-type epitaxial layer 110, the well region 150 is an N-type well region 150, and the first contact region 120 is heavily doped N-type.
In this embodiment of the present application, the temperature sensor may further include two isolation structures formed on the surface of the epitaxial layer and extending from the surface of the epitaxial layer to the inside of the epitaxial layer; the two isolation structures are positioned on two opposite sides of the well region; the oxide layers are stacked on one side of the surfaces of the two isolation structures, so that the isolation effect can be achieved by arranging the two isolation structures on two opposite sides of the well region, the distance between circuit elements can be shortened, and the area of a chip can be reduced.
In some embodiments, fig. 6 is a schematic structural diagram of another temperature sensor provided in the embodiment of the present application, and fig. 6 is a schematic structural diagram of the temperature sensor 100 according to the embodiment shown in fig. 4, where the temperature sensor further includes: and a second contact region 180.
The second contact region 180 is formed on the surface of the epitaxial layer 110 and extends from the surface of the epitaxial layer 110 to the inside of the epitaxial layer 110; the second contact region 180 is located at a side of one of the isolation structures 160 opposite to the well region 150; the second contact region 180 is doped with ions of the first type, and the doping concentration in the second contact region 180 is greater than the doping concentration in the epitaxial layer 110.
Illustratively, the substrate 10 is an N-type substrate 10, the epitaxial layer 110 is an N-type epitaxial layer 110, the well region 150 is a P-type well region 150, and N-type ions are implanted into a surface region of the epitaxial layer 110 before the interlayer dielectric layer 130 is formed, where the N-type ion implantation region is one, and is located on a side of one of the isolation structures 160 opposite to the well region 150. The N-type ions diffuse from the surface of the epitaxial layer 110 into the interior of the epitaxial layer 110, and the region of the N-type ions that diffuse inside the epitaxial layer 110 forms a second contact region 180, the doping concentration in the second contact region 180 being greater than the doping concentration in the epitaxial layer 110.
The second contact area 180 is provided with a third connection point, the third connection point is led out through a metal hole and a metal wire, the first connection point is connected with the input end of the temperature sensor 100, and the third connection point is connected with the output end of the temperature sensor 100. In this way, a PN junction is formed between the first contact region 120 and the second contact region 180, and a current is input from the first connection point of the first contact region 120 and output from the second connection point of the second contact region 180, and since the equivalent resistance between the first contact region 120 and the second contact region 180 is relatively smaller than the equivalent resistance between the first contact region 120 and the substrate 10, the voltage between the first connection point and the third connection point is closer to the accurate voltage value of the temperature sensor 100, and thus the operating temperature of the circuit element can be detected more accurately.
In other embodiments, the substrate 10 may be a P-type substrate 10, the epitaxial layer 110 is a P-type epitaxial layer 110, the well region 150 is an N-type well region 150, the first contact region 120 is heavily doped with N-type material, and the second contact region 180 is heavily doped with P-type material.
In this embodiment of the present application, the temperature sensor further includes a second contact area formed on the surface of the epitaxial layer through the second contact area, and extending from the surface of the epitaxial layer to the inside of the epitaxial layer; the second contact region is positioned at one side of one of the isolation structures opposite to the well region; the second contact region is doped with the first type of ions, and the doping concentration in the second contact region is larger than the doping concentration in the epitaxial layer, so that the working temperature of the circuit element can be detected more accurately by measuring the voltage between the first connection point arranged on the first contact region and the second connection point arranged on the second contact region.
The embodiment of the application also provides a manufacturing method of the temperature sensor, which is used for manufacturing the temperature sensor 100 in the embodiment. Fig. 7 is a flowchart of a method for manufacturing a temperature sensor according to an embodiment of the present application, and as shown in fig. 7, the method for manufacturing a temperature sensor according to the embodiment may include:
s700, providing a substrate; the substrate is doped with ions of a first type.
And S710, depositing an epitaxial layer on one side surface of the substrate, wherein the epitaxial layer is doped with ions of a first type.
And S720, sequentially injecting a well region and a first contact region on the epitaxial layer.
The well region and the first contact region are doped with ions of a second type, and the doping concentration in the first contact region is larger than that in the well region; the first type of ions is of opposite polarity to the second type of ions.
And S730, depositing an interlayer dielectric on the epitaxial layer and forming a contact hole.
And S740, depositing a metal layer on the interlayer dielectric and patterning the metal layer.
In the embodiment of the application, the epitaxial layer is deposited on the surface of one side of the provided substrate, the well region and the first contact region are sequentially injected on the epitaxial layer, the interlayer dielectric is deposited on the epitaxial layer to form the contact hole, the metal layer is deposited on the interlayer dielectric, and the metal layer is patterned, so that the temperature sensor can be manufactured on the premise of not increasing the mask. Therefore, the current working temperature of the circuit element can be determined according to the corresponding relation between the bias voltage and the temperature of the PN junction, and the accurate detection of the working temperature of the circuit element is realized.
In some embodiments, fig. 8 is a flowchart of another method for manufacturing a temperature sensor according to an embodiment of the present application, which is used to manufacture the temperature sensor 100 according to the above embodiment. As shown in fig. 8, the method for manufacturing the temperature sensor of the present embodiment may include:
s800, providing a substrate; the substrate is doped with ions of a first type.
The implementation of S800 is similar to that of S700 in the embodiment of fig. 7, and will not be described herein.
S810 depositing an epitaxial layer on a side surface of the substrate, the epitaxial layer being doped with ions of the first type.
The implementation of S810 is similar to that of S710 in the embodiment of fig. 7, and is not described herein.
S820, forming isolation trenches on the epitaxial layer.
And S830, growing an oxide layer in the isolation groove.
And S840, depositing polysilicon on the oxide layer.
And S850, sequentially injecting a well region and a first contact region on the epitaxial layer.
The implementation of S850 is similar to that of S720 in the embodiment of fig. 7, and is not described herein.
The well region and the first contact region are doped with ions of a second type, and the doping concentration in the first contact region is larger than that in the well region; the first type of ions is of opposite polarity to the second type of ions.
S860, depositing an interlayer dielectric on the epitaxial layer and forming a contact hole.
The implementation of S860 is similar to that of S730 in the embodiment of fig. 7, and is not described herein.
And S870, depositing a metal layer on the interlayer dielectric and patterning the metal layer.
The implementation of S870 is similar to that of S730 in the embodiment of fig. 7, and is not described herein.
In the embodiment of the application, an epitaxial layer is deposited on one side surface of a provided substrate, and an isolation groove is formed on the epitaxial layer; growing an oxide layer in the isolation groove; polysilicon is deposited on the oxide layer, a well region and a first contact region are sequentially injected on the epitaxial layer, an interlayer medium is deposited on the epitaxial layer to form a contact hole, a metal layer is deposited on the interlayer medium, and the metal layer is patterned, so that the temperature sensor can be manufactured on the premise of not increasing a mask, and the accurate detection of the working temperature of a circuit element can be realized. In addition, by forming the isolation trench on the epitaxial layer, the isolation function can be performed, and thus the distance between circuit elements can be shortened, and the chip area can be reduced.
In some embodiments, fig. 9 is a flowchart of a method for manufacturing a temperature sensor according to another embodiment of the present application, which is used to manufacture the temperature sensor 100 according to the above embodiment. As shown in fig. 9, the method for manufacturing the temperature sensor of the present embodiment may include:
s900, providing a substrate; the substrate is doped with ions of a first type.
The implementation of S900 is similar to that of S800 in the embodiment of fig. 8, and will not be described herein.
S910, depositing an epitaxial layer on a surface of one side of the substrate, the epitaxial layer being doped with ions of a first type.
The implementation of S910 is similar to that of S810 in the embodiment of fig. 8, and is not described herein.
S920, forming isolation trenches on the epitaxial layer.
And S930, growing an oxide layer in the isolation groove.
S940, depositing polysilicon on the oxide layer.
And S950, sequentially injecting a well region and a first contact region on the epitaxial layer.
Wherein S950 is similar to the implementation of S850 in the embodiment of fig. 8, and is not described herein.
The well region and the first contact region are doped with ions of a second type, and the doping concentration in the first contact region is larger than that in the well region; the first type of ions is of opposite polarity to the second type of ions.
S960, injecting a second contact region on the epitaxial layer; the second contact region is doped with ions of the first type; the doping concentration in the second contact region is greater than the doping concentration in the epitaxial layer.
S970, an interlayer dielectric is deposited on the epitaxial layer, and a contact hole is formed.
The implementation of S970 is similar to that of S860 in the embodiment of fig. 8, and is not described herein.
S980, depositing a metal layer on the interlayer dielectric, and patterning the metal layer.
Wherein S980 is similar to the implementation of S870 in the embodiment of fig. 8, and is not described herein.
In the embodiment of the application, an epitaxial layer is deposited on one side surface of a provided substrate, and an isolation groove is formed on the epitaxial layer; growing an oxide layer in the isolation groove; the method comprises the steps of depositing polysilicon on an oxide layer, sequentially injecting a well region and a first contact region on an epitaxial layer, injecting a second contact region on the epitaxial layer, depositing an interlayer medium on the epitaxial layer to form a contact hole, depositing a metal layer on the interlayer medium, and patterning the metal layer, so that a temperature sensor can be manufactured on the premise of not increasing a mask, and the operating temperature of a circuit element can be accurately detected by measuring the voltage between a first connection point arranged on the first contact region and a second connection point arranged on the second contact region. In addition, by forming the isolation trench on the epitaxial layer, the isolation function can be performed, and thus the distance between circuit elements can be shortened, and the chip area can be reduced.
The embodiment of the application also provides a semiconductor device, which comprises the temperature sensor 100 provided by any one of the embodiments.
By way of example, the semiconductor device may include at least one temperature sensor 100. If the semiconductor device includes a temperature sensor 100, the temperature sensor 100 may be used to detect a temperature change inside the semiconductor device. If the semiconductor device includes a plurality of temperature sensors 100, the plurality of temperature sensors 100 may be randomly placed inside the semiconductor device, or may be placed inside the semiconductor device according to a certain rule, for example, in a matrix, so as to control an operation state of the semiconductor device when the semiconductor device is determined to be in an abnormal operation state based on a preset temperature monitoring algorithm according to temperatures detected by different temperature sensors 100. The number and arrangement of the temperature sensors 100 are not particularly limited in the embodiments of the present application.
In some embodiments, the semiconductor device may include the temperature sensor 100 and other types of electronic components, such as capacitors, inductors, MOS transistors, etc., which are not particularly limited in this application.
The semiconductor device provided in the embodiment of the present application includes the temperature sensor 100 provided in any one of the embodiments described above, and has the beneficial effects of the temperature sensor 100 in the foregoing embodiment, which is not described herein again.
The embodiment of the application also provides a chip, which comprises the temperature sensor 100 provided by any embodiment.
For example, the chip may comprise at least one temperature sensor 100, and if the chip comprises one temperature sensor 100, the temperature sensor 100 may be used to detect a temperature change inside the chip. If the chip includes a plurality of temperature sensors 100, the plurality of temperature sensors 100 may be randomly placed inside the chip, or may also be placed inside the chip according to a certain rule, for example, in a matrix, so as to control the operation state of the chip when the chip is determined to be in an abnormal operation state based on a preset temperature monitoring algorithm according to the temperatures detected by different temperature sensors 100. The number and arrangement of the temperature sensors 100 are not particularly limited in the embodiments of the present application.
In some embodiments, the chip may include the temperature sensor 100 and other types of electronic components, such as capacitors, inductors, MOS transistors, etc., which are not particularly limited in this application.
The chip provided in the embodiment of the present application includes the temperature sensor 100 provided in any one of the embodiments described above, and has the beneficial effects of the temperature sensor 100 in the foregoing embodiment, which is not described herein again.
The foregoing disclosure is merely illustrative of specific embodiments of the present application, but the embodiments are not limited thereto and any variations that can be contemplated by one skilled in the art should fall within the scope of the present application.
The word "comprising" does not exclude the presence of elements or steps other than those listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The application may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of first, second, third, etc. does not denote any order, and the words are to be interpreted as names. The steps in the above embodiments should not be construed as limiting the order of execution unless specifically stated.
The above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the corresponding technical solutions.
Claims (13)
1. A temperature sensor, comprising: the device comprises a substrate, an epitaxial layer, a first contact area, an interlayer dielectric layer and a metal layer;
the substrate and the epitaxial layer are doped with a first type of ions; the epitaxial layer is formed on the surface of the substrate; the first contact region is formed on the surface of the epitaxial layer and extends from the surface of the epitaxial layer to the inside of the epitaxial layer;
the first contact region is doped with a second type of ion; the first type of ions is of opposite polarity to the second type of ions; and the interlayer dielectric layer and the metal layer are sequentially stacked on one side of the surface of the epitaxial layer.
2. The temperature sensor of claim 1, further comprising:
the well region is formed on the surface of the epitaxial layer and extends from the surface of the epitaxial layer to the inside of the epitaxial layer;
the first contact region is formed on the surface of the well region and extends from the surface of the well region to the inside of the well region;
the well region is doped with the second type of ions and a doping concentration in the well region is less than a doping concentration in the first contact region.
3. The temperature sensor of claim 2, further comprising:
the two isolation structures are formed on the surface of the epitaxial layer and extend from the surface of the epitaxial layer to the inside of the epitaxial layer; the two isolation structures are located on two opposite sides of the well region.
4. A temperature sensor according to claim 3, further comprising:
a second contact region formed on the surface of the epitaxial layer and extending from the surface of the epitaxial layer to the inside of the epitaxial layer; the second contact region is positioned at one side of one of the isolation structures opposite to the well region;
the second contact region is doped with ions of the first type and a doping concentration in the second contact region is greater than a doping concentration in the epitaxial layer.
5. The temperature sensor of claim 4, further comprising:
and the polysilicon resistor is formed on the surface of one side of the isolation structure far away from the epitaxial layer and extends from the surface of the isolation structure to the inside of the isolation structure.
6. The temperature sensor of any one of claims 1-5, wherein the first type is P-type and the second type is N-type.
7. The temperature sensor of any one of claims 1-5, wherein the first type is N-type and the second type is P-type.
8. The temperature sensor of any one of claims 3-5, wherein the isolation structure is a deep trench isolation, DTI, structure.
9. A method of manufacturing a temperature sensor, comprising:
providing a substrate; the substrate is doped with ions of a first type;
depositing an epitaxial layer on one side surface of the substrate, wherein the epitaxial layer is doped with ions of the first type;
sequentially injecting a well region and a first contact region on the epitaxial layer; the well region and the first contact region are doped with ions of a second type, and the doping concentration in the first contact region is greater than that in the well region; the first type of ions is of opposite polarity to the second type of ions;
depositing an interlayer medium on the epitaxial layer and forming a contact hole;
and depositing a metal layer on the interlayer medium, and patterning the metal layer.
10. The method of claim 9, wherein after depositing an epitaxial layer on the substrate, the method further comprises:
forming an isolation groove on the epitaxial layer;
growing an oxide layer in the isolation groove;
and depositing polysilicon on the oxide layer.
11. The method of claim 10, wherein after sequentially implanting a well region and a first contact region on the epitaxial layer, the method further comprises:
implanting a second contact region on the epitaxial layer; the second contact region is doped with ions of the first type; the doping concentration in the second contact region is greater than the doping concentration in the epitaxial layer.
12. A semiconductor device comprising the temperature sensor according to any one of claims 1 to 8.
13. A chip comprising the temperature sensor of any one of claims 1-8.
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| CN111540711A (en) * | 2020-05-09 | 2020-08-14 | 捷捷半导体有限公司 | Method for manufacturing unidirectional negative resistance ESD protection device and unidirectional negative resistance ESD protection device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111540711A (en) * | 2020-05-09 | 2020-08-14 | 捷捷半导体有限公司 | Method for manufacturing unidirectional negative resistance ESD protection device and unidirectional negative resistance ESD protection device |
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