CN1165076C

CN1165076C - Transistor with anti-breakover regino generated by ion implantation and its preparing process

Info

Publication number: CN1165076C
Application number: CNB011097914A
Authority: CN
Inventors: 黄至尧
Original assignee: Winbond Electronics Corp
Current assignee: Winbond Electronics Corp
Priority date: 2001-04-24
Filing date: 2001-04-24
Publication date: 2004-09-01
Anticipated expiration: 2021-04-24
Also published as: CN1383195A

Abstract

The present invention provides a method for manufacturing a transistor component which forms a punching-through resistive area in an ion injection mode and a device thereof, and the punching-through resistive area is formed on a semiconductor basal plate. The method is mainly characterized in that ions are injected in a large angle ion injection mode to a position where a channel area is to form at a time so as to prevent punch-through effect from being generated between a source electrode and a drain electrode and adjust a critical voltage. Besides, the impurity concentration distribution in the channel area formed by the mode is in a non-uniform state, and the channel area has minor parasitic capacitance and junction drain current, high carrier mobility and the easily controlled critical voltage.

Description

Inject transistor and the manufacture method thereof that forms anti-reach through region with ion

Technical field

The present invention relates to a kind of transistor component, particularly relate to a kind of angled ion injection mode of utilizing to form the MOS transistor assembly and the method thereof of channel region.

Background technology

Below be to utilize structural section shown in Figure 1, so that existing MOS transistor assembly and the needs improvement part thereof of angled ion injection mode to form anti-reach through region of utilizing to be described.

, be the part-structure of demonstration-existing nmos pass transistor please referring to Fig. 1; As shown in the figure, this transistor is to be formed on the P type silicon substrate 10, and in wherein and comprise pair of source/drain electrode (S/D), in silicon substrate 10 surfaces of source/drain electrode (S/D) top then be in regular turn a gate oxide 16 and-grid G, at the sidewall of grid G and be formed with gate insulator 12; In addition, then have in the silicon substrate 10 between source/drain electrode (S/D)-traditional anti-reach through region 14 of the formed P type of angled ion injection mode that utilizes, in order to suppress short channel effect (shortchannel effect) and punchthrough effect.

Yet, the formed profile (profile) on actual manufacturing process of anti-reach through region 14 as shown in the figure disperses and is not fine and close, especially these anti-reach through region 14 easier tool parasitic capacitance or junction capacitance (junction capacitance) of causing that are positioned at source/drain electrode (S/D) side increase, and connect face leakage current or junction leak (junction leakage) and rise, thereby have influence on the running of MOS transistor assembly.

Summary of the invention

In view of this, one object of the present invention is to provide a kind of transistor and manufacture method thereof that forms anti-reach through region of injecting with ion, manufacture method with transistor component of special channel region, tool utilizes the ion injection mode of wide-angle, once inject ion to this semiconductor substrate to form a channel region with non-homogeneous shape, in order to inhibition short channel effect and punchthrough effect, and the degree of control of lifting critical voltage; In addition, once inject ion to semiconductor substrate and can save the use of light shield and the carrying out of etching offset printing manufacturing technology, thereby can save the required expense of producing.

Another object of the present invention is to provide a kind of transistor and manufacture method thereof that forms anti-reach through region of injecting with ion, structure with transistor component of channel region, be utilize once inject ion to this semiconductor substrate to form the channel region of a compact structure and the non-homogeneous shape of tool, and the formed channel region of this kind mode is because of lower with source, drain electrode contact position place concentration, its parasitic capacitance is more existing little, the face leakage current of connecing is also less, therefore more can not influence the running of assembly.

Purpose of the present invention can reach by following measure:

A kind of transistor fabrication process with the anti-reach through region of ion injection formation on the semiconductor substrate, comprises the following steps:

On this semiconductor substrate, form a grid structure;

Utilize the ion injection mode, inject in ion this semiconductor substrate to this grid structure to form an ion implanted region with as channel region with a specific angle between 50 °-80 °; And

In this semiconductor substrate of this grid structure down either side, form the source/drain electrode of this transistor component.

A kind of transistor with the anti-reach through region of ion injection formation is formed at the semiconductor substrate and comprises:

One grid structure is the surface that is positioned at this semiconductor substrate;

Pair of source/drain electrode is to be arranged in this semiconductor substrate of this grid structure down either side; And

One channel region, be arranged in this grid structure below this to this semiconductor substrate between source/drain electrode.

In other words, in order to reach purpose of the present invention, the invention provides a kind of manufacture method that forms transistor component with the ion injection mode with channel region, comprise the following steps: at first, the semiconductor substrate is provided, and on this semiconductor substrate, form a grid structure: then, utilize the ion injection mode of wide-angle, once inject ion to the semiconductor substrate of this grid structure below to form the channel region of a non-homogeneous shape, in order to suppress the punchthrough effect of assembly, to reach to adjust critical voltage.

Come again, in this semiconductor substrate of grid structure down either side, form the source/drain electrode of this transistor component.

In order to reach another object of the present invention, provided and a kind ofly formed the structure of transistor component with channel region with the ion injection mode, comprising: the semiconductor substrate, and have a grid structure thereon; In addition, still comprise pair of source/drain electrode, be arranged in the semiconductor substrate of this grid structure down either side, and a channel region with non-homogeneous profile, its compact structure, and be arranged in semiconductor substrate between the source/drain electrode of this grid structure below.

Description of drawings

For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below:

Fig. 1 shows the existing formed structural section with transistor component of anti-reach through region of angled ion injection mode that utilizes; And

Fig. 2 A-2F shows according to the formed structure flow process profile with transistor component of special channel region of angled ion injection mode that utilizes of the present invention.

Symbol description among the figure:

10～silicon substrate

12～insulative sidewall layer

14～anti-reach through region

16～gate oxide

S～source electrode

D～drain electrode

G～grid

STI～shallow channel isolation area

20～silicon substrate

21～silicon dioxide layer

22～polysilicon layer PR photoresist layer

The light doped region of 23～channel region LDD

24～bpsg layer

Embodiment

Please referring to Fig. 2 A, providing the semiconductor substrate, for example is silicon substrate 20, and is formed with shallow channel isolation area (shallow trench isolation/STI) thereon, in order to isolate the active region of assembly; Owing to be to form nmos pass transistor in the present embodiment, be to be doped with P type ion in silicon substrate 20 therefore, for example be boron, mix the impurity of N type to make the PMOS transistor component but vice versa.Afterwards, forming an oxide layer in regular turn on the surface of this silicon substrate 20, for example is silicon dioxide layer 21, and a conductive layer, for example is polysilicon layer 22.

Next, please referring to Fig. 2 B, be to be carried out at the step that forms grid structure on this semiconductor substrate; For example, utilize photoetching (photolithography) method and etching manufacturing process (etching), define the figure of a grid structure G, it comprises silicon dioxide layer 21 as gate oxide, and polysilicon layer 22 is as gate electrode.

Then, the step that carry out is for utilizing the ion injection mode of wide-angle, once inject ion to this semiconductor substrate of this grid structure below to form a channel region; For example, with reference to figure 2C, have the photoresist layer PR of pattern prior to the surface coated one of this silicon substrate 20, its thickness is about between the 2000-10000 as calculated; Then, with ion with the specific angle between about 50 °-80 °, for example be the boron ion with about 70 ° angle, and the ion concentration of injecting is about 10 ¹²-5 * 10 ¹³Atoms/cm ²Between, and the energy that ion injects injects the silicon substrate 20 that is arranged in grid structure G below between 45-60KeV, because the ion energy that injects is very high, therefore part with silicon substrate 20 in the lattice atoms collision after can upwards rebound and form the channel region 23 of three different ions doping contents as shown in the figure, wherein the degree of depth of above-mentioned channel region is between about 0.08～0.2 μ m in semiconductor substrate surface below.

What this should be specifically noted that 2 points are arranged, one is the angled ion method for implanting according to present embodiment, and desire forms channel region and only needs once ion implantation step, can save processing step and required expense thereof like this; Another is put then is because present embodiment is the ion injection method that utilizes wide-angle, so the parameter of environment, and for example the angle of the height of peripheral components or ion injection, energy all will can achieve the goal through calculating and mutual cooperation thereof.

Then, in this semiconductor substrate of this grid structure down either side, form this transistorized source/drain electrode: for example, please earlier referring to Fig. 2 D, be to serve as cover curtain with this grid structure G and photoresist layer PR, doped N-type ion in the silicon substrate 20 of the down either side of grid structure G for example is that phosphonium ion is to form light doped region LDD; Afterwards, please refer to Fig. 2 E, remove this photoresist layer PR, and deposit an insulating barrier, for example be that the bpsg layer (not shown) is to these silicon substrate 20 surfaces, and this bpsg layer of etch-back (etch back) is to form an insulative sidewall layer 24 on the top of this grid structure G and sidewall: then, shown in Fig. 2 F, with this grid structure G and insulative sidewall layer 24 is the cover curtain, the dense N type ion that is doped into for example is that arsenic ion is interior to form the source/drain electrode (S/D) of this nmos pass transistor assembly to this light doped region LDD.

According to the manufacture method of utilizing the angled ion injection mode to form the MOS transistor assembly of channel region of the present invention, its maximum is characterised in that with the angled ion injection mode, once ion is injected into the position of desire formation channel region, because injection ion to the step of semiconductor substrate only needs a step, therefore can reduce the use of light shield and the carrying out of etching lithographic printing technology, and these steps are to expend money most in manufacturing process, so this invention is a big Gospel for the semiconductor subassembly of producing in batches.

Shown in Fig. 2 F, the MOS transistor assembly that utilizes the angled ion injection mode to form channel region of the present invention is formed on the silicon substrate 20, and it comprises a grid structure G, is by gate oxide, for example being silicon dioxide layer 21 and gate electrode, for example is that polysilicon layer 22 constitutes; One gate insulator that is constituted by bpsg layer 24; Pair of source/drain electrode (S/D) is to be arranged in the silicon substrate 20 of this grid structure G down either side; And a channel region 23, be formed at grid structure G below this in the silicon substrate 20 between source/drain electrode (S/D).

The angled ion injection mode of utilizing of the present invention is with the architectural feature of the MOS transistor assembly of formation channel region: the compact structure of formed channel region (compact), and the concentration that ion injects is to concentrate on channel central authorities (that is higher in the concentration of these channel region central authorities), therefore its parasitic capacitance is less than existing channel region and the formed parasitic capacitance of source/drain doping region, and low with source, drain electrode contact position concentration, also therefore produce less leakage current.

In addition, the channel region of this kind non-uniform Distribution profile more is easier to control the critical voltage (threshold voltage) of MOS assembly except preventing ion generation diffusion phenomena, and the mobility of carrier (mobility) rises.

Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; anyly know art technology person; without departing from the spirit and scope of the present invention; when can doing to change and retouching, so protection scope of the present invention is as the criterion in conjunction with specification and accompanying drawing when the protection range that look accompanying Claim.

Claims

1. the transistor fabrication process with the anti-reach through region of ion injection formation is characterized in that: comprise the following steps:

On the semiconductor substrate, form a grid structure;

Utilize the ion injection mode, inject in the semiconductor substrate of ion to this grid structure to form an ion implanted region with as channel region with the angle between 50 °-80 °: and

In the semiconductor substrate of this grid structure down either side, form the source/drain electrode of this transistor component.

2. the transistor fabrication process with the anti-reach through region of ion injection formation as claimed in claim 1, it is characterized in that: the source/drain electrode that forms this transistor component comprises the following steps:

In this semiconductor substrate of this grid structure down either side, form a light doped region;

On the sidewall of this grid structure, form an insulative sidewall layer; And

Form a dense doped region with as this transistorized source/drain electrode in this light doped region.

3. the transistor fabrication process with the anti-reach through region of ion injection formation as claimed in claim 1, it is characterized in that: this grid structure is to comprise a gate electrode and a grid oxic horizon.

4. the transistor fabrication process with the anti-reach through region of ion injection formation as claimed in claim 1, it is characterized in that: this ion implanted region CONCENTRATION DISTRIBUTION that is arranged in this semiconductor substrate is to be shape heterogeneous.

5. the transistor fabrication process with the anti-reach through region of ion injection formation as claimed in claim 1, it is characterized in that: the concentration that this ion injects is about 10 ¹²～5 * 10 ¹³Atoms/cm ²

6. the transistor fabrication process with the anti-reach through region of ion injection formation as claimed in claim 1, it is characterized in that: the energy that this ion injects is between 45～60KeV.

7. the transistor fabrication process with the anti-reach through region of ion injection formation as claimed in claim 1, it is characterized in that: this semiconductor substrate is to be silicon substrate.

8. as claimed in claim 1ly inject to form the transistor fabrication process of anti-reach through region, it is characterized in that with ion: this ion implanted region electrically be electrical opposite with this source/drain electrode.

9. the transistor fabrication process with the anti-reach through region of ion injection formation as claimed in claim 1 is characterized in that: the degree of depth of this ion implanted region is between about 0.08～0.2 μ m in this semiconductor substrate surface below.

10. the transistor fabrication process with the anti-reach through region of ion injection formation as claimed in claim 1, it is characterized in that: the material that constitutes this grid is to be polysilicon.

11. the transistor with the anti-reach through region of ion injection formation is characterized in that: be formed on the semiconductor substrate, comprise:

One channel region, be arranged in this grid structure below this to this semiconductor substrate between source/drain electrode, wherein this channel region is that the ion injection mode of utilization between 50 °-80 ° is formed in this semiconductor substrate.

12. the transistor with the anti-reach through region of ion injection formation as claimed in claim 11, it is characterized in that: this channel region is to be shape heterogeneous.

13. the transistor with the anti-reach through region of ion injection formation as claimed in claim 11, it is characterized in that: this channel region is to be shape heterogeneous.

14. as claimed in claim 11ly inject to form the transistor of anti-reach through region, it is characterized in that with ion: this channel region electrically be and this electrical opposite to source/drain electrode.

15. the transistor with the anti-reach through region of ion injection formation as claimed in claim 11 is characterized in that: the degree of depth of this channel region is between about 0.08～0.2 μ m in this semiconductor substrate surface below.

16 transistors with the anti-reach through region of ion injection formation as claimed in claim 11, it is characterized in that: this semiconductor substrate is to be silicon substrate.

17. the transistor with the anti-reach through region of ion injection formation as claimed in claim 11, it is characterized in that: the material that constitutes this grid is to be polysilicon.