CN116501557A - UVM-based APB-SPI module verification method - Google Patents

UVM-based APB-SPI module verification method Download PDF

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Publication number
CN116501557A
CN116501557A CN202310385159.9A CN202310385159A CN116501557A CN 116501557 A CN116501557 A CN 116501557A CN 202310385159 A CN202310385159 A CN 202310385159A CN 116501557 A CN116501557 A CN 116501557A
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apb
uvm
spi
module
verification method
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CN202310385159.9A
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Inventor
陈皆通
舒海军
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Haisuxin Hangzhou Technology Co ltd
Shenzhen Hisu Core Technology Co ltd
Wuxi Haisuxinye Electronic Technology Co ltd
Shanghai Haisuxin Microelectronics Co ltd
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Haisuxin Hangzhou Technology Co ltd
Shenzhen Hisu Core Technology Co ltd
Wuxi Haisuxinye Electronic Technology Co ltd
Shanghai Haisuxin Microelectronics Co ltd
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Priority to CN202310385159.9A priority Critical patent/CN116501557A/en
Publication of CN116501557A publication Critical patent/CN116501557A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The invention discloses an APB-SPI module verification method based on UVM, and belongs to the verification field of large-scale integrated circuits. Comprising the following steps: ports of the design modules of the two spis are correspondingly connected to be used as DUTs, the ports are respectively connected with agents of the buses through interfaces of the buses, the adapters and predictors are connected with reg_maps in corresponding register models in the agents, and finally values of the two register models are sent to the score boards for comparison. The apb bus can verify different modes of the DUT in the same test case at the same time, so that the verification time is reduced.

Description

UVM-based APB-SPI module verification method
Technical Field
The invention belongs to the technical field of SPI module verification and chip verification based on a UVM verification platform, and particularly relates to a UVM verification method based on an SPI module.
Background
With the rapid development of integrated circuits, the functional complexity of the chip is greatly increased, so that the verification occupies more than half of the whole design period, the traditional directional verification cannot meet the verification requirement of the very large scale integrated circuit, and the verification work becomes harder. Due to the urgent need for verification work, a variety of chip verification methods have emerged; UVM, universal verification methodology (Universal Verification Methodology, UVM), is a framework for development of verification platforms based on SystemVerilog libraries, covering all scenarios from module level to chip level, ASIC to FPGA, and control logic, datapath to processor verification objects.
The APB 2.0 (Advanced Peripheral Bus) bus protocol is one of the AMBA (Advanced Microcontroller Bus Archecture) protocols issued by ARM corporation in 1999. Compared with the AHB, the APB has the characteristics of low power consumption and simple signal time sequence, and is mainly used for connecting SPI, UART, GPIO, timer and other low-speed peripheral interface modules; the SPI is a high-speed synchronous double-full-work communication interface, has two working modes of master and slave, is communicated through four signal wires, and is used for verification with an SPI bus, and the current verification scheme is that an SPI module is directly used as a DUT, and an apb agent and a SPI agent (a host or a slave) are built in a verification platform. and the apb agent is internally provided with a sequencer, a driver, a display and the like. The spi agent contains sequencer, driver and display. The driver in the apb agent drives the process from the sequence through the interface to the DUT; the display monitors the signals on the interface. Similarly, the spi agent also completes the corresponding operation. And finally, the data are transmitted to a score board for comparison.
The problems in the prior art are as follows: the verifier needs to write the drive and display modules in the spi agent according to the spi protocol, so that the verifier needs to understand the spi protocol very thoroughly and can realize the spi protocol correctly on the verification platform. Longer times are required in implementing the spi agent. Therefore, the verification platform cannot be quickly built. The verification of SPI master and slave modes on running cannot be realized at the same time.
Therefore, there is a need for a UVM verification method based on an SPI module to solve the above problems.
Disclosure of Invention
The invention aims to provide a UVM verification method based on an SPI module, which aims to solve the problems in the background technology.
In order to solve the technical problems, the invention provides the following technical scheme:
a UVM verification method based on an SPI module, the method comprising the steps of:
s1, correspondingly connecting ports of design modules of two spis to serve as DUTs;
s2, connecting the agents of the buses through interfaces of the buses respectively;
s3, connecting the adapter and the predictor with reg_map in the corresponding register model in the proxy;
and S4, sending the values of the two register models to a score board for comparison.
According to the technical scheme, the DUI is to instantiate the SPI module with the apb interface twice, record the SPI module as spi_0 and spi_1, correspondingly connect NSS, SCK, MOSI and MISO of spi_0 and spi_1 respectively, take the connected whole as DUT, and take the apb interface as a top-level interface for verification.
According to the technical scheme, the top layer interface of the DUT is connected with the apb bus.
According to the technical scheme, the spi module of the apb interface instantiates two apb proxy modules generated twice and is connected with the apb bus through the respective apb interfaces, wherein the apb proxy comprises a driver, a display and an sequencer component, the driver component is used for driving data on the apb bus to the apb interface according to a bus protocol, the display component is used for packaging various data on the apb interface into a new data packet according to the apb bus protocol, the sequencer component is used for starting a sequence, and processing generated by the sequence is transmitted to the driver after arbitration.
According to the technical scheme, the two agents are respectively connected with the adapter and the registration model module and respectively marked as registration model_0 and registration model_1, and correspond to SPI_0 and SPI_1.
According to the above technical solution, rsp returned from the driving assembly is converted into a variable of the register model type by the adaptor module, and returned to the registration model for updating the internal value.
According to the technical scheme, the registration model module is a group of high-level abstract classes in UVM and is used for modeling registration in the SPI module in the DUT to realize the same functions as the DUT register model; and then the data written and read by the registration model through the front door is sent to the score board, and the score board takes the data of the registration model_0 and the registration model_1 and compares the data.
According to the technical scheme, the apb interface is utilized to realize the connection between software in UVM and DUT environment.
According to the technical scheme, the adapter module is used for realizing conversion between apb bus data and registration model data, variable or data is transmitted to the apb agent after the conversion of the adapter module, meanwhile, the predictor monitors the change on the bus in real time, and two functions are mainly integrated in the adapter module, one is bus2reg and is used for converting the data type on the bus into the data type which can be identified by the register model; another is reg2bus, which functions to convert the data type of the register model into a bus-recognizable data type; it is through these two functions that the data exchange of the register model with the bus is realized. The handle of the adapter can be obtained in the predictor through handle transfer in env, and when mon monitors bus transaction change, the handle is used for calling a bus2reg function so as to convert the bus change into a change corresponding to the register model, real-time prediction update is achieved, and the handle is used for transferring the bus2reg function obtained in the adapter so as to update and predict the register model in real time.
According to the technical scheme, corresponding operation is carried out on the register model in the test sequence, and the operation mode of the DUT, the sent data and the received data of the DUT are configured through updating operation.
Compared with the prior art, the invention has the following beneficial effects:
the SPI module verification method based on the UVM is provided, and a verification platform of an APB bus with high reusability and strong expansibility is built by using the UVM and the SystemVerilog. The method can be quickly applied to authentication between any communication modules with master and slave modes. Because the module to be verified is instantiated for two times and then correspondingly connected to serve as the DUT in the construction of the verification platform, verification staff is not required to realize a module to be verified according to the design specification of the module to be verified, and verification time is saved. Meanwhile, verification is realized by means of running of the two modules, verification time is saved, and verification efficiency is improved.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the invention, serve to explain the invention. In the drawings:
fig. 1 is a block diagram of a UVM verification method based on an SPI module of the present invention;
fig. 2 is a schematic diagram of steps of a UVM verification method based on an SPI module according to the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1: referring to fig. 1, a UVM verification method based on an SPI module, the method includes the steps of:
s1, correspondingly connecting ports of design modules of two spis to serve as DUTs;
s2, connecting the agents of the buses through interfaces of the buses respectively;
s3, connecting the adapter and the predictor with reg_map in the corresponding register model in the proxy;
and S4, sending the values of the two register models to a score board for comparison.
The DUI is to instantiate the SPI module with the apb interface twice, record as SPI_0 and SPI_1, correspondingly connect NSS, SCK, MOSI and MISO of SPI_0 and SPI_1 respectively, take the connected whole as DUT, and take the apb interface as the top-level interface for verification.
The top layer interface of the DUT is connected to the apb bus.
The api module of the apb interface instantiates two apb proxy modules generated twice and is connected with the apb bus through the respective apb interfaces, wherein the apb proxy comprises a driver, a display and a sequencer component, the driver component is used for driving data on the apb bus to the apb interface according to a bus protocol, the display component is used for packaging various data on the apb interface into a new data packet according to the apb bus protocol, the sequencer component is used for starting a sequence, and processing generated by the sequence is arbitrated and then sent to the driver.
The two agents are respectively connected with the adapter and the registration model module and respectively marked as registration model_0 and registration model_1, and correspond to SPI_0 and SPI_1.
Rsp returned from the drive component is converted by the adaptor module into a variable of the register model type, which is returned to the registration model for updating the internal values.
The registration model module is a set of high-level abstract classes in UVM, and is used for modeling registration in SPI module in DUT to realize the same function as DUT register model; and then the data written and read by the registration model through the front door is sent to the score board, and the score board takes the data of the registration model_0 and the registration model_1 and compares the data.
The apb interface is used to implement the connection between the software in the UVM and the DUT environment.
The adapter module is used for realizing conversion between apb bus data and registration model data, transmitting variables or data to the apb agent after conversion by the adapter module, simultaneously monitoring the change on the bus in real time by the predictor, and mainly integrating two functions, namely bus2reg, in the adapter module to convert the data type on the bus into the data type which can be identified by the register model; another is reg2bus, which functions to convert the data type of the register model into a bus-recognizable data type; it is through these two functions that the data exchange of the register model with the bus is realized. The handle of the adapter can be obtained in the predictor through handle transfer in env, and when mon monitors bus transaction change, the handle is used for calling a bus2reg function so as to convert the bus change into a change corresponding to the register model, real-time prediction update is achieved, and the handle is used for transferring the bus2reg function obtained in the adapter so as to update and predict the register model in real time.
And performing corresponding operation on the register model in the test sequence, and configuring the working mode of the DUT, the transmitted data and the received data of the DUT through updating operation.
Example 2: referring to fig. 2, a UVM verification method based on an SPI module, the method includes the steps of: ports of the two SPI modules are correspondingly connected (i.e., MOSI, MISO, SCK and NSS of module 0 are connected with MOSI, MISO, SCK and NSS of module 1) as DUTs, which are spi_0 and spi_1, respectively, connected to the bus through the apb interface, wherein the apb agent is connected to the registration model through the adapter and the pre-edit, and finally the value in mon and the value of the register model are sent to the scoreboard for comparison.
The specific steps are as follows: the SPI module with apb interface is instantiated twice and marked as SPI_0 and SPI_1, and then SCK, NSS, MOSI and MISI of SPI_0 and SPI_1 are respectively connected correspondingly. The whole is then taken as a DUT and the apb interface is taken as a top-level interface of the DUT, and the two apb agent modules, namely the apb agent 0 and the apb agent 1, are respectively connected with a bus through the respective apb interfaces, wherein the apb agent comprises a driver, a display and an sequencer component. The apb interface realizes the connection between the software and the hardware environment in the verification platform, and the adapter realizes the conversion between apb bus data and registration model data. Because the register_model generates a uvm _reg_bus_op type variable through its sequence when the front gate is operated. When it cannot be directly identified by the sequencer and driver in the apb agent, a verifier needs to implement an adapter to complete the conversion with the apb process, and it should be noted that the adapter needs to be inherited from the uvm _reg adapter class, and can be handed to the apb agent after the conversion of the adapter. The pre-editing is used for monitoring the behavior of the bus in real time, ensuring that the configuration time of the register end and the configuration time of the actual DUT end are consistent, and ensuring the perfection and the correctness of the functions. The pre-editing is connected with the register model, and a bus2reg function taken into the adapter is transferred through a handle, so that mapping updating is completed; whereas rsp is driven back from apb; it also needs to be converted by the switch to UVM reg bus op type variables, which are returned to the registration model, which is a set of high level abstract classes in the UVM to map the actual registers in the SPI module in the DUT, for updating the internal values. Reflecting various characteristics of registers in the SPI module, the front door access and the back door access to the registration of the SPI module in the DUT can be simply and efficiently realized through a registration model (the front door access refers to whether the front door access accesses the registration through a bus or not, and the speed is higher). Meanwhile, the values in the register model can be sent to a score board through a calling function to complete data comparison and calculation, the score board is a component specially used for data comparison, the data from the registration model_0 and the registration model_1 and the data monitored by each mon in the apb agent are compared according to the requirements, the operation of the registration model operation on each register of the SPI module in the DUT is realized through a front door mode in a test case to configure the working mode of the SPI, the transmitted data and the data received by the SPI module.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
Finally, it should be noted that: the foregoing description is only a preferred embodiment of the present invention, and the present invention is not limited thereto, but it is to be understood that modifications and equivalents of some of the technical features described in the foregoing embodiments may be made by those skilled in the art, although the present invention has been described in detail with reference to the foregoing embodiments. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (10)

1. An APB-SPI module verification method based on UVM is characterized in that: the method comprises the following steps:
s1, correspondingly connecting ports of design modules of two spis to serve as DUTs;
s2, connecting the agents of the buses through interfaces of the buses respectively;
s3, connecting the adapter and the predictor with reg_map in the corresponding register model in the proxy;
and S4, sending the values of the two register models to a score board for comparison.
2. The APB-SPI module verification method based on UVM according to claim 1, wherein: the DUI is to instantiate the spi module with the apb interface twice, correspondingly connect NSS, SCK, MOSI corresponding to the spi module and MISO respectively, take the connected whole as DUT and take the apb interface as the top-level interface for verification.
3. The APB-SPI module verification method based on UVM according to claim 2, wherein: the top layer interface of the DUT is connected to the apb bus.
4. The APB-SPI module verification method based on UVM according to claim 2, wherein: the api module of the apb interface instantiates two apb proxy modules generated twice and is connected with the apb bus through the respective apb interfaces, wherein the apb proxy comprises a driver, a display and a sequencer component, the driver component is used for driving data on the apb bus to the apb interface according to a bus protocol, the display component is used for packaging various data on the apb interface into a new data packet according to the apb bus protocol, the sequencer component is used for starting a sequence, and processing generated by the sequence is arbitrated and then sent to the driver.
5. The UVM-based APB-SPI module verification method of claim 4, wherein: two apb agents are connected to the adapter and the registration model module, respectively.
6. The UVM-based APB-SPI module verification method of claim 5, wherein: rsp returned from the drive component is converted by the adaptor module into a variable of the register model type, which is returned to the registration model for updating the internal values.
7. The UVM-based APB-SPI module verification method of claim 6, wherein: the registration model module is a set of high-level abstract classes in the UVM, which are used for modeling the registration in the SPI module in the DUT to achieve the same functions as the DUT register model, and then the data written and read by the registration model through the front door are sent to the score board.
8. The APB-SPI module verification method based on UVM according to claim 1, wherein: the apb interface is used to implement the connection between the software in the UVM and the DUT environment.
9. The APB-SPI module verification method based on UVM according to claim 1, wherein: the adapter module is used for realizing conversion between apb bus data and registration model data, and transmitting variables or data to the apb agent after conversion by the adapter module, and simultaneously, the predictor monitors the change on the bus in real time.
10. The APB-SPI module verification method based on UVM according to claim 1, wherein: and performing corresponding operation on the register model in the test sequence, and configuring the working mode of the DUT, the transmitted data and the received data of the DUT through updating operation.
CN202310385159.9A 2023-04-12 2023-04-12 UVM-based APB-SPI module verification method Pending CN116501557A (en)

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