CN116488276A - Battery management chip - Google Patents

Battery management chip Download PDF

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Publication number
CN116488276A
CN116488276A CN202310228363.XA CN202310228363A CN116488276A CN 116488276 A CN116488276 A CN 116488276A CN 202310228363 A CN202310228363 A CN 202310228363A CN 116488276 A CN116488276 A CN 116488276A
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CN
China
Prior art keywords
battery
voltage
power supply
management chip
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310228363.XA
Other languages
Chinese (zh)
Inventor
宋佩
魏琼
严晓
赵恩海
马妍
周国鹏
赵健
蔡宗霖
吴运凯
冯洲武
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Shanghai MS Energy Storage Technology Co Ltd
Original Assignee
Shanghai MS Energy Storage Technology Co Ltd
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Application filed by Shanghai MS Energy Storage Technology Co Ltd filed Critical Shanghai MS Energy Storage Technology Co Ltd
Priority to CN202310228363.XA priority Critical patent/CN116488276A/en
Publication of CN116488276A publication Critical patent/CN116488276A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0013Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
    • H02J7/0014Circuits for equalisation of charge between batteries
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/20Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0029Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
    • H02J7/00304Overcurrent protection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0029Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
    • H02J7/00308Overvoltage protection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0029Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
    • H02J7/00309Overheat or overtemperature protection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0047Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0047Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits
    • H02J7/0048Detection of remaining charge capacity or state of charge [SOC]
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1582Buck-boost converters
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10Energy storage using batteries

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Secondary Cells (AREA)

Abstract

The invention provides a battery management chip, which comprises a power supply component; the power supply assembly comprises a power supply module, a non-inductive BUCK circuit and a high-frequency PWM power supply output switch; the power supply module is used for receiving external power supply and providing power supply for the inside of the battery management chip; the noninductive BUCK circuit is used for outputting a stabilized voltage power supply, and the high-frequency PWM power supply output switch is used for outputting a configurable power supply. The battery management chip can meet the power supply requirement of the BMS system without additionally adding an additional power supply chip, simplifies the design complexity of the BMS system and reduces the development cost and time.

Description

Battery management chip
Technical Field
The invention belongs to the technical field of chip design, and particularly relates to a battery management chip.
Background
The characteristics of lithium batteries necessitate monitoring at all times during charge and discharge, and therefore lithium battery protection plates, i.e., battery management systems (Battery Management System, BMS), must be provided. Wherein each BMS requires one to a plurality of lithium battery management IC chips. With the development of technology, the conventional BMS also increases various communication demands, such as isolated 485 communication, isolated CAN communication, 4G communication, and the like. These demands make BMS power supply designs increasingly complex. The existing battery management IC chip also generally has the function of a low dropout linear regulator (Low Dropout Regulator, LDO), but the output voltage of the LDO is low, generally 3.3V, the output load power is extremely low, generally below 10mA, and even the power consumption of a normal MCU in operation cannot be met. Taking STM32F103 as an example, the power supply voltage is 3.3V, and the power consumption in normal operation is generally 15 to 20mA or more, which is particularly proportional to the actual operating frequency. Therefore, almost most of the power supply sources of the BMS system, including the MCU power supply, are supplied with power from another power chip, resulting in an increase in design costs.
In addition, the battery pack applied to the rental market requires more accurate calculation of the remaining capacity of the battery. However, the existing battery management IC chip either does not provide an electricity amount calculation function or has a problem of inaccurate electricity amount calculation based on the limitations of costs and technologies. Therefore, calibration or realization of high-precision battery remaining capacity estimation requires considerable design and time testing costs by BMS developers, which are eliminated from external design and software function development tests.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a battery management chip that can meet the power supply requirements of a BMS system without adding an additional power chip, simplify the design complexity of the BMS system, and reduce the development cost and time.
The invention provides a battery management chip, which comprises a power supply component; the power supply assembly comprises a power supply module, a non-inductive BUCK circuit and a high-frequency PWM power supply output switch; the power supply module is used for receiving external power supply and providing power supply for the inside of the battery management chip; the noninductive BUCK circuit is used for outputting a stabilized voltage power supply, and the high-frequency PWM power supply output switch is used for outputting a configurable power supply.
In an embodiment, the battery management chip further includes the analog circuit component, where the analog circuit component includes a battery measurement and equalization unit, a temperature detection unit, an operational amplifier unit, a first analog-to-digital conversion unit, and a second analog-to-digital conversion unit; the battery measurement and equalization unit is used for measuring the analog battery cell voltage of each battery cell and realizing the voltage equalization of the battery cells; the temperature detection unit is used for detecting an analog temperature signal of an external environment; the operational amplifier unit is used for amplifying the voltage signal on the current detection resistor to obtain an analog voltage signal; the first analog-to-digital conversion unit is used for converting the analog battery cell voltage into a digital battery cell voltage and converting the analog temperature signal into a digital temperature signal; the second analog-to-digital conversion unit is used for converting the analog voltage signal into a digital voltage signal.
In one embodiment, the analog circuit assembly further comprises a Mos tube driving circuit, a charger and a load connection detection circuit; the Mos tube driving circuit is used for driving the charging Mos tube and the discharging Mos tube to realize charging or discharging protection; the charger and load connection detection circuit is used for detecting whether the charger is connected with a load or not.
In an embodiment, the analog circuit assembly further includes a switch matrix and a switch matrix control unit, where the switch matrix is connected to the battery measurement and equalization unit and the first analog-to-digital conversion unit, and is used to select a channel of the battery measurement and equalization unit and provide the channel to the first analog-to-digital conversion unit; the matrix control unit is used for controlling channel selection of the switch matrix.
In an embodiment, the battery measurement and equalization unit includes an active equalization switch and a passive equalization switch; the active equalization switch is used for charging low-voltage battery cells so as to realize the voltage consistency of all the battery cells; the passive equalization switch is used for discharging the high-voltage battery cells so as to achieve the voltage consistency of all the battery cells.
In one embodiment, the battery management chip further comprises a logic circuit component; the logic circuit assembly comprises a battery residual capacity estimation unit; the battery remaining power estimating unit estimates the remaining power of the battery by:
1) After the battery management chip is powered on and initialized, acquiring the lowest value Vmin of the digital battery cell voltage, the battery cell charging cut-off voltage OV, the battery cell discharging cut-off voltage OU and the battery cell rated voltage EV, and calculating the current residual battery capacity according to SOCt= ((Vmin-EV)/(OV-UV)). 100+50;
2) Obtaining a resistance Rs of the detection resistor and the digital voltage signal Vr, calculating a current charge-discharge current Cur= (Vr/Rs) 10, and judging whether the absolute value of the current charge-discharge current is larger than a minimum charge-discharge effective current value; if yes, starting a 1 second timer, performing ampere-hour integral calculation, and performing unscented Kalman filtering in the calculation process; acquiring the current accumulated electric quantity Qt when the time length of the timer is 1 minute;
3) Calculating updated battery residual electric quantity according to SOC= ((SOCt. Times. Qt. Times. Ks. Times. Ts. 60) +Qt) 100/(Qa. Times. 60. Times. Ks. Times. Ts), wherein Qa is total battery capacity, ks is a battery attenuation coefficient, and Ts is a low temperature influence coefficient;
4) And (3) repeating the step (2) and the step (3) after the battery is charged and discharged once, and obtaining the final updated battery residual capacity when the iteration times reach the preset times.
In an embodiment, when calculating the updated battery remaining capacity each time, further including when the voltage of the battery cell is in a state of charge full or discharge cut-off, if the battery remaining capacity calculated by using an ampere-hour integration method deviates from the SOC, if the battery pack is initialized for the first power-on or undergoes long-term standing, calibrating the SOC value according to the voltage state of the battery cell by using a voltage OCV curve; and when the charge-discharge cycle is finished, if the SOC has errors in the determined result of the battery cell voltage, adjusting the calculation factor in the unscented Kalman filtering.
In one embodiment, when the external average temperature T is less than 0 ℃, ts takes a preset value; otherwise, ts takes a value of 1. Wherein the and preset value is stored in a register in the logic circuit assembly and is set by a system.
In an embodiment, the logic circuit assembly further includes a register and an MTP module, where the register is configured to store the battery cell charge cutoff voltage, the battery cell discharge cutoff voltage, the battery cell rated voltage, the minimum charge-discharge effective current value, the total battery capacity, the battery attenuation coefficient, the low temperature influence coefficient, the resistance value of the detection resistor, and the preset number of times; the MTP module is used for storing parameters in a power-down state.
In an embodiment, the logic circuit assembly further includes a communication module for enabling communication with an external device.
In one embodiment, the communication module includes one or more of a 1-wire bus, an IIC bus, or a combination thereof.
In an embodiment, the logic circuit assembly further includes a two-stage battery protection module for implementing overvoltage, overcurrent, overtemperature, low temperature and short circuit protection of the battery and safety protection of the BMS system.
As described above, the battery management chip of the present invention has the following beneficial effects:
(1) The power supply requirement of the BMS system can be met without additionally adding an additional power supply chip, the design complexity of the BMS system is simplified, and the development cost and time are reduced; the communication modules with larger power consumption, such as the 4G communication module, the CAN communication module and the like, CAN be driven only by adding part of peripheral inductance, a freewheeling diode, a capacitor and an output voltage feedback resistor;
(2) The battery residual capacity calculation function is configured, so that high-precision battery residual capacity calculation is realized, the software function writing of BMS software for battery management is saved, and the repeated development cost caused by software development or replacement of a main control MCU on a BMS board is greatly reduced;
(3) The lithium battery protection board with the MTP function can write relevant operation parameters into the MTP during factory production without adding external Flash, can be independently applied to a lithium battery protection board with low communication requirements, and can realize charge and discharge protection of the lithium battery and accurate calculation of the residual capacity of the battery without adding MCU;
(4) The output power supply is changed into a noninductive BUCK mode from a linear LDO mode, so that the load performance is improved, and the heating value and the power consumption generated by the power supply are reduced; the high-frequency PWM power output switch enables the BMS system to realize the self-defined power supply with wide voltage output without searching a BUCK power supply chip with high power when designing the power supply;
(5) An active balancing strategy and a passive balancing strategy are set, so that balancing management of the battery pack is realized to the maximum extent.
Drawings
FIG. 1 is a schematic diagram of a battery management chip according to an embodiment of the invention;
FIG. 2 is a schematic diagram of an active equalization switch and a passive equalization switch according to an embodiment of the present invention;
fig. 3 is a schematic diagram of an embodiment of a battery management chip according to the present invention.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict.
It should be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
The battery management chip increases output power aiming at a 3.3V output power supply powered by an external MCU or other logic devices on the basis of realizing battery measurement, equalization and charge-discharge MOS tube control, the maximum output load current can be 100mA, and the heat dissipation problem is improved; meanwhile, a high-frequency PWM power output switch is added, so that the power supply problem of high-power consumption external equipment such as a 4G module, an isolated CAN communication module or other devices with larger power consumption CAN be solved. In addition, in order to solve the problem that a large amount Of development and test time is consumed for calculating the residual capacity (SOC) Of different BMS manufacturers, an adaptive calibration battery residual capacity estimation algorithm is integrated in a chip, and the adaptive calibration battery residual capacity calculation can be realized only by configuring parameters in corresponding registers.
The following describes the technical solution in the embodiment of the present invention in detail with reference to the drawings in the embodiment of the present invention.
As shown in fig. 1, in one embodiment, the battery management chip of the present invention includes a power supply unit 1, an analog circuit unit 2, and a logic circuit unit 3.
The power supply assembly 1 comprises a power supply module 11, a non-inductive BUCK circuit 12 and a high-frequency PWM power supply output switch 13.
The power module 11 is configured to receive external power and provide power to the battery management chip.
The noninductive BUCK circuit 12 is connected with the power module 11 and is used for outputting a stabilized voltage power supply according to the power supplied by the power module 11. Preferably, the input voltage range of the inductance-free BUCK circuit 12 is 6-72V, and the output voltage is 3.3V@100mA.
The high-frequency PWM power output switch 13 is connected with the power module 11, and is used for outputting a configurable power according to the power provided by the power module 11. For example, the high-frequency PWM power output switch 13 may output a 3V-12V configurable power according to the use requirement, and the peak output power may reach 5v@2a. Since the EN port is required to be enabled when the high-frequency PWM power supply output switch 13 is used, unnecessary power consumption can be reduced.
The analog circuit assembly 2 includes a battery measuring and equalizing unit 21, a temperature detecting unit 22, an operational amplifier unit 23, a first analog-to-digital converting unit 24, and a second analog-to-digital converting unit 25.
The battery measuring and balancing unit 21 is connected with the power module 11, and is powered by the power module 11 and used for comprising a battery measuring unit and a balancing unit; the battery measurement unit is used for measuring the analog battery cell voltage of each battery cell; the equalization unit is used for realizing voltage equalization of the battery cells. Preferably, the battery measurement unit has a total of 20 channels, which are responsible for the measurement of the voltage of each battery cell. The equalization unit provides a direct control switch and an equalization control strategy, including an active equalization switch and a passive equalization switch. The active equalization switch is used for charging low-voltage battery cells so as to realize the voltage consistency of all the battery cells; the passive equalization switch is used for discharging the high-voltage battery cells so as to achieve the voltage consistency of all the battery cells. As shown in fig. 2, the solid line is active equalization, the dashed line is passive equalization, i.e. active and passive equalization are implemented separately and simultaneous switching is disabled. When active equalization is selected, sp and Sn are externally connected with an equalization power supply for a certain battery, and SWn-1 are closed at the same time, so that the battery equalization can be realized. Dz plays a certain protective role, and prevents the high pulse voltage from damaging the battery core. When passive equalization is selected, the passive equalization of a certain battery can be realized by simultaneously closing Cn and Cn-1. The passive equalization current is determined by dividing the on-channel battery voltage by the on-channel resistance. Preferably, the equalization unit is provided with 20 paths and is divided into active equalization and passive equalization.
The temperature detection unit 22 is used for detecting an analog temperature signal of the external environment. Preferably, the temperature detection unit 22 is provided with three channels, responsible for temperature measurement of three external environments.
The first analog-to-digital conversion unit 24 is connected to the battery measuring and equalizing unit 21 and the temperature detecting unit 22, and is configured to convert the analog battery cell voltage into a digital battery cell voltage and convert the analog temperature signal into a digital temperature signal.
The operational amplifier unit 23 is configured to amplify the voltage signal on the current sensing resistor to obtain an analog voltage signal, where the analog voltage signal is required to be in a range recognizable by the second analog-to-digital conversion unit 25.
The second analog-to-digital conversion unit 25 is connected to the operational amplifier unit 23 and is configured to convert the analog voltage signal into a digital voltage signal.
In one embodiment, the analog circuit assembly 2 further includes a Mos transistor driving circuit 26 and a charger and load connection detection circuit 27. The Mos tube driving circuit 26 is used for driving the charging Mos tube and the discharging Mos tube, so that the charging Mos tube and the discharging Mos tube are opened or closed to realize charging or discharging protection. The charger and load connection detection circuit 27 is used to detect whether the charger and load are connected.
In an embodiment, the analog circuit assembly 2 further comprises a switch matrix 28 and a switch matrix control unit 29. The switch matrix 28 is connected to the battery measuring and balancing unit 21 and the first analog-to-digital conversion unit 24 for selecting the channels of the battery measuring and balancing unit and providing them to the first analog-to-digital conversion unit. In practical applications, the switch matrix 28 may be configured with different switch circuits according to different application requirements. The matrix control unit 29 is arranged to control the channel selection of the switching matrix.
The logic circuit assembly 3 includes a battery remaining power estimating unit 31. The battery remaining power estimating unit 31 is connected to the first analog-to-digital converting unit 24 and the second analog-to-digital converting unit 25, and is configured to estimate the battery remaining power according to the data collected by the first analog-to-digital converting unit 24 and the second analog-to-digital converting unit 25.
In one embodiment, the method for remaining battery power comprises the following steps:
1) After the battery management chip is powered on and initialized, the lowest value Vmin of the digital battery cell voltage, the battery cell charging cut-off voltage OV, the battery cell discharging cut-off voltage OU and the battery cell rated voltage EV are obtained, and the current residual battery capacity is calculated according to SOCt= ((Vmin-EV)/(OV-UV)). 100+50. Wherein, the unit of the residual capacity of the battery is percent.
2) Obtaining a resistance Rs of the detection resistor and the digital voltage signal Vr, calculating a current charge-discharge current Cur= (Vr/Rs) 10, and judging whether the absolute value of the current charge-discharge current is larger than a minimum charge-discharge effective current value; if yes, starting a 1 second timer, performing ampere-hour integral calculation, and performing unscented Kalman filtering in the calculation process; and acquiring the current accumulated electric quantity Qt when the time length of the timer is 1 minute. If not, the battery cell is in a static state currently, and the electric quantity accumulation calculation is not started. Wherein, vr value is negative, which indicates charging; the Vr value is positive, indicating a discharge. The unscented Kalman filtering algorithm can realize the calculation deviation correction of the current value caused by the hardware detection error.
3) And calculating the updated battery residual electric quantity according to SOC= ((SOCt. Times. Qt. Times. Ks. Ts. Times. 60) +Qt) 100/(Qa. Times. 60. Times. Ks. Times. Ts), wherein Qa is the total battery capacity, ks is the battery attenuation coefficient, and Ts is the low temperature influence coefficient. Preferably, when calculating the updated battery residual capacity each time, when the voltage of the battery cell is in a state of charge full or discharge cut-off, if the battery residual capacity calculated by using an ampere-hour integration method deviates from the SOC, if the battery pack is initialized for the first time in power-on or is subjected to standing for a long time (such as more than 1 week), the SOC value calibration is performed according to the voltage state of the battery cell through a voltage OCV curve; if the charge-discharge cycle is finished, that is, the battery voltage is already in a charge full state or a discharge cut-off state, the SOC can be considered to be 100% or 0% in the two states, and at this time, if the SOC and the result of determining the battery voltage have errors, the calculation factor in the unscented kalman filter is adjusted.
Preferably, when the external average temperature T is less than 0 ℃, ts takes a preset value; otherwise, ts takes a value of 1. Wherein the external average temperature T is acquired by an external temperature sensor.
4) And (3) repeating the step (2) and the step (3) after the battery is charged and discharged once, and obtaining the final updated battery residual capacity when the iteration times reach the preset times.
In one embodiment, the logic circuit assembly 3 further includes a register 32 and an MTP (Multiple Time Programmable, nonvolatile, multi-writable memory) module 33. The register is used for storing the battery cell charge cut-off voltage, the battery cell discharge cut-off voltage, the battery cell rated voltage, the minimum charge-discharge effective current value, the total battery capacity, the battery attenuation coefficient, the low temperature influence coefficient, the resistance value of the detection resistor and the preset times. Therefore, in the estimation of the remaining battery power, the relevant parameters need to be read from the register. Meanwhile, the register is also used for storing parameters such as equalization mode selection, equalization opening channel, equalization time and the like. The MTP module is used for storing parameters in a power-down state, and can set device operation parameters on a production line or save parameters set by user definition.
In an embodiment, the logic circuit assembly 3 further includes a communication module 34, where the communication module 34 is configured to communicate with an external device, to enable a user to read related data, modify or read protection register data, and so on. Preferably, the communication module 34 includes one or more combinations of a 1-wire bus, IIC bus.
In one embodiment, the logic circuit assembly 3 further includes a two-stage battery protection module 35 for realizing overvoltage, overcurrent, overtemperature, low temperature and short circuit protection of the battery, and safety protection of the BMS system. Wherein the primary protection of the battery monitors overvoltage, overcurrent, overtemperature, low temperature, short circuit, etc., and the detection range is provided by the register 32; the secondary battery protection judges whether the BMS system is safe according to the data collected by the first analog-digital conversion unit 24 and the second analog-digital conversion unit 25. When the secondary protection unit performs protection action, a low-level signal can be output through the universal I/O port and used for informing an external MCU.
As shown in fig. 3, in an embodiment, the power supply pin of the battery management chip is BAT, bat+ is the total positive pole of the battery pack, VSS is ground, and is connected to the total negative pole of the battery pack; d1, R1 and C1 form reverse connection prevention and input voltage stabilizing filtering.
The high-frequency PWM power supply output switch is connected between the D1, L1, C2, C3, R2 and R3, the Feed is connected between the R2 and R3, and a feedback voltage stabilizing source with vfeed=1.25V is provided, so that the Vout output voltage is adjustable, wherein Vout=vfeed (R2+R3)/R3. EN is the enabling end of the high-frequency PWM power supply output switch, defaults to the state of high resistance of open drain without enabling, and sets logic low level enabling. Thus requiring external access to the IO port or direct grounding.
V3V3 is the standard regulated power supply of battery management chip output, can provide power supply for external MCU, in order to guarantee output stability, the pin increases filter capacitor C4.
The 1-wire bus is connected to the MCU common IO port according to the standard, and the SDA and the SCL of the IIC communication interface are directly connected to the SDA and the SCL of the MCU.
And Alarm outputs an Alarm signal for the battery management chip. And when no alarm signal exists, the alarm signal is in a high resistance state, the alarm output is in a low level, and the duration is 2 seconds by default.
RST is the external reset SoC chip, SLEEP is the external enabling chip to enter a SLEEP/storage mode, and is directly connected with the MCU common IO port.
T1, T2 and T3 are temperature acquisition inputs, and Rt1, rt2 and Rt3 are thermistors. The general thermistor takes negative temperature coefficient B3950 and has a resistance value of 10K at normal temperature of 25 ℃.
V20-VO is the input port of the battery measuring and equalizing unit, R5-R25 and C5-C25 form the current limiting and filtering capacitance in the loop. Considering that the modules have active equalization at the same time, the current limiting resistance value of R5-R25 is not too large, and the value of C5-C25 is recommended to be 0.01uf between 5 and 10 ohms.
Sp and Sn are active equalization power input interfaces. U1 is an isolated power supply designed specifically for active equalization, i.e., not one ground with the digital power supply. The input source adopts Vout output by a high-frequency switch, and the output voltage after isolation is generally slightly higher than or equal to the highest charging voltage of the battery cell. The final active balancing current is determined by the output voltage of the isolated power supply module, the maximum power, the current limiting resistance value on the channel and the voltage of the battery of the channel.
SRp and SRn are charge-discharge current detection input ports. The current passes through the current detection voltage RL, the voltages at two ends of the resistor are input into SRp and SRn through R26 and R27, and C26 plays a role in stabilizing voltage, and the original differential voltage signal is weak, so that the value is generally 10 pf-22 pf.
The CHG and the DSG are respectively control ports of the charging and discharging Mos tube, and are connected with the charging and discharging N-MOS tube for controlling the MOS tube to be opened or closed. If the CHG outputs a high level, Q1 is closed, the charger cathode C-is always connected with the battery, and a charging path is formed for charging the battery; if CHG inputs low, Q1 is turned off and the charging channel is also turned off. If the DSG outputs a high level, Q2 is closed, the load negative electrode P-is always connected with the battery, and a charging path is formed to discharge the battery; if the DSG input is low, Q2 is turned off and the discharge channel is also turned off.
CHGD and DSGD are respectively a charger and a load connection detection port, the CHGD is connected to C-through a resistor R28, the DSGD is connected to a D stage of Q2 through a resistor R29, and the values of R28 and R29 are 1M.
In the several embodiments provided in the present invention, it should be understood that the disclosed system, apparatus, or method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of modules/units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple modules or units may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or modules or units, which may be in electrical, mechanical or other forms.
The modules/units illustrated as separate components may or may not be physically separate, and components shown as modules/units may or may not be physical modules, i.e., may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules/units may be selected according to actual needs to achieve the objectives of the embodiments of the present invention. For example, functional modules/units in various embodiments of the invention may be integrated into one processing module, or each module/unit may exist alone physically, or two or more modules/units may be integrated into one module/unit.
Those of ordinary skill would further appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, in computer software, or in a combination of the two, and that the elements and steps of the examples have been generally described in terms of function in the foregoing description to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims (12)

1. A battery management chip, wherein the battery management chip comprises a power supply assembly;
the power supply assembly comprises a power supply module, a non-inductive BUCK circuit and a high-frequency PWM power supply output switch; the power supply module is used for receiving external power supply and providing power supply for the inside of the battery management chip; the noninductive BUCK circuit is used for outputting a stabilized voltage power supply, and the high-frequency PWM power supply output switch is used for outputting a configurable power supply.
2. The battery management chip of claim 1, wherein: the battery management chip further comprises the analog circuit component, wherein the analog circuit component comprises a battery measurement and equalization unit, a temperature detection unit, an operational amplifier unit, a first analog-to-digital conversion unit and a second analog-to-digital conversion unit; the battery measurement and equalization unit is used for measuring the analog battery cell voltage of each battery cell and realizing the voltage equalization of the battery cells; the temperature detection unit is used for detecting an analog temperature signal of an external environment; the operational amplifier unit is used for amplifying the voltage signal on the current detection resistor to obtain an analog voltage signal; the first analog-to-digital conversion unit is used for converting the analog battery cell voltage into a digital battery cell voltage and converting the analog temperature signal into a digital temperature signal; the second analog-to-digital conversion unit is used for converting the analog voltage signal into a digital voltage signal.
3. The battery management chip of claim 1, wherein: the analog circuit assembly also comprises a Mos tube driving circuit, a charger and a load connection detection circuit; the Mos tube driving circuit is used for driving the charging Mos tube and the discharging Mos tube to realize charging or discharging protection; the charger and load connection detection circuit is used for detecting whether the charger is connected with a load or not.
4. The battery management chip of claim 2, wherein: the analog circuit assembly further comprises a switch matrix and a switch matrix control unit, wherein the switch matrix is connected with the battery measuring and balancing unit and the first analog-to-digital conversion unit and is used for selecting a channel of the battery measuring and balancing unit and providing the channel to the first analog-to-digital conversion unit; the matrix control unit is used for controlling channel selection of the switch matrix.
5. The battery management chip of claim 2, wherein: the battery measuring and balancing unit comprises an active balancing switch and a passive balancing switch; the active equalization switch is used for charging low-voltage battery cells so as to realize the voltage consistency of all the battery cells; the passive equalization switch is used for discharging the high-voltage battery cells so as to achieve the voltage consistency of all the battery cells.
6. The battery management chip of claim 2, wherein: the battery management chip further comprises a logic circuit component; the logic circuit assembly comprises a battery residual capacity estimation unit; the battery remaining power estimating unit estimates the remaining power of the battery by:
1) After the battery management chip is powered on and initialized, acquiring the lowest value Vmin of the digital battery cell voltage, the battery cell charging cut-off voltage OV, the battery cell discharging cut-off voltage OU and the battery cell rated voltage EV, and calculating the current residual battery capacity according to SOCt= ((Vmin-EV)/(OV-UV)). 100+50;
2) Obtaining a resistance Rs of the detection resistor and the digital voltage signal Vr, calculating a current charge-discharge current Cur= (Vr/Rs) 10, and judging whether the absolute value of the current charge-discharge current is larger than a minimum charge-discharge effective current value; if yes, starting a 1 second timer, performing ampere-hour integral calculation, and performing unscented Kalman filtering in the calculation process; acquiring the current accumulated electric quantity Qt when the time length of the timer is 1 minute;
3) Calculating updated battery residual electric quantity according to SOC= ((SOCt. Times. Qt. Times. Ks. Times. Ts. 60) +Qt) 100/(Qa. Times. 60. Times. Ks. Times. Ts), wherein Qa is total battery capacity, ks is a battery attenuation coefficient, and Ts is a low temperature influence coefficient;
4) And (3) repeating the step (2) and the step (3) after the battery is charged and discharged once, and obtaining the final updated battery residual capacity when the iteration times reach the preset times.
7. The battery management chip of claim 6, wherein: when the updated battery residual capacity is calculated each time, the method further comprises the step of calibrating the SOC value according to the voltage state of the battery cell and a voltage OCV curve if the battery pack is initialized for the first power-on or undergoes long-term standing when the battery residual capacity calculated by using an ampere-hour integration method is deviated from the SOC when the voltage of the battery cell is in a full charge state or a discharge cut-off state; and when the charge-discharge cycle is finished, if the SOC has errors in the determined result of the battery cell voltage, adjusting the calculation factor in the unscented Kalman filtering.
8. The battery management chip of claim 6, wherein: when the external average temperature T is less than 0 ℃, taking a preset value by Ts; otherwise, ts takes a value of 1.
9. The battery management chip of claim 6, wherein: the logic circuit assembly further comprises a register and an MTP module, wherein the register is used for storing the battery cell charging cut-off voltage, the battery cell discharging cut-off voltage, the battery cell rated voltage, the minimum charging and discharging effective current value, the battery total capacity, the battery attenuation coefficient, the low temperature influence coefficient, the resistance value of the detection resistor and the preset times; the MTP module is used for storing parameters in a power-down state.
10. The battery management chip of claim 6, wherein: the logic circuit assembly further comprises a communication module for enabling communication with an external device.
11. The battery management chip of claim 10, wherein: the communication module comprises one or more of a 1-wire bus and an IIC bus.
12. The battery management chip of claim 6, wherein: the logic circuit assembly further comprises two-stage battery protection modules, wherein the two-stage battery protection modules are used for realizing overvoltage, overcurrent, over-temperature, low-temperature and short-circuit protection of the battery and safety protection of the BMS system.
CN202310228363.XA 2023-03-08 2023-03-08 Battery management chip Pending CN116488276A (en)

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