CN116463595B

CN116463595B - Sputtering apparatus and method for forming semiconductor structure using the same

Info

Publication number: CN116463595B
Application number: CN202310720707.9A
Authority: CN
Inventors: 王晋; 黄峰; 高晋文; 郭佳惠
Original assignee: Runxin Perception Technology Nanchang Co ltd
Current assignee: Runxin Perception Technology Nanchang Co ltd
Priority date: 2023-06-19
Filing date: 2023-06-19
Publication date: 2023-10-27
Anticipated expiration: 2043-06-19
Also published as: CN116463595A

Abstract

A sputtering apparatus and method of forming a semiconductor structure using the same, the sputtering apparatus including at least one sputtering chamber, and each sputtering chamber including a carrier and a target structure. The bearing platform is configured to bear a substrate to be coated and can rotate around a rotation shaft along a first direction, the first direction is perpendicular to the main surface of the bearing platform, the bearing platform is configured to bear the substrate, and comprises a substrate mounting area configured to mount the substrate; the target structure is disposed opposite the carrier in a first direction and includes a target sputtering zone, which is a region configured to provide target particles to a substrate positioned on the carrier during a sputtering process, wherein the target sputtering zone overlaps the substrate mounting zone in the first direction and extends beyond an edge of the substrate mounting zone in a second direction parallel to a major surface of the carrier. The sputtering device disclosed by the embodiment of the disclosure can improve the capability of the sputtering process for coating the film on the side wall of the deep hole.

Description

Sputtering apparatus and method for forming semiconductor structure using the same

Technical Field

Embodiments of the present disclosure relate to the field of semiconductor devices, and more particularly, to a sputtering apparatus and a method of forming a semiconductor structure using the same.

Background

Among semiconductor processes, a sputtering process is widely used as a common physical vapor deposition process in the manufacturing process of various semiconductor structures to form various film layers, such as metal layers, required for the semiconductor structures. The sputtering process can be applied to deposit a film in the through hole of the substrate; however, in the sputtering process using the conventional sputtering apparatus, the sputtering incidence angle of the target particles is small, and deep hole plating cannot be achieved. For example, conventional sputtering techniques can only achieve sidewall plating of a few tens of microns through-holes, while it is difficult to achieve sidewall plating of deeper through-holes.

Disclosure of Invention

There is provided, in accordance with at least one embodiment of the present disclosure, a sputtering apparatus including at least one sputtering chamber, and each sputtering chamber including: a stage configured to carry a substrate to be coated and rotatable about a rotation axis in a first direction perpendicular to a main surface of the stage configured to carry the substrate, wherein the stage includes a substrate mounting region configured to mount the substrate; a target structure disposed opposite the carrier in the first direction and including a target sputtering zone, the target sputtering zone being a region configured to provide target particles to the substrate located on the carrier in a sputtering process, wherein the target sputtering zone overlaps the substrate mounting zone in the first direction and extends beyond an edge of the substrate mounting zone in a second direction parallel to the major surface of the carrier.

In a sputtering apparatus provided according to at least one embodiment of the present disclosure, the target sputtering region includes a plurality of sub-target sputtering regions.

In a sputtering apparatus provided according to at least one embodiment of the present disclosure, at least a part of gaps between the plurality of sub-target sputtering regions overlap with the substrate mounting region in the first direction.

In a sputtering apparatus provided according to at least one embodiment of the present disclosure, one or more of the plurality of sub-target sputtering regions each includes a first portion overlapping the substrate mounting region in the first direction and a second portion extending beyond the edge of the substrate mounting region in the second direction.

In a sputtering apparatus provided according to at least one embodiment of the present disclosure, the first portions of the plurality of sub-target sputtering regions are offset from the center of the substrate mounting region in the second direction.

In the sputtering apparatus provided in accordance with at least one embodiment of the present disclosure, orthographic projections of two sub-target sputtering regions of the plurality of sub-target sputtering regions on a plane on which the main surface of the carrier table is located are a first orthographic projection and a second orthographic projection, respectively, which are symmetrically disposed about a center line extending through a center of the substrate mounting region and parallel to the main surface.

In the sputtering device provided in at least one embodiment of the present disclosure, one or more sub-target sputtering regions of the plurality of sub-target sputtering regions are disposed along a virtual contour, the plurality of sub-target sputtering regions have edges that coincide with the virtual contour, a planar shape of the virtual contour is the same as a planar shape of the substrate mounting region, and an area of an area enclosed by the virtual contour is larger than an area of the substrate mounting region.

In the sputtering device provided in accordance with at least one embodiment of the present disclosure, the area of each sub-target sputtering region is smaller than or equal to the area of the substrate mounting region.

In the sputtering apparatus provided according to at least one embodiment of the present disclosure, the sum of the areas of the plurality of sub-target sputtering regions is larger than the area of the substrate mounting region.

In the sputtering apparatus provided in accordance with at least one embodiment of the present disclosure, the substrate mounting region and the plurality of sub-target sputtering regions each have a circular planar shape, the diameter of the substrate mounting region ranges from 100 mm to 150 mm, the diameter of each sub-target sputtering region ranges from 100 mm to 150 mm, and the spacing between adjacent sub-target sputtering regions among the plurality of sub-target sputtering regions ranges from 90 mm to 150 mm.

In a sputtering apparatus provided according to at least one embodiment of the present disclosure, the carrying stage includes an electrode and a tray, the tray is located on the electrode and is configured to carry the substrate, the electrode and the tray overlap in the first direction, and the tray extends beyond an edge of the electrode in the second direction.

At least one embodiment of the present disclosure provides a method of forming a semiconductor structure using the sputtering apparatus of any one of the above claims, comprising: providing a substrate to be coated, wherein the substrate is provided with a first side and a second side which are opposite to each other, and a through hole penetrating the substrate from the first side to the second side; the substrate is placed on a carrying table, and a film layer is formed in the through hole of the substrate through a sputtering process by using the sputtering device.

In the method for forming a semiconductor structure according to at least one embodiment of the present disclosure, when the minimum width of the through hole in the horizontal direction parallel to the main surface of the carrier is more than 20 micrometers, the ratio of the sputtering distance between the target sputtering area of the sputtering device and the substrate in the first direction to the depth of the through hole in the first direction ranges from 100:1 to 1000:1.

In a method of forming a semiconductor structure provided in accordance with at least one embodiment of the present disclosure, the sputtering distance of the target sputtering region from the substrate in the first direction ranges from 60 mm to 180 mm.

In a method of forming a semiconductor structure provided in accordance with at least one embodiment of the present disclosure, the susceptor is rotated about a rotation axis such that the substrate is rotated as the susceptor is rotated while the sputtering process is performed.

In a method for forming a semiconductor structure provided in accordance with at least one embodiment of the present disclosure, placing the substrate on the carrier, forming a film layer in the through hole of the substrate by a sputtering process using the sputtering apparatus includes: placing the substrate on the bearing table, enabling the first side of the substrate to face a target sputtering area of the sputtering device, and performing a first sputtering process to form a first sub-film layer on a part of the side wall, close to the first side, of the through hole; and turning over the substrate so that the second side of the substrate faces the target sputtering region, and then performing a second sputtering process to form a second sub-film layer on a portion of the sidewall of the through hole near the second side, the second sub-film layer and the first sub-film layer being connected to each other to form the film layer, the film layer continuously extending from the first side of the substrate to the second side of the substrate.

In a method of forming a semiconductor structure provided in accordance with at least one embodiment of the present disclosure, the film includes a first film portion and a second film portion, the first film portion is adjacent to the first side of the substrate, and the second film portion is located on a side of the first film portion away from the first side; the first film layer portion is formed by deposition of first target particles of a target sputtering zone of the sputtering device, and the second film layer portion is formed by deposition of second target particles of the target sputtering zone; the first target particles are from a portion of the target sputtering zone extending beyond an edge of the substrate in a second direction, and the second target particles are from a portion of the target sputtering zone overlapping the substrate in the first direction.

In a method for forming a semiconductor structure according to at least one embodiment of the present disclosure, a first included angle between a sputtering direction of the first target particles and a horizontal direction parallel to a main surface of the substrate is smaller than a second included angle between a sputtering direction of the second target particles and the horizontal direction.

In a method of forming a semiconductor structure provided in accordance with at least one embodiment of the present disclosure, the second included angle ranges from 65 ° to 90 °.

In a method of forming a semiconductor structure provided in accordance with at least one embodiment of the present disclosure, the depth of the via is above 300 microns.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below, and it is apparent that the drawings in the following description relate only to some embodiments of the present disclosure, not to limit the present disclosure.

FIG. 1 illustrates a schematic cross-sectional view of a sputtering chamber of a sputtering apparatus according to some embodiments of the present disclosure;

FIG. 2 illustrates a schematic top view of a target structure and a substrate to be coated in a sputtering chamber of a sputtering apparatus according to some embodiments of the present disclosure;

FIG. 3 shows a schematic top view of a target structure and a substrate to be coated in a sputtering chamber of a sputtering apparatus according to further embodiments of the present disclosure;

FIG. 4 shows a schematic top view of a target structure and a substrate to be coated in a sputtering chamber of a sputtering apparatus according to further embodiments of the present disclosure;

FIG. 5 shows a schematic top view of a target structure and a substrate to be coated in a sputtering chamber of a sputtering apparatus according to further embodiments of the present disclosure;

FIG. 6 shows a schematic top view of a target structure and a substrate to be coated in a sputtering chamber of a sputtering apparatus according to further embodiments of the present disclosure;

FIG. 7 shows a schematic cross-sectional view of a sputtering chamber of a sputtering apparatus according to further embodiments of the present disclosure;

fig. 8 illustrates a schematic top view of a substrate according to some embodiments of the present disclosure;

FIG. 9 illustrates a schematic enlarged top view of a via pad in the substrate shown in FIG. 8, in accordance with some embodiments of the present disclosure;

FIG. 10 illustrates a schematic cross-sectional view of a substrate according to some embodiments of the present disclosure, wherein FIG. 10 is a cross-sectional view taken along line V-V of FIG. 8;

FIG. 11 illustrates a schematic cross-sectional view of a substrate having a via hole according to some embodiments of the present disclosure;

FIG. 12 illustrates a schematic cross-sectional view of forming a first sub-film layer on a substrate by a sputtering process according to some embodiments of the present disclosure;

FIG. 13 illustrates a schematic diagram of a sputtering path of target particles in a sputtering process for forming a first sub-film layer on a substrate according to some embodiments of the present disclosure;

FIG. 14 illustrates a schematic diagram of sputtering paths of other target particles in a sputtering process for forming a first sub-film layer on a substrate according to some embodiments of the present disclosure;

fig. 15 illustrates a schematic cross-sectional view of a semiconductor structure obtained after forming a second sub-film layer on a substrate according to some embodiments of the present disclosure;

FIG. 16 illustrates scanning electron microscope pictures of a film layer formed by via sidewalls at some different locations of a first region of a substrate, in accordance with some embodiments of the present disclosure;

FIG. 17 illustrates scanning electron microscope pictures of film layers formed by via sidewalls at other different locations of a first region of a substrate in accordance with some embodiments of the present disclosure;

FIG. 18 illustrates scanning electron microscope pictures of a film layer formed by via sidewalls at some different locations of a second region of a substrate, in accordance with some embodiments of the present disclosure;

fig. 19 illustrates scanning electron microscope pictures of film layers formed at via sidewalls at other different locations of the second region of the substrate, in accordance with some embodiments of the present disclosure.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. It will be apparent that the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments, which can be made by one of ordinary skill in the art without the need for inventive faculty, are within the scope of the present disclosure, based on the described embodiments of the present disclosure.

Unless defined otherwise, technical or scientific terms used in this disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

The embodiment of the disclosure provides a sputtering device, which can realize the side wall coating of a deep hole. For example, the sputtering apparatus comprises at least one sputtering chamber, and each sputtering chamber comprises a carrier and a target structure; the bearing platform is configured to bear a substrate to be coated and can rotate around a rotation axis along a first direction, wherein the first direction is perpendicular to the bearing platform and is configured to bear a main surface of the substrate, and the bearing platform comprises a substrate mounting area configured to mount the substrate. The target structure is disposed opposite the carrier in a first direction and includes a target sputtering zone, which is a region configured to provide target particles to the substrate located on the carrier during a sputtering process, wherein the target sputtering zone overlaps the substrate mounting zone in the first direction and extends beyond an edge of the substrate mounting zone in a second direction parallel to the major surface of the carrier. The coverage range and the sputtering angle range of target particles in the sputtering process can be enlarged by setting the target sputtering area to exceed the edge of the substrate mounting area, so that the filling capacity of the sputtering process for deep holes is improved.

FIG. 1 illustrates a schematic cross-sectional view of a sputtering chamber of a sputtering apparatus according to some embodiments of the present disclosure; fig. 2 illustrates a schematic top view of a target structure and a substrate to be coated in a sputtering chamber of a sputtering apparatus according to some embodiments of the present disclosure, wherein fig. 1 is a cross-sectional view taken along line I-II in fig. 2. For simplicity of the drawing, only some of the main components of the sputtering apparatus are shown in the drawing, and the sputtering apparatus may also include other common components not shown.

Referring to fig. 1, in some embodiments, a sputtering apparatus 500 includes at least one sputtering chamber 501, and each sputtering chamber 501 can include a carrier 100 and a target structure 200. The stage 100 and the target structure 200 are disposed opposite to each other in a direction (e.g., a first direction D1) perpendicular to the main surface of the stage 100. The stage 100 is configured to carry a substrate 106 to be coated, and a main surface of the stage 100 refers to a surface thereof for carrying the substrate 106; the carrier 100 includes a substrate mounting region 100r for mounting the substrate 106; herein, the size and shape, etc., of the substrate mounting region 100r are defined by the substrate 106; for example, the dimensions (e.g., area, width, diameter, etc.) and shape, etc., of the substrate mounting region 100r in a direction parallel to the major surface of the stage 100 are the same as the dimensions and shape, etc., of the substrate 106 in that direction, and the orthographic projections of the substrate 106 and the substrate mounting region 100r on the major surface of the stage 100 (or orthographic projections on a reference plane parallel to the major surface of the stage 100) are completely coincident with each other.

The target structure 200 is disposed opposite to the carrier 100 in the first direction D1, and the target structure 200 is located on a side of the substrate 106 away from the carrier 100 and faces the substrate 106 when the sputtering process is performed; the target structure 200 is configured to provide the substrate with the desired coating material. The target structure 200 includes a target sputtering zone 203, the target sputtering zone 203 being a region configured to provide target particles to the substrate 106 located on the carrier 100 during a sputtering process. In some embodiments, target structure 200 includes backing plate 201 and target 202. The target 202 may be fixed on the backing plate 201, for example, detachably fixed on the backing plate 201. Backing plate 201 may also be referred to as a target mount. The target 202 comprises a material of a coating film required by a substrate, and the target 202 can be selected appropriately according to actual process requirements. Herein, the target sputtering zone 203 of the target structure 200 is the area where the target 202 is located, i.e. the target sputtering zone 203 is defined by the target 202. The position, size, shape, etc. of the target sputtering zone 203 are the same as the position, size, shape, etc. of the target 202, and the orthographic projection of the target sputtering zone 203 on a reference plane parallel to the main surface of the carrier 100 and the orthographic projection of the target 202 on the reference plane are completely coincident with each other. Herein, unless otherwise defined, the relative positional relationship between the target sputtering region 203 and the stage 100 is equivalent to the relative positional relationship between the target 202 and the stage 100, and the relative positional relationship between the target sputtering region 203 and the substrate mounting region 100r of the stage 100 is equivalent to the relative positional relationship between the target 202 and the substrate 106 (except for the distance in the direction D1 perpendicular to the stage main surface).

In some embodiments, the dimension of the target structure 200 in a direction parallel to the major surface of the stage 100 (e.g., a horizontal direction including direction D2) is greater than the dimension of the substrate 106 in that direction. For example, the front projection of the target structure 200 onto the stage 100 overlaps with the front projection of the substrate 106 onto the stage 100 and beyond the edge of the front projection of the substrate 106 onto the stage 100. In some embodiments, the target 202 at least partially overlaps the substrate 106 in a direction perpendicular to the major surface of the substrate 106 (i.e., the first direction D1), and an edge of the target 202 extends beyond an edge of the substrate 106 in a direction parallel to the major surface of the substrate 106 (e.g., a horizontal direction including direction D2); that is, the target sputtering region 203 at least partially overlaps the substrate mounting region 100r in the first direction D1, and the edge of the target sputtering region 203 extends beyond the edge of the substrate mounting region 100r in the horizontal direction. Herein, overlapping of two members in a direction perpendicular to a main surface of a substrate or carrier means that the orthographic projections of the two members overlap on the main surface of the substrate or carrier (or on a reference plane parallel to the main surface of the substrate or carrier); the main surface of the substrate is the main surface facing the bearing table or the target material and is approximately parallel to the main surface of the bearing table.

In other words, the orthographic projection of the target 202 (or target sputtering zone 203) on the major surface of the carrier 100 at least partially overlaps with the orthographic projection of the substrate 106 (or substrate mounting zone 100 r) on the major surface of the carrier 100, and the orthographic projection of the target 202 (or target sputtering zone 203) extends beyond the orthographic projection edge of the substrate 106 (or substrate mounting zone 100 r). In other words, the front projection of the substrate 106 on the stage is within the front projection range of the target structure 200 on the stage, and the front projection edge of the substrate 106 on the stage is closer to the center of the stage 100 than the front projection edge of the target 202 on the stage.

In some embodiments, the target 202 and the substrate 106 have a distance T in a direction perpendicular to the major surface of the carrier 100, which may also be referred to as a sputtering distance, and may be provided to be adjustable. For example, the distance T between the target 202 and the substrate 106 may be adjusted according to the size of the substrate 106; in some examples, the distance T may be greater than 50 millimeters (mm), such as in the range of 60 millimeters to 180 millimeters. However, the disclosure is not limited thereto.

Referring to fig. 1 and 2, in some embodiments, target 202 includes one or more sub-targets 202a, the plurality of sub-targets 202a being embedded in the same backing plate 201 and may include the same target material; for example, multiple sub-targets 202a are used in a sputtering process to provide the same target particles to the same substrate to be coated. For example, the sputtering process is used to form a metal film layer on the substrate, and the targets are metal targets, but the disclosure is not limited thereto. That is, the target sputtering region 203 includes one or more sub-target sputtering regions 203a, and each sub-target sputtering region 203a is a region where a corresponding sub-target 202a is located. That is, the sub-target sputtering zone 203a is defined by the sub-target 202 a; unless otherwise defined, the features such as the size and shape of each sub-target sputtering region 203a are the same as the features such as the size and shape of each sub-target 202a, the relative positional relationship between the plurality of sub-target sputtering regions 203a and other members are the same as the relative positional relationship between the corresponding plurality of sub-targets 202a and the relative positional relationship between the plurality of sub-targets 202a and other members, respectively; the orthographic projection of each sub-target sputtering zone 203a on a reference plane parallel to the main surface of the carrier 100 and the orthographic projection of the corresponding sub-target 202a on the reference plane are completely coincident with each other. In some embodiments, the plurality of sub-targets 202a (i.e., the plurality of sub-target sputtering regions 203 a) may each be spaced apart from one another, but the disclosure is not limited thereto.

The plurality of sub-targets 202a (or sub-target sputtering regions 203 a) may each have a circular, oval, square, rectangular, or the like shape in plan view; the plurality of sub-targets 202a may each have a square, rectangular, etc. shape as viewed in cross-section, and the disclosure is not limited thereto. The plurality of sub-targets 202a may have the same or different shapes from each other, and may have the same or different dimensions (e.g., diameter, length, width, area, thickness, etc.) from each other. In some embodiments, the planar shape (i.e., shape in top view) of the plurality of sub-targets 202a (or sub-target sputtering regions 203 a) may be substantially the same as the planar shape of the substrate 106 (or substrate mounting region 100 r), but the disclosure is not limited thereto.

With continued reference to fig. 1 and 2, in some embodiments, a width (e.g., diameter) of each sub-target 202a in a horizontal direction parallel to a major surface of the carrier 100 may be less than or substantially equal to a width (e.g., diameter) of the substrate 106 in that direction, and a spacing between adjacent sub-targets 202a may be less than, substantially equal to, or greater than the width of the substrate 106.

For example, in the same cross-sectional view or in the same horizontal direction, the sum of the widths of the plurality of sub-targets 202a and the sum of the spacing between adjacent ones of the plurality of sub-targets 202a may be greater than the width of the substrate 106, which may be represented by the following inequality:

n×w1+ (n-1) x s1 > w2, where n.gtoreq.2

Where w1 is the width of each sub-target 202a in the horizontal direction, s1 is the spacing between adjacent sub-targets 202a in the horizontal direction, and w2 is the width of the substrate 106 in the horizontal direction; n is the number of sub-targets 202a in a cross-sectional view taken along a line in a top view, and w1, s1, w2 are the widths of the respective sub-targets, the spacing between adjacent sub-targets, the substrate width in a direction parallel to the main surface of the stage in the same cross-sectional view. Alternatively, n is the number of sub-targets 202a arranged in a certain horizontal direction, and w1, s1, w2 are the sub-target width, the spacing between adjacent sub-targets, the substrate width, respectively, measured in the same horizontal direction.

It should be appreciated that the multiple sub-targets 202a may have the same or different widths from one another, and the spacing between different adjacent sub-targets may also be the same or different; n×w1 and (n-1) ×s1 in the above inequality are described by taking the example that a plurality of sub-targets have the same width and the pitches between adjacent sub-targets are the same; when the plurality of sub-targets 202a have different widths, n×w1 in the above inequality represents the sum of the widths of the n sub-targets; when there are different pitches between adjacent sub-targets, the (n-1) ×s1 in the above inequality represents the pitch or the sum of pitches between adjacent sub-targets among the n sub-targets.

In some examples, the planar shapes of the sub-target 202a and the substrate 106 are circular, and w1 and w2 may be the diameter of the sub-target 202a and the diameter of the substrate 106, respectively; for example, FIG. 1 is a cross-sectional view taken along line I-II of FIG. 2, where line I-II may coincide with a center line CL1 extending through the center of the substrate 106 and the sub-target 202a, and w1 and w2 are the widths, i.e., diameters, of the sub-target 202a and the substrate 106, respectively, in the direction of extension of line I-II. In this example, s1 is the spacing of adjacent sub-targets 202a in the direction of extension of line I-II in the cross-sectional view taken along line I-II, and is, for example, the minimum spacing between adjacent sub-targets 202 a.

In some embodiments, as shown in fig. 2, the target 202 may include four sub-targets 202a, and two sub-targets 202a may be included in a cross-sectional view taken along line I-II (fig. 1), the sum of the widths of the two sub-targets 202a and the sum of the spacing between the two sub-targets being greater than the width of the substrate 106, i.e., 2w1+s1 > w2.

In some embodiments, the maximum width of the target 202 is defined by the maximum distance between the edges of the different sub-targets away from each other in the horizontal direction, and is, for example, approximately equal to n×w1+ (n-1) s1 in the inequality described above. That is, the maximum width (e.g., w 3) of the target 202 is greater than the width of the substrate 106, wherein the maximum width of the target 202 is the sum of the widths of a plurality of sub-targets in a horizontal direction parallel to the main surface of the stage 100 and the sum of the pitches between adjacent sub-targets in the horizontal direction among the plurality of sub-targets, and the width of the substrate 106 is the width in the same horizontal direction. For example, in the example shown in fig. 2, w3=2w1+s1 > w2.

For example, in some examples, the width w2 of the substrate 106 may range from about 100 millimeters (mm) to 150mm; the width w1 of the sub-targets 202a may range from about 100mm to 150mm, and the spacing s1 of adjacent sub-targets 202a may be set in a range from about 90mm to 150mm or 110mm to 130mm, for example, 120mm. In some embodiments, the planar shapes of the substrate 106 and the sub-targets 202a are circular, and the exemplary ranges of the widths w1 and w2 are the diameter ranges of the sub-targets 202a and the substrate 106, respectively, and the exemplary range of the pitch s1 may be the pitch range of the adjacent sub-targets in the extending direction of the center line passing through the center of the substrate. However, the disclosure is not limited thereto, and the sizes of the targets and the spacing between the adjacent targets can be set and adjusted according to the size of the substrate to be coated. In addition, the number of sub-targets shown in fig. 2 is merely illustrative, and the disclosure is not limited thereto. The present disclosure may include more or fewer sub-targets. It should be appreciated that the width of the sub-targets described above is equivalent to the width of the sub-target sputtering zone, the width of the substrate is equivalent to the width of the substrate mounting zone, and the spacing between adjacent sub-targets is equivalent to the spacing between sub-target sputtering zones.

Referring to fig. 2, in some embodiments, the spacing between the same sub-target 202a and different adjacent sub-targets may be different, e.g., the plurality of sub-targets 202a includes a first sub-target (e.g., the right sub-target in the figure), a second sub-target (e.g., the left sub-target in the figure), and a third sub-target (e.g., the upper or lower sub-target in the figure). The first and second sub-targets may be aligned in a direction parallel to a center line of the substrate, which refers to a line extending through the center of the substrate and parallel to a main surface of the susceptor, and adjacent to each other; for example, the first sub-target and the second sub-target may be located on opposite sides of the center of the substrate in the horizontal direction. The first and third sub-targets may be arranged in a direction not parallel to the center line of the substrate and adjacent to each other. The first and second sub-targets have a first spacing therebetween (e.g., s 1), the first and third sub-targets have a second spacing therebetween (e.g., s 2), and s1 and s2 may be different, e.g., s1 may be greater than s2. In some embodiments, every adjacent two of the plurality of sub-targets 202a are spaced apart from each other, i.e., s1 and s2 may each be greater than zero. However, the disclosure is not limited thereto. In other embodiments, one or more sets of adjacent sub-targets of the plurality of sub-targets 202a may be in contact with each other, i.e., the spacing between one or more sets of adjacent sub-targets of the plurality of sub-targets may be zero, e.g., one or both of s1 and s2 may be zero. For example, FIG. 3 shows an example where s1 is greater than zero and s2 is zero; fig. 4 shows an example where s1 and s2 may both be zero, as will be described in detail below.

In some embodiments, by adjusting the distance T between the target 202 and the substrate 106 and/or providing multiple sub-targets (i.e., multiple sub-target sputtering zones), the range of sputtering angles between the target and the substrate may be made larger, and the sputtering angle between the target and the substrate may be increased, such that various regions of the substrate 106 may be sputter coated during the sputtering process, particularly when the substrate 106 has deeper vias, the ability of the sputtering process to coat sidewalls of deep holes (e.g., vias having a depth of 300 micrometers (μm) or more) may be increased.

In some embodiments, one or more of the plurality of sub-targets (i.e., one or more sub-target sputtering zones) may each include a portion facing the substrate and a portion beyond the edge of the substrate. For example, in some examples, each sub-target 202a (i.e., each sub-target sputtering zone 203 a) may include a portion facing the substrate 106 and a portion laterally beyond an edge of the substrate 106 in a horizontal direction (e.g., direction D2) parallel to a major surface of the substrate 106; portions of the gap between the multiple sub-targets 202a (i.e., each sub-target sputtering zone 203 a) may be facing the substrate 106. In this context, one member "facing" another member means that the two members overlap each other in a direction perpendicular to the major surface of the carrying floor.

For example, one or more of the plurality of sub-targets (i.e., one or more sub-target sputtering zones) may each include a first portion that overlaps the substrate and the substrate mounting zone in a first direction (e.g., direction D1) and a second portion that extends beyond edges of the substrate and the substrate mounting zone in a second direction (e.g., direction D2). For example, referring to fig. 1 and 2, in some examples, each sub-target 202a (i.e., each sub-target sputtering zone 203 a) includes a first portion 21 and a second portion 22. The first portion 21 faces the substrate 106, and the second portion 22 extends laterally beyond the edge of the substrate 106 in the horizontal direction; that is, the orthographic projection of the first portion 21 on the main surface of the stage 100 overlaps with the orthographic projection of the substrate 106 (or the substrate mounting region 100 r) on the main surface of the stage 100; while the orthographic projection of the second portion 22 onto the carrier 100 does not overlap with the orthographic projection of the substrate 106 (or the substrate mounting region 100 r) onto the main surface of the carrier 100 and extends beyond the orthographic projection edge of the substrate 106 (or the substrate mounting region 100 r).

In some embodiments, the orthographic projections of the first portions 21 of the plurality of sub-targets 202a on the stage 100 are all within the orthographic projection range of the substrate 106 on the stage 100, and the orthographic projection area of the substrate 106 on the stage is larger than the sum of the orthographic projection areas of the first portions 21 of the plurality of sub-targets 202a on the stage 100. In some embodiments, the orthographic projection of at least a portion of the gaps between the plurality of sub-targets 202a (i.e., the plurality of sub-target sputtering regions 203 a) onto the major surface of the carrier 100 overlaps with the orthographic projection of the substrate 106 (or the substrate mounting region 100 r) onto the major surface of the carrier 100.

In some embodiments, the dimensions (width, area, etc.) of the first portions 21 of the plurality of sub-targets 202a may be the same or different from each other, and the dimensions (width, area, etc.) of the second portions 22 of the plurality of sub-targets 202a may be the same or different from each other. In some embodiments, the plurality of sub-targets 202a may have substantially the same shape and area, and the first portions 21 of the plurality of sub-targets 202a may have substantially the same shape and area, and the second portions 22 of the plurality of sub-targets 202a may have substantially the same shape and area. For example, providing a plurality of sub-targets 202a and their respective portions with the same shape and area can improve uniformity of plating films on a substrate when a sputtering process is performed later.

In some embodiments, at least a portion 21 of a plurality of sub-targets 202a (i.e., a plurality of sub-target sputtering regions 203 a) is offset from a center O1 of the substrate 106 (or a center of the substrate mounting region 100 r) in a horizontal direction, i.e., an orthographic projection of the sub-targets 202a onto the carrier 100 is offset from an orthographic projection of the center O1 of the substrate 106 onto the carrier 100 (i.e., does not overlap). It should be understood that when the planar shape of the substrate 106 is circular, the center of the substrate 106 refers to the center of the circle; when the planar shape of the substrate 106 is elliptical, the center of the substrate 106 refers to the intersection of the major axis and the minor axis of the elliptical shape; when the planar shape of the substrate 106 is square, rectangular, or other polygonal shape, the center of the substrate 106 refers to the intersection of the perpendicular bisectors of each side of the shape.

Referring to fig. 2, for example, the offset distance d of the different sub-targets 202a in the horizontal direction from the center O1 of the substrate 106 in the horizontal direction may be substantially the same or different. For example, the offset distance d of the orthographic projection of the edge of the different sub-targets 202a on the stage 100 from the center O1 of the substrate 106 on the stage 100 may be substantially the same or different; the offset distance d refers to a distance between an edge of the sub-target 202a closest to the center O1 of the substrate 106 and the center O1 in a horizontal direction, that is, a minimum distance between the edge of the sub-target 202a and the center O1.

For example, as shown in fig. 2, from a top view, the center lines of some adjacent two sub-targets 202a of the plurality of sub-targets 202a may pass through the center of the substrate 106, and the centers of the adjacent two sub-targets 202a are located at two sides of the center of the substrate 106, respectively, and the offset distances d from the center of the substrate 106 may be the same or different from each other.

In some embodiments, the target 202 (or target sputtering zone 203) may be symmetrically disposed with respect to the centerline of the substrate 106 (or the centerline of the substrate mounting zone 100 r) from a top view; here, the center line of the substrate 106 or the substrate mounting region 100r refers to a line extending through the center of the substrate 106 or the substrate mounting region 100r, which may extend in a direction parallel or perpendicular to the main surface of the substrate 106 or the stage 100. In other words, the orthographic projection of the target or target sputtering zone on the plane of the major surface of the carrier table may be symmetrically arranged with respect to the orthographic projection of the center line of the substrate or substrate mounting zone on said plane. For example, as shown in fig. 2, some of the sub-targets 202a in the target 202 may themselves be symmetrically disposed with respect to the center line CL1 or the center line CL2 of the substrate 106; the partial sub-targets 202a may be disposed on opposite sides of the center line CL1 or the center line CL2 and symmetrically disposed about the center line, for example, the offset distance d of the edges of two sub-targets disposed on opposite sides of the center line with respect to the center O1 of the substrate 106 may be substantially the same. Two of the plurality of sub-target sputtering regions 203a may be symmetrically disposed about a center line extending through a center of the substrate mounting region 100 r. In other words, the orthographic projections of two of the plurality of sub-target sputtering regions on the plane in which the main surface of the susceptor lies are a first orthographic projection and a second orthographic projection, respectively, which are symmetrically disposed about a center line extending through the center of the substrate mounting region and parallel to the main surface of the susceptor. In some embodiments, the above-described arrangement of multiple sub-targets of the target 202 may improve the uniformity of coating on the substrate in a subsequent sputtering process, e.g., may allow different regions of the substrate to be sputter coated.

Referring to fig. 2, in some embodiments, a plurality of sub-targets 202a of the target 202 (i.e., a plurality of sub-target sputtering regions 203a of the target sputtering region 203) may be disposed within the confines of the virtual outline 25, with an edge of one or more of the plurality of sub-targets 202a that is distal from the center O1 of the substrate 106 coinciding with a portion of the virtual outline 25. In some examples, each sub-target 202a has an edge that coincides with a portion of the virtual contour 25. The plurality of sub-targets 202a may, for example, be substantially uniformly distributed along the virtual contour 25. In some embodiments, the shape of the virtual outline 25 may be substantially the same as the shape of the substrate 106 from a top view, and the center of the virtual outline 25 may coincide with the center of the substrate 106 or the substrate mounting region 100 r. For example, the shape of each sub-target 202a, the shape of the virtual outline 25, and the shape of the substrate 106 may be identical to each other, e.g., may be circular; the size (e.g., width, area) of the area enclosed by the virtual outline 25 is greater than the area (e.g., width, area) of the substrate 106; the area of each sub-target 202a may be less than or equal to the area of the substrate 106; the sum of the areas of the plurality of sub-targets 202a may be greater than the area of the substrate 106. That is, a plurality of sub-target sputtering regions 203a are disposed along the virtual outline 25, at least a portion of the sub-target sputtering regions 203a of the plurality of sub-target sputtering regions 203a have edges that coincide with the virtual outline 25, the planar shape of the virtual outline 25 may be the same as the planar shape of the substrate mounting region 100r, and the area of the region enclosed by the virtual outline 25 is larger than the area of the substrate mounting region 100 r; the area of each sub-target sputtering region 203a is smaller than or equal to the area of the substrate mounting region 100r, and the sum of the areas of the plurality of sub-target sputtering regions 203a is larger than the area of the substrate mounting region 100 r. It should be understood that the area of each member refers to its area in a direction parallel to the major surface of the substrate or carrier (e.g., horizontal direction).

For example, the width (e.g., diameter) of the virtual outline 25 may be the maximum width (i.e., w 3) of the target 202 and greater than the width (e.g., diameter) w2 of the substrate 106; in some examples, as shown in fig. 2, the width of the virtual outline 25 is approximately equal to the sum of the widths of the two sub-targets and the sum of the spacing between the two sub-targets.

It should be understood that the number, shape of the sub-targets, and the shape of the substrate of the target 202 shown in the drawings are all illustrative, and the disclosure is not limited thereto. The arrangement of the individual sub-targets of the target 202 may be set and adjusted according to actual process requirements, and is not limited by the present disclosure.

For example, the embodiment shown in fig. 3 to 6 is similar to the previous embodiment, with the difference that: in the examples of fig. 3 and 4, one or more groups of adjacent sub-targets of the plurality of sub-targets may be in contact with each other; in the examples of fig. 4 to 6, the targets include different numbers of sub-targets.

In some examples, as shown in fig. 3, among the plurality of sub-targets 202a, some adjacent sub-targets (i.e., sub-target sputtering regions) may be spaced apart from each other, and some adjacent sub-targets (i.e., sub-target sputtering regions) may be in contact with each other; for example, a first sub-target (e.g., the right sub-target in the figure) and a second sub-target (e.g., the left sub-target in the figure) are spaced apart from each other, i.e., the spacing therebetween (e.g., s 1) is greater than zero; while the first sub-target and the third sub-target (e.g., the sub-targets above or below in the figure) may be in contact with each other, i.e., the spacing therebetween (e.g., s 2) may be zero. In other examples, as shown in fig. 4, every adjacent two of the plurality of sub-targets may be in contact with each other; for example, the target 202 may include three sub-targets 202a, i.e., the target sputtering region may include three sub-target sputtering regions 203a, and every adjacent two sub-targets of the three sub-targets 202a may all be in contact with each other, i.e., the spacing between every adjacent two sub-targets may all be zero.

Referring to fig. 5, in some examples, the target 202 may include seven sub-targets, i.e., the target sputtering zone may include seven sub-target sputtering zones 203a; the arrangement of the plurality of sub-targets is similar to that described with reference to fig. 2, with the difference that: in this example, the centrally located sub-targets 202a may fully overlap the substrate 106 in a direction perpendicular to the major surface of the stage, the orthographic projection of the sub-targets 202a on the major surface of the stage may be within the orthographic projection of the substrate 106 on the major surface of the stage, while the other sub-targets 202a may be disposed along the virtual outline 25 and partially overlap the substrate 106, respectively, each having a portion extending beyond the edge of the substrate in the horizontal direction. In this example, the size of the plurality of sub-targets and the size relationship of the spacing between adjacent sub-targets to the substrate also satisfy n×w1+ (n-1) ×s1 > w2; the maximum width of the target 202, i.e., the width of the virtual outline 25 (e.g., w 3), is approximately equal to n×w1+ (n-1) x s1, in this example, n=3. Thus, in this example, the dimensions of the respective components satisfy the following conditions: w3=3w1+2s1 > w2.

Referring to fig. 6, in other examples, the target 202 may include only one sub-target 202a, i.e., the target sputtering zone 203 may include only one sub-target sputtering zone 203a. In this example, the size and position of the one sub-target 202a is similar to the size and position of one of the plurality of sub-targets disposed along the virtual outline 25 in fig. 2-5. For example, one sub-target 202a in fig. 6 is a sub-target from which the other sub-targets are removed on the basis of the target design of any one of fig. 2 to 5, while leaving only one edge overlapping with a portion of the virtual outline 25. For example, as shown in fig. 6, the one sub-target 202a partially overlaps the substrate 106 in a direction perpendicular to the main surface of the stage, and has a first portion 21 facing the substrate 106 and a second portion 22 extending beyond the edge of the substrate 106 in the horizontal direction. The size of the sub-target 202a may be smaller, equal, or larger than the size of the substrate 106. In this example, by setting the size and position of the sub-target 202a, a similar technical effect to the foregoing embodiment can also be achieved in cooperation with the rotation of the carrier table at the time of the sputtering process.

Other features of the embodiments shown in fig. 3 to 6 are similar to those of the previous embodiments, and will not be repeated here. It should be understood that the number of target sub-targets in the target shown in fig. 1-6 is illustrative and the disclosure is not limited thereto. Any number of sub-targets arranged in any suitable manner may be provided in the area defined by the virtual outline 25. Where the target includes other numbers of sub-targets, the size of each sub-target, the spacing between adjacent sub-targets, and the arrangement of the plurality of sub-targets may be similarly adapted according to the description of the present disclosure and are intended to be included within the scope of the present disclosure.

In other embodiments, a single target 202 having a larger size may be used, for example, having a contour that coincides with virtual contour 25 and is a single continuous piece of target.

In the embodiment of the present disclosure, by setting the distribution area of the target 202 (i.e., the target sputtering region 203) to be larger than the area of the substrate 106 (the substrate mounting region 100 r), the coverage of the target particles from the target 202 can be improved, and the sputtering angle range of the target particles can be improved, so that each area of the substrate 106 can be coated in the sputtering process. On the other hand, compared with using a single target with a larger size, the embodiment of the present disclosure can achieve the sputtering effect of the single target with the larger size by using a plurality of sub targets with smaller sizes, so that the cost can be saved and the waste of materials can be avoided.

In some embodiments, the substrate 106 has a first side 61 and a second side 62 opposite each other in a direction perpendicular to a major surface of the carrier 100 (e.g., a first direction D1); during the sputtering process, one of the first side 61 and the second side 62 of the substrate 106 faces the carrier 100, and the other of the first side 61 and the second side 62 faces the target structure 200. During the sputtering process, particles (e.g., ions, neutral atoms, molecules, plasma, etc.) having a certain energy are used to bombard the target surface of the target structure 200, such that the particles (atoms or molecules) of the target surface escape the target surface, the escaping target particles are directed at an angle to the substrate surface and deposited to form the desired film. Arrows in fig. 1 schematically show some paths of target particles escaping from the target surface into the substrate.

In some embodiments, the carrier 100 is configured to be rotatable; for example, as shown by the arrow in fig. 1, the carrying table 100 may rotate around the rotation axis 101 in a counterclockwise direction, but the disclosure is not limited thereto. The susceptor 100 is also rotatable about the rotation shaft 101 in a clockwise direction. The rotation shaft 101 extends, for example, in a first direction D1 perpendicular to the main surface of the stage 100 for carrying the substrate 106, and extends through the center of the stage 100. The rotation speed of the susceptor 100 can be adjusted, for example, according to the thickness of the plating film required for the substrate, etc.

When the sputtering process is performed, the substrate 106 disposed on the carrier 100 can rotate along with the rotation of the carrier 100, so that each region of the substrate 106 can be coated with a film, and uniformity of a film layer formed in different regions on the substrate can be improved.

Fig. 7 shows a schematic cross-sectional view of a sputtering chamber of a sputtering apparatus according to further embodiments of the present disclosure.

Referring to fig. 7, in some embodiments, the carrier 100 may include an electrode 100a and a tray 100b; the tray 100b is disposed on a side of the electrode 100a near the target structure 200, and is used for carrying the substrate 106 to be coated. That is, the substrate 106 is placed on the tray 100b and spaced apart from the electrode 100a while the sputtering process is performed. In some embodiments, the tray 100b may be removably secured to the electrode 100 a. The electrode 100a is, for example, a metal electrode; the tray 100b may comprise a semiconductor material such as silicon carbide, but may also comprise a suitable insulating material, etc.

In some embodiments, the tray 100b has a dimension (e.g., width, area, etc.) in a horizontal direction parallel to the major surface of the substrate 106 that is greater than the dimension of the electrode 100a in the horizontal direction. For example, the tray 100b extends beyond the edge of the electrode 100a in the horizontal direction. The orthographic projection of electrode 100a on the major surface of target structure 200 may be within the orthographic projection of tray 100b on the major surface of target structure 200, and the area of the orthographic projection of electrode 100a is smaller than the area of the orthographic projection of tray 100 b. In some embodiments, the tray 100b may have a dimension in the horizontal direction that is greater than or substantially equal to the dimension of the substrate 106 in the horizontal direction. For example, the tray 100b also extends beyond the edge of the substrate 106 in the horizontal direction.

In some embodiments, setting the size of the tray 100b in the horizontal direction to be larger than the size of the electrode 100a in the horizontal direction may prevent target particles from being sputtered onto the electrode 100a during the sputtering process, and protect the electrode 100a from being sputter coated, thereby ensuring the reliability of the electrode 100 a.

For example, the material and dimensions of the tray 100b may be selected according to the material of the substrate 106 to be coated and/or the material of the film layer to be formed and the dimensions of the electrode 100a and the substrate 106, and different trays may be replaced in different sputtering processes based on the type of substrate to be coated.

In some embodiments, the electrode 100a of the carrier 100 is rotatable. For example, the electrode 100a is rotatable about the rotation axis 101; during the sputtering process, the tray 100b and the substrate 106 on the electrode 100a may rotate as the electrode 100a rotates. Other features of the sputtering apparatus shown in fig. 7 are substantially the same as those described above with reference to fig. 1 and 2, and are not described again.

In some embodiments, the substrate 106 may have a plurality of through holes, which may, for example, extend through the substrate 106; the setting and arrangement of the sub-targets of the target 202 and the distance between the target 202 and the substrate 106 can be set according to the size of the substrate 106 and the size of the through hole thereof.

Fig. 8 illustrates a schematic top view of a substrate according to some embodiments of the present disclosure, and fig. 9 illustrates a schematic enlarged top view of a via pad in the substrate illustrated in fig. 8 according to some embodiments of the present disclosure. Fig. 10 illustrates a schematic cross-sectional view of a substrate according to some embodiments of the present disclosure, wherein fig. 10 is a cross-sectional view taken along line V-V of fig. 8.

Referring to fig. 8, in some embodiments, the substrate 106 may be a wafer, such as a semiconductor wafer, e.g., a silicon wafer; for example, the wafer may include a plurality of chips (die), and each chip is provided with a plurality of through holes 107, but the disclosure is not limited thereto. The chip may also be referred to as a via pad 106a. That is, one or more via tabs 106a may be included in the substrate 106, and a plurality of vias 107 may be provided in each via tab 106a. In some embodiments, the plurality of via pads 106a may be arranged in an array comprising a plurality of rows and columns in the substrate 106. It should be understood that the number of via pads 106a included in the substrate 106 shown in the figures is merely illustrative, and the disclosure is not limited thereto.

Referring to fig. 9 and 10, in some embodiments, each via pad 106a of the substrate 106 may include at least a substrate 105, such as a semiconductor substrate, e.g., a silicon substrate, and the present disclosure is not limited in the type of substrate. In some embodiments, the substrate 106 further includes one or more film layers (not shown) formed on the substrate, which may be one or more selected from dielectric layers, semiconductor layers, metal layers, other types of material layers.

In some embodiments, the via pad 106a in the substrate 106 may have one or more vias 107, which one or more vias 107 may extend through the substrate 105, e.g., from the first side 61 of the substrate 106 through the substrate 106 and to the second side 62 of the substrate 106 in a first direction D1 perpendicular to the major surface of the substrate 106. In some embodiments, one or more vias 107 are formed at least in, i.e., at least through, the substrate 105 of the substrate 106; in embodiments where the substrate 106 includes a substrate and one or more film layers formed thereon, the vias 107 may pass through the substrate and the one or more film layers formed thereon.

In some embodiments, as shown in fig. 10, the sidewalls of the through-holes 107 may extend substantially along the first direction D1 perpendicular to the main surface of the substrate 106, and the widths at different depths of the through-holes 107 (i.e., the widths in the horizontal direction parallel to the main surface of the substrate) may be substantially uniform, but the disclosure is not limited thereto. In other embodiments, some or all of the sidewalls of the via 107 may be sloped. For example, as shown in the enlarged view of fig. 10, a portion of the sidewall of the through-hole 107 near the first side 61 of the substrate 106 may be inclined, and the angle of the portion of the sidewall to the surface of the first side 61 may be an acute angle, while the sidewall of the other portion of the through-hole 107 away from the first side 61 may be vertical or may also be inclined. In still other embodiments, the portion of the sidewall of the via 107 may also be at an obtuse angle to the surface of the first side 61.

Referring to fig. 8-10, in some embodiments, one or more via tabs 106a in the substrate 106 may each include a plurality of vias 107; in each via piece 106a, the plurality of vias 107 may be arranged in an array in the horizontal direction, for example, may be arranged in one or more rows along direction D2, and/or in one or more columns along direction D3. The direction D3 is parallel to the major surface of the substrate 106 and is substantially perpendicular to the direction D2. For example, directions D2 and D3 may each be referred to as a second direction, wherein the second directions may each be horizontal directions; alternatively, the direction D2 may be referred to as a first horizontal direction and the direction D3 may be referred to as a second horizontal direction. In other embodiments, the plurality of through holes 107 may be arranged in other ways, such as irregularly. In some embodiments, as shown in fig. 9, the planar shape of the via 107 may be rectangular in plan view, and may have a first width L in a first horizontal direction (e.g., direction D2) and a second width W in a second horizontal direction (e.g., direction D3), and the second width L is greater than the first width W, wherein the first width L is equal to a long side length of the rectangle and the second width W is equal to a short side length of the rectangle; it should be understood that the shape of the substrate, the shape, the number, the arrangement of the through holes, etc. shown in the drawings are all illustrative, and the disclosure is not limited thereto. For example, the planar shape of the through hole 107 may be circular, square, or any other shape.

In some embodiments, the sputtering apparatus of the present disclosure may be used to coat a sidewall of a through hole of a substrate, and parameters of related components in the sputtering apparatus (e.g., a sputtering distance between a target and the substrate, a size of a sub-target, a spacing between adjacent sub-targets, etc.) may be set and adjusted according to a size of the substrate, a size of the through hole, a structure of the through hole, etc., so that coating of the entire sidewall of the through hole may be achieved.

For example, after the size and arrangement of the targets, etc. have been set according to what has been described above, the distance T between the targets (i.e., the target sputtering zone) and the substrate may be set and adjusted according to the size of the through-holes in the substrate to improve the ability of the sputtering process to coat the deep hole sidewalls; wherein the dimensions of the through holes may include the dimensions (e.g., width, etc.) of the through holes in a horizontal direction parallel to the major surface of the carrier and the depth h in a direction perpendicular to the major surface of the carrier. For example, in some embodiments, the minimum width of the via is above 20 μm, and the ratio between the distance T between the target (i.e., target sputtering zone) and the substrate and the via depth ranges from 100:1 to 1000:1. Here, the minimum width of the through hole means the minimum value of the width thereof in each horizontal direction; for example, when the through hole has a rectangular shape as shown in fig. 9, the minimum width of the through hole is its second width W, i.e., equal to the short side length of the rectangle; when the through hole is circular, the width of the through hole in each horizontal direction is the same, and the minimum width of the through hole is equal to the diameter of the circular; when the through hole is square, the minimum width of the through hole is equal to the side length of the square; when the through hole has other shapes, its minimum width may be determined according to a conventional method.

Methods of fabricating semiconductor structures according to some embodiments of the present disclosure are described below in conjunction with fig. 11-15.

Referring to fig. 11, in some embodiments, a substrate 106 is provided; the substrate 106 may be a wafer as shown in fig. 8-10, and the diameter of the wafer may be about 100 mm to 150 mm; that is, the planar shape of the substrate mounting region 100r may be circular, and the diameter thereof may be about 100 mm to 150 mm. For example, the wafer may include a plurality of chips, and one or more through holes 107 may be formed in one or more chips of the substrate 106, respectively, through a patterning process, thereby forming a through hole chip 106a; the patterning process may include photolithography and etching processes, but the disclosure is not limited thereto. In some embodiments, the substrate 106 includes a plurality of via tabs 106a, and each via tab 106a includes a plurality of vias 107. In some examples, the first width L of the via 107 may be about 240 μm to 260 μm, e.g., 250 μm, and the second width W may be about 140 μm to 160 μm, e.g., 150 μm; the thickness ts of the via pad 106a may be about 390 μm to 410 μm, for example 400 μm; the thickness of the via hole chip 106a is the thickness of the substrate 106 in the first direction D1 perpendicular to the main surface thereof. In some embodiments, the depth h of the via 107 is approximately equal to the thickness ts of the via pad 106a, i.e., about 390 μm to 410 μm, e.g., 400 μm.

Referring to fig. 15, a film layer 108 is formed on the substrate 106, the film layer 108 being filled in the plurality of through holes 107, lining the surfaces of the plurality of through holes 107, i.e., covering the sidewalls of the substrate 106 exposed in the through holes 107. For example, the film layer 108 is formed using a sputtering process using a sputtering apparatus of an embodiment of the present disclosure. In some embodiments, the film layer 108 may be formed using a double-sided sputtering process, i.e., first with one of the first side 61 and the second side 62 of the substrate 106 facing the target (i.e., the target sputtering zone), performing a first sputtering process to form a first sub-film layer, then with the other of the first side 61 and the second side 62 of the substrate 106 facing the target (i.e., the target sputtering zone), and performing a second sputtering process to form a second sub-film layer. The two sub-layers are joined to each other to form the film 108. The film layer 108 may be a metal layer, such as a seed layer for subsequently forming other metal material layers.

For example, referring to fig. 12, a first sub-film layer 108a is formed in the plurality of through holes 107 of the substrate 106. The substrate 106 may be subjected to a sputtering process using the sputtering apparatus shown in fig. 1 and 2 or 7, so that the first sub-film layer 108a is formed on the surface of the plurality of through holes 107, and the first sub-film layer 108a is also formed on the surface of the first side 61 of the substrate 106. In some embodiments, at least a portion of the first sub-film layer 108a extends along the surface of the via 107, i.e., lines the surface of the via 107. For example, the first sub-film layer 108a may extend from the first side 61 of the substrate to at least a portion (e.g., a middle portion) of the via 107. For example, the first sub-film layer 108a is formed on the surface of the first via portion 71 of the via 107, the first via portion 71 being a portion near the first side 61 of the substrate 106. The depth of the first via portion 71 is, for example, about 1/2 of the overall depth h of the via 107, but the disclosure is not limited thereto.

Fig. 13 and 14 schematically show a schematic view of a sputtering path of a portion of target particles during formation of a first sub-film layer in a sputtering process.

Referring to fig. 13 and 14, in some embodiments, after forming the plurality of through holes 107 in the substrate 106, the substrate 106 is placed in a sputtering chamber of a sputtering apparatus 500; for example, the substrate 106 is placed on the stage 100. In some embodiments, the carrier 100 includes electrodes and trays, and prior to placing the substrate 106 on the carrier 100, an appropriate tray is first selected based on the material and dimensions of the substrate 106 to be placed on the electrodes, and then the substrate 106 is placed on the tray of the carrier 100. One of the first side 61 and the second side 62 of the substrate 106 is oriented towards the carrier 100, and the other of the first side 61 and the second side 62 is oriented towards the target 202. For example, in some examples, the substrate 106 is placed on the stage 100 such that its second side 62 is facing the stage 100 and the first side 61 is facing the target structure.

The target 202 may be mounted to the backing plate before or after placement of the substrate 106; the target 202 includes, for example, a plurality of sub-targets 202a; it should be understood that for simplicity of the drawings, only the target 202 of the target structure is shown in fig. 13 and 14, and the backing plate is not shown, and the relevant structure may be referred to as described with respect to fig. 1, 2 and 7. The size and arrangement of the targets and/or the sputter distance between the substrate and the targets may be set according to the size of the substrate 106 and its through holes 107 and/or the structural features of the through holes 107. In this example, the substrate 106 and the plurality of sub-targets 202a each have a circular planar shape, and when the diameter range of the substrate 106 (i.e., the diameter range of the substrate mounting region 100 r) is 100mm to 150mm, the diameter of each sub-target 202a of the target (i.e., the diameter of each sub-target sputtering region 203a of the target sputtering region) is set in the range of 100mm to 150mm, and the pitch between adjacent sub-targets (i.e., the pitch between adjacent sub-target sputtering regions 203 a) is set in the range of 90mm to 150mm or in the range of 110mm to 130mm, for example, 120mm; in this example, the minimum width of the via 107 (i.e., the second width W) is greater than 20 μm, e.g., 150 μm, and the ratio between the distance T between the target 202 and the substrate 106 and the depth h of the via 107 may be at 100:1 to 1000:1, for example, may be set in the range of 240:1 to 720:1; for example, the distance T between the target 202 and the substrate 106 may be set in a range between 75mm to 175mm, e.g., 125mm. Herein, the distance T between the target 202 and the substrate 106 refers to a distance between surfaces of the target and the substrate facing each other in a first direction D1 perpendicular to a main surface of the substrate or carrier, and is equivalent to a distance between the target sputtering zone 203 and the substrate 106.

In some embodiments, the electrode of the carrier 100 is grounded and the target 202 is connected to a negative bias. An inert gas, such as argon, is introduced into the sputtering chamber. Argon is ionized under the action of an electric field to generate argon ions (or plasmas); positively charged argon ions are accelerated by the electric field to the negatively biased target 202 to bombard the target 202, thereby allowing target particles (e.g., atoms, etc.) to escape from the bombarded surface of the target 202, and the escaping target particles deposit onto the surface of the substrate 106, thereby forming the first sub-film layer 108a.

In some embodiments, during sputtering, the susceptor 100 may be rotated about the rotation axis 101 such that the substrate 106 rotates with the rotation of the susceptor 100. In this way, the substrate 106 can be sputtered at different positions (e.g., the sidewalls of different through holes 107), and the uniformity of the coating at different positions of the substrate 106 can be improved. In some examples, the rotational speed of the carrier 100 is set in the range of 5 revolutions per minute to 15 revolutions per minute, for example 10 revolutions per minute.

Referring to fig. 12, in some embodiments, the first sub-film layer 108a includes a first film layer portion 108a1 and a second film layer portion 108a2 covering the sidewall of the via hole 107, the first film layer portion 108a1 being located on a portion of the sidewall of the via hole 107 near the first side 61, and the second film layer portion 108a2 being located on a side of the first film layer portion 108a1 away from the first side 61 in a direction perpendicular to the main surface of the substrate 106 (e.g., the first direction D1), and may be located, for example, on a portion of the sidewall approximately in a center region or near a center region of the via hole 107, or may be located on a sidewall at a deeper position of the via hole 107. Here, the central region of the through hole 107 refers to a central region in the first direction D1 perpendicular to the main surface of the substrate 106; deeper locations of the through holes refer to locations that are farther apart than the surface of the substrate facing the target.

In conjunction with fig. 12 and fig. 13 and 14, in some embodiments, the first film layer portion 108a1 and the second film layer portion 108a2 of the first sub-film layer 108a are formed by deposition of target particles from different regions of the target 202, respectively. For example, as shown in fig. 12 and 13, a first film layer portion 108a1 of the first sub-film layer 108a proximate to the first side 61 may be formed by deposition of target particles from an edge of the target 202 (e.g., an edge portion of the second portion 22 of the target 202 distal from the first portion 21); the sputtering angle α of the target particles may be about 20 ° to 50 °, for example about 34 °. In this context, the sputtering angle refers to the angle between the direction of incidence of target particles on the substrate surface and the direction of extension (e.g. horizontal) of the main surface of the substrate facing the target.

For example, as shown in fig. 12 and 14, the second film portion 108a2 of the second sub-film 108b may be formed by deposition of target particles from a central region of the target 202, and the sputtering angle of the target particles may be greater than the sputtering angle α in fig. 13, for example, may be in the range of about 65 ° to 90 °. The central region of the target 202 may be a portion thereof in the horizontal direction near the center of the substrate, for example, including the first portion 21 of each sub-target 202 a. For example, one or more vias 107 are located at or near the center of the substrate 106 and overlap with the edge of the first portion 21 of the sub-target 202a that is distal from the second portion 22 or the gap between the sub-targets 202a in a direction perpendicular to the major surface of the substrate, the second film portion 108a2 of the first sub-film 108a located in such vias 107 may be formed by deposition of target particles from the edge of the first portion 21 of the sub-target 202a that is distal from the second portion 22, and the sputtering angle β1 of the target particles is, for example, in the range of about 60 ° to 89 °, for example, about 65 °. The second film layer portion 108a2 of the first sub-film layer 108a in the portion of the through holes 107 located on the side away from the center of the substrate may be formed by deposition of target particles from the portion of the first portion 21 of the sub-target 202a away from the edge thereof, and the sputtering angle β2 of the target particles may be larger than the sputtering angle β1 and, for example, in the range of about 65 ° to 90 °.

In the embodiment of the disclosure, the distance T between the target and the substrate is set to be larger, so that the sputtering angle range of the target particles is larger, and the target particles in at least part of the area of the target can be incident into the through hole of the substrate at a larger sputtering angle, thereby improving the capability of the sputtering process for coating the side wall of the deep hole. On the other hand, the transverse dimension of the target is set to be larger than the dimension of the substrate, so that the sputtering angle range of the target is also improved, and the coating capability of the side wall of the deep hole is further improved. In addition, the targets are arranged to comprise a plurality of mutually spaced sub-targets, so that the sputtering effect of the oversized targets can be achieved by using a plurality of sub-targets with smaller sizes, and meanwhile, the cost can be saved and the waste of materials can be avoided.

Referring to fig. 15, in some embodiments, after forming the first sub-film layer 108a from the first side 61 of the substrate 106 by a sputtering process, the substrate 106 is flipped upside down and a sputtering process is performed from the second side 62 of the substrate 106 to form the second sub-film layer 108b on the substrate 106; for example, the second sub-film layer 108b extends from the target facing surface of the second side 62 of the substrate 106 into the through hole 107 and meets the first sub-film layer 108 a. The second sub-film layer 108b covers the sidewalls of the second via portion 72 of the via 107 proximate the second side 62. For example, the second sub-film layer 108b includes a third film layer portion 108b1 and a fourth film layer portion 108b2 located in the through hole 107; the third film portion 108b1 covers a portion of the sidewall of the through hole 107 near the second side 62, and the fourth film portion 108b2 is located on a side of the third film portion 108b1 away from the second side 62 and may cover a central region or a portion of the sidewall near the central region of the through hole 107.

The second sub-film layer 108b is connected to the first sub-film layer 108a, thereby forming a film layer 108 covering the entire through hole 107. For example, the film layer 108 may extend continuously from the first side 61 to the second side 62 of the substrate 106. For example, the fourth film portion 108b2 of the second sub-film layer 108b and the second film portion 108a2 of the first sub-film layer 108a are connected to each other such that the formed film layer 108 is continuous. There may or may not be a distinct interface at the junction of the first sub-film layer 108a and the second sub-film layer 108b. In some embodiments, the first film portion 108a1 of the first sub-film layer 108a and the third film portion 108b1 of the second sub-film layer 108b may be referred to as first and second top portions of the film layer 108 proximate the first and second sides 61, 62, respectively, and the second film portion 108a2 of the first sub-film layer 108a and the fourth film portion 108b2 of the second sub-film layer 108b may be referred to as first and second middle portions of the film layer 108 in the through-holes, respectively.

The second sub-film layer 108b is formed by a method similar to that of the first sub-film layer 108a, for example, after the first sub-film layer 108a is formed by a sputtering process, the substrate 106 is turned upside down and then placed on the stage 100, i.e., such that the first side 61 of the substrate 106 faces the stage 100 and the second side 62 faces the target 202. Next, a sputtering process is performed to form the second sub-film layer 108b. The sputtering process for forming the second sub-film layer 108b is substantially the same as the sputtering process for forming the first sub-film layer 108a described above with reference to fig. 13 and 14, and will not be repeated here.

In some embodiments, the through hole portions filled in the first and second sub-film layers 108a and 108b may respectively occupy about 1/2 of the entire depth of the through hole 107, and the sputtering distances between the target and the substrate in the two sputtering processes may be substantially the same, but the disclosure is not limited thereto. In other embodiments, the portion of the through hole filled in one of the first sub-film layer 108a and the second sub-film layer 108b may occupy more than 1/2 of the entire depth of the through hole 107, and the portion of the through hole filled in the other of the first sub-film layer 108a and the second sub-film layer 108b may occupy less than 1/2 of the entire depth of the through hole 107; in this embodiment, the sputtering distances between the target and the substrate in the two sputtering processes may be different from each other.

In the embodiments of the present disclosure, the setting of each parameter (for example, the size and the pitch of the sub-targets, the sputtering distance, etc.) of the sputtering apparatus and the sputtering process is confirmed according to the relevant sizes of the substrate and the through hole, and in practical applications, the numerical ranges of each parameter described above may remain 15% to 30% of the width, that is, may float 15% to 30% above and below the described numerical range, in consideration of the process width, and may also achieve the same or similar technical effects as those of the embodiments of the present disclosure.

FIG. 16 illustrates scanning electron microscope pictures of a film layer formed by via sidewalls at some different locations of a first region of a substrate, in accordance with some embodiments of the present disclosure; FIG. 17 illustrates scanning electron microscope pictures of film layers formed by via sidewalls at other different locations of a first region of a substrate in accordance with some embodiments of the present disclosure; FIG. 18 illustrates scanning electron microscope pictures of a film layer formed by via sidewalls at some different locations of a second region of a substrate, in accordance with some embodiments of the present disclosure; fig. 19 illustrates scanning electron microscope pictures of film layers formed at via sidewalls at other different locations of the second region of the substrate, in accordance with some embodiments of the present disclosure.

Fig. 16 and 17 show plating cases of a plurality of positions L1 to L8 and other positions R1 to R8 at different depths, respectively, in the through hole in the first region C near the center of the substrate 106; fig. 18 and 19 show plating cases of a plurality of positions L1 to L8 and other positions R1 to R8 at different depths in a through hole in a second region E near the edge of the substrate 106, respectively, wherein the depth of the through hole is about 400 μm.

As shown in fig. 16 to 19, the sputtering process using the sputtering apparatus of the present disclosure can effectively plate films at different depth positions of the through hole in different regions of the substrate, so that the formed film layer can entirely cover the sidewall of the entire through hole.

In the above embodiments, the method of plating a film in the through hole of the substrate is described by taking double-sided sputtering as an example, but the disclosure is not limited thereto. For some through holes with smaller hole depths (for example, through holes with a depth less than 320 μm), the coating of the entire through hole can be completed by sputtering from only one side of the substrate, and the through hole can also pass through a portion of the substrate without passing through the entire substrate. Further, performing one or more other semiconductor processes to form the desired semiconductor device may be included after or before forming the film layer 108, and the disclosure is not limited to such other semiconductor processes and types of semiconductor devices.

In the sputtering device of the embodiment of the disclosure, the sputtering area of the target is set to extend beyond the edge of the substrate mounting area in the horizontal direction and/or the sputtering distance between the substrate and the target sputtering area is set to be larger, so that the coverage of target particles in the sputtering process is increased, the sputtering angle range of the target particles is enlarged, the sputtering angle of the target particles in a partial area is improved, the coating capability of the sputtering process on the side wall of the deep hole is further improved, and the coating of the side wall of the deep hole is realized. In some embodiments, the target sputtering zone is configured to include a plurality of spaced-apart sub-target sputtering zones, the sputtering effect (e.g., a wide range of sputtering angles, etc.) of an oversized target can be achieved with a plurality of small targets, and costs can be saved; for example, the susceptor is rotatably provided so that the substrate rotates with the rotation of the susceptor during the sputtering process, so that the through holes of different regions of the substrate can be sputter coated. In addition, a double-sided sputtering process may be used, further increasing the fillable depth of the sputtering process for the via. For example, in some embodiments, plating of via sidewalls with a maximum depth of 300 μm or more, such as about 312 μm or 400 μm or more, can be achieved in a single sputtering process, for example, using the sputtering apparatus of the present disclosure, and plating of via sidewalls with a maximum depth of 600 μm or 800 μm or more can be achieved using double-sided sputtering.

The following points need to be described:

(1) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are referred to, and other structures may refer to the general design.

(2) Features of the same and different embodiments of the disclosure may be combined with each other without conflict.

The foregoing is merely a specific embodiment of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the disclosure, and it should be covered in the protection scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. A sputtering apparatus comprising at least one sputtering chamber, and each sputtering chamber comprising:

a stage configured to carry a substrate to be coated and rotatable about a rotation axis in a first direction perpendicular to a main surface of the stage configured to carry the substrate, wherein the stage includes a substrate mounting region configured to mount the substrate;

a target structure disposed opposite to the carrier in the first direction and including a target sputtering region, the target sputtering region being a region configured to provide target particles to the substrate located on the carrier in a sputtering process,

Wherein the target sputtering zone overlaps the substrate mounting zone in the first direction and extends beyond an edge of the substrate mounting zone in a second direction parallel to the major surface of the carrier table,

the target sputtering areas comprise a plurality of sub-target sputtering areas, the sub-target sputtering areas are arranged along a virtual outline and all have edges which are coincident with the virtual outline, the orthographic projection of the center of the virtual outline on the main surface of the bearing table is coincident with the center of the substrate mounting area of the bearing table, the rotating shaft is aligned with the center of the virtual outline in the first direction, the area of each sub-target sputtering area is smaller than or equal to the area of the substrate mounting area, and the area enclosed by the virtual outline of the sub-target sputtering areas is larger than the area of the substrate mounting area.

2. The sputtering apparatus of claim 1 wherein at least a portion of gaps between the plurality of sub-target sputtering regions overlap the substrate mounting region in the first direction.

3. The sputtering apparatus of claim 1 wherein one or more of the plurality of sub-target sputtering regions each comprises a first portion and a second portion, the first portion overlapping the substrate mounting region in the first direction and the second portion extending beyond the edge of the substrate mounting region in the second direction.

4. The sputtering apparatus of claim 3 wherein the first portions of the plurality of sub-target sputtering regions are offset from a center of the substrate mounting region in the second direction.

5. The sputtering apparatus according to any one of claims 1 to 4, wherein orthographic projections of two of the plurality of sub-target sputtering regions on a plane on which the main surface of the stage lies are a first orthographic projection and a second orthographic projection, respectively, which are symmetrically disposed about a center line extending through a center of the substrate mounting region and parallel to the main surface.

6. The sputtering apparatus according to any one of claims 1 to 4, wherein a planar shape of the virtual outline is the same as a planar shape of the substrate mounting region.

7. The sputtering apparatus of claim 1 wherein the sum of the areas of the plurality of sub-target sputtering regions is greater than the area of the substrate mounting region.

8. The sputtering apparatus of claim 1 wherein the substrate mounting region and the plurality of sub-target sputtering regions each have a circular planar shape, the substrate mounting region has a diameter in the range of 100 mm to 150 mm, each sub-target sputtering region has a diameter in the range of 100 mm to 150 mm, and the spacing between adjacent ones of the plurality of sub-target sputtering regions is in the range of 90 mm to 150 mm.

9. The sputtering apparatus of claim 1 wherein the carrier comprises an electrode and a tray, the tray being located on the electrode and configured to carry the substrate, the electrode and the tray overlapping in the first direction and the tray extending beyond an edge of the electrode in the second direction.

10. A method of forming a semiconductor structure using the sputtering apparatus of any one of claims 1-9, comprising:

providing a substrate to be coated, wherein the substrate is provided with a first side and a second side which are opposite to each other, and a through hole penetrating the substrate from the first side to the second side;

the substrate is placed on a carrying table, and a film layer is formed in the through hole of the substrate through a sputtering process by using the sputtering device.

11. The method of claim 10, wherein the minimum width of the through hole in a horizontal direction parallel to the major surface of the carrier is 20 microns or more, and wherein the ratio of the sputtering distance of the target sputtering zone of the sputtering apparatus to the substrate in the first direction to the depth of the through hole in the first direction is in the range of 100:1 to 1000:1.

12. The method of claim 11, wherein the sputtering distance of the target sputtering zone from the substrate in the first direction ranges from 60 millimeters to 180 millimeters.

13. The method of claim 10, wherein the susceptor is rotated about a rotational axis such that the substrate rotates as the susceptor rotates while the sputtering process is performed.

14. The method of claim 10, wherein placing the substrate on the carrier table, forming a film layer in the through-hole of the substrate by a sputtering process using the sputtering apparatus comprises:

placing the substrate on the bearing table, enabling the first side of the substrate to face a target sputtering area of the sputtering device, and performing a first sputtering process to form a first sub-film layer on a part of the side wall, close to the first side, of the through hole; and

the substrate is turned over so that the second side of the substrate faces the target sputtering zone, and then a second sputtering process is performed to form a second sub-film layer on a portion of the sidewall of the through hole near the second side, the second sub-film layer and the first sub-film layer being connected to each other to form the film layer, the film layer continuously extending from the first side of the substrate to the second side of the substrate.

15. The method of any of claims 10-14, wherein the film comprises a first film portion and a second film portion, the first film portion being proximate the first side of the substrate and the second film portion being located on a side of the first film portion remote from the first side;

the first film layer portion is formed by deposition of first target particles of a target sputtering zone of the sputtering device, and the second film layer portion is formed by deposition of second target particles of the target sputtering zone; the first target particles are from a portion of the target sputtering zone extending beyond an edge of the substrate in a second direction, and the second target particles are from a portion of the target sputtering zone overlapping the substrate in the first direction.

16. The method of claim 15, wherein a first included angle between a sputtering direction of the first target particles and a horizontal direction parallel to a major surface of the substrate is less than a second included angle between a sputtering direction of the second target particles and the horizontal direction.

17. The method of claim 16, wherein the second included angle ranges from 65 ° to 90 °.

18. The method of any one of claims 10-14, wherein the depth of the through-holes is above 300 microns.