CN116455337A - Amplifier Systems and Power Converters - Google Patents

Abstract

The present invention provides an amplifier system including an audio amplifier and a power converter. An audio amplifier is powered by at least a first supply voltage and a second supply voltage, the audio amplifier is configured to receive an audio signal to generate an output signal. The power converter includes only one inductor and is configured to generate a first power supply voltage and a second power supply voltage according to an input voltage. The invention can reduce the external size and manufacturing cost of the power converter.

Description

Amplifier Systems and Power Converters

technical field

Embodiments of the present disclosure relate generally to amplification (eg, audio amplification) techniques, and more particularly, to an amplifier system and power converter.

Background technique

In a conventional audio amplifier, an audio amplifier requires two or more supply voltages to process a digital input audio signal to generate an analog output audio signal. In order to generate two or more supply voltages, power converters are usually designed with two or more inductors, which increases the form factor and manufacturing cost.

Contents of the invention

It is therefore an object of the present invention to provide an amplifier system and an associated power converter, wherein the power converter can use only one inductor to generate two or three supply voltages for the amplifier, thus having a smaller dimensions and manufacturing costs.

According to an embodiment of the present invention, an amplifier system including an amplifier and a power converter is disclosed. An amplifier powered by at least a first supply voltage and a second supply voltage is configured to receive an input signal (eg, an audio signal) to generate an output signal. The power converter includes only one inductor and is configured to generate a first power supply voltage and a second power supply voltage according to an input voltage.

In some embodiments, the first power supply voltage and the second power supply voltage are variable power supply voltages according to the input signal or a derivative signal of the input signal.

In some embodiments, the power converter includes: an inductor, a first end of the inductor is selectively coupled to the input voltage or the first supply voltage, and a second end of the inductor is selected is electrically coupled to the second power supply voltage.

In some embodiments, during a first period, the input voltage is input to the inductor, and the inductor current increases; during a second period after the first period, the input voltage and the inductor are disconnected and the second supply voltage is coupled to the first supply voltage through the inductor, the inductor current decreases; and, in a third period after the second period, the input voltage, the first Both the supply voltage and the second supply voltage are disconnected from the inductor.

In some embodiments, the power converter further includes: a first switch for selectively connecting the input voltage to the first end of the inductor; a second switch for selectively connecting the first end of the inductor The two ends are selectively connected to ground voltage; the third switch is used to selectively connect the second end of the inductor to the second power supply voltage; the fourth switch is used to connect the first end of the inductor to the second power supply voltage; terminal is selectively connected to the first power supply voltage; and a fifth switch is used for selectively connecting the first terminal of the inductor to the ground voltage.

In some embodiments, during the first period, the first switch and the second switch are turned on, the third switch, the fourth switch and the fifth switch are turned off, and the input voltage is input to the inductor, and the inductor current increases; during the second period after the first period, the third switch and the fourth switch are on, the first switch, the second switch and the The fifth switch is turned off, the second power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases; and, in a third period after the second period, the second switch and the fifth switch is on, the first switch, the third switch and the fourth switch are off.

In some embodiments, the second switch includes a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and the width* of the channel of the large switch is greater than the width* of the channel of the small switch long, the large switch is configured to selectively connect the second end of the inductor to the ground voltage, and the small switch is configured to selectively connect the second end of the inductor to the ground voltage; And, in the third time period after the second time period, only the small switch is turned on and the big switch is turned off among the second switches.

In some embodiments, the fifth switch includes a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and the channel width* of the large switch is greater than the channel width* of the small switch long, the large switch is configured to selectively connect the first end of the inductor to the ground voltage, and the small switch is configured to selectively connect the first end of the inductor to the ground voltage; And, in the third time period after the second time period, only the small switch is turned on and the big switch is turned off among the fifth switches.

In some embodiments, the amplifier is powered by the first power supply voltage, the second power supply voltage and the negative power supply voltage, and the power converter is configured to generate the first power supply voltage, the second power supply voltage and the negative power supply voltage according to the input voltage The negative supply voltage, wherein the first supply voltage and the second supply voltage are variable supply voltages according to the input signal or a derivative of the input signal, is expected to have a fixed voltage level.

In some embodiments, the power converter includes: an inductor having a first end and a second end;

a first switch for selectively connecting the input voltage to the first end of the inductor; a second switch for selectively connecting the second end of the inductor to ground voltage; a third switch , for selectively connecting the first end of the inductor to the first power supply voltage; a fourth switch, for selectively connecting the second end of the inductor to the second power supply voltage; Five switches are used for selectively connecting the first end of the inductor to the negative supply voltage; and a sixth switch is used for selectively connecting the first end of the inductor to the ground voltage.

In some embodiments, during the first period, the first switch and the second switch are turned on, the third switch, the fourth switch, the fifth switch and the sixth switch are turned off, The input voltage is input to the inductor, and the inductor current increases; in a second period after the first period, the third switch and the fourth switch are turned on, the first switch, the The second switch, the fifth switch and the sixth switch are turned off, the second power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases; during the second period In the following third period, the second switch and the sixth switch are turned on, and the first switch, the third switch, the fourth switch and the fifth switch are turned off.

In some embodiments, during the first period, the first switch and the second switch are turned on, the third switch, the fourth switch, the fifth switch and the sixth switch are turned off, The input voltage is input to the inductor, and the inductor current increases; in a second period after the first period, the third switch and the fifth switch are turned on, the first switch, the The second switch, the fourth switch and the sixth switch are turned off, the third supply voltage is coupled to the first supply voltage through the inductor, and the inductor current decreases; after the second period In the third period of time, the second switch and the sixth switch are turned on, and the first switch, the third switch, the fourth switch and the fifth switch are turned off.

In some embodiments, the on-resistance of the large switch is less than the on-resistance of the small switch.

In some embodiments, the amplifier is an audio amplifier, and the input signal is an audio signal input to the audio amplifier.

According to an embodiment of the present invention, a power converter is also disclosed. The power converter is configured to receive an input voltage to generate a first power supply voltage, a second power supply voltage and a third power supply voltage, the power converter includes an inductor, a first switch, a second switch, a third switch, a fourth switch, a The fifth switch and the sixth switch. The inductor has a first end and a second end. The first switch is configured to selectively connect the input voltage to the first terminal of the inductor. The second switch is configured to selectively connect the second end of the inductor to the ground voltage. A third switch is configured to selectively connect the second end of the inductor to the first supply voltage. The fourth switch is configured to selectively connect the first end of the inductor to the second supply voltage; the fifth switch is configured to selectively connect the first end of the inductor to the third supply voltage; and, the sixth A switch is used for selectively connecting the first end of the inductor to the ground voltage.

In some embodiments, during the first period, the first switch and the second switch are turned on, the third switch, the fourth switch, the fifth switch and the sixth switch are turned off, The input voltage is input to the inductor, and the inductor current increases; in a second period after the first period, the third switch and the fourth switch are turned on, the first switch, the The second switch, the fifth switch and the sixth switch are turned off, the second power supply voltage is coupled to the first power supply voltage through the inductor, and the inductor current decreases; during the second period In the following third period, the second switch and the sixth switch are turned on, and the first switch, the third switch, the fourth switch and the fifth switch are turned off.

In some embodiments, the sixth switch includes a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and the channel width* of the large switch is greater than the channel width* of the small switch long, the large switch is configured to selectively connect the first end of the inductor to the ground voltage, and the small switch is configured to selectively connect the first end of the inductor to the ground voltage; In the third time period after the second time period, only the small switch is turned on among the sixth switches, and the big switch is turned off.

In some embodiments, the second switch includes a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and the width* of the channel of the large switch is greater than the width* of the channel of the small switch long, the large switch is configured to selectively connect the second end of the inductor to the ground voltage, and the small switch is configured to selectively connect the second end of the inductor to the ground voltage; In a third period following the second period, only the small switch is on and the large switch is off among the second switches.

In some embodiments, the first power supply voltage, the second power supply voltage and the third power supply voltage are used to power the amplifier, and the third power supply voltage is a negative power supply voltage, wherein the first power supply voltage and the second power supply voltage The supply voltage is a variable supply voltage depending on the input signal of the amplifier or a derivative of the input signal, the negative supply voltage being expected to have a fixed voltage level.

In some embodiments, the on-resistance of the large switch is less than the on-resistance of the small switch.

These and other objects of the present invention will become apparent to those skilled in the art after reading the following detailed description of the preferred embodiment shown in the accompanying drawings. A detailed description will be given in the following embodiments with reference to the drawings.

Description of drawings

A more complete understanding of the invention may be obtained by reading the ensuing detailed description and by reference to the examples given in the accompanying drawings, in which:

Fig. 1 shows a schematic diagram of an amplifier system according to an embodiment of the present invention.

Figure 2 shows the audio amplifier supply voltages for Class G amplifiers and Class H amplifiers.

Fig. 3 shows a schematic diagram of a power converter according to an embodiment of the present invention.

Fig. 4 shows a control method of a power converter according to an embodiment of the present invention.

FIG. 5 illustrates inductor current in a power converter according to an embodiment of the invention.

Fig. 6 shows a control method of a power converter according to an embodiment of the present invention.

FIG. 7 shows a schematic diagram of another power converter according to an embodiment of the present invention.

In the following detailed description, for the purpose of illustration, many specific details are set forth so that those skilled in the art can more thoroughly understand the embodiments of the present invention. It should be apparent, however, that one or more embodiments may be practiced without these specific details, that different embodiments may be combined as desired, and that the embodiments should not be limited to those illustrated in the figures.

Detailed ways

The following description is a preferred embodiment of the present invention, which is only used to illustrate the technical features of the present invention, but not to limit the scope of the present invention. While certain terms are used throughout the specification and claims to refer to specific elements, those skilled in the art should understand that manufacturers may use different names for the same element. Therefore, the specification and claims do not use the difference in name as the way to distinguish components, but use the difference in function of the components as the basis for the difference. The terms "element", "system" and "apparatus" used in the present invention may be a computer-related entity, where the computer may be hardware, software, or a combination of hardware and software. The terms "comprising" and "including" mentioned in the following description and claims are open terms, so they should be interpreted as "including, but not limited to...". Also, the term "coupled" means an indirect or direct electrical connection. Therefore, if it is described that a device is coupled to another device, it means that the device may be directly electrically connected to the other device, or indirectly electrically connected to the other device through other devices or connection means.

Wherein, unless otherwise indicated, corresponding numerals and symbols in different figures of each figure generally refer to corresponding parts. The drawings are drawn to clearly illustrate relevant parts of the embodiments and are not necessarily drawn to scale.

The term "basically" or "approximately" used herein means that within an acceptable range, those skilled in the art can solve the technical problem to be solved and basically achieve the technical effect to be achieved. For example, "approximately equal to" refers to a method acceptable to technicians with a certain error from "exactly equal to" without affecting the correctness of the result.

FIG. 1 is a schematic diagram of an amplifier system (amplifier system) 100 according to an embodiment of the present invention. The embodiment shown in Fig. 1 is described by taking the audio amplifier system 100 as an example, but the embodiment of the present invention is not limited to the audio system, any amplifier system that needs to be applied to two or three power supply voltages can be provided by the embodiment of the present invention technology, therefore, the present invention should not be limited to audio applications/systems. Therefore, in some variant embodiments, the description of the audio signal, audio amplifier 110 shown in FIG. 1 may be replaced by the description of the input signal, amplifier 110 accordingly. As shown in FIG. 1 , the amplifier system 100 includes an audio amplifier (audio amplifier) 110 and a power converter (power converter) 120, wherein the audio amplifier 110 includes a low dropout regulator (low dropout regulator, LDO) 112, digital to analog A converter (digital-to-analog converter, DAC) 114 , a voltage regulator (regulator) 116 and a power amplifier (power amplifier) 118 . The LDO 112 and the voltage regulator 116 are configured to provide a supply voltage (supply voltage, which can also be described as "supply voltage") to the DAC 114 for the DAC 114 to perform digital-to-analog conversion operations on the audio signal to generate an analog signal, and the power amplifier 118 amplifies the analog signal and generates an output signal Vout to drive the speaker (resistance RL is regarded as a load or equivalent resistance of the speaker), that is, the analog signal generated by the DAC 114, the output signal Vout generated by the power amplifier 118 (for example, The analog output signal) is related to the input audio signal (for example, digital audio signal). Understandably, the analog signal generated by the DAC 114 and the output signal Vout generated by the power amplifier 118 can be regarded as derivative signals of the input audio signal. The desired levels of supply voltages PVDD, PVSS and the input signal and/or derivatives of the input signal to the amplifier 110 (e.g., in the embodiment shown in FIG. The output signal Vout is output, understandably, these three signals are all related to the signal processed by the amplifier 110 ). In this embodiment, amplifier system 100 is powered by four different supply voltages (voltages VI, VN, PVDD, PVSS as shown in FIG. 1 ), where input voltage VI is provided to LDO 112 and negative supply voltage ( negative supply voltage) VN is supplied to the voltage regulator 116 , and the supply voltages PVDD and PVSS are supplied to the power amplifier 118 . In addition, the power converter 120 is configured to receive an input voltage VI to generate other power voltages PVDD, PVSS and VN.

In one embodiment, the negative power supply voltage VN has a fixed (fixed) voltage level (voltage level, which can also be described as "voltage level" or "level" or "level"), and the power supply voltage PVDD and PVSS is a signal-dependent supply voltage (signal-dependent supply voltage), for example, PVDD and PVSS will change according to the audio signal. That is to say, in the embodiment of the present invention, the power supply voltages PVDD and PVSS are variable power supply voltages according to the input signal of the amplifier 110 or a derivative signal of the input signal, especially, in an exemplary embodiment, PVDD is variable Positive supply voltage, PVSS is a variable negative supply voltage, VN is expected to be a fixed negative supply voltage. For example, referring to FIG. 2, in the example of FIG. 2, the power amplifier 118 is a class-G (class-G) amplifier or a class-H (class-H) amplifier (but the present invention is not limited to this example), which supports multiple Power rails of different voltage levels supply power, and the power voltage PVDD/PVSS level of at least one power rail is controlled according to information of the audio signal. For example, in some embodiments, the supply voltage VN is determined to have a fixed desired voltage level, additionally, based on the input signal (eg, an input audio signal) of the amplifier 110 and a derivative signal of the input signal (eg, derived from the input signal Any one of the generated intermediate signal, the output signal Vout) generated by the amplifier 110 determines the desired level of the power supply voltage PVDD, PVSS. For ease of understanding and description, the output signal Vout (that is, the derivative signal of the input signal of the amplifier 110) is taken as an example in FIG. 2 for illustration. As shown in FIG. . For example, taking a Class G amplifier as an example, the power supply voltages PVDD and PVSS can respectively have two desired voltage levels (also described as "voltage levels"). More specifically, the absolute difference between the positive power supply voltage PVDD and the negative power supply voltage PVSS values are equal, but the present invention is not limited thereto. Further, in the example curve of the class G amplifier in FIG. 2, when the absolute value of the signal Vout is within the preset value, it is expected that PVDD is the first voltage level; when the absolute value of the signal Vout is greater than the preset value, it is expected that PVDD has a second voltage level. For another example, in the exemplary curve of the class H amplifier in FIG. 2 , when the absolute value of the signal Vout is within the preset value, it is expected that PVDD is the first voltage level; when the absolute value of the signal Vout is greater than the preset value, it is expected that The voltage level of PVDD tracks the waveform of signal Vout (eg, slightly larger than the voltage value of signal Vout). It can be seen from FIG. 2 that the expected levels of the power supply voltages PVDD and PVSS determined according to the signal processed by the amplifier 110 (for example, the input signal or a derivative signal of the input signal) are different. It should be noted that the present invention does not impose any limitation on how to set the desired levels of the power supply voltages PVDD, PVSS, VN, but focuses on how to control the power supply voltages PVDD, PVSS, VN to maintain the corresponding desired levels.

FIG. 3 is a schematic diagram of a power converter 120 according to an embodiment of the invention. As shown in FIG. 3 , the power converter 120 includes an input capacitor (input capacitor) C1, an inductor (inductor) L, three output capacitors C2-C4, and a plurality of switches SW1-SW6. The input capacitor C1 is coupled between the node N1 and a ground voltage, the output capacitor C2 is coupled between the node N4 and the ground voltage, the output capacitor C3 is coupled between the node N5 and the ground voltage, and the output capacitor C4 is coupled between the node N6 and the ground voltage. The switch SW1 is coupled between the node N1 and the node N2, and the switch SW1 is configured to selectively connect the input voltage (ie, the supply voltage VI) to the first terminal of the inductor L. The switch SW6 is coupled between the node N2 and the ground voltage, and the switch SW6 is configured to selectively connect the first end of the inductor L to the ground voltage. The switch SW3 is coupled between the node N3 and the node N4, and the switch SW3 is configured to selectively connect the second end of the inductor L to the node N4 to adjust the voltage level of the power voltage PVDD. The switch SW2 is coupled between the node N3 and the ground voltage, and the switch SW2 is configured to selectively connect the second end of the inductor L to the ground voltage. The switch SW4 is coupled between the node N2 and the node N5, and the switch SW4 is configured to selectively connect the first end of the inductor L to the node N5 to adjust the voltage level of the power supply voltage PVSS. The switch SW5 is coupled between the node N2 and the node N6, and the switch SW5 is configured to selectively connect the first end of the inductor L to the node N6 to stabilize the voltage level of the negative supply voltage VN.

In the power converter 120 shown in FIG. 3, since only one inductor L is used (only one inductorL is used) to generate the power supply voltages PVDD, PVSS and the negative power supply voltage VN, the external size of the power converter 120 can be reduced and manufacturing costs. In addition, the control of the switches SW1-SW6 is performed based on the desired levels of the power supply voltages PVDD, PVSS, VN and the actual voltage levels of the power supply voltages PVDD, PVSS, VN, and the inductor L is controlled by controlling the switches SW1-SW6. current to generate power supply voltages PVDD, PVSS, VN with suitable voltage levels (eg, ideally will be the same as the desired voltage level), so that the power converter 120 will have higher efficiency. Details are described below.

For example, when the load RL shown in FIG. 1 is a full-bridge load, there is a current path (current path) via the load RL between the power supply voltage PVDD and PVSS, so that the current path of the positive power supply voltage PVDD The level (level, which can also be described as "level") will drop (drop), and the level of the negative power supply voltage PVSS will rise (rise); in addition, there is a voltage between the negative power supply voltage VN and the ground voltage via the regulator and The current path of the DAC, thus, the voltage level of the negative supply voltage VN will rise. That is to say, as time goes by, the power supply voltages PVDD, PVSS, VN will gradually deviate from the expected voltage level (also can be described as "expected level"). In order to make the power supply voltages PVDD and PVSS have desired voltage levels with higher efficiency, and to make the negative power supply voltage VN be regulated at its desired level, FIG. 4 shows switches SW1-SW6 according to an embodiment of the present invention. Control Method. Referring to FIGS. 4 and 5 together, for example, in an example embodiment, when at least one of the supply voltages PVDD, PVSS, VN is below its desired level (eg, when the supply voltage PVDD is below a desired level), The power converter 120 enters the control of the first period (for example, the duration of the first period may be set by a timer). In the first period (period, which can also be described as "phase"), switches SW1 and SW2 are enabled (enabled, which can also be described as "on" or "conduction"), and switches SW3-SW6 are disabled (disabled , which can also be described as "off" or "off"). At this time, current flows from the node N1 to the ground voltage via the switch SW1 , the node N2 , the inductor L, the node N3 and the switch SW2 , and the inductor current _IL increases (ie rises). After the first period, when the positive power supply voltage PVDD is lower than the desired level of PVDD and the negative power supply voltage PVSS is higher than the desired level of PVSS, the control of the second period is entered. In the second period after the first period, the switches SW4 and SW3 are enabled, and the switches SW1 , SW2 , SW5 and SW6 are disabled. At this time, the current flows from the node N5 to the node N4 via the switch SW4 , the node N2 , the inductor L, the node N3 , and the switch SW3 , and the inductor current _IL decreases (ie falls). In the second period, since the positive supply voltage PVDD is coupled to the negative supply voltage PVSS through the inductor L, the inductor current _IL will decrease due to the voltage difference across the inductor L. For example, the slope of the inductor current drop is equal to

Referring to FIG. 5, in the first period and the second period, the conduction power loss of the switch can be expressed by the following formula:

Among them, “P _cond ” is the conduction power loss, “I _pk ” is the peak value (peak) of the inductor current _IL , “T _ON ” refers to the time for the inductor current _IL to rise (rise), and “T _OFF ” refers to For the time when the inductor current I _L drops, " _TSW " is the switching period, eg, the sum of the times represented by the first period, the second period, and the third period, and "R _on " is On-resistance of each switch (assuming the same on-resistance for each switch). Since the falling slope of the inductor current in this embodiment is lower than that of the conventional control method (for example, it only turns on the switches SW6 and SW3 in the second period to increase the level of the power supply voltage PVDD, or only turns on the switches SW4 and SW3 in the second period. SW2 to make the power supply voltage PVSS level drop) has a large falling slope, so the value of the parameter “T _OFF ” in the formula (1) will have a smaller (smaller) value than the traditional control method, so that the power converter 120 The switches in have lower conduction power losses.

In addition, during the second period, the power voltage PVDD rises and the power voltage PVSS falls, so the efficiency of the power converter 120 can be improved.

When the inductor current _IL drops to zero, the power converter 120 switches from the second period to the third period. In a third period following the second period, switches SW6 and SW2 are enabled, while switches SW1 , SW3-SW5 are disabled. At this time, both ends of the inductor L are connected to the ground voltage, so that the inductor current _IL remains zero. After the third period, the switches SW1 - SW6 can be controlled at the desired and actual voltage levels of the supply voltages PVDD, PVSS and the negative supply voltage VN. For example, the power converter 120 can perform the above operations corresponding to the first period to the third period again. Understandably, in another variant embodiment, when the positive power supply voltage PVDD is lower than the expected level of PVDD and the negative power supply voltage PVSS is higher than the expected level of PVSS, the power converter 120 enters the Control of the first period, the second period and the third period.

In another embodiment, when the level of the power supply voltage PVDD is lower than the expected level of PVDD and the negative power supply voltage VN is higher than the expected level of VN, FIG. 6 shows the control of the switches SW1-SW6 according to an embodiment of the present invention. method. Referring to FIG. 6, when at least one of the power supply voltages PVDD, PVSS, VN is lower than its desired level (for example, when the power supply voltage PVDD is lower than the desired level), the power converter 120 enters the first period (for example, can The duration of the first period of time is set by the timer). In the first period, the switches SW1 and SW2 are enabled/turned on, and the switches SW3 - SW6 are disabled/turned off. At this time, current flows from the node N1 to the ground voltage via the switch SW1, the node N2, the inductor L, the node N3, and the switch SW2, and the inductor current _IL increases. After the first period, when the level of the power supply voltage PVDD is lower than the expected level of PVDD and the negative power supply voltage VN is higher than the expected level of VN, the control of the second period is entered. In a second period after the first period, the switches SW5 and SW3 are enabled/turned on, and the switches SW1 , SW2 , SW4 and SW6 are disabled/turned off. At this time, the current flows from the node N6 to the node N4 via the switch SW5, the node N2, the inductor L, the node N3, the switch SW3, and the inductor current I _L decreases. In the second period, since the positive power supply voltage PVDD is coupled to the negative power supply voltage VN through the inductor L, the inductor current _IL will decrease due to the voltage difference across the inductor L. Referring to the above formula (1), since the slope of the inductor current drop in this embodiment is relatively large, the parameter “T _OFF ” in the formula (1) will have a small value, so that the switch in the power converter 120 Has low conduction power loss.

When the inductor current _IL drops to zero, the power converter 120 switches from the second period to the third period. In a third period following the second period, switches SW6 and SW2 are enabled/on, and switches S1, SW3-SW5 are disabled/off. At this time, both ends of the inductor L are connected to the ground voltage, so that the inductor current _IL becomes zero. After the third period, the switches SW1 - SW6 may be controlled based on the desired and actual voltage levels of the supply voltages PVDD, PVSS and the negative supply voltage VN. For example, the power converter 120 can perform the above operations corresponding to the first period to the third period again. Understandably, in other embodiments, when the positive power supply voltage PVDD is lower than the expected level of PVDD and the negative power supply voltage VN is higher than the expected level of VN, the power converter 120 performs the first step as shown in FIG. 6 . Control of the first period, the second period and the third period.

In another example situation, switch SW4 and switch SW3, alternatively, switches SW5 and SW3 are selected to be turned on, and other switches are turned off. For example, one of the power supply voltages (for example, VN) may be selected to be coupled to PVDD according to the importance or priority of the power supply voltages PVSS and VN. In another example situation, when the negative power supply voltage PVSS is higher than the desired level of PVSS but the power supply voltages PVDD, VN both match their desired levels, the negative power supply voltage PVSS may be lowered by turning on the switches SW4 and SW2 . Correspondingly, when the negative power supply voltage VN is higher than the expected level of VN but the power supply voltages PVDD and PVSS both match their expected levels, the negative power supply voltage VN can be reduced by turning on the switches SW5 and SW2 .

In the above-described embodiments of FIGS. 4 to 6 , by connecting the power supply voltage PVSS to the power supply voltage PVDD or connecting the negative power supply voltage VN to the power supply voltage PVDD in the second period, the power converter 120 can reduce the turn-on power loss and Improve efficiency. However, since the power converter 120 of this embodiment has more switching times, for example, the 6 periods shown in FIG. 4 or FIG. 6 have eleven switching times, therefore, the power converter 120 may have a higher switching time Power loss (switching power loss). In order to solve this problem, each of the switches SW2 and SW6 can be implemented using a transistor, for example, using a P-channel metal oxide semiconductor (P-channel Metal Oxide Semiconductor, PMOS) transistor or an N-channel metal oxide semiconductor (N-channel Metal Oxide Semiconductor) transistor. channel Metal Oxide Semiconductor, NMOS) transistor implementation. Further, each of the switches SW2 and SW6 can be designed to have a large-size switch (also described as a "big switch") and a small-size switch (also described as a "small switch"), wherein the small-size switch The switching power loss is smaller than that of the large-sized switches, and only the small-sized switches among the switches SW2 and SW6 are enabled in the third period to reduce the switching power loss. It should be noted that the large-size switch in the embodiment of the present invention means that the width (W)*length (L) of the channel is larger, and the small-size switch means that the width (W)*length (L) of the channel is smaller For example, the channel width-length product (ie, channel width*length) of a switch with a large size is greater than the product of channel width and length with a switch with a small size. The applicant realizes that: if the width*length of the transistor channel is larger, the gate capacitance Cg of the transistor is larger, thus, the switching power loss when the transistor is used as a switch is larger; otherwise, the width*length of the transistor channel The smaller the , the smaller the switching power loss when the transistor is used as a switch. In one example, the channel length (L) of the large-size switch and the small-size switch are the same, and different channel widths (W) are set to make the size of the switch different, so that the channel width-to-length ratio of the large-size switch ( W/L) is greater than the channel width-to-length ratio (W/L) of the small-sized switch, and in turn, in this example, the on-resistance of the large-sized switch is smaller than that of the small-sized switch, but the large-sized switch and the small-sized switch The on-resistance relationship of the switches is not limited to this example. In particular, please refer to FIG. 7, the switch SW6 shown in FIG. 3 can be implemented using a large switch SW6L and a small switch SW6S, wherein the large switch SW6L is coupled between the node N2 and the ground voltage, and the small switch SW6S is coupled Between node N2 and ground voltage. In this embodiment, the size of the large switch SW6L (that is, the width*length of the channel) is large, and optionally, the resistance when turned on is small; the size of the small switch SW6S (that is, the width*length of the channel) is small, and optionally, High resistance when turned on. Similarly, the switch SW2 shown in FIG. 3 can be implemented using a large switch SW2L and a small switch SW2S, wherein the large switch SW2L is coupled between the node N2 and the ground voltage, and the small switch SW2S is coupled between the node N2 and the ground voltage. between ground voltages. In this embodiment, the large switch SW2L has a large size, and optionally has a small resistance when turned on; the small switch SW2S has a small size, and optionally has a large resistance when turned on.

In the embodiment shown in FIG. 7, when the level of the power supply voltage PVDD is lower than the expected level of PVDD and the power supply voltage PVSS is higher than the expected level of PVSS, during a first period (for example, there may be a predetermined time set by a timer duration), switches SW1 and SW2 are enabled (in switch SW2, at least the large switch SW2L is enabled), and switches SW3-SW6 are disabled. At this time, current flows from the node N1 to the ground voltage via the switch SW1, the node N2, the inductor L, the node N3, and the switch SW2, and the inductor current _IL increases. In a second period after the first period, switches SW4 and SW3 are enabled, and switches SW1 , SW2 , SW5 and SW6 are disabled. At this time, the current flows from the node N5 to the node N4 via the switch SW4, the node N2, the inductor L, the node N3, and the switch SW3, and the inductor current _IL decreases. In the third period after the second period, only the small switches SW6S and SW2S are enabled, while the switches S1, SW3-SW5, large switches SW6L and SW2L are disabled. At this time, both ends of the inductor L are connected to the ground voltage, so that the inductor current _IL becomes zero. After the third period, the switches SW1 - SW6 may be controlled according to the voltage levels of the audio signal, the power supply voltages PVDD, PVSS and the negative power supply voltage VN. For example, the power converter 120 can perform the above operations corresponding to the first period to the third period again.

In another embodiment shown in FIG. 7, when the level of the power supply voltage PVDD is lower than the expected level of PVDD and the negative power supply voltage VN is higher than the expected level of VN, during the first period (for example, there may be a timer During the set predetermined period of time), the switches SW1 and SW2 are enabled (in the switch SW2, at least the large switch SW2L is enabled), and the switches SW3-SW6 are disabled. At this time, current flows from the node N1 to the ground voltage via the switch SW1, the node N2, the inductor L, the node N3, and the switch SW2, and the inductor current _IL increases. In the second period after the first period, the switches SW5 and SW3 are enabled, and the switches SW1 , SW2 , SW4 and SW6 are disabled. At this time, the current flows from the node N6 to the node N4 via the switch SW5, the node N2, the inductor L, the node N3, the switch SW3, and the inductor current I _L decreases. In the third period after the second period, only the small switches SW6S and SW2S are enabled, while the switches S1, SW3-SW5, large switches SW6L and SW2L are disabled. At this time, both ends of the inductor L are connected to the ground voltage, so that the inductor current _IL becomes zero. After the third period, the switches SW1 - SW6 may be controlled according to the desired and actual voltage levels of the supply voltages PVDD, PVSS and the negative supply voltage VN. For example, the power converter 120 can perform the above operations corresponding to the first period to the third period again.

In the above two embodiments, since the inductor current _IL is zero in the above third period, although the on-resistance of the small switches SW6S and SW2S is large, no conduction power loss occurs. In addition, since the switching power loss of the small switches SW6S and SW2S is low, by only enabling the small switches SW6S and SW2S in the third period, the overall switching power loss can be effectively reduced.

In the above embodiments, the power converter 120 is configured to receive the input voltage VI to generate three power voltages PVDD, PVSS and VN. In another embodiment, the switch SW5 and the output capacitor C4 can be removed from the power converter 120 , that is, the power converter 120 is configured to receive the input voltage VI to generate two power voltages PVDD and PVSS. Such alternative designs should also fall within the scope of the present invention. That is to say, although the drawings show a structure in which a single inductor is used to generate three power supply voltages PVDD, PVSS, and VN from an input power supply voltage VI, in a modified embodiment, two power supply voltages may also be generated, It should not be limited to the specific example in the drawing where 3 supply voltages are generated. Thus, in a variant embodiment, the corresponding switches and output capacitors are optional (i.e. can be removed, for example, switch SW5 and output capacitor C4 are removed, thereby generating 2 supply voltages PVDD, PVSS), due to the variant implementation The principles of the examples are similar to those of the above-mentioned embodiments, so the descriptions of these modified embodiments will not be described one by one in the embodiments of the present invention.

In short, in the power converter of the amplifier system of the present invention, only one inductor is used to generate two or three power supply voltages, thus, the manufacturing cost of the power converter can be reduced. In addition, by using the specific switch control method/structure proposed in the embodiments of the present invention, the efficiency of the power converter can be improved, the conduction power loss and the switching power loss can be reduced.

The use of ordinal terms such as "first," "second," "third," etc. in a claim to modify a claim element does not, by itself, indicate any priority of one claim element over another , priority or order, or chronological order in which method actions are performed, but are used only as markers to distinguish one claim element having the same name from another element element having the same name using ordinal numbers.

Although the embodiments of the present invention and their advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made to the present invention without departing from the spirit of the present invention and the scope defined by the claims, such as , new embodiments can be obtained by combining parts of different embodiments. The described embodiments are in all respects for the purpose of illustration only and are not intended to limit the invention. The scope of protection of the present invention should be defined by the appended claims. Those skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention.

While the present invention has been described by way of example and in terms of preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar constructions as will be apparent to those skilled in the art, eg combinations or substitutions of different features in different embodiments. Accordingly, the scope of the appended claims should be given the broadest interpretation to cover all such modifications and similar constructions.

Claims (20)

1. An amplifier system, comprising:

an amplifier powered by at least a first power supply voltage and a second power supply voltage, configured to receive an input signal to generate an output signal; the method comprises the steps of,

a power converter having only one inductor is configured to generate the first power voltage and the second power voltage according to an input voltage.

2. The amplifier system of claim 1, wherein the first supply voltage and the second supply voltage are supply voltages that are variable according to the input signal or a derivative of the input signal.

3. The amplifier system of claim 1, wherein the power converter comprises:

An inductor having a first end selectively coupled to the input voltage or the first supply voltage and a second end selectively coupled to the second supply voltage.

4. The amplifier system of claim 3, wherein the input voltage is input to the inductor and an inductor current increases during a first period of time; in a second period after the first period, the input voltage is disconnected from the inductor and the second supply voltage is coupled to the first supply voltage through the inductor, the inductor current decreasing; and in a third period subsequent to the second period, the input voltage, the first supply voltage, and the second supply voltage are all disconnected from the inductor.

5. The amplifier system of claim 3, wherein the power converter further comprises:

a first switch for selectively connecting the input voltage to the first end of the inductor;

a second switch for selectively connecting the second end of the inductor to ground voltage;

a third switch for selectively connecting the second end of the inductor to the second supply voltage;

A fourth switch for selectively connecting the first end of the inductor to the first supply voltage; the method comprises the steps of,

and a fifth switch for selectively connecting the first end of the inductor to the ground voltage.

6. The amplifier system of claim 5, wherein in a first period, the first switch and the second switch are on, the third switch, the fourth switch, and the fifth switch are off, the input voltage is input to the inductor, and an inductor current increases; in a second period after the first period, the third switch and the fourth switch are on, the first switch, the second switch and the fifth switch are off, the second supply voltage is coupled to the first supply voltage through the inductor, and inductor current decreases; and in a third period subsequent to the second period, the second switch and the fifth switch are on, and the first switch, the third switch and the fourth switch are off.

7. The amplifier system of claim 6, wherein the second switch comprises a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and a width of a channel of the large switch is greater than a width of a channel of the small switch, the large switch configured to selectively connect the second end of the inductor to the ground voltage by 5, the small switch configured to selectively connect the second end of the inductor to the ground voltage; and in the third period after the second period, only the small switch of the second switches is turned on and the large switch is turned off.

8. The amplifier system of claim 6, wherein the fifth switch comprises a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and a width x length 0 of a channel of the large switch is greater than a width x length of a channel of the small switch, the large switch configured to selectively connect the first end of the inductor to the ground voltage, the small switch configured to selectively connect the first end of the inductor to the ground voltage; and in the third period after the second period, only the small switch of the fifth switch is turned on and the large switch is turned off.

9. The amplifier system of claim 1, wherein the amplifier is powered by the first power supply 5 voltage, the second power supply voltage, and a negative power supply voltage, the power converter configured to generate the first power supply voltage, the second power supply voltage, and the negative power supply voltage based on the input voltage, wherein the first power supply voltage and the second power supply voltage are power supply voltages that are variable based on the input signal or a derivative of the input signal, the negative power supply voltage being desired to have a fixed voltage level.

10. The amplifier system of claim 9, wherein the power converter comprises: an inductor 0 having a first end and a second end;

a first switch for selectively connecting the input voltage to the first end of the inductor;

a second switch for selectively connecting the second end of the inductor to ground voltage;

a third switch for selectively connecting the first end of the inductor to the first supply voltage;

a fourth switch for selectively connecting the second end of the inductor to the second supply voltage; 5 a fifth switch for selectively connecting the first end of the inductor to the negative supply voltage; the method comprises the steps of,

and a sixth switch for selectively connecting the first end of the inductor to the ground voltage.

11. The amplifier system of claim 10, wherein in a first period, the first switch and the second switch are on, the third switch, the fourth switch, the fifth switch, and the sixth switch are off, the input voltage is input to the inductor, and an inductor current increases; in a second period after the first period, the third switch and the fourth switch are on, the first switch, the second switch, the fifth switch, and the sixth switch are off, the second supply voltage is coupled to the first supply voltage through the inductor, and the inductor current decreases; in a third period after the second period, the second switch and the sixth switch are on, and the first switch, the third switch, the fourth switch and the fifth switch are off.

12. The amplifier system of claim 10, wherein in a first period, the first switch and the second switch are on, the third switch, the fourth switch, the fifth switch, and the sixth switch are off, the input voltage is input to the inductor, and an inductor current increases; in a second period after the first period, the third switch and the fifth switch are on, the first switch, the second switch, the fourth switch, and the sixth switch are off, a third supply voltage is coupled to the first supply voltage through the inductor, and the inductor current decreases; in a third period after the second period, the second switch and the sixth switch are on, and the first switch, the third switch, the fourth switch and the fifth switch are off.

13. An amplifier system as claimed in claim 7 or 8, wherein the on-resistance of the large switch is smaller than the on-resistance of the small switch.

14. The amplifier system of claim 1, wherein the amplifier is an audio amplifier and the input signal is an audio signal input to the audio amplifier.

15. A power converter configured to receive an input voltage to generate a first power supply voltage, a second power supply voltage, and a third power supply voltage, the power converter comprising:

an inductor having a first end and a second end;

a first switch for selectively connecting the input voltage to the first end of the inductor;

a second switch for selectively connecting the second end of the inductor to ground voltage;

a third switch for selectively connecting the second end of the inductor to the first supply voltage;

a fourth switch for selectively connecting the first end of the inductor to the second supply voltage;

a fifth switch for selectively connecting the first end of the inductor to the third supply voltage; the method comprises the steps of,

and a sixth switch for selectively connecting the first end of the inductor to the ground voltage.

16. The power converter of claim 15 wherein during a first period the first switch and the second switch are on, the third switch, the fourth switch, the fifth switch, and the sixth switch are off, the input voltage is input to the inductor, and an inductor current increases; in a second period after the first period, the third switch and the fourth switch are on, the first switch, the second switch, the fifth switch, and the sixth switch are off, the second supply voltage is coupled to the first supply voltage through the inductor, and the inductor current decreases; in a third period after the second period, the second switch and the sixth switch are on, and the first switch, the third switch, the fourth switch and the fifth switch are off.

17. The power converter of claim 16, wherein the sixth switch comprises a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and a width of a channel of the large switch is greater than a width of a channel of the small switch, the large switch configured to selectively connect the first end of the inductor to the ground voltage, the small switch configured to selectively connect the first end of the inductor to the ground voltage; in a third period after the second period, only the small switch of the sixth switch is on and the large switch is off.

18. The power converter of claim 16, wherein the second switch comprises a large switch and a small switch, wherein the large switch and the small switch are implemented by transistors and a width of a channel of the large switch is greater than a width of a channel of the small switch, the large switch configured to selectively connect the second end of the inductor to the ground voltage, the small switch configured to selectively connect the second end of the inductor to the ground voltage; in a third period after the second period, only the small switch of the second switches is on and the large switch is off.

19. The power converter of claim 15, wherein the first power supply voltage, the second power supply voltage, and the third power supply voltage are used to power an amplifier, the third power supply voltage being a negative power supply voltage, wherein the first power supply voltage and the second power supply voltage are power supply voltages that are variable according to an input signal of the amplifier or a derivative of the input signal, the negative power supply voltages being desired to have a fixed voltage level.

20. A power converter according to claim 17 or 18, wherein the on-resistance of the large switch is less than the on-resistance of the small switch.