CN116455336B - Differential predistortion power amplifier and radio frequency front end - Google Patents
Differential predistortion power amplifier and radio frequency front end Download PDFInfo
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- CN116455336B CN116455336B CN202310730656.8A CN202310730656A CN116455336B CN 116455336 B CN116455336 B CN 116455336B CN 202310730656 A CN202310730656 A CN 202310730656A CN 116455336 B CN116455336 B CN 116455336B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The invention relates to the technical field of mobile communication, in particular to a differential predistortion power amplifier and a radio frequency front end, wherein a differential predistortion circuit is added between a differential input matching circuit and a differential power amplifying circuit, and the differential predistortion circuit comprises a P-end predistortion circuit and an N-end predistortion circuit which are completely symmetrical in structure; the P end of the differential predistortion circuit is connected with the differential P port of the differential input matching circuit and the input P end of the differential power amplification circuit, and the N end of the differential predistortion circuit is connected with the differential N port of the differential input matching circuit and the input N end of the differential power amplification circuit; and after the two paths of differential signals with the same amplitude and opposite phases output by the differential input matching circuit are respectively processed by the P-end predistortion circuit and the N-end predistortion circuit, the two paths of differential signals are respectively input into the two paths of amplifying circuits of the differential power amplifying circuit. The invention realizes the differential radio frequency power amplifier circuit with low static state, high linear performance and high efficiency by adding the differential predistortion circuit.
Description
Technical Field
The invention relates to the technical field of mobile communication, in particular to a differential predistortion power amplifier and a radio frequency front end.
Background
With popularization of the fifth generation mobile communication technology, performance of the radio frequency front end product required by the market is continuously improved, and a power amplifier chip of the radio frequency front end module is required to have higher linear output power, better linear backspacing, lower static loss, higher efficiency and wider bandwidth requirement.
In the prior art, the traditional predistortion circuit design is mainly aimed at a single-ended Power Amplifier (PA), and an introduced predistortion tube needs to be controlled by an external voltage, so that the design is complicated; a radio frequency amplifying circuit with a linear predistorter as in application number 200980161948.9.
For linear differential attack and defense, the application is less in the market, but the advantages of the differential circuit are incomparable with those of a single-ended power amplifier. For power amplifiers with the same die size, the differential impedance at the same output power is 4 times of the single-ended impedance, which means that the differential amplifier has smaller reflection coefficient and lower standing wave ratio, and is suitable for the design of a broadband power amplifier.
For a linear differential circuit, the radio frequency signals input and output by the differential amplifier have the same amplitude and opposite phases, so that the differential circuit has better shielding effect and better reliability on external electromagnetic interference (EMI) and crosstalk of nearby signals.
For a linear differential power amplifier, the static working point is improved, the working mode of the power amplifier is changed from Class AB to deep Class, and the output linearity index of the power amplifier is improved. However, the increase of the quiescent current increases the static loss of the power amplifier, and the efficiency of the power amplifier decreases. The quiescent current of the power amplifier is reduced, the gain of the power amplifier expands along with the increase of the output power, the AM-AM distortion brings about the deterioration of linearity, and the efficiency in the state is improved.
Therefore, how to improve the linearity index of the differential power amplifier under the condition of reducing the quiescent current of the differential amplifier is a problem to be solved at present.
Disclosure of Invention
The invention aims to provide a differential predistortion power amplifier and a radio frequency front end, which are used for solving the problem that the static current of the differential power amplifier is reduced in the prior art, and the linear index of the differential power amplifier is deteriorated.
In order to solve the above technical problems, the present invention provides a differential predistortion power amplifier, comprising:
a radio frequency input port;
the differential input matching circuit is connected with the radio frequency input port, converts an input signal into a first differential signal and a second differential signal which are identical in amplitude and opposite in phase, and outputs the first differential signal and the second differential signal through a differential P port and a differential N port of the differential input matching circuit respectively;
the differential predistortion circuit is arranged between the differential input matching circuit and the differential power amplification circuit and comprises a P-end predistortion circuit and an N-end predistortion circuit which are completely symmetrical in structure;
the differential power amplifying circuit comprises a first amplifying circuit and a second amplifying circuit which are completely symmetrical in structure and consistent in static working state;
the differential output matching circuit is connected with the output end of the differential power amplifying circuit;
the radio frequency output port is connected with the output end of the differential output matching circuit;
the P end of the differential predistortion circuit is connected with a differential P port of the differential input matching circuit and an input P end of the differential power amplification circuit, and the first differential signal is input into the first amplification circuit after being subjected to predistortion treatment by the P end predistortion circuit;
and the N end of the differential predistortion circuit is connected with the differential N port of the differential input matching circuit and the input N end of the differential power amplification circuit, and the second differential signal is input into the second amplification circuit after being subjected to predistortion treatment by the N end predistortion circuit.
Preferably, the P-terminal predistortion circuit is connected with the N-terminal predistortion circuit, and a circuit center symmetry point is taken as virtual ground.
Preferably, the P-terminal predistortion circuit and the N-terminal predistortion circuit are grounded respectively.
Preferably, the P-terminal predistortion circuit comprises a first transistor, and the N-terminal predistortion circuit comprises a second transistor; the P end of the differential predistortion circuit is the grid electrode of the first transistor, and the N end of the differential predistortion circuit is the grid electrode of the second transistor.
Preferably, the gate of the first transistor is connected to the input P end of the differential power amplifying circuit, the drain of the first transistor, and the source of the second transistor;
the grid electrode of the second transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the second transistor and is connected to the source electrode of the first transistor; a closed loop circuit of the differential predistortion circuit is formed.
Preferably, the grid electrode of the first transistor is connected with the input end P of the differential power amplifying circuit and the drain electrode of the first transistor, and the source electrode of the first transistor is grounded;
the grid electrode of the second transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the second transistor, and the source electrode of the second transistor is grounded; a closed loop circuit of the differential predistortion circuit is formed.
Preferably, the first transistor and the second transistor are double gate transistors;
the first grid electrode of the first transistor is connected with the first grid electrode of the input P end of the differential power amplifying circuit and the drain electrode of the first transistor; the second grid electrode of the first transistor is connected with the second grid electrode of the input end P of the differential power amplifying circuit;
the first grid electrode of the second transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the second transistor; the second grid electrode of the second transistor is connected with the second grid electrode of the input N end of the differential power amplifier.
Preferably, the P-terminal predistortion circuit and the N-terminal predistortion circuit are both composed of two transistors connected in series, and the P-terminal predistortion circuit comprises a third transistor and a fourth transistor; the N-terminal predistortion circuit includes a fifth transistor and a sixth transistor.
Preferably, the gate of the third transistor is connected to the input P end of the differential power amplifying circuit, the drain of the third transistor, and the source of the sixth transistor; the source electrode of the third transistor is connected with the grid electrode of the fourth transistor and the drain electrode of the fourth transistor;
the grid electrode of the fifth transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the fifth transistor and is connected to the source electrode of the fourth transistor; and the source electrode of the fifth transistor is connected with the drain electrode of the sixth transistor and the grid electrode of the sixth transistor to form a closed loop circuit of the differential predistortion circuit.
Preferably, the gate of the third transistor is connected to the input P end of the differential power amplifying circuit, the drain of the third transistor, and the source of the sixth transistor; a gate of the third transistor is connected with a gate of the fourth transistor; the source electrode of the third transistor is connected with the drain electrode of the fourth transistor;
the grid electrode of the fifth transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the fifth transistor and is connected to the source electrode of the fourth transistor; and the grid electrode of the fifth transistor is connected with the grid electrode of the sixth transistor, and the source electrode of the fifth transistor is connected with the drain electrode of the sixth transistor to form a closed loop circuit of the differential predistortion circuit.
Preferably, the third transistor and the fifth transistor are double-gate transistors, and the fourth transistor and the sixth transistor are single-gate transistors;
the first grid electrode of the third transistor is connected with the first grid electrode of the input P end of the differential power amplifying circuit and the drain electrode of the third transistor, and is connected to the source electrode of the sixth transistor; the second grid electrode of the third transistor is connected with the second grid electrode of the input end P of the differential power amplifying circuit;
the first grid electrode of the fifth transistor is connected with the first grid electrode of the input N end of the differential power amplifying circuit and the drain electrode of the fifth transistor, and is connected to the source electrode of the fourth transistor; and the second grid electrode of the fifth transistor is connected with the second grid electrode of the input N end of the differential power amplifying circuit.
The invention also provides a radio frequency front end which comprises the differential predistortion power amplifier.
The differential predistortion power amplifier provided by the invention is characterized in that a differential predistortion circuit is arranged between a differential input matching circuit and a differential power amplifying circuit, and because two paths of radio frequency differential signals output by a differential port of the differential input matching circuit have the same amplitude and opposite phases, the structures of a P-end predistortion circuit and an N-end predistortion circuit of the differential predistortion circuit are completely symmetrical. The differential power amplifying circuit comprises two paths of amplifying circuits with completely symmetrical structures and consistent static working states. The P end of the differential predistortion circuit is connected with the differential P port of the differential input matching circuit and the input P end of the differential power amplifying circuit, and a first differential signal output by the differential P port of the differential input matching circuit is input into the first amplifying circuit after being subjected to predistortion treatment by the P end predistortion circuit. The N end of the differential predistortion circuit is connected with the differential N port of the differential input matching circuit and the input N end of the differential power amplifying circuit, and a second differential signal output by the differential N port of the differential input matching circuit is input into the second amplifying circuit after being subjected to predistortion treatment by the N end predistortion circuit.
The differential predistortion circuit for the differential power amplifier provided by the invention adopts a completely symmetrical differential circuit structure, so that the symmetry and the phase balance degree of the circuit are ensured; and through increasing the design of the differential predistortion circuit, the phenomenon that the differential power amplifier is reduced due to the quiescent current is improved, the gain expands along with the increase of the input power, the change of AM-AM is reduced, the linear output power of the differential power amplifier is improved, meanwhile, the quiescent current is reduced, the loss of the power amplifier is reduced, and the efficiency of the power amplifier is improved.
Drawings
For a clearer description of embodiments of the invention or of the prior art, the drawings that are used in the description of the embodiments or of the prior art will be briefly described, it being apparent that the drawings in the description below are only some embodiments of the invention, and that other drawings can be obtained from them without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a differential predistortion power amplifier provided by the present invention;
FIG. 2 is a block diagram of a direct connection of a P-side predistortion circuit and an N-side predistortion circuit in a differential predistortion circuit;
FIG. 3 is a block diagram of the differential predistortion circuit with the P-terminal predistortion circuit and the N-terminal predistortion circuit grounded respectively;
FIG. 4 is a diagram of a first differential predistortion circuit provided by an embodiment of the present invention;
FIG. 5 is a block diagram of a differential power amplifier with a differential predistortion circuit according to an embodiment of the present invention;
FIG. 6 is a diagram of a second differential predistortion circuit provided by an embodiment of the present invention;
FIG. 7 is a diagram of a third differential predistortion circuit provided by an embodiment of the present invention;
FIG. 8 is a diagram of a fourth differential predistortion circuit provided by an embodiment of the present invention;
FIG. 9 is a diagram of a fifth differential predistortion circuit provided by an embodiment of the present invention;
FIG. 10 is a diagram of a sixth differential predistortion circuit provided by an embodiment of the present invention;
FIG. 11 is a diagram of a seventh differential predistortion circuit provided by an embodiment of the present invention;
FIG. 12 is a diagram of an eighth differential predistortion circuit provided by an embodiment of the present invention;
FIG. 13 is a graph comparing gain versus output power for a conventional differential power amplifier and a differential power amplifier with differential predistortion applied;
FIG. 14 is a graph comparing the third order intermodulation of a conventional differential power amplifier and a differential power amplifier with differential predistortion applied to the differential power amplifier with the change of output power;
description of the drawings: 1. a first transistor; 2. a second transistor; 51. a radio frequency input port; 52. a differential input matching circuit; 53. a differential predistortion circuit; 54. a differential power amplifying circuit; 55. a differential output matching circuit; 56. a radio frequency output port; 57. a bias circuit; 3. a third transistor; 4. a fourth transistor; 5. a fifth transistor; 6. and a sixth transistor.
Detailed Description
The core of the invention is to provide a differential predistortion power amplifier and a radio frequency front end, which are added with a differential predistortion circuit, so as to realize a differential radio frequency power amplifier circuit with low static state, high linear performance and high efficiency.
In order to better understand the aspects of the present invention, the present invention will be described in further detail with reference to the accompanying drawings and detailed description. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, fig. 1 is a circuit diagram of a differential predistortion power amplifier according to the present invention. The differential predistortion power amplifier provided by the embodiment of the invention comprises the following components: the device comprises a radio frequency input port, a differential input matching circuit, a differential predistortion circuit, a differential power amplification circuit, a differential output matching circuit and a radio frequency output port.
The differential input matching circuit is connected with the radio frequency input port, converts an input signal into a first differential signal and a second differential signal with the same amplitude and opposite phases, and outputs the first differential signal and the second differential signal through a differential P port and a differential N port with the same impedance and opposite phases respectively.
The differential predistortion circuit is arranged between the differential input matching circuit and the differential power amplification circuit and comprises a P-end predistortion circuit and an N-end predistortion circuit which are completely symmetrical in structure.
The P end of the differential predistortion circuit is connected with a differential P port of the differential input matching circuit and an input P end of the differential power amplification circuit, and the first differential signal is input into a first amplification circuit of the differential power amplification circuit after being subjected to predistortion treatment by the P end predistortion circuit;
the N end of the differential predistortion circuit is connected with the differential N port of the differential input matching circuit and the input N end of the differential power amplification circuit, and the second differential signal is input into the second amplification circuit of the differential power amplification circuit after being subjected to predistortion treatment by the N end predistortion circuit.
The first amplifying circuit and the second amplifying circuit of the differential power amplifying circuit are completely symmetrical in structure and consistent in static working state.
The differential output matching circuit is connected with the output end of the differential power amplifying circuit, and outputs the radio frequency signals output by the first amplifying circuit and the second amplifying circuit through the radio frequency output port after power synthesis is realized.
The structure of the differential predistortion circuit should meet the requirements that the radio frequency differential signals have the same amplitude and have 180 degrees phase difference, so that the P-terminal predistortion circuit and the N-terminal predistortion circuit of the differential predistortion circuit need to be completely symmetrical. In order to meet the symmetry of the differential predistortion circuit, (1) the P-terminal predistortion circuit and the N-terminal predistortion circuit may be directly connected, and the center symmetry point of the differential circuit is taken as virtual ground, as shown in fig. 2; (2) The P-terminal predistortion circuit and the N-terminal predistortion circuit may be respectively grounded as shown in fig. 3.
The transistor in the differential power amplifying circuit has different die sizes, the differential power amplifier has different P-1dB, and the differential power amplifier has different input power, so that the P-end predistortion circuit and the N-end predistortion circuit of the differential predistortion circuit can be correspondingly adjusted according to the die sizes of the transistors of the differential power amplifying circuit.
And when the P-end predistortion circuit and the N-end predistortion circuit of the differential predistortion circuit are directly connected, the P-end predistortion circuit and the N-end predistortion circuit are integrated, so that the module volume can be reduced, and the cost can be reduced.
Example 1
The P-end predistortion circuit and the N-end predistortion circuit of the differential predistortion circuit are directly connected, the P-end predistortion circuit and the N-end predistortion circuit are both composed of two transistors, the P-end predistortion circuit comprises a first transistor, and the N-end predistortion circuit comprises a second transistor. The P end of the differential predistortion circuit is the grid electrode of the first transistor, and the N end of the differential predistortion circuit is the grid electrode of the second transistor.
As shown in fig. 4 and 5, when the first transistor and the second transistor are both single-gate transistors, the gate of the first transistor is connected to the input P terminal of the differential power amplifying circuit, the drain of the first transistor, and to the source of the second transistor; the grid electrode of the second transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the second transistor and is connected to the source electrode of the first transistor; a closed loop circuit of the differential predistortion circuit is formed.
As shown in fig. 6, when the first transistor and the second transistor are both double-gate transistors, a first gate of the first transistor is connected to a first gate of an input P terminal of the differential power amplifying circuit, a drain of the first transistor, and is connected to a source of the second transistor; the second grid electrode of the first transistor is connected with the second grid electrode of the input end P of the differential power amplifying circuit; a first grid electrode of the second transistor is connected with an input N end of the differential power amplifying circuit and a drain electrode of the second transistor, and is connected to a source electrode of the first transistor; and a second grid electrode of the second transistor is connected with a second grid electrode of an input N end of the differential power amplifier to form a closed loop circuit of the differential predistortion circuit.
Example two
The P-end predistortion circuit and the N-end predistortion circuit of the differential predistortion circuit are directly connected, and the P-end predistortion circuit and the N-end predistortion circuit of the differential predistortion circuit are both composed of two transistors connected in series; the P-terminal predistortion circuit comprises a third transistor and a fourth transistor; the N-terminal predistortion circuit includes a fifth transistor and a sixth transistor.
As shown in fig. 7, when the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all single gate transistors, the gate of the third transistor is connected to the input P terminal of the differential power amplifying circuit, the drain of the third transistor, and the source of the sixth transistor; the source electrode of the third transistor is connected with the grid electrode of the fourth transistor and the drain electrode of the fourth transistor; the grid electrode of the fifth transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the fifth transistor and is connected to the source electrode of the fourth transistor; and the source electrode of the fifth transistor is connected with the drain electrode of the sixth transistor and the grid electrode of the sixth transistor to form a closed loop circuit of the differential predistortion circuit.
When the third transistor and the fifth transistor are double-gate transistors and the fourth transistor and the sixth transistor are single-gate transistors in the differential predistortion circuit structure shown in fig. 7, the differential predistortion circuit structure is as shown in fig. 8: the first grid electrode of the third transistor is connected with the first grid electrode of the input P end of the differential power amplifying circuit, the drain electrode of the third transistor and the source electrode of the sixth transistor; the source electrode of the third transistor is connected with the grid electrode of the fourth transistor and the drain electrode of the fourth transistor; the second grid electrode of the third transistor is connected with the second grid electrode of the input end P of the differential power amplifying circuit; the first grid electrode of the fifth transistor is connected with the first grid electrode of the input N end of the differential power amplifying circuit and the drain electrode of the fifth transistor, and is connected to the source electrode of the fourth transistor; the source electrode of the fifth transistor is connected with the drain electrode of the sixth transistor and the grid electrode of the sixth transistor; and the second grid electrode of the fifth transistor is connected with the second grid electrode of the input N end of the differential power amplification circuit to form a closed loop circuit of the differential predistortion circuit.
The differential predistortion circuit configuration shown in fig. 9 is a modification of the differential predistortion circuit configuration shown in fig. 7. As shown in fig. 9, when the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all single gate transistors, the gate of the third transistor is connected to the input P terminal of the differential power amplifying circuit, the drain of the third transistor, and the source of the sixth transistor; a gate of the third transistor is connected with a gate of the fourth transistor; the source electrode of the third transistor is connected with the drain electrode of the fourth transistor; the grid electrode of the fifth transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the fifth transistor and is connected to the source electrode of the fourth transistor; and the grid electrode of the fifth transistor is connected with the grid electrode of the sixth transistor, and the source electrode of the fifth transistor is connected with the drain electrode of the sixth transistor to form a closed loop circuit of the differential predistortion circuit.
When the third transistor and the fifth transistor are double-gate transistors and the fourth transistor and the sixth transistor are single-gate transistors in the differential predistortion circuit structure shown in fig. 9, the differential predistortion circuit structure is as shown in fig. 10: the first grid electrode of the third transistor is connected with the first grid electrode of the input P end of the differential power amplifying circuit and the drain electrode of the third transistor, and is connected to the source electrode of the sixth transistor; a gate of the third transistor is connected with a gate of the fourth transistor; the source electrode of the third transistor is connected with the drain electrode of the fourth transistor; the second grid electrode of the third transistor is connected with the second grid electrode of the input end P of the differential power amplifying circuit; the first grid electrode of the fifth transistor is connected with the first grid electrode of the input N end of the differential power amplifying circuit and the drain electrode of the fifth transistor, and is connected to the source electrode of the fourth transistor; the grid electrode of the fifth transistor is connected with the grid electrode of the sixth transistor, and the source electrode of the fifth transistor is connected with the drain electrode of the sixth transistor; and the second grid electrode of the fifth transistor is connected with the second grid electrode of the input N end of the differential power amplification circuit to form a closed loop circuit of the differential predistortion circuit.
Example III
When the P-terminal predistortion circuit and the N-terminal predistortion circuit of the differential predistortion circuit are respectively grounded, and the first transistor of the P-terminal predistortion circuit and the second transistor of the N-terminal predistortion circuit are both single-gate transistors, the structure of the differential predistortion circuit is as shown in fig. 11, the gate of the first transistor is connected with the input P-terminal of the differential power amplification circuit and the drain of the first transistor, and the source of the first transistor is grounded; the grid electrode of the second transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the second transistor, and the source electrode of the second transistor is grounded; a closed loop circuit of the differential predistortion circuit is formed.
As shown in fig. 12, when the P-terminal predistortion circuit and the N-terminal predistortion circuit are respectively grounded, and the first transistor and the second transistor are both double-gate transistors, a first gate of the first transistor is connected with a first gate of an input P-terminal of the differential power amplification circuit and a drain of the first transistor, a source of the first transistor is grounded, and a second gate of the first transistor is connected with a second gate of an input P-terminal of the differential power amplification circuit; the first grid electrode of the second transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the second transistor, the source electrode of the second transistor is grounded, and the second grid electrode of the second transistor is connected with the second grid electrode of the input N end of the differential power amplifier to form a closed loop circuit of the differential predistortion circuit.
As shown in fig. 13, the gain change curve of the power amplifier at the conventional low quiescent current is a circular sign curve, and as the output power increases, the maximum gain is 29dBm at the output, which is expanded by about 1dB compared with the output low power. The gain change curve of the differential power amplifier added with the differential predistortion circuit is a triangle sign curve, and as the output power increases, the maximum gain is 29dBm at the output, and the gain is expanded by about 0.3dB compared with the low power at the output. The two curves are compared, and the differential predistortion circuit is found to improve the differential PA AM-AM curve, so that the amplitude distortion is reduced.
As shown in fig. 14, the power amplifier third-order intermodulation curve under the conventional low static current is a circular sign curve by adopting the 2-Tone signal Frequency Spacing MHz, the differential power amplifier third-order intermodulation curve added with the differential predistortion circuit is a triangular sign curve by adopting the power variation curve under the conventional low static current, and when the required output power is 22 dbm-28 dbm, the differential power amplifier third-order intermodulation added with the differential predistortion circuit is better than the differential power amplifier third-order intermodulation without predistortion by 5-10 db, thereby greatly improving the linearity by introducing the differential predistortion circuit into the radio frequency differential power amplifier circuit.
The differential predistortion circuit provided by the embodiment of the invention adopts a completely symmetrical differential circuit structure, so that the symmetry and the phase balance degree of the circuit are ensured; in addition, the differential predistortion circuit improves the curve expansion phenomenon of the gain of the differential power amplifier along with the output power under the condition that the quiescent current of the differential power amplifier is reduced, and improves the AM-AM curve. The differential predistortion circuit has various sizes and various structures, and provides an alternative scheme for different sizes of die sizes of the differential power amplifier. And the example simulation proves that under the condition of reducing the static current, the differential predistortion circuit is added, so that the third-order intermodulation is reduced, and the linearity of the differential power amplifier is improved. In addition, the quiescent current of the differential power amplifier is reduced, the quiescent loss of the differential power amplifier is reduced, and the output efficiency of the power amplifier is improved.
The embodiment of the invention also provides a radio frequency front end which comprises the differential predistortion power amplifier.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, so that the same or similar parts between the embodiments are referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
The differential predistortion power amplifier and the radio frequency front end provided by the invention are described in detail above. The principles and embodiments of the present invention have been described herein with reference to specific examples, the description of which is intended only to facilitate an understanding of the method of the present invention and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the invention can be made without departing from the principles of the invention and these modifications and adaptations are intended to be within the scope of the invention as defined in the following claims.
Claims (4)
1. A differential predistortion power amplifier, comprising:
a radio frequency input port;
the differential input matching circuit is connected with the radio frequency input port, converts an input signal into a first differential signal and a second differential signal which are identical in amplitude and opposite in phase, and outputs the first differential signal and the second differential signal through a differential P port and a differential N port of the differential input matching circuit respectively;
the differential predistortion circuit is arranged between the differential input matching circuit and the differential power amplification circuit and comprises a P-end predistortion circuit and an N-end predistortion circuit which are completely symmetrical in structure; the P-end predistortion circuit is connected with the N-end predistortion circuit by taking a circuit center symmetry point as virtual ground or the P-end predistortion circuit and the N-end predistortion circuit are respectively grounded;
the differential power amplifying circuit comprises a first amplifying circuit and a second amplifying circuit which are completely symmetrical in structure and consistent in static working state;
the differential output matching circuit is connected with the output end of the differential power amplifying circuit;
the radio frequency output port is connected with the output end of the differential output matching circuit;
the P end of the differential predistortion circuit is connected with a differential P port of the differential input matching circuit and an input P end of the differential power amplification circuit, and the first differential signal is input into the first amplification circuit after being subjected to predistortion treatment by the P end predistortion circuit;
the N end of the differential predistortion circuit is connected with the differential N port of the differential input matching circuit and the input N end of the differential power amplification circuit, and the second differential signal is input into the second amplification circuit after being subjected to predistortion treatment by the N end predistortion circuit;
when the P-end predistortion circuit comprises a first transistor, the N-end predistortion circuit comprises a second transistor; the P-terminal of the differential predistortion circuit is the gate of the first transistor, and the N-terminal of the differential predistortion circuit is the gate of the second transistor:
the grid electrode of the first transistor is connected with the input end P of the differential power amplifying circuit and the drain electrode of the first transistor, and the source electrode of the first transistor is grounded or connected to the grid electrode of the second transistor;
the grid electrode of the second transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the second transistor, and the source electrode of the second transistor is grounded or connected to the grid electrode of the first transistor; forming a closed loop circuit of the differential predistortion circuit;
when the P-terminal predistortion circuit and the N-terminal predistortion circuit are both composed of two transistors connected in series, the P-terminal predistortion circuit comprises a third transistor and a fourth transistor; when the N-terminal predistortion circuit includes a fifth transistor and a sixth transistor:
the grid electrode of the third transistor is connected with the input P end of the differential power amplifying circuit and the drain electrode of the third transistor, and is connected to the source electrode of the sixth transistor; the source electrode of the third transistor is connected with the grid electrode of the fourth transistor and the drain electrode of the fourth transistor;
the grid electrode of the fifth transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the fifth transistor and is connected to the source electrode of the fourth transistor; the source electrode of the fifth transistor is connected with the drain electrode of the sixth transistor and the grid electrode of the sixth transistor to form a closed loop circuit of the differential predistortion circuit;
or (b)
The grid electrode of the third transistor is connected with the input P end of the differential power amplifying circuit and the drain electrode of the third transistor, and is connected to the source electrode of the sixth transistor; a gate of the third transistor is connected with a gate of the fourth transistor; the source electrode of the third transistor is connected with the drain electrode of the fourth transistor;
the grid electrode of the fifth transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the fifth transistor and is connected to the source electrode of the fourth transistor; and the grid electrode of the fifth transistor is connected with the grid electrode of the sixth transistor, and the source electrode of the fifth transistor is connected with the drain electrode of the sixth transistor to form a closed loop circuit of the differential predistortion circuit.
2. The differential predistortion power amplifier of claim 1, wherein said first transistor and said second transistor are dual gate transistors;
the first grid electrode of the first transistor is connected with the first grid electrode of the input P end of the differential power amplifying circuit and the drain electrode of the first transistor; the second grid electrode of the first transistor is connected with the second grid electrode of the input end P of the differential power amplifying circuit;
the first grid electrode of the second transistor is connected with the input N end of the differential power amplifying circuit and the drain electrode of the second transistor; and a second grid electrode of the second transistor is connected with a second grid electrode of an input N end of the differential power amplifying circuit.
3. The differential predistortion power amplifier of claim 1, wherein said third transistor and said fifth transistor are double gate transistors and said fourth transistor and said sixth transistor are single gate transistors;
the first grid electrode of the third transistor is connected with the first grid electrode of the input P end of the differential power amplifying circuit and the drain electrode of the third transistor, and is connected to the source electrode of the sixth transistor; the second grid electrode of the third transistor is connected with the second grid electrode of the input end P of the differential power amplifying circuit;
the first grid electrode of the fifth transistor is connected with the first grid electrode of the input N end of the differential power amplifying circuit and the drain electrode of the fifth transistor, and is connected to the source electrode of the fourth transistor; and the second grid electrode of the fifth transistor is connected with the second grid electrode of the input N end of the differential power amplifying circuit.
4. A radio frequency front end comprising a differential predistortion power amplifier as claimed in any one of claims 1 to 3.
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| CN103138689A (en) * | 2011-12-01 | 2013-06-05 | 三星电机株式会社 | Power amplifier |
| US9755594B1 (en) * | 2016-05-19 | 2017-09-05 | Shenzhen South Silicon Valley Microelectronics Co., Limited | Power amplifying circuit |
| CN110677132A (en) * | 2019-09-05 | 2020-01-10 | 广州穗源微电子科技有限公司 | Radio frequency linear power amplifier circuit |
| CN111683027A (en) * | 2020-03-19 | 2020-09-18 | 广州润芯信息技术有限公司 | Satellite up-converter based on intermediate frequency analog predistortion |
| CN116169965A (en) * | 2023-02-27 | 2023-05-26 | 广东工业大学 | 5G communication system and power amplifier based on predistortion millimeter wave broadband |
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| US7421254B2 (en) * | 2003-10-23 | 2008-09-02 | Broadcom Corporation | High linearity, high efficiency power amplifier with DSP assisted linearity optimization |
| DE102004019366B4 (en) * | 2004-04-21 | 2006-05-04 | Infineon Technologies Ag | Circuit arrangement for a broadband mixer with predistortion and high linearity and method for broadband mixing |
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| US9755594B1 (en) * | 2016-05-19 | 2017-09-05 | Shenzhen South Silicon Valley Microelectronics Co., Limited | Power amplifying circuit |
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